CN108428693A - 集成电路封装 - Google Patents

集成电路封装 Download PDF

Info

Publication number
CN108428693A
CN108428693A CN201810151190.5A CN201810151190A CN108428693A CN 108428693 A CN108428693 A CN 108428693A CN 201810151190 A CN201810151190 A CN 201810151190A CN 108428693 A CN108428693 A CN 108428693A
Authority
CN
China
Prior art keywords
antenna
integrated
layer
metal layer
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810151190.5A
Other languages
English (en)
Inventor
玛丽斯泰拉·斯佩拉
瓦卡斯·哈桑·赛义德
达妮埃莱·卡瓦洛
黄明达
莱奥·范·海默特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of CN108428693A publication Critical patent/CN108428693A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/40Radiating elements coated with or embedded in protective material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q13/00Waveguide horns or mouths; Slot antennas; Leaky-waveguide antennas; Equivalent structures causing radiation along the transmission path of a guided wave
    • H01Q13/10Resonant slot antennas
    • H01Q13/16Folded slot antennas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q15/00Devices for reflection, refraction, diffraction or polarisation of waves radiated from an antenna, e.g. quasi-optical devices
    • H01Q15/02Refracting or diffracting devices, e.g. lens, prism
    • H01Q15/10Refracting or diffracting devices, e.g. lens, prism comprising three-dimensional array of impedance discontinuities, e.g. holes in conductive surfaces or conductive discs forming artificial dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q19/00Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic
    • H01Q19/06Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using refracting or diffracting devices, e.g. lens
    • H01Q19/09Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using refracting or diffracting devices, e.g. lens wherein the primary active element is coated with or embedded in a dielectric or magnetic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q19/00Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic
    • H01Q19/10Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using reflecting surfaces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q19/00Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic
    • H01Q19/28Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using a secondary device in the form of two or more substantially straight conductive elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00Antenna arrays or systems
    • H01Q21/06Arrays of individually energised antenna units similarly polarised and spaced apart
    • H01Q21/061Two dimensional planar arrays
    • H01Q21/064Two dimensional planar arrays using horn or slot aerials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6605High-frequency electrical connections
    • H01L2223/6627Waveguides, e.g. microstrip line, strip line, coplanar line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6661High-frequency adaptations for passive devices
    • H01L2223/6677High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6683High-frequency adaptations for monolithic microwave integrated circuit [MMIC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241Disposition
    • H01L2224/24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24153Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/24195Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/20Structure, shape, material or disposition of high density interconnect preforms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/141Analog devices
    • H01L2924/142HF devices
    • H01L2924/1421RF devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/141Analog devices
    • H01L2924/1423Monolithic Microwave Integrated Circuit [MMIC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/15321Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)
  • Geometry (AREA)
  • Waveguide Aerials (AREA)
  • Details Of Aerials (AREA)

Abstract

描述一种集成电路封装,其包括:集成电路管芯;以及天线结构,其耦合到所述集成电路管芯且包括金属和电介质层的堆叠布置,其中第一金属层包括平面天线且至少一个另外金属层包括人造电介质层。所述集成电路封装可改进所述天线的方向性且减小所述天线对上面安装所述集成电路封装的印刷电路板的敏感度。

Description

集成电路封装
技术领域
本发明涉及一种包括天线的集成电路封装。
背景技术
用于例如汽车雷达等毫米波(mm波)应用的RF装置可包括集成于集成电路封装中的天线,所述天线也可称作封装中天线。在mm波频率下,系统的RF性能不再仅是通过收发器电路和天线来确定,而且很大程度上取决于封装以及收发器与天线之间的互连。用于封装中天线装置的实例封装类型是扇出封装,例如嵌入式晶片级球栅阵列(eWLB)。eWLB通常包括围绕封装的半导体管芯或小片的模制化合物。eWLB封装可具有与球栅阵列(BGA)的焊料球在封装的同一主表面上的一个再分布层(RDL)。一些eWLB封装可具有与焊料球在相反主表面上的第二再分布层。穿过模制化合物形成的导通孔可用以电连接所述第一和第二再分布层。eWLB封装的相反主表面也可称作封装的前侧和背侧。
使用eWLB封装概念的封装中天线可在再分布层中的一个中形成平面天线。为了改进天线沿目标方向的功率辐射,通常实施反射器。在一些实施方案中,此反射器使用封装焊接到的外部印刷电路板的顶层金属。在此情况下,反射器的有效性取决于焊接工艺,这是由于焊料球的高度限定反射器与天线之间的距离。因此,此高度的变化可影响天线的匹配和插入损耗。
具有两个再分布层的eWLB封装中的替代性例子使用再分布层中的一个的金属层将反射器集成到封装中且将天线集成到另一再分布层中。在此情况下,天线性能很大程度上取决于模具厚度,这是由于在较高频率下,表面波损失可能非常高,这可恶化远场辐射方向图和所需方向上的天线增益。此表面波损失可导致天线效率减小到40%或更低。
一般来说,天线性能受封装厚度影响,所述封装厚度在eWLB封装中在mm波频率范围内在电性上是厚的。eWLB封装本身支持在封装内弹跳的导波(表面波)的传播,这使得天线性能对封装尺寸非常敏感。
此外,天线极为贴近主要由例如硅或砷化镓等具有高于10的高相对介电常数的材料组成的芯片。因此,辐射功率的相当大部分往往会与集成电路管芯或芯片耦合,而不是辐射到封装外部。这可导致来自天线的不对称且降级辐射方向图。
发明内容
在所附权利要求书中限定本发明的各种方面。在第一方面中,限定一种集成电路封装,其包括:集成电路管芯;天线结构,其耦合到集成电路管芯且包括金属和电介质层的堆叠布置,其中第一金属层包括平面天线且至少一个另外金属层包括人造电介质层。
在一或多个实施例中,天线结构可包括:第二金属层,其包括天线馈电结构,所述天线馈电结构电连接到集成电路管芯,其中平面天线被配置成电磁耦合到天线馈电结构。
在一或多个实施例中,第一金属层可另外包括天线馈电结构,且平面天线可被配置成电磁耦合到天线馈电结构。
在一或多个实施例中,平面天线可包括至少两个隙缝。
在一或多个实施例中,集成电路封装可包括四个平面天线的阵列。
在集成电路封装的一或多个实施例中,人造电介质层可包括布置于栅格中的多个金属形状。
在集成电路封装的一或多个实施例中,至少一个另外层包括第一另外金属层和第二另外金属层,其中第一和第二另外金属层中的每一个至少部分地被图案化以形成人造电介质层。
在集成电路封装的一或多个实施例中,天线结构可包括多层印刷电路板。
在集成电路封装的一或多个实施例中,天线结构和集成电路管芯可垂直堆叠。
在集成电路封装的一或多个实施例中,集成电路管芯可为单片微波集成电路。
在一或多个实施例中,集成电路封装可包括具有再分布金属层的第一再分布层,其中集成电路通过再分布金属层电连接到天线结构。
在集成电路封装的一或多个实施例中,再分布金属层可形成天线结构的部分。
集成电路封装的一或多个实施例可另外包括第二再分布层,其中至少一个人造电介质层形成于第一再分布层和第二再分布层中的至少一个中。
集成电路封装的实施例可包括在嵌入式晶片级球栅阵列封装中。
集成电路封装的实施例可包括在机动车辆的雷达装置中。
附图说明
在附图和描述中,相似的附图标记指代相似特征。现在仅借助于由附图示出的例子详细地描述实施例,在附图中:
图1A示出根据一实施例的集成电路封装的横截面。
图1B示出图1A的集成电路封装的平面视图。
图1C示出包括在图1A的集成电路封装中的天线结构的金属层的平面视图。
图2A示出根据一实施例的集成电路封装的横截面。
图2B示出图2A的集成电路的平面视图。
图2C示出包括在图2A的集成电路封装中的天线结构的金属层的3D视图。
图3A示出根据一实施例的包括集成天线的集成电路封装。
图3B示出根据一实施例的包括集成天线的集成电路封装。
图4A示出根据一实施例的集成电路封装的横截面。
图4B示出包括在图4A的集成电路封装中的天线结构的金属层的3D视图。
图4C示出图4A的集成电路封装的平面视图。
图4D示出具有图4A的管芯和天线结构的替代性布置的集成电路封装的平面视图。
图5A示出处于77GHz单个频率下的操作中的图4A的天线阵列,其指示E平面和H平面。
图5B示出当在封装外部时E平面中针对图4B中示出的天线阵列的数个不同扫描角度的辐射方向图的曲线图。
图5C示出当在封装外部时图4B中示出的天线阵列的H平面中的辐射方向图的极坐标图。
图5D示出指示在操作中的E平面和H平面的图4A的天线阵列。
图5E示出当包括在图4A中示出的集成电路封装中时图4B中示出的天线阵列的H平面中的辐射方向图的极坐标图。
图6A示出针对图4A的封装中天线的E平面中的辐射方向图的模拟的极坐标图。
图6B示出用于无人造电介质层的图4A的封装中天线的类似天线的辐射的模拟的极坐标图。
具体实施方式
图1A示出根据一实施例实施为嵌入式晶片级BGA的集成电路封装100的横截面。集成电路封装100包括天线结构150,其包括通过电介质层110分隔开的第一金属层108和第二金属层112的堆叠布置。可使用多层印刷电路板(PCB)实施天线结构150。第一金属层108可图案化为包括金属正方形106的规则栅格。第二金属层112可形成具有共平面波导进给器结构(未示出)的平面隙缝天线114。天线结构150可沿方向132发射。集成电路封装100还包括可实施例如射频(RF)收发器的集成电路管芯104。在一些例子中,集成电路管芯104可为单片微波集成电路(MMIC)。集成电路管芯104和天线105可嵌入于模制化合物102中。再分布层(RDL)122可形成于模制化合物102的主表面中的一个上。此工艺可称为最后RDL。
再分布层122可包括第一电介质层126、再分布金属层118、第二电介质层126′以及任选地球栅阵列的焊料球124可附接到的凸块下金属化(UBM)垫120。应了解,BGA通常具有布置于栅格中的接着焊接到集成电路封装100外部的印刷电路板128的数个垫和焊料球。一个或多个导通孔116、116′、116″可形成于再分布层122上的第一电介质126中以将集成电路管芯104电连接到球栅阵列的垫120。集成电路管芯104可通过导通孔116、116′和再分布金属层118电连接到天线结构的第二金属层112。
图1B示出图1A的集成电路封装的平面视图,其示出天线结构150和管芯104的相对布置。
可参考示出天线结构150的金属层108、112的平面视图的图1C理解天线结构150的另外细节。标示为A的虚线指示图1A中示出的金属层108、112的横截面。第一金属层108可图案化为包括金属正方形106的规则栅格。第一金属层108上的金属正方形106可称为人造电介质层(ADL)或电容性栅格。金属正方形106中的每一个的最大尺寸必须小于托管发射波的人造电介质层106的电介质的波长的四分之一以确保其为非谐振的。在其它例子中,还可使用例如圆形、六边形、矩形等周期性地布置的不同金属形状以形成ADL或电容性栅格。
在托管电介质110中包括一个或多个ADL 106会增加有效电容率,这可改进天线的方向性,使得其在所需方向132上发射更多能量。对于各向同性材料,高相对电容率(>10)可致使材料空气界面处的强反射,从而支持表面波。归因于ADL的各向异性行为,ADL对于垂直于金属层行进的辐射合成高相对电容率(>10),但对于平行于金属层行进的辐射合成低有效电容率。通过通常低得多(例如小于5)的托管电介质的相对电容率确定对于平行于金属层行进的辐射的电容率。此各向异性行为可减少封装的顶部界面处的反射且减小到表面波中的功率损失。与已知的封装中天线解决方案相比,集成电路封装100可减少归因于表面波的损失。
第二金属层112可形成具有共平面波导馈电线结构130的平面隙缝天线114。在其它例子中,可使用不同平面天线,例如贴片、偶极子和环路天线。在其它例子中,可实施不同馈电线结构,例如单端和差分馈电线结构、H隙缝共平面波导馈电、H隙缝微带馈电、使用共平面波导馈电或微带馈电的公司馈电网络、或差分微带馈电。在一些例子中,也可直接使用再分布金属层118形成馈电线结构130和平面隙缝天线114。在此情况下,可省略导通孔116和第二金属层112。
集成电路封装100可在不需要反射器的情况下改进天线性能。反射器通常需要相对大区域,这可造成较大封装和/或对再分布层112或外部印刷电路板128中所需的金属布线的约束。天线结构150不需要金属层108和112之间的任何导通孔。通过减少或消除金属层之间的导通孔,可减小mm波频率下的插入损耗且可避免使用额外匹配电路。另外,可减小制造包括天线的集成电路封装的成本和复杂性。集成电路封装100可改进具有减小的封装大小的封装中天线性能。由于天线结构150可实施为印刷电路板,所以与例如焊料球124相对于外部PCB 128的高度相比可更准确地控制层之间的距离。这与需要外部反射器的封装中天线解决方案相比可减少天线性能的变化。
人造电介质层106可独立于特定平面天线进行设计且可被实施为使得其高于天线或与天线重叠。然而,不要求人造电介质层和平面天线之间的精细对准。这可允许使用标准印刷电路板薄膜制造技术实施天线结构150。可使用eWLB封装实施集成电路封装100。然而,由于天线结构150可实施为多层印刷电路板(PCB),所以应了解,可使用其它BGA封装技术。
集成电路封装100可用在高于120GHz的频率下操作的集成天线实施mm波收发器装置。在其它例子中,集成电路封装可实施供在76GHz到81GHz的频率范围下操作的汽车雷达系统中以及在例如停车辅助、横向防撞、手势辨识等应用中使用的收发器。在其它例子中,集成电路封装100可实施供在可在60GHz的频率下操作的数千兆位通信系统中使用的收发器。在其它例子中,集成电路封装100可实施在大于40GHz的频率下操作的收发器。
图2A示出根据一实施例实施为嵌入式晶片级BGA的集成电路封装200的横截面。集成电路封装200包括天线结构250,其包括第一金属层208、第二金属层208′、第三金属层212和第四金属层236的堆叠布置。金属层208、208′、212、236通过电介质层210、210′、210″分隔开。第一金属层208可图案化为包括金属正方形206的规则栅格。图案化于第一金属层208上的金属正方形206可称为第一人造电介质层(ADL)。第二金属层208′可图案化为包括金属正方形206′的规则栅格。图案化于第二金属层208′上的金属正方形206′可称为第二人造电介质层(ADL)。人造电介质层206、206′可通过提高由箭头232指示的所需方向上的辐射量来改进天线的增益。可使用多层印刷电路板实施天线结构250。集成电路封装200还包括可实施例如射频(RF)收发器的集成电路管芯204。在一些例子中,集成电路管芯204可为单片微波集成电路(MMIC)。集成电路管芯204和天线结构250可嵌入于模制化合物202中。孔口230可形成于模制化合物202中,使得暴露天线结构250的表面。再分布层(RDL)222可与孔口230形成于模制化合物202的相反表面上。
再分布层222可包括第一电介质层226、再分布金属层218、第二电介质层226′以及任选地球栅阵列的焊料球224可附接到的凸块下金属化(UBM)垫220。
应了解,集成电路封装200具有布置于栅格中的可焊接到外部印刷电路板(未示出)的数个垫和焊料球。一个或多个导通孔216、216′、216″可形成于第一电介质层226中以用于将集成电路管芯204电连接到球栅阵列的垫220和天线结构250。差分馈电线228可实施于天线结构250的第四金属层236中。集成电路管芯204可用导通孔216、216′和再分布金属层218电连接到差分馈电线228。仅明确示出天线结构250和集成电路管芯204之间的一个连接。所属领域的技术人员将理解,再分布金属层218中的另外导通孔和金属迹线可用以形成管芯204和天线结构250的第四金属层236之间的另外电连接。第三金属层212可包括平面双隙缝天线214。隙缝214可尺寸设定为使得其在所需谐振频率下被匹配。举例来说,对于汽车雷达应用,隙缝长度尺寸可选择为近似为77GHz长的波长的一半。在此情况下,隙缝被调谐到第一谐振频率。在其它例子中,可选择具有接近于针对第二谐振频率进行调谐的波长的尺寸的长度。一般来说,取决于调谐天线的频率或频率范围来选择隙缝长度。
差分馈电线结构可在操作中以电磁方式耦合到双隙缝天线214,且因此在第三金属层212和第四金属层236之间无需导通孔。在其它例子中,可实施不同平面天线和不同馈电线结构。举例来说,可使用再分布金属层218实施差分馈电线结构。在此情况下可考虑再分布层222形成天线结构的部分,且可省略第四金属层216和电介质层210″。
图2B示出图2A的集成电路封装的平面视图,其示出天线结构250和管芯204的相对布置。
可参考示出天线结构250的金属层的平面视图的图2C理解天线结构250的另外细节。标示为B的虚线指示图2A中示出的金属层的横截面。与宿主材料(即,形成电介质层210、210′和210″的材料)的介电常数相比,由第一ADL 206、电介质层210和第二ADL206′形成的人造电介质通常增加有效介电常数。有效介电常数的此增加可改进天线结构的方向性。第一金属层208和第二金属层208′上的图案化可对准,但可在多层PCB制造工艺的正常容差内不对准。在其它例子中,可通过设计不对准第一人造电介质层206和第二人造电介质层206′。这可另外增加人造电介质的有效电容率。第一金属层208和第二金属层208′上的人造电介质层206、206′的图案化可相同。
集成电路封装200中的ADL 206、206′归因于两个效应而形成等效电介质。首先是ADL单层或电容性栅格的电容,对于集成电路封装100也是同样的情况,其次是ADL层206、206′之间的电容。
此两个电容的组合造成入射的RF波在时间上延迟。此延迟转移到当与托管ADL层的材料的介电常数相比时具有较高电容率的等效介质。
然而,在单层的情况下,不存在层间电容的效应。因此,总电容(因此延迟)小于当使用两个或多个层的层叠时的情况。然而,可选择ADL的单层的电容以获得匹配非常类似于两层的电容的情况的天线(即,从76-81GHz<=-10dB)。
由一个或多个ADL层206、206′形成的等效电介质可改进所需方向上的天线增益的方向性。集成电路封装200可在不需要反射器的情况下改进天线性能。
反射器通常需要相对大的区域,这可造成较大封装和/或对再分布层或外部印刷电路板中所需的金属布线的约束。反射器可将约束施加于封装,例如对不具有焊料球的封装需要余隙区域。当焊接到外部PCB上时,具有较少焊料球可减小封装的机械强度,这可减小电路和/或封装的可靠性。通过去除对反射器的要求,包括集成电路封装200的电子系统可具有改进的可靠性。
此外,天线结构250不需要金属层208、208′、212和236中的任一个之间的任何导通孔。集成电路封装200可改进具有减小的封装大小的封装中天线性能。由于天线结构250可实施为印刷电路板,所以与例如焊料球224相对于外部印刷电路板的高度相比可更准确地控制层之间的距离。与需要外部反射器的封装中天线解决方案相比,天线结构250的性能可更具可预测性。
人造电介质层可独立于特定平面天线进行设计,且虽然ADL可实施为高于天线或与天线重叠,但不要求人造电介质层和天线之间或人造电介质层之间精细对准。这允许使用标准印刷电路板薄膜制造技术的实施方案。集成电路封装200可实施为eWLB封装。
图3A示出包括集成天线的倒装芯片BGA集成电路封装300。集成电路封装300具有包括通过电介质层(未示出)分隔开的数个金属层的基板302。基板302通常使用标准印刷电路板制造工艺形成。类似于图2中描述的天线结构的天线结构250′可形成为多层印刷电路板且附接到基板302。天线结构250′可通过模制化合物304包覆模制而成。管芯204′可与具有附接的焊料球310的UBM垫312安装于基板302的同一侧上。在其它例子中,管芯204′可安装于基板302的相对侧上。管芯204′可用倒装芯片凸块308电连接到UBM垫,所述倒装芯片凸块308连接到用以形成UBM垫312的再分布金属层。可在管芯204′和多层衬底304之间添加底部填充粘附剂314。管芯204′可通过金属连接件306和导通孔318电连接到天线结构。天线结构250′包括如先前针对图2所描述的人造电介质层。由于天线结构250′可实施为印刷电路板,所以与例如焊料球310相对于外部印刷电路板的高度相比可更准确地控制层之间的距离。与需要外部反射器的封装中天线解决方案相比,天线结构250′的性能可更具可预测性。应了解,还可使用本说明书中描述的其它天线结构来代替天线结构250′。如所示,天线结构250′示出为偏移到管芯204′的侧。应了解,管芯204′和天线结构250′的其它布置是可能的。在一些例子中,天线结构250′可在垂直堆叠中布置于管芯204′正上方。在操作中,天线结构250′可归因于人造电介质层而优先在方向320′上发射辐射。应了解,天线结构250′可优先从与方向320′相反的方向接收RF信号
图3B示出包括集成天线的嵌入式管芯BGA集成电路封装350。集成电路封装350具有第一基板352和包括通过形成于第一基板352上方的电介质层366分隔开的数个金属层364的多层基板352。多层基板354通常使用标准印刷电路板制造工艺形成。管芯204″安装于基板352上且通过形成于基板352中的导通孔358连接到UBM垫362。UBM垫362可具有附接的焊料球360。类似于图2中描述的天线结构的天线结构250″可形成于多层基板354内。管芯204″可定位于形成于多层基板354中的腔内且通过金属连接件356电连接到天线结构250″。天线结构250″包括如先前针对图2所描述的人造电介质层,这可减小天线损失。由于天线结构250″可实施为形成于多层基板354中的印刷电路板,所以与例如焊料球360相对于外部印刷电路板的高度相比可更准确地控制层之间的距离。与需要外部反射器的封装中天线解决方案相比,天线结构250″的性能可更具可预测性。应了解,还可使用本说明书中描述的其它天线结构来代替天线结构250″。在操作中,天线结构250″可归因于人造电介质层而优先在方向320上发射辐射。在其它例子中,可类似于天线250使用单独印刷电路板形成天线250″。在此情况下,天线可放置于多层基板354中的腔内。
图4A示出根据一实施例实施为嵌入式晶片级BGA的集成电路封装400的横截面,其具有前侧再分布层430和背侧再分布层422。
背侧再分布层422可形成于模制化合物402的第一主表面上。背侧再分布层422可包括第一电介质层426、再分布金属层418、第二电介质层426′以及任选地球栅阵列的焊料球424可附接到的凸块下金属化(UBM)垫420。
前侧再分布层430可形成于模制化合物402的第二主表面上。前侧再分布层430可包括第一电介质层438、再分布金属层408、第二电介质层438′。
集成电路封装400可具有天线结构450,其包括以下的堆叠布置:可为前侧再分布金属层408的第一金属层、第二金属层408′、第三金属层412和第四金属层436。第一金属层408可图案化为包括金属正方形406的规则栅格。第二金属层408′可图案化为包括金属正方形406′的规则栅格。第一金属层408和第二金属层408′通过模制化合物402形成的充当电介质层和前侧再分布层430的第一电介质层438电介质434分隔开。第二金属层408′和第三金属层412通过电介质层410分隔开。第三金属层412和第四金属层436通过电介质层410′分隔开。第三金属层412可包括四个平面双隙缝天线414a-d的阵列。天线结构450的第二金属层408′、第三金属层412和第四金属层436以及电介质层410、410′可实施为多层印刷电路板。天线结构450′可增强所需方向432上的辐射量。还应了解,天线结构450′可优先从与所要发射方向432相反的方向接收RF信号。
集成电路封装400还包括可实施例如射频(RF)收发器的集成电路管芯404。在一些例子中,集成电路管芯404可为单片微波集成电路(MMIC)。集成电路管芯404和天线结构450的至少一部分可嵌入于模制化合物402中。
应了解,eWLB封装通常具有布置于栅格中的接着焊接到外部印刷电路板(未示出)的数个垫和焊料球。一个或多个导通孔416、416′、416″可形成于背侧再分布层422的第一电介质层426中以将集成电路管芯404电连接到球栅阵列的垫420和天线结构450。集成电路管芯404可通过导通孔416、416′和再分布金属层418电连接到实施于天线结构的第四金属层436中的差分馈电线结构428a。仅明确示出了一个连接件,应了解,可类似地形成到差分馈电线结构428b、428c、428d的连接。所属领域的技术人员将了解,再分布金属层418中的另外导通孔和金属迹线可用以形成管芯404和天线结构450的第四金属层436之间的电连接。
可参考示出天线结构450的金属层的平面视图的图4B理解天线结构450的另外细节。标示为C的虚线指示图4A中示出的金属层的横截面。第一金属层408可图案化为包括金属正方形406的规则栅格。第二金属层408′可图案化为包括金属正方形406′的规则栅格。第一金属层408上的金属正方形406和图案化于第二金属层408′上的金属正方形406′可有效地充当第一和第二人造电介质层(ADL)。第一金属层408和第二金属层408′上的图案化可对准,但可在多层PCB制造工艺的正常容差内不对准。第一金属层408和第二金属层408′上的图案化可相同。第一ADL406、第二ADL406′以及第一ADL 406和第二ADL406′之间的电介质层434可形成人造电介质。电介质层434可由模制化合物402的层与前侧再分布层430的第一电介质层438的组合形成。人造电介质通常增加电介质材料的有效介电常数,这可通过提高箭头432指示的所需方向上的辐射量来改进天线的增益。通过具有多个人造电介质层,可相对于其它方向优先增加垂直平面中的有效介电常数。这可当天线结构用于发射时另外增强朝向箭头432指示的所需方向的辐射量。另外,当天线结构450中的天线用于接收时,可改进天线结构的选择性。
第三金属层412可包括四个平面双隙缝天线414a-d的阵列。隙缝尺寸设定为在所需谐振频率下被匹配。举例来说,对于汽车雷达应用,尺寸可选择为接近于77GHz下一个波长的长度。通常,隙缝长度可选择为相等于自由空间中的辐射的波长的一半。第四金属层436可包括四个对应差分馈电线结构428a-d,其包括差分发射线。差分馈电线结构428a-d可操作地以电磁方式耦合到相应双隙缝天线414a-d,且因此在第三金属层412和第四金属层416之间不需要导通孔。天线414a-d中的每一个可用于发射和/或接收。
集成电路封装400可在无需反射器的情况下改进天线性能。天线结构450不需要金属层408、408′、412和416中的任一个之间的任何导通孔。集成电路封装400可改进具有减小的封装大小的封装中天线性能。由于天线结构450可实施为印刷电路板,所以与例如焊料球424相对于外部印刷电路板的高度相比可更准确地控制层之间的距离。与需要实施于印刷电路板上的外部反射器的封装中天线解决方案相比,集成电路封装400中的天线结构450的性能可更具可预测性。
人造电介质层408、408′可独立于特定平面天线进行设计,且虽然实施为使得其高于天线或与天线重叠,但不要求人造电介质层和天线之间的精细对准。这可允许使用标准印刷电路板薄膜制造技术的实施方案。可使用eWLB封装技术或其它包括再分布层的封装技术实施集成电路封装400。
图4C示出平面视图中的集成电路封装400,其指示集成电路管芯404和天线结构450的相对放置。图4D示出替代性集成电路封装400′的平面视图,其包括集成电路管芯404和天线结构450的不同实例布置。
图5A示出集成电路封装400中对应于层412、410和416的天线设计,其指示X轴508、Y轴510和z轴432。Z轴指示的箭头的方向指示辐射的所需传播方向432。E平面对应于X-Z平面。H平面对应于Y-Z平面。辐射束在-θ到+θ的角度之间变化,其中0度正交于天线的平面,即平行于Z轴432。
图5B示出集成电路封装400中对应于层412、410和416的天线设计的E平面500中的辐射方向图。结果示出当从-45到0度扫描时的响应。可在0和+45度之间达成相同的镜像方向图。可针对即大于4个天线单元的较大阵列获得大于45度的较大扫描角度。X轴502示出介于-90和+90度之间的度数的辐射角度(θ)。Y轴示出在-5dB到+15dB的范围内的增益。曲线506示出在介于76GHz和81GHz之间以1GHz递增的频率下的天线的增益,其指示大约-22度和零度之间的每一频率的相应峰值增益。
图5C示出针对同一频率范围在对应H平面510中的天线的极坐标图520,所述频率范围示出为处于0和360度之间的角度θ的线522。如可见,H平面的峰值辐射针对范围内的所有频率具有0度的值θ。E平面500和H平面520中的辐射方向图的图形表示在与集成电路管芯402集成到封装中之前天线的响应。E平面响应506示出天线可扫描高达45度。H平面响应522示出自由空间中的天线的对称辐射方向图。
图5D示出集成电路封装400′的另一视图,其示出集成电路管芯404,天线结构450指示X轴508、Y轴510和Z轴432。Z轴指示的箭头的方向指示辐射的所需传播方向432。E平面对应于X-Z平面。H平面对应于Y-Z平面。辐射束在-θ到+θ的角度之间变化,其中0度正交于天线的平面,即平行于Z轴432。
图5E示出针对介于76GHz和81GHz之间的频率的集成到集成电路封装400中的天线结构的模拟H平面响应的极坐标图530。天线阵列的曲线532示出归因于存在集成电路管芯402造成的相对小的不对称性,其指示表面波损失已减小。E平面响应通常不因包括管芯而改变。
在托管电介质中包括ADL会增加有效电容率,这可改进天线的方向性,如图6A和6B所示出。对于各向同性材料,高相对电容率(>10)可致使材料空气界面处的强反射,因此支持表面波。归因于ADL的各向异性行为,ADL对于垂直于金属层行进的辐射合成高相对电容率(>10),但对于平行于金属层行进的辐射合成低有效电容率,这是由于后一方向上的电容率是由通常低得多(例如小于5)的托管电介质的电容率确定。这可减少封装的顶部界面处的反射且减小到表面波中的功率损失。
图6A示出针对介于76GHz和81GHz之间的频率的天线结构450的E平面中的辐射方向图的模拟的极坐标图600。图6B示出针对介于76GHz和81GHz之间的频率的无人造电介质层的天线的辐射的模拟的极坐标图610。在每一种情况下,天线设计是相同的且材料是相同的,即PCB的金属层和电介质层的数目是相同的。曲线图600示出天线450具有单向辐射方向图。极坐标图610示出不包括ADL的天线在上下方向上辐射几乎相等的功率。
已针对朝向与球栅阵列相反的表面的所要辐射天线说明本文中的实施例。然而,应了解,在其它实施例中,天线结构可被布置成使得所要天线辐射方向朝向与球栅阵列相同的表面。在其它实施例中,描述的天线结构中的一个或多个可包括在除eWLB或BGA封装以外的其它封装技术中。在其中使用多层PCB实施天线结构的实施例中,还可使用PCB实施其它组件的其它互连件。
集成电路封装的实施例可用于使用封装中天线的mm波系统中。举例来说,集成电路封装可在76-81GHz汽车雷达系统中用于多射程(超短、短、中间和长射程)应用,例如停车辅助、横向防撞或其它高级驾驶员辅助系统(ADAS)应用且还用于手势辨识。在其它例子中,集成电路封装可用于在高于120GHz下操作的mm波系统中。在其它例子中,集成电路封装可在60G Hz射程中用于多千兆位通信。
描述一种集成电路封装,包括:集成电路管芯;以及天线结构,其耦合到集成电路管芯且包括金属和电介质层的堆叠布置,其中第一金属层包括平面天线,且至少一个另外金属层至少部分地图案化以形成人造电介质层。集成电路封装可改进天线的方向性且减小天线对上面安装集成电路封装的印刷电路板的敏感度。集成电路封装的实施例可去除对印刷电路板上的反射器的要求。集成电路封装的实施例可允许更细的封装中天线,这减少表面波损失且改进天线的方向性。
虽然所附权利要求书是针对特定特征组合,但应理解,本发明的公开内容的范围还包括本文中明确地或隐含地公开的任何新颖特征或任何新颖特征组合或其任何一般化,而不管其是否涉及与当前在任何权利要求中主张的本发明相同的发明或其是否缓解与本发明所缓解的任一或全部技术问题相同的技术问题。术语“上方”和“下方”用以指特征在如所示出的取向中的相对位置,且应了解,这些术语可视需要互换。
在单独实施例的上下文中描述的特征也可以组合地提供于单个实施例中。相反,为了简洁起见,在单个实施例的上下文中描述的多种特征也可以分开提供或以任何合适的子组合形式提供。
申请人特此提醒,在审查本申请案或由此衍生的任何另外的申请案期间,可以根据此类特征和/或此类特征的组合而制订新的权利要求。
为完整性起见,还规定术语“包括”不排除其它元件或步骤,术语“一”不排除多个,单个处理器或其它单元可满足在权利要求中所述的若干构件的功能,且权利要求中的附图标记不应解释为限制权利要求的范围。

Claims (10)

1.一种集成电路封装,其特征在于,包括:
集成电路管芯,
天线结构,其耦合到所述集成电路管芯且包括金属和电介质层的堆叠布置,其中第一金属层包括平面天线且至少一个另外金属层包括人造电介质层。
2.根据权利要求1所述的集成电路封装,其特征在于,所述天线结构进一步包括:
第二金属层,其包括天线馈电结构,所述天线馈电结构电连接到所述集成电路管芯,
其中所述平面天线被配置成电磁耦合到所述天线馈电结构。
3.根据权利要求1所述的集成电路封装,其特征在于,所述第一金属层进一步包括天线馈电结构,且其中所述平面天线被配置成电磁耦合到所述天线馈电结构。
4.根据在前的任一项权利要求所述的集成电路封装,其特征在于,所述平面天线包括至少两个隙缝。
5.根据在前的任一项权利要求所述的集成电路封装,其特征在于,包括四个平面天线的阵列。
6.根据在前的任一项权利要求所述的集成电路封装,其特征在于,所述人造电介质层包括布置于栅格中的多个金属形状。
7.根据在前的任一项权利要求所述的集成电路封装,其特征在于,所述至少一个另外层包括第一另外金属层和第二另外金属层,其中所述第一和第二另外金属层中的每一个包括人造电介质层。
8.根据在前的任一项权利要求所述的集成电路封装,其特征在于,进一步包括具有再分布金属层的第一再分布层,其中所述集成电路通过所述第一再分布金属层电连接到所述天线结构。
9.一种嵌入式晶片级球栅阵列封装,其特征在于,包括根据权利要求1到8所述的集成电路封装。
10.一种用于机动车辆的雷达装置,其特征在于,所述雷达装置包括根据权利要求1到8中任一项权利要求所述的集成电路封装。
CN201810151190.5A 2017-02-15 2018-02-13 集成电路封装 Pending CN108428693A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP17156367.9A EP3364457A1 (en) 2017-02-15 2017-02-15 Integrated circuit package including an antenna
EP17156367.9 2017-02-15

Publications (1)

Publication Number Publication Date
CN108428693A true CN108428693A (zh) 2018-08-21

Family

ID=58054030

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810151190.5A Pending CN108428693A (zh) 2017-02-15 2018-02-13 集成电路封装

Country Status (3)

Country Link
US (1) US10615134B2 (zh)
EP (1) EP3364457A1 (zh)
CN (1) CN108428693A (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111478023A (zh) * 2019-01-24 2020-07-31 奥迪股份公司 雷达传感器、机动车和制造雷达传感器的方法
CN113410658A (zh) * 2021-06-18 2021-09-17 安徽大学 一种毫米波高增益栅格缝隙阵列天线
CN113711436A (zh) * 2019-04-16 2021-11-26 东友精细化工有限公司 天线封装和包括其的图像显示装置

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10468736B2 (en) 2017-02-08 2019-11-05 Aptiv Technologies Limited Radar assembly with ultra wide band waveguide to substrate integrated waveguide transition
KR102352592B1 (ko) * 2017-07-13 2022-01-19 삼성전자주식회사 어레이 안테나를 포함하는 전자 장치
US11322823B2 (en) * 2017-10-17 2022-05-03 Mediatek Inc. Antenna-in-package with frequency-selective surface structure
CN112534646A (zh) * 2018-08-02 2021-03-19 维尔塞特公司 天线元件模块
US10897076B2 (en) * 2018-08-07 2021-01-19 Veoneer Us, Inc. Modular antenna systems for automotive radar sensors
US11271309B2 (en) 2018-08-10 2022-03-08 Ball Aerospace & Technologies Corp. Systems and methods for interconnecting and isolating antenna system components
EP3843216A4 (en) * 2018-10-12 2021-09-15 Huawei Technologies Co., Ltd. LOW PROFILE HOUSING INTEGRATED ANTENNA
US11011816B2 (en) * 2018-10-29 2021-05-18 Aptiv Technologies Limited Radar assembly with a slot transition through a printed circuit board
FR3088479B1 (fr) * 2018-11-14 2022-08-05 St Microelectronics Grenoble 2 Dispositif electronique incluant une puce electronique et une antenne
DE102018219497A1 (de) * 2018-11-15 2020-05-20 Robert Bosch Gmbh Schaltungsanordnung für eine Hochfrequenzantenne, Verfahren zur Ausbildung einer Schaltungsanordnung, Substratträger und Verwendung einer Schaltungsanordnung
DE102019102784A1 (de) 2019-02-05 2020-08-06 Infineon Technologies Ag Halbleitervorrichtungen mit Radar-Halbleiterchip und zugehörige Herstellungsverfahren
US20220209392A1 (en) * 2019-04-28 2022-06-30 Calterah Semiconductor Technology (Shanghai) Co., Ltd. Package antenna and radar assembly package
US11527808B2 (en) * 2019-04-29 2022-12-13 Aptiv Technologies Limited Waveguide launcher
US11380634B2 (en) 2019-05-17 2022-07-05 Nxp B.V. Apparatuses and methods for coupling a waveguide structure to an integrated circuit package
DE102019115307A1 (de) 2019-06-06 2020-12-10 Infineon Technologies Ag Halbleitervorrichtungen mit planaren wellenleiter-übertragungsleitungen
KR20210009658A (ko) * 2019-07-17 2021-01-27 동우 화인켐 주식회사 안테나 패키지 및 이를 포함하는 화상 표시 장치
US10937748B1 (en) * 2019-09-12 2021-03-02 Huawei Technologies Co., Ltd. Fan-out transition structure for transmission of mm-Wave signals from IC to PCB via chip-scale packaging
US11101540B2 (en) 2019-10-02 2021-08-24 Amkor Technology Singapore Holding Pte. Ltd. Semiconductor devices and methods of manufacturing semiconductor devices
CN113140887B (zh) * 2020-01-17 2022-11-22 清华大学 封装天线及其制造方法
EP3859891A1 (en) 2020-01-31 2021-08-04 Nxp B.V. Method and apparatus comprising a semiconductor device and test apparatus
EP3859892A1 (en) 2020-01-31 2021-08-04 Nxp B.V. Test apparatus and method for testing a semiconductor device
US11848499B2 (en) * 2020-05-29 2023-12-19 City University Of Hong Kong On-chip antenna and on-chip antenna array
CN114063014A (zh) * 2020-07-29 2022-02-18 华为技术有限公司 一种雷达装置和工作设备
US11362436B2 (en) 2020-10-02 2022-06-14 Aptiv Technologies Limited Plastic air-waveguide antenna with conductive particles
US11757166B2 (en) 2020-11-10 2023-09-12 Aptiv Technologies Limited Surface-mount waveguide for vertical transitions of a printed circuit board
US11681015B2 (en) 2020-12-18 2023-06-20 Aptiv Technologies Limited Waveguide with squint alteration
US11626668B2 (en) 2020-12-18 2023-04-11 Aptiv Technologies Limited Waveguide end array antenna to reduce grating lobes and cross-polarization
US11749883B2 (en) 2020-12-18 2023-09-05 Aptiv Technologies Limited Waveguide with radiation slots and parasitic elements for asymmetrical coverage
US11502420B2 (en) 2020-12-18 2022-11-15 Aptiv Technologies Limited Twin line fed dipole array antenna
US11901601B2 (en) 2020-12-18 2024-02-13 Aptiv Technologies Limited Waveguide with a zigzag for suppressing grating lobes
US11444364B2 (en) 2020-12-22 2022-09-13 Aptiv Technologies Limited Folded waveguide for antenna
US11668787B2 (en) 2021-01-29 2023-06-06 Aptiv Technologies Limited Waveguide with lobe suppression
US11721883B2 (en) * 2021-02-25 2023-08-08 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package with antenna and method of forming the same
US11721905B2 (en) 2021-03-16 2023-08-08 Aptiv Technologies Limited Waveguide with a beam-forming feature with radiation slots
US11616306B2 (en) 2021-03-22 2023-03-28 Aptiv Technologies Limited Apparatus, method and system comprising an air waveguide antenna having a single layer material with air channels therein which is interfaced with a circuit board
US11973268B2 (en) 2021-05-03 2024-04-30 Aptiv Technologies AG Multi-layered air waveguide antenna with layer-to-layer connections
US11962085B2 (en) 2021-05-13 2024-04-16 Aptiv Technologies AG Two-part folded waveguide having a sinusoidal shape channel including horn shape radiating slots formed therein which are spaced apart by one-half wavelength
US11876059B2 (en) 2021-05-17 2024-01-16 Nxp Usa, Inc. Semiconductor device with directing structure and method therefor
US11616282B2 (en) 2021-08-03 2023-03-28 Aptiv Technologies Limited Transition between a single-ended port and differential ports having stubs that match with input impedances of the single-ended and differential ports
EP4343971A1 (en) 2022-09-26 2024-03-27 Nxp B.V. Antenna unit and method of producing an antenna unit

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101032055A (zh) * 2004-09-07 2007-09-05 日本电信电话株式会社 天线装置、使用该天线装置的阵列天线装置、模块、模块阵列和封装模块
JP2010263413A (ja) * 2009-05-07 2010-11-18 Nippon Telegr & Teleph Corp <Ntt> 高周波基板
US20140145883A1 (en) * 2012-11-26 2014-05-29 International Business Machines Corporation Millimeter-wave radio frequency integrated circuit packages with integrated antennas
CN104078451A (zh) * 2013-03-29 2014-10-01 英特尔公司 用于射频无源件和天线的方法、设备和材料
CN104124211A (zh) * 2013-04-29 2014-10-29 英飞凌科技股份有限公司 具有波导转换元件的集成电路模块
US20150332997A1 (en) * 2013-01-29 2015-11-19 Panasonic Corporation Wireless module and production method for wireless module
WO2016003237A1 (ko) * 2014-07-04 2016-01-07 삼성전자주식회사 무선 통신 기기에서 안테나 장치
US20160056544A1 (en) * 2013-09-11 2016-02-25 International Business Machines Corporation Antenna-in-package structures with broadside and end-fire radiations

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2178119B1 (en) * 2008-10-20 2018-06-20 QUALCOMM Incorporated Surface mountable integrated circuit package
DE102012203151A1 (de) * 2012-02-29 2013-08-29 Robert Bosch Gmbh Halbleitermodul mit integrierten antennenstrukturen
US9853359B2 (en) * 2013-09-26 2017-12-26 Intel Corporation Antenna integrated in a package substrate
JP6314705B2 (ja) * 2014-07-04 2018-04-25 富士通株式会社 高周波モジュール及びその製造方法
US9444135B2 (en) 2014-09-19 2016-09-13 Freescale Semiconductor, Inc. Integrated circuit package
WO2017167987A1 (en) * 2016-04-01 2017-10-05 Sony Corporation Microwave antenna apparatus, packing and manufacturing method
US10541464B2 (en) * 2017-01-17 2020-01-21 Sony Corporation Microwave antenna coupling apparatus, microwave antenna apparatus and microwave antenna package

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101032055A (zh) * 2004-09-07 2007-09-05 日本电信电话株式会社 天线装置、使用该天线装置的阵列天线装置、模块、模块阵列和封装模块
JP2010263413A (ja) * 2009-05-07 2010-11-18 Nippon Telegr & Teleph Corp <Ntt> 高周波基板
US20140145883A1 (en) * 2012-11-26 2014-05-29 International Business Machines Corporation Millimeter-wave radio frequency integrated circuit packages with integrated antennas
US20150332997A1 (en) * 2013-01-29 2015-11-19 Panasonic Corporation Wireless module and production method for wireless module
CN104078451A (zh) * 2013-03-29 2014-10-01 英特尔公司 用于射频无源件和天线的方法、设备和材料
CN104124211A (zh) * 2013-04-29 2014-10-29 英飞凌科技股份有限公司 具有波导转换元件的集成电路模块
US20160056544A1 (en) * 2013-09-11 2016-02-25 International Business Machines Corporation Antenna-in-package structures with broadside and end-fire radiations
WO2016003237A1 (ko) * 2014-07-04 2016-01-07 삼성전자주식회사 무선 통신 기기에서 안테나 장치

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111478023A (zh) * 2019-01-24 2020-07-31 奥迪股份公司 雷达传感器、机动车和制造雷达传感器的方法
US11756903B2 (en) 2019-01-24 2023-09-12 Audi Ag Radar sensor, motor vehicle and method for producing a radar sensor
CN113711436A (zh) * 2019-04-16 2021-11-26 东友精细化工有限公司 天线封装和包括其的图像显示装置
CN113410658A (zh) * 2021-06-18 2021-09-17 安徽大学 一种毫米波高增益栅格缝隙阵列天线

Also Published As

Publication number Publication date
US20180233465A1 (en) 2018-08-16
EP3364457A1 (en) 2018-08-22
US10615134B2 (en) 2020-04-07

Similar Documents

Publication Publication Date Title
CN108428693A (zh) 集成电路封装
EP3474370B1 (en) Antenna-in-package with frequency-selective surface structure
US11715668B2 (en) Integrated antenna on interposer substrate
US9172131B2 (en) Semiconductor structure having aperture antenna
US7342299B2 (en) Apparatus and methods for packaging antennas with integrated circuit chips for millimeter wave applications
US7696930B2 (en) Radio frequency (RF) integrated circuit (IC) packages with integrated aperture-coupled patch antenna(s) in ring and/or offset cavities
US8754818B2 (en) Integrated antenna structure on separate semiconductor die
CA2637038C (en) Apparatus and methods for packaging integrated cirguit chips with antennas formed from package lead wires
US20160352023A1 (en) Integration of area efficient antennas for phased array or wafer scale array antenna applications
CN109326584B (zh) 封装天线及其制造方法
US11114752B2 (en) Three-dimensional antenna apparatus having at least one additional radiator
US20090289869A1 (en) On-chip highly-efficient antennas using strong resonant coupling
Hsieh et al. mmWave antenna design in advanced fan-out technology for 5G application
CN113678250A (zh) 封装上天线集成电路器件
Tang et al. Design of antenna on glass integrated passive device for WLAN applications
CN113646890B (zh) 封装上天线集成电路器件
CN117748105A (zh) 集成基板的三维模塑扇出型毫米波封装天线及其制作方法
CN113646890A (zh) 封装上天线集成电路器件

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination