CN108414918B - Compatibility testing device and method - Google Patents
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- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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Abstract
The invention discloses a compatibility testing device and a method. The compatibility testing device comprises: the signal interface circuit is used for being connected with the time sequence control circuit to be tested and connected with a display screen corresponding to the time sequence control circuit to be tested; the test circuit is used for being connected with the sequential control circuit to be tested, simulating a core board to be assembled with the sequential control circuit to be tested, and testing the compatibility of the sequential control circuit to be tested and the simulated core board. The invention can realize the test of the compatibility of the sequence control circuit and the core board to be assembled with the display panel into a whole.
Description
[ technical field ] A method for producing a semiconductor device
The present invention relates to the field of compatibility testing technologies, and in particular, to a compatibility testing apparatus and method.
[ background of the invention ]
The timing control circuit and the core board to be assembled with the display panel are generally manufactured by different manufacturers.
The parameters of the core board and the time sequence control circuit produced by different manufacturers have certain differences, so that when the time sequence control circuit is matched with the core board to drive the display panel, an abnormal condition occurs to an image displayed in the display panel.
In order to solve this problem, a general solution is to purchase a core board to be assembled with the display panel, test the compatibility of the core board with a timing control circuit of the display panel, and perform corresponding adjustment.
However, when the core board to be assembled with the display panel is changed, the compatibility of the timing circuit and the new core board needs to be tested, and the above solution is not suitable for a wide variety of core boards. Furthermore, the above solution is costly and the test procedure is less convenient.
Therefore, a new technical solution is needed to solve the above technical problems.
[ summary of the invention ]
The invention aims to provide a compatibility testing device and a method, which can realize the test of the compatibility of a time sequence control circuit and a core board to be assembled with a display panel into a whole.
In order to solve the problems, the technical scheme of the invention is as follows:
a compatibility testing device, the compatibility testing device comprising: the signal interface circuit is used for being connected with the time sequence control circuit to be tested and connected with a display screen corresponding to the time sequence control circuit to be tested; the test circuit is used for connecting the sequential control circuit to be tested, simulating a core board to be assembled with the sequential control circuit to be tested, and testing the compatibility of the sequential control circuit to be tested and the simulated core board; the test circuit is used for sending a video signal corresponding to the simulated core board to the to-be-tested sequential control circuit, so that the to-be-tested sequential control circuit converts the video signal into a low-voltage differential signal for driving the display screen to display an image and the display screen displays a corresponding image, and the compatibility of the simulated core board and the to-be-tested sequential control circuit is tested, wherein the video signal comprises a first video signal and a second video signal; the test circuit comprises a video input module, a video generation module and a test mode control module; the video input module is used for receiving the first video signal of an external signal source and providing the first video signal; the video generation module is used for generating the second video signal; the test mode control module is used for testing the compatibility of the time sequence control circuit to be tested and the simulated core board through the first video signal and the second video signal; the test mode control module is further used for adjusting the parameters of the first video signal provided by the video input module and the second video signal provided by the video generation module in a stepping mode or a random mode during or before the test circuit provides the first video signal and/or the second video signal to the timing control circuit to be tested.
In the above compatibility testing apparatus, the testing circuit further includes a power control module; the power supply control module is used for controlling power supply to the sequential control circuit to be tested.
In the compatibility testing device, the test mode control module comprises a starting-up testing module, a video switching module and an operation testing module; the starting-up test module is used for selecting the first video signal provided by the video input module in a starting-up test mode and outputting the first video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board; the video switching module is used for selecting one of the first video signal provided by the video input module and the second video signal generated by the video generation module and switching the video signal under a video switching mode; the operation test module is used for selecting the second video signal generated by the video generation module in an operation test mode and outputting the second video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board.
In the above compatibility testing apparatus, the video generating module is further configured to adjust a relative relationship between the video active area identifier of the first video signal and the video active area identifier of the second video signal, and adjust a length of a blanking area of the video active area identifier.
A compatibility testing method, the method comprising the steps of: A. connecting the to-be-tested time sequence control circuit with a test circuit and a display screen corresponding to the to-be-tested time sequence control circuit, wherein the to-be-tested time sequence control circuit is connected with the display screen through a signal interface circuit; B. simulating a core board to be assembled with the to-be-tested sequential control circuit by using the test circuit; C. the testing circuit is used for testing the compatibility of the sequential control circuit to be tested and the simulated core board, and the testing circuit comprises the following steps: sending a video signal corresponding to the simulated core board to the to-be-tested sequential control circuit, so that the to-be-tested sequential control circuit converts the video signal into a low-voltage differential signal for driving the display screen to display an image, and the display screen displays a corresponding image, so as to test the compatibility of the simulated core board and the to-be-tested sequential control circuit, wherein the video signal comprises a first video signal and a second video signal; the test circuit comprises a video input module, a video generation module and a test mode control module; the step B comprises the following steps: b1, the video input module receives the first video signal of an external signal source and provides the first video signal; b2, the video generation module generates the second video signal; the step C is as follows: the test mode control module tests the compatibility of the time sequence control circuit to be tested and the simulated core board through the first video signal and the second video signal; the test mode control module adjusts parameters of the first video signal provided by the video input module and the second video signal provided by the video generation module in a stepping mode or a random mode during or before the test circuit provides the first video signal and/or the second video signal to the timing control circuit to be tested.
In the compatibility test method, the test mode control module comprises a starting test module, a video switching module and an operation test module; in the boot test mode, the step C includes: c1, the start-up test module selects the first video signal provided by the video input module, and outputs the first video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested, so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board; in the video switching mode, the step C includes: c2, the video switching module selects and switches from the first video signal provided by the video input module and the second video signal generated by the video generating module; in the operation test mode, the step C includes: c3, the running test module selects the second video signal generated by the video generation module and outputs the second video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board.
In the above compatibility testing method, the step C further includes: c4, the video generation module adjusts the relative relationship between the video active area identification of the first video signal and the video active area identification of the second video signal.
In the above compatibility testing method, the step C further includes: c5, the video generation module adjusting the length of the blanking area identified by the video active area.
Compared with the prior art, the invention can realize the test of the compatibility of the timing control circuit and the core board to be assembled with the display panel into a whole.
In order to make the aforementioned and other objects of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.
[ description of the drawings ]
Fig. 1 is a schematic diagram of a connection relationship between a compatibility testing device of the present invention and a sequential control circuit to be tested and a corresponding display screen.
Fig. 2 is a block diagram of the test circuit of fig. 1.
Fig. 3 is a block diagram of a test mode control module of fig. 2.
FIG. 4 is a flowchart of a compatibility testing method of the present invention.
Fig. 5 is a flowchart of the step of testing the compatibility of the timing control circuit to be tested and the simulated core board through the test circuit in fig. 4.
[ detailed description ] embodiments
The word "embodiment" as used herein means an example, instance, or illustration. In addition, the articles "a" and "an" as used in this specification and the appended claims may generally be construed to mean "one or more" unless specified otherwise or clear from context to be directed to a singular form.
Referring to fig. 1, fig. 2 and fig. 3, fig. 1 is a schematic diagram illustrating a connection relationship between a compatibility testing apparatus of the present invention and a timing control circuit 103 to be tested and a corresponding display screen 101, fig. 2 is a block diagram of a testing circuit 104 in fig. 1, and fig. 3 is a block diagram of a test mode control module 202 in fig. 2.
The compatibility test apparatus of the present invention includes a signal interface circuit 102 and a test circuit 104.
The signal interface circuit 102 is used for connecting with a timing control circuit 103(TCON) to be tested and connecting with a display screen 101 corresponding to the timing control circuit 103 to be tested. The Display screen 101 may be a TFT-LCD (Thin Film Transistor Liquid Crystal Display), an OLED (Organic Light Emitting Diode Display), or the like.
The test circuit 104 is used for connecting with the sequential control circuit to be tested 103, simulating a core board to be assembled with the sequential control circuit to be tested 103, and testing the compatibility of the sequential control circuit to be tested 103 and the simulated core board.
Specifically, the test circuit 104 is configured to send a video signal corresponding to the simulated core board to the timing control circuit 103 to be tested, so that the timing control circuit 103 to be tested converts the video signal into a Low Voltage Differential Signaling (LVDS) for driving the display screen 101 to display an image, and causes the display screen 101 to display a corresponding image, so as to test compatibility between the simulated core board and the timing control circuit 103 to be tested.
The test circuit 104 includes a video input module 201, a video generation module 203, and a test mode control module 202.
The video input module 201 is configured to receive a first video signal from an external signal source and provide the first video signal.
The video generation module 203 is configured to generate a second video signal.
The test mode control module 202 is configured to test compatibility of the timing control circuit 103 to be tested and the simulated core board through the first video signal and the second video signal.
Specifically, the test mode control module 202 is further configured to adjust parameters of the first video signal provided by the video input module 201 and the second video signal provided by the video generation module 203 in a step mode or a random mode during or before the test circuit 104 provides the first video signal and/or the second video signal to the timing control circuit 103 to be tested.
The test circuit 104 also includes a power control module 204.
The power control module 204 is used for controlling the power supply to the timing control circuit 103 to be tested.
The power control module 204 is used for controlling the on-off of the 12V voltage supplied to the timing control circuit 103 to be tested.
The test mode control module 202 includes a power-on test module 301, a video switching module 302 and an operation test module 303.
The power-on test module 301 is configured to select the first video signal provided by the video input module 201 in a power-on test mode, and output the first video signal to the display screen 101 through the signal interface circuit 102 and the timing control circuit to be tested 103, so as to test compatibility between the timing control circuit to be tested 103 and the simulated core board.
In addition, the power-on test module 301 is further configured to set a relative time between the switching signal of the power control module 204 and the first video signal provided by the video input module 201 in a step mode (increasing or decreasing by the same step size) according to a first predetermined reference time. The first predetermined reference time is a time corresponding to a rising edge of a first video active area identifier of the first video signal.
The video switching module 302 is configured to select and switch between the first video signal provided by the video input module 201 and the second video signal generated by the video generating module 203 in a video switching mode.
In addition, the video switch module 302 is further configured to set a relative time for the video input module 201 to provide the first video signal and the video generation module 203 to provide the second video signal in a step mode (increasing or decreasing by the same step size) according to a second predetermined reference time. The second predetermined reference time is a time corresponding to a rising edge of a first video valid identifier of the first video signal or a time corresponding to a rising edge of a second video valid identifier of the second video signal. The relative video active identification relationship of the first video signal and the second video signal is fixed.
The operation test module 303 is configured to select the second video signal generated by the video generation module 203 in an operation test mode, and output the second video signal to the display screen 101 through the signal interface circuit 102 and the timing control circuit to be tested 103, so as to test compatibility between the timing control circuit to be tested 103 and the simulated core board.
In addition, the operation test module 303 is further configured to output the second video signal in a sequential mode (the blanking (Blank) area of the video active identifier increases from the minimum value to the maximum value) or a random mode (the blanking area of the video active identifier within one frame randomly changes between the maximum value and the minimum value).
The video generation module 203 is further configured to adjust a relative relationship between the video active area identifier of the first video signal and the video active area identifier of the second video signal, and adjust a length of a blanking area of the video active area identifier.
Referring to fig. 4 and 5, fig. 4 is a flowchart of a compatibility testing method of the present invention, and fig. 5 is a flowchart of a step of testing the compatibility of the timing control circuit 103 to be tested and the simulated core board through the testing circuit 104 in fig. 4.
The compatibility test method comprises the following steps:
a (step 401), connecting the to-be-tested sequential control circuit 103 with a test circuit 104 and a display screen 101 corresponding to the to-be-tested sequential control circuit 103, wherein the to-be-tested sequential control circuit 103 is connected with the display screen 101 through a signal interface circuit 102.
And B (step 402), simulating a machine core board to be assembled with the timing control circuit to be tested 103 by using the test circuit 104.
And C, testing the compatibility of the timing control circuit 103 to be tested and the simulated core board through the test circuit 104 (step 403).
Specifically, the test circuit 104 sends a video signal corresponding to the simulated core board to the timing control circuit 103 to be tested, so that the timing control circuit 103 to be tested converts the video signal into a Low Voltage Differential Signaling (LVDS) for driving the display screen 101 to display an image, and causes the display screen 101 to display a corresponding image, so as to test the compatibility of the simulated core board and the timing control circuit 103 to be tested.
The test circuit 104 includes a video input module 201, a video generation module 203, and a test mode control module 202.
The step B comprises the following steps:
b1, the video input module 201 receives a first video signal of an external signal source and provides the first video signal.
b2, the video generation module 203 generates a second video signal.
The step C is as follows:
the test mode control module 202 tests the compatibility of the timing control circuit 103 to be tested and the simulated core board through the first video signal and the second video signal.
Specifically, the test mode control module 202 adjusts parameters of the first video signal provided by the video input module 201 and the second video signal provided by the video generation module 203 in a step mode or a random mode during or before the test circuit 104 provides the first video signal and/or the second video signal to the timing control circuit 103 to be tested.
The test mode control module 202 includes a power-on test module 301, a video switching module 302 and an operation test module 303.
In the boot test mode, the step C includes:
c1 (step 501), the power-on test module 301 selects the first video signal provided by the video input module 201, and outputs the first video signal to the display screen 101 through the signal interface circuit 102 and the timing control circuit to be tested 103, so as to test the compatibility of the timing control circuit to be tested 103 and the simulated core board.
In addition, the power-on test module 301 sets the relative time between the switching signal of the power control module 204 and the first video signal provided by the video input module 201 in a step mode (increasing or decreasing in the same step size) according to a first predetermined reference time. The first predetermined reference time is a time corresponding to a rising edge of a first video active area identifier of the first video signal.
In the video switching mode, the step C includes:
c2 (step 502), the video switching module 302 selects and switches from one of the first video signal provided by the video input module 201 and the second video signal generated by the video generating module 203.
In addition, the video switch module 302 sets the relative time for the video input module 201 to provide the first video signal and the video generation module 203 to provide the second video signal in a step mode (increasing or decreasing by the same step size) according to a second predetermined reference time. The second predetermined reference time is a time corresponding to a rising edge of a first video valid identifier of the first video signal or a time corresponding to a rising edge of a second video valid identifier of the second video signal. The relative video active identification relationship of the first video signal and the second video signal is fixed.
In the operation test mode, the step C includes:
c3 (step 503), the operation testing module 303 selects the second video signal generated by the video generating module 203, and outputs the second video signal to the display screen 101 through the signal interface circuit 102 and the timing control circuit to be tested 103, so as to test the compatibility of the timing control circuit to be tested 103 and the simulated core board.
In addition, the operation test module 303 outputs the second video signal in a sequential mode (the Blank (Blank) area of the video active flag increases from the minimum value to the maximum value) or a random mode (the Blank area of the video active flag within one frame randomly changes between the maximum value and the minimum value).
The step C further comprises the following steps:
c4, the video generation module 203 adjusting the relative relationship between the video active area identifier of the first video signal and the video active area identifier of the second video signal.
The step C further comprises the following steps:
c5, the video generation module 203 adjusts the length of the blanking area identified by the video active area.
The test circuit 104 also includes a power control module 204.
The step C further comprises the following steps:
c6, the power control module 204 controls the power supply to the timing control circuit 103 to be tested.
The power control module 204 controls the on/off of the 12V voltage supplied to the timing control circuit 103 to be tested.
Through the technical scheme, the invention can realize the test of the compatibility of the sequence control circuit 103 and the core board to be assembled with the display panel into a whole.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (8)
1. A compatibility testing apparatus, comprising:
the signal interface circuit is used for being connected with the time sequence control circuit to be tested and connected with a display screen corresponding to the time sequence control circuit to be tested;
the test circuit is used for connecting the sequential control circuit to be tested, simulating a core board to be assembled with the sequential control circuit to be tested, and testing the compatibility of the sequential control circuit to be tested and the simulated core board;
the test circuit is used for sending a video signal corresponding to the simulated core board to the to-be-tested sequential control circuit, so that the to-be-tested sequential control circuit converts the video signal into a low-voltage differential signal for driving the display screen to display an image and the display screen displays a corresponding image, and the compatibility of the simulated core board and the to-be-tested sequential control circuit is tested, wherein the video signal comprises a first video signal and a second video signal;
the test circuit comprises a video input module, a video generation module and a test mode control module;
the video input module is used for receiving the first video signal of an external signal source and providing the first video signal;
the video generation module is used for generating the second video signal;
the test mode control module is used for testing the compatibility of the time sequence control circuit to be tested and the simulated core board through the first video signal and the second video signal;
the test mode control module is further used for adjusting the parameters of the first video signal provided by the video input module and the second video signal provided by the video generation module in a stepping mode or a random mode during or before the test circuit provides the first video signal and/or the second video signal to the timing control circuit to be tested.
2. The compatibility test device of claim 1, wherein the test circuit further comprises a power control module;
the power supply control module is used for controlling power supply to the sequential control circuit to be tested.
3. The compatibility testing device of claim 1, wherein the test mode control module comprises a power-on testing module, a video switching module and an operation testing module;
the starting-up test module is used for selecting the first video signal provided by the video input module in a starting-up test mode and outputting the first video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board;
the video switching module is used for selecting one of the first video signal provided by the video input module and the second video signal generated by the video generation module and switching the video signal under a video switching mode;
the operation test module is used for selecting the second video signal generated by the video generation module in an operation test mode and outputting the second video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board.
4. The compatibility testing device of claim 1, wherein the video generation module is further configured to adjust a relative relationship between the video active area identifier of the first video signal and the video active area identifier of the second video signal, and to adjust a length of a blanking area of the video active area identifier.
5. A compatibility testing method, comprising the steps of:
A. connecting a time sequence control circuit to be tested with a test circuit and a display screen corresponding to the time sequence control circuit to be tested, wherein the time sequence control circuit to be tested is connected with the display screen through a signal interface circuit;
B. simulating a core board to be assembled with the to-be-tested sequential control circuit by using the test circuit;
C. the testing circuit is used for testing the compatibility of the sequential control circuit to be tested and the simulated core board, and the testing circuit comprises the following steps: sending a video signal corresponding to the simulated core board to the to-be-tested sequential control circuit, so that the to-be-tested sequential control circuit converts the video signal into a low-voltage differential signal for driving the display screen to display an image, and the display screen displays a corresponding image, so as to test the compatibility of the simulated core board and the to-be-tested sequential control circuit, wherein the video signal comprises a first video signal and a second video signal;
the test circuit comprises a video input module, a video generation module and a test mode control module;
the step B comprises the following steps:
b1, the video input module receives the first video signal of an external signal source and provides the first video signal;
b2, the video generation module generates the second video signal;
the step C is as follows:
the test mode control module tests the compatibility of the time sequence control circuit to be tested and the simulated core board through the first video signal and the second video signal;
the test mode control module adjusts parameters of the first video signal provided by the video input module and the second video signal provided by the video generation module in a stepping mode or a random mode during or before the test circuit provides the first video signal and/or the second video signal to the timing control circuit to be tested.
6. The compatibility testing method according to claim 5, wherein the test mode control module comprises a power-on testing module, a video switching module and an operation testing module;
in the boot test mode, the step C includes:
c1, the start-up test module selects the first video signal provided by the video input module, and outputs the first video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested, so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board;
in the video switching mode, the step C includes:
c2, the video switching module selects and switches from the first video signal provided by the video input module and the second video signal generated by the video generating module;
in the operation test mode, the step C includes:
c3, the running test module selects the second video signal generated by the video generation module and outputs the second video signal to the display screen through the signal interface circuit and the time sequence control circuit to be tested so as to test the compatibility of the time sequence control circuit to be tested and the simulated core board.
7. The compatibility test method of claim 5, wherein step C further comprises:
c4, the video generation module adjusts the relative relationship between the video active area identification of the first video signal and the video active area identification of the second video signal.
8. The compatibility test method of claim 5, wherein step C further comprises:
c5, the video generation module adjusting the length of the blanking area identified by the video active area.
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| JP2008204164A (en) * | 2007-02-20 | 2008-09-04 | Mitsubishi Electric Corp | Invasion detector |
| CN101788641A (en) * | 2009-01-23 | 2010-07-28 | 名硕电脑(苏州)有限公司 | Testing device and automatic testing method thereof |
| CN101656974A (en) * | 2009-07-17 | 2010-02-24 | 厦门敏讯信息技术股份有限公司 | SIM card compatibility automated test method and device |
| CN201562438U (en) * | 2009-11-27 | 2010-08-25 | 深圳市洲明科技股份有限公司 | LED display device and circuit thereof |
| CN201571142U (en) * | 2010-01-04 | 2010-09-01 | 青岛海信电器股份有限公司 | Signal switching circuit and television set test circuit |
| CN202771771U (en) * | 2012-06-14 | 2013-03-06 | 青岛海信电器股份有限公司 | Time schedule controller and digital display |
| CN103472748B (en) * | 2013-09-04 | 2017-01-18 | 上海顺久电子科技有限公司 | Verification system and method of sequential control circuit |
| CN103810120A (en) * | 2014-01-26 | 2014-05-21 | 宁波萨瑞通讯有限公司 | Method for compatibility control over serial port screen |
| CN106898289A (en) * | 2017-04-10 | 2017-06-27 | 深圳市华星光电技术有限公司 | The drive system and driving method of a kind of display screen |
| CN107734323B (en) * | 2017-09-13 | 2019-08-16 | 深圳市华星光电技术有限公司 | A kind of algorithm checking system and method |
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