CN108400215B - A kind of light-emitting diode chip for backlight unit and preparation method thereof - Google Patents
A kind of light-emitting diode chip for backlight unit and preparation method thereof Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 claims abstract description 130
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a kind of light-emitting diode chip for backlight unit and preparation method thereof, belong to technical field of semiconductors.Chip includes substrate, n type semiconductor layer, luminescent layer, p type semiconductor layer, current barrier layer, transparency conducting layer, P-type electrode, N-type electrode, passivation protection layer and adhesion layer；The material of passivation protection layer is silica, and the material at the top of P-type electrode is gold；Adhesion layer is arranged between the edge and passivation protection layer at the top of P-type electrode；Adhesion layer includes at least three sublayers stacked gradually, the material of each sublayer includes gold and silicon, and at least three molar content golden in sublayer successively reduced along the stacking direction of adhesion layer, the molar content of silicon successively increases along the stacking direction of adhesion layer at least three sublayers.The present invention is effectively improved the adhesiveness between the edge and passivation protection layer at the top of P-type electrode by adhesion layer, and passivation protection layer is avoided to fall off, and improves the service life of light-emitting diode chip for backlight unit.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of light-emitting diode chip for backlight unit and preparation method thereof.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is efficient, environmentally friendly, green new one
For solid-state lighting light source, with low-voltage, low-power consumption, small in size, light-weight, the service life is long, high reliability.Since Japan
Scientist is constantly progressive in the technology that the 1990s successfully develops gallium nitride (GaN) base LED, LED, and light emission luminance is not
Disconnected to improve, application field is more and more wider, be widely used at present traffic lights, automobile interior exterior lamp, landscape light in city,
The fields such as cell phone back light source, outdoor full color display screen, especially in lighting area, LED has played unique irreplaceable work
With.
Existing light-emitting diode chip for backlight unit include substrate, n type semiconductor layer, luminescent layer, p type semiconductor layer, current barrier layer,
Transparency conducting layer, P-type electrode, N-type electrode and passivation protection layer.N type semiconductor layer, luminescent layer, p type semiconductor layer stack gradually
On substrate, p type semiconductor layer is equipped with the groove for extending to n type semiconductor layer；Current barrier layer is arranged in p type semiconductor layer
On, and it is the combination of an annular and at least one rectangle that the shape on the surface on p type semiconductor layer, which is arranged in, in current barrier layer,
Each rectangle is located at outside annular and is connect by a short side with annular；Transparency conducting layer, which is arranged, is located at ring in p type semiconductor layer
On region and current barrier layer outside shape；P-type electrode includes p-type pad and at least one electrode wires, one end of each electrode wires
It is connect with p-type pad, the region that p type semiconductor layer is located in annular and transparency conducting layer is arranged in p-type pad and annular is right
On the region answered, electrode wires setting is over transparent conductive layer on region corresponding with rectangle；The N in groove is arranged in N-type electrode
In type semiconductor layer；Passivation protection layer be arranged in transparency conducting layer, each electrode wires, p-type pad top edge and side wall,
On the edge and side wall at the top of the side wall of groove, the n type semiconductor layer in groove and N-type electrode, i.e., p-type is arranged in chip
On other regions on the surface of electrode and N-type electrode in addition to N-type electrode and the non-edge at the top of p-type pad.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The material at the top of p-type pad is gold, and the material of passivation protection layer is silica, due to silica and gold
Between adhesiveness it is weaker, therefore the passivation protection layer on the edge and side wall at the top of p-type pad is easy to fall off, thus can not
Play the role of protecting P-type electrode and transparency conducting layer, causes the exposure such as P-type electrode and transparency conducting layer in air, air
In water vapour, oxygen electrochemical reaction can occur with the side wall of p-type pad and transparency conducting layer under the action of electrically and thermally, it is rotten
The side wall and transparency conducting layer for losing p-type pad cause the material property variation of the side wall, particularly transparency conducting layer of p-type pad,
Light-emitting diode chip for backlight unit failure is in turn resulted in, the service life of light-emitting diode chip for backlight unit is greatly reduced, limits light-emitting diodes
The extensive use of pipe.
Summary of the invention
In order to solve the side wall and transparency conducting layer of prior art corrosion p-type pad, light-emitting diode chip for backlight unit is caused to fail
The problem of, the embodiment of the invention provides a kind of light-emitting diode chip for backlight unit and preparation method thereof.The technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of light-emitting diode chip for backlight unit, the light-emitting diode chip for backlight unit includes lining
Bottom, n type semiconductor layer, luminescent layer, p type semiconductor layer, current barrier layer, transparency conducting layer, P-type electrode, N-type electrode and passivation
Protective layer；The n type semiconductor layer, the luminescent layer, the p type semiconductor layer stack gradually over the substrate, the p-type
Semiconductor layer is equipped with the groove for extending to the n type semiconductor layer；The current barrier layer is arranged in the p type semiconductor layer
On, and it includes an annular that the shape on the surface on the p type semiconductor layer, which is arranged in, in the current barrier layer, it is described transparent to lead
Electric layer is arranged on region and the current barrier layer that the p type semiconductor layer is located at outside the annular；The P-type electrode is set
Set region and the transparency conducting layer and the current barrier layer pair being located in the annular in the p type semiconductor layer
On the region answered, on the n type semiconductor layer of the N-type electrode setting in the groove, the passivation protection layer is arranged in institute
State transparency conducting layer, the P-type electrode top edge and side wall, the side wall of the groove, the N-type in the groove partly lead
On the edge and side wall at the top of body layer and the N-type electrode；The material of the passivation protection layer is silica, the P
The material at the top of type electrode is gold；
The light-emitting diode chip for backlight unit further includes adhesion layer, and the adhesion layer is arranged at the top of the P-type electrode
Edge and the passivation protection layer between；The adhesion layer includes at least three sublayers stacked gradually, each sublayer
Material include gold and silicon, and molar content golden at least three sublayer successively subtracts along the stacking direction of the adhesion layer
Few, the molar content of silicon successively increases along the stacking direction of the adhesion layer at least three sublayer.
Optionally, the material for the sublayer being laminated at first at least three sublayer further includes titanium.
Preferably, the molar content of titanium is 0.5%~1.5% in the sublayer being laminated at first at least three sublayer.
Optionally, golden molar content is greater than 90% in the sublayer being laminated at first at least three sublayer.
Optionally, the thickness of each sublayer is equal, and the difference of molar content golden in the two neighboring sublayer
Less than 1%, the difference of the molar content of silicon is less than 1% in the two neighboring sublayer.
Preferably, the difference of molar content golden in the two neighboring sublayer is 3%~8%, the two neighboring son
The difference of the molar content of silicon is 3%~8% in layer.
Optionally, the adhesion layer with a thickness of 20nm~30nm.
On the other hand, the embodiment of the invention provides a kind of production method of light-emitting diode chip for backlight unit, the production methods
Include:
N type semiconductor layer, luminescent layer, p type semiconductor layer are successively grown on substrate；
The groove for extending to the n type semiconductor layer is opened up on the p type semiconductor layer；
Current barrier layer is formed on the p type semiconductor layer, the current barrier layer is arranged in the p type semiconductor layer
On surface shape include an annular；
Electrically conducting transparent is formed on the region that the p type semiconductor layer is located at outside the annular and the current barrier layer
Layer；
N-type electrode is set on n type semiconductor layer in the groove, and is located at the ring in the p type semiconductor layer
P-type electrode, the p-type are set on region and the transparency conducting layer region corresponding with the current barrier layer in shape
The material at the top of electrode is gold；
Adhesion layer is at least formed in the P-type electrode, the adhesion layer includes at least three sublayers stacked gradually, respectively
The material of a sublayer includes gold and silicon, and molar content golden at least three sublayer is along the stacking of the adhesion layer
Direction is successively reduced, and the molar content of silicon successively increases along the stacking direction of the adhesion layer at least three sublayer；
In the adhesion layer, the side wall of the adhesion layer and the P-type electrode, the transparency conducting layer, the groove
Passivation protection layer is formed in side wall, the n type semiconductor layer in the groove and the N-type electrode, the passivation protection layer
Material is silica；
Remove adhesion layer in the non-edge at the top of the P-type electrode and passivation protection layer and N-type electricity
Passivation protection layer in the non-edge at the top of pole.
Optionally, the production method further include:
When removing the adhesion layer and passivation protection layer in the non-edge at top of the P-type electrode, removal p-type electricity
The certain thickness layer gold in the top of pole.
Optionally, the adhesion layer in the non-edge at the top of the removal P-type electrode and passivation protection layer, with
And the passivation protection layer in the non-edge at the top of the N-type electrode, comprising:
The photoresist of setting figure is formed in the passivation protection layer using photoetching technique, the photoresist is arranged in institute
State in passivation protection layer with the edge of the adhesion layer, the side wall of the adhesion layer and the P-type electrode, the electrically conducting transparent
Layer, the side wall of the groove, the n type semiconductor layer in the groove and the N-type electrode the corresponding region in edge on；
It is passed through sour gas, the adhesion layer in the non-edge at the top of P-type electrode described in dry etching and passivation are protected
Passivation protection layer in the non-edge at the top of sheath and the N-type electrode；
It is passed through oxygen, dry method removes the photoresist.
Technical solution provided in an embodiment of the present invention has the benefit that
By the way that adhesion layer is arranged between the edge and passivation protection layer at the top of P-type electrode, adhesion layer includes successively layer
At least three folded sublayers, the material of each sublayer includes gold and silicon, and molar content golden at least three sublayers is along adherency
The stacking direction of layer is successively reduced, and the molar content of silicon successively increases along the stacking direction of adhesion layer, therefore close to P-type electrode
Golden molar content is more in the sublayer at top, and the material gold matching degree used with the top of P-type electrode is higher, adhesion layer and P
The combination interface of type electrode is finer and close；The molar content of silicon is more in the sublayer of passivation protection layer simultaneously, protects with passivation
The matching degree for the materials silicon dioxide that sheath uses is higher, and the combination interface of adhesion layer and passivation protection layer is also finer and close；And
And gold and the molar content of silicon all successively change in all sublayers, the matching degree for the material that two neighboring sublayer uses also compared with
Height, the compactness inside adhesion layer is also fine, so setting adhesion layer can be effectively improved the edge at the top of P-type electrode and blunt
Change the adhesiveness between protective layer, avoids passivation protection layer from falling off, enable passivation protection layer to P-type electrode and electrically conducting transparent
Layer carries out effective protection, avoids P-type electrode and transparency conducting layer exposure in air and rotten by vapor, oxygen in air etc.
Alteration is different, and light-emitting diode chip for backlight unit is caused to fail, and substantially increases the service life of light-emitting diode chip for backlight unit, is conducive to luminous two
The extensive use of pole pipe.In addition, adhesion layer can also play a certain protective role P-type electrode, enhance the reliable of P-type electrode
Property, the service life and realization effect of final raising light-emitting diode chip for backlight unit.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of light-emitting diode chip for backlight unit provided in an embodiment of the present invention；
Fig. 2 is the A-A sectional view of Fig. 1 provided in an embodiment of the present invention；
Fig. 3 is the structural schematic diagram of adhesion layer provided in an embodiment of the present invention；
Fig. 4 is a kind of flow chart of the production method of light-emitting diode chip for backlight unit provided in an embodiment of the present invention；
Fig. 5 a- Fig. 5 h is that the structure of light-emitting diode chip for backlight unit in production method implementation procedure provided in an embodiment of the present invention is shown
It is intended to；
Fig. 6 a is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 a provided in an embodiment of the present invention；
Fig. 6 b is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 b provided in an embodiment of the present invention；
Fig. 6 c is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 c provided in an embodiment of the present invention；
Fig. 6 d is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 d provided in an embodiment of the present invention；
Fig. 6 e is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 e provided in an embodiment of the present invention；
Fig. 6 f is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 f provided in an embodiment of the present invention；
Fig. 6 g is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 g provided in an embodiment of the present invention；
Fig. 6 h is the top view of light-emitting diode chip for backlight unit shown in Fig. 5 h provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
The embodiment of the invention provides a kind of light-emitting diode chip for backlight unit, Fig. 1 is light-emitting diodes provided in an embodiment of the present invention
The structural schematic diagram of tube chip, referring to Fig. 1, the light-emitting diode chip for backlight unit include substrate 10, n type semiconductor layer 21, luminescent layer 22,
P type semiconductor layer 23, current barrier layer 30, transparency conducting layer 40, P-type electrode 51, N-type electrode 52 and passivation protection layer 60.
Wherein, n type semiconductor layer 21, luminescent layer 22, p type semiconductor layer 23 are sequentially laminated on substrate 10, P-type semiconductor
Layer 23 is equipped with the groove 20 for extending to n type semiconductor layer 21.Current barrier layer 30 is arranged on p type semiconductor layer 23, and Fig. 2 is
The A-A sectional view of Fig. 1 provided in an embodiment of the present invention, referring to fig. 2, current barrier layer 30 is arranged on p type semiconductor layer 23
The shape on surface includes an annular 31, as shown in Figure 1, the setting of transparency conducting layer 40 is located at annular 31 in p type semiconductor layer 23
On the region and current barrier layer 30 of (as shown in Figure 2) outside.The setting of P-type electrode 51 is located in annular 31 in p type semiconductor layer 23
Region and the region corresponding with current barrier layer 30 of transparency conducting layer 40 on, the N in groove 20 is arranged in N-type electrode 52
In type semiconductor layer 21, transparency conducting layer 40, the edge at top of P-type electrode 51 and side wall, recessed is arranged in passivation protection layer 60
On the edge and side wall at the top of the side wall of slot, the n type semiconductor layer 21 in groove and N-type electrode 52.Passivation protection layer 60
Material be silica (SiO2), the material at the top of P-type electrode 51 is gold.
It should be noted that in the present embodiment, using side where substrate in light-emitting diode chip for backlight unit as bottom, with luminous two
P-type electrode and N-type electrode place side are top, surface of the side wall between top and bottom, therefore institute above in pole pipe chip
The top for the P-type electrode stated is the P-type electrode surface opposite with the surface that p type semiconductor layer and transparency conducting layer is arranged in, p-type
The side wall of electrode is the P-type electrode surface adjacent with the surface that p type semiconductor layer and transparency conducting layer is arranged in, the side wall of groove
The surface of n type semiconductor layer is extended to from p type semiconductor layer for groove, the top of N-type electrode is N-type electrode and is arranged in N-type
The opposite surface in the surface of semiconductor layer, the side wall of N-type electrode are that N-type electrode is adjacent with the surface that n type semiconductor layer is arranged in
Surface.
In addition, the material of passivation protection layer 60 is silica, silica is not reacted with most acid, electrical insulating property
Relatively good, thermal expansion coefficient is 10-6Hereinafter, it is more satisfactory for the blocking effect of various diffusion ions, and silica pair
In all having good transmitance in entire spectral region, by taking the silica with a thickness of 1mm as an example, transmitance be can achieve
90% or more, the material particularly suitable as passivation protection layer.
The material at the top of P-type electrode 51 is gold.Electrode not only needs to conduct electric current, and needs to have in subsequent routing
There is good solderability, forms the top of P-type electrode using gold, gold is more stable metal, it is difficult to be oxidized in air,
And there is good ductility and thermally conductive and electric conductivity (conductivity is only second to copper and silver), particularly suitable as electrode
Top material.
In the present embodiment, as shown in Figure 1, the light-emitting diode chip for backlight unit further includes adhesion layer 70, adhesion layer 70 is at least set
It sets between the edge and passivation protection layer 60 at the top of P-type electrode 51.Fig. 3 is the knot of adhesion layer provided in an embodiment of the present invention
Structure schematic diagram, referring to Fig. 3, adhesion layer 70 includes at least three sublayers 71 stacked gradually, and the material of each sublayer 71 includes gold
And silicon, and molar content golden at least three sublayers 71 is successively reduced along the stacking direction of adhesion layer 70, at least three sublayers
The molar content of silicon successively increases along the stacking direction of adhesion layer 70 in 71.
The embodiment of the present invention is adhered to by the way that adhesion layer is arranged between the edge and passivation protection layer at the top of P-type electrode
Layer includes at least three sublayers that stack gradually, and the material of each sublayer includes gold and silicon, and golden at least three sublayers is rubbed
You are successively reduced content along the stacking direction of adhesion layer, and the molar content of silicon successively increases along the stacking direction of adhesion layer, therefore
Golden molar content is more in the sublayer at the top of P-type electrode, the material gold matching degree used with the top of P-type electrode compared with
The combination interface of height, adhesion layer and P-type electrode is finer and close；Simultaneously close to passivation protection layer sublayer in silicon molar content compared with
It is more, the combination interface of adhesion layer and passivation protection layer higher with the matching degree of the materials silicon dioxide of passivation protection layer use
Compare fine and close；And the molar content of gold and silicon all successively changes in all sublayers, the material that two neighboring sublayer uses
Matching degree it is also higher, the compactness inside adhesion layer is also fine, so setting adhesion layer can be effectively improved the top of P-type electrode
Adhesiveness between the edge and passivation protection layer in portion, avoids passivation protection layer from falling off, and enables passivation protection layer to p-type electricity
Pole and transparency conducting layer carry out effective protection, avoid P-type electrode and transparency conducting layer exposure in air and by the water in air
The corrosion such as steam, oxygen variation, causes light-emitting diode chip for backlight unit to fail, and substantially increase light-emitting diode chip for backlight unit uses the longevity
Life, is conducive to the extensive use of light emitting diode.In addition, adhesion layer can also play a certain protective role P-type electrode, increase
The reliability of strong P-type electrode, the final service life for improving light-emitting diode chip for backlight unit and realization effect.
In specific implementation, as shown in Figure 1, the edge at the top of N-type electrode 52 and blunt can also be arranged in adhesion layer 70
Change between protective layer 60, to avoid the passivation protection layer in N-type electrode 52 falls off and can not protect N-type electrode, causes N-type electrode
Exposure is corroded by vapor, the oxygen etc. in air in air and is failed.
Optionally, the material for the sublayer being laminated at first at least three sublayers can also include titanium.Due to titanium and other gold
The affinity of category is strong, there is certain adhesive attraction, therefore the material for the sublayer being finally laminated at least three sublayers to metal
Further include titanium, the adhesiveness between adhesion layer and electrode can be further strengthened, air is effectively avoided to enter chip interior corrosion
Electrode.And titanium has certain barrier effect, can prevent the layer gold at the top of P-type electrode from spreading to adhesion layer.
Preferably, the molar content of titanium can be 0.5%~1.5% in the sublayer being laminated at first at least three sublayers.
It, may mole containing due to titanium if the molar content of titanium is less than 0.5% in the sublayer being laminated at first at least three sublayers
Measure effect that is too low and not having adhesive；If the molar content of titanium is greater than in the sublayer being laminated at first at least three sublayers
1.5%, then it may be poor due to too high and the material with other layers the matching degree of the molar content of titanium.
Optionally, golden molar content can be greater than 90% in the sublayer being laminated at first at least three sublayers, to guarantee
With the matching degree of the top layer of P-type electrode so that adhesion layer and the combination interface of P-type electrode are very fine and close, to have to P-type electrode
Effect protection.
Optionally, the thickness of each sublayer can be equal, and the difference of molar content golden in two neighboring sublayer is less than
1%, the difference of the molar content of silicon is less than 1% in two neighboring sublayer, to make mole of gold and silicon at least three sublayers
Content can be with smooth change, and the property transition of two neighboring sublayer is steady, is completely embedded inside adhesion layer.
Preferably, the difference of molar content golden in two neighboring sublayer can be 3%~8%, in two neighboring sublayer
The difference of the molar content of silicon can be 3%~8%, to avoid adhesion layer inside since the variation of sublayer is too big and insecure.
Optionally, the thickness of adhesion layer can be 20nm~30nm.It, may if the thickness of adhesion layer is less than 200nm
Cause adhesiving effect bad since the thickness of adhesion layer is too small；It, may be due to viscous if the thickness of adhesion layer is greater than 300nm
The thickness of attached layer is too big and increases unnecessary production cost.
Preferably, the quantity of at least three sublayers can be less than or equal to 6, to guarantee that each sublayer can play centainly
Effect.
For example, adhesion layer includes three sublayers 71a, 71b, 71c: the sublayer 71a stacked gradually with a thickness of 10nm, wherein
The molar content of gold is 95%, and the molar content of silicon is 4%, and the molar content of titanium is 1%；Sublayer 71b with a thickness of 10nm,
The molar content of middle gold is 90%, and the molar content of silicon is 10%；Sublayer 71c with a thickness of 10nm, wherein the molar content of gold
It is 85%, the molar content of silicon is 15%.
Optionally, the thickness at the edge at the top of p-type pad can be bigger than the thickness of the non-edge at the top of p-type pad
10nm~20nm, preferably 15nm, with ensure p-type pad top non-edge be pure layer gold, when improving subsequent encapsulation
Bonding wire quality.
Correspondingly, if adhesion layer is additionally arranged at the edge at the top of N-type electrode, the edge at the top of N-type electrode
Thickness can be 10nm~20nm bigger than the thickness of the non-edge at the top of N-type electrode.
In practical applications, P-type electrode described above is the p-type pad in P-type electrode, and P-type electrode is welded in addition to p-type
It further include at least one electrode wires except disk, each electrode wires are connect with p-type pad respectively, and are extended outwardly from p-type pad,
It is extending transversely in favor of electric current, all areas of enough injecting p-type semiconductor layers as far as possible are allowed current to, light emitting diode is improved
The luminous efficiency of chip.Correspondingly, as shown in Fig. 2, the shape on the surface on p type semiconductor layer 23 is arranged in current barrier layer 30
It further include at least one rectangle 32, i.e., the shape on the surface on p type semiconductor layer 23 is arranged in as annular 31 in current barrier layer 30
With the combination of at least one rectangle 32, each rectangle 32 is connect with the outer ring of annular 31 respectively.Transparency conducting layer is arranged simultaneously
In annular and each rectangle in current barrier layer, electrode wires are arranged on region corresponding with rectangle over transparent conductive layer, blunt
Change protective layer to be arranged in electrode wires.
Specifically, the main function of substrate is to provide the substrate of epitaxial material growth, and the material of substrate can be sapphire
(main component Al2O3), substrate is preferably graphical sapphire substrate (English: Patterned Sapphire
Substrate, referred to as: PSS).Further, the figure in PSS can be 2.5 μm of diameter, the cone of 1.5 μm of height, phase
Spacing between adjacent two figures can be that 1 μm, the at this time stress release of PSS and the overall effect that light improves out are preferable.
Luminescent layer may include that alternately stacked multiple Quantum Well and multiple quantum are built, and the main function of Quantum Well is to make electricity
Son and hole can recombination luminescence, the material of Quantum Well can be indium gallium nitrogen (InGaN)；The main function that quantum is built is by electronics
It is limited in recombination luminescence in Quantum Well with hole, the material that quantum is built can be gallium nitride.The main function of n type semiconductor layer is
Electronics is provided for recombination luminescence, the material of n type semiconductor layer can be the gallium nitride of n-type doping.The main work of p type semiconductor layer
With being to provide hole for recombination luminescence, the material of p type semiconductor layer can be the gallium nitride of p-type doping.
The main function of current barrier layer is the flow direction for guiding electric current, drives electric current lateral flow, expands the function of current
Region, the material of current barrier layer can be silica, be made of insulating materials, can with the flowing of reasonable distribution electric current,
The luminous efficiency of light-emitting diode chip for backlight unit is improved, and low in cost.The main function of transparency conducting layer is the cross for improving electric current
To extended capability, expand the region of the function of current, the material of transparency conducting layer can be tin indium oxide (English: Indium tin
Oxide, referred to as: ITO) or zinc oxide (ZnO), electric conductivity and transmitance are all fine, and cost of manufacture is also low.By taking ITO as an example, oxygen
The molar content ratio for changing indium and tin oxide is 19:1, and the indium in indium oxide is mainly in trivalent, and the tin in tin oxide is mainly in 4 valences, oxygen
The molar content for changing indium is much larger than the molar content of indium oxide, can produce more electronics in this way, obtains good electric conductivity.
The main function of P-type electrode and N-type electrode is Injection Current, and P-type electrode and N-type electrode may include stacking gradually
Multiple metal layers, the material of multiple metal layers can be followed successively by chromium (Cr), aluminium (Al), titanium (Ti), golden (Au).Wherein, layers of chrome
Main function be the Ohmic contact realized between semiconductor and metal；The main function of aluminium layer is the light for reflecting chip and issuing
Line improves the light extraction efficiency of chip；The main function of titanium layer is the adhesiveness improved in electrode between each layer；The main work of layer gold
With being routing.
Optionally, the thickness of substrate can be 120 μm~160 μm, preferably 130 μm, to avoid substrate is too thick and causes
The heat dissipation of chip interior is bad.The thickness of P-type electrode and N-type electrode can be 1.2 μm~1.8 μm, and preferably 1.5 μm, p-type is electric
The thickness of layer gold can be greater than 1 μm in pole and N-type electrode, to meet the requirement of subsequent routing.The thickness of passivation protection layer can be with
For 70nm~90nm, preferably 80nm, to play preferable protecting effect.
In a kind of implementation of the present embodiment, which can also include buffer layer, and buffer layer is set
Set between substrate and n type semiconductor layer, the material of buffer layer is aluminium nitride (AlN), can be effectively relieved Sapphire Substrate and
Lattice mismatch between gallium nitride material improves the crystal quality of light emitting diode, and then improves the luminous effect of light emitting diode
Rate.
Optionally, the thickness of buffer layer can be 50nm~500nm, preferably 200nm.If the thickness of buffer layer is less than
50nm then may cause lattice mismatch than more serious, the crystal matter of light-emitting diode chip for backlight unit since the thickness of buffer layer is too small
It measures poor；It may be due to the thickness of buffer layer since the ductility of gallium nitride is poor if the thickness of buffer layer is greater than 500nm
Degree is too big and buffer layer is caused to generate chap in temperature changing process, is unfavorable for the stability of light-emitting diode chip for backlight unit, and
It also will cause the waste of material, extend process time, increase cost of manufacture.
Further, which can also include undoped gallium nitride layer, undoped gallium nitride layer setting
Between buffer layer and n type semiconductor layer；It also may include electronic barrier layer, electronic barrier layer setting is in luminescent layer and p-type half
Between conductor layer.This is the prior art, is no longer described in detail one by one herein.
In another implementation of the present embodiment, which can also include reflecting layer, reflecting layer
Substrate is set and is arranged in the opposed surface on the surface of n type semiconductor layer, the light collection that light-emitting diode chip for backlight unit is shone
In from the side of chip project, improve the effective use efficiency of light.
Optionally, reflecting layer can be distributed bragg reflector mirror (English: Distributed Bragg
Reflection, referred to as: DBR).
Specifically, DBR may include the metal-oxide film in multiple periods, the metal-oxide film in multiple periods according to
Secondary stacking, the metal-oxide film in each period include the metal-oxide film of at least two materials, the gold of different materials
The refractive index for belonging to sull is different, and the metal-oxide film of at least two materials is cascading, different cycles
The lamination order of the metal-oxide film of at least two materials is identical in metal-oxide film.
Preferably, in DBR the metal-oxide film in N1 period with a thickness of blue light wavelength (such as 455nm) four/
The a quarter with a thickness of yellow wavelengths (such as 570nm) of the metal-oxide film in N2 period, N1 and N2 are in one, DBR
Positive integer, and the sum of N1 and N2 are equal to the periodicity of metal-oxide film in DBR.For example, N1=2*N2.
It should be noted that LED is mainly used on white light in lighting area at present, the indigo plant that white light is generally issued by chip
The yellow light combine that light and fluorescent powder change into is formed, and design major part DBR reflects blue light, while fraction DBR is to yellow light
It is reflected, light can comprehensively be reflected, avoid the loss of light, improve the external quantum efficiency of chip, improve core
The luminous efficiency of piece.
In the present embodiment, the periodicity of metal-oxide film can be 2~48, to guarantee reflecting effect
In the case of, process complexity is reduced as far as possible.
Specifically, the material of metal-oxide film can use tantalum pentoxide (Ta2O5), zirconium dioxide (ZrO2), three
Al 2 O (Al2O3), titanium dioxide (TiO2) or silica (SiO2).Wherein, the refractive index of tantalum pentoxide is
2.06, the refractive index of zirconium dioxide is 1.92, and the refractive index of aluminum oxide is 1.77, and the refractive index of titanium dioxide is 2.35,
The refractive index of silica is 1.46.
Preferably, the metal-oxide film of a cycle may include the metal-oxide film of two kinds of materials, a kind of
The material of the metal-oxide film of material uses titanium dioxide, and the material of the metal-oxide film of another material uses two
Silica.The refractive index of titanium dioxide and silica is maximum, and reflecting effect is best.
The embodiment of the invention provides a kind of production method of light-emitting diode chip for backlight unit, it is suitable for making hair shown in FIG. 1
Luminous diode chip, Fig. 4 are the flow chart of production method provided in this embodiment, and referring to fig. 4, which includes:
Step 201: successively growing n type semiconductor layer, luminescent layer, p type semiconductor layer on substrate.
Fig. 5 a is the structural schematic diagram of light-emitting diode chip for backlight unit after step 201 executes, and Fig. 6 a is to shine shown in Fig. 5 a
The top view of diode chip for backlight unit.Wherein, 10 substrate is indicated, 21 indicate n type semiconductor layer, and 22 indicate luminescent layer, and 23 indicate p-type half
Conductor layer.Referring to Fig. 5 a and Fig. 6 a, n type semiconductor layer 21, luminescent layer 22, p type semiconductor layer 23 are sequentially laminated on substrate 10.
Specifically, which may include:
Using metallo-organic compound chemical gaseous phase deposition (English: Metal organic Chemical Vapor
Deposition, referred to as: MOCVD) technology successively grows n type semiconductor layer, multiple quantum well layer and P-type semiconductor on substrate
Layer.
Optionally, before the step 201, which can also include:
Substrate is cleaned, to provide a clean surface for subsequent epitaxial growth.
Optionally, before the step 201, which can also include:
Buffer layer is formed on the substrate.
Specifically, buffer layer is formed on the substrate, may include:
In a nitrogen atmosphere, aluminium target is sputtered, aln layer is formed on the substrate.
Step 202: the groove for extending to n type semiconductor layer is opened up on p type semiconductor layer.
Fig. 5 b is the structural schematic diagram of light-emitting diode chip for backlight unit after step 202 executes, and Fig. 6 b is to shine shown in Fig. 5 b
The top view of diode chip for backlight unit.Wherein, 20 groove is indicated.Referring to Fig. 5 b and Fig. 5 b, groove 20 is extended to from p type semiconductor layer 23
N type semiconductor layer 21.
Optionally, which may include:
The photoresist of certain figure is formed on p type semiconductor layer using photoetching technique, photoresist is arranged in P-type semiconductor
Layer is on the region in addition to groove region；
Using sense coupling (English: Inductive Coupled Plasma Etch, abbreviation: ICP)
Equipment dry etching does not have the p type semiconductor layer of photoresist overlay and luminescent layer, forms groove；
Remove photoresist.
Dry etching is carried out by using ICP equipment, higher etching speed and lesser loss can be obtained, be conducive to mention
The yield of high light-emitting diode chip for backlight unit.
In specific implementation, the photoresist that certain figure is formed using photoetching technique may include:
It is laid with a layer photoresist；
Photoresist is exposed by the mask plate of certain figure；
Photoresist after exposure is impregnated in developer solution, part photoresist is dissolved, the photoresist left is schemed needed for being
The photoresist of shape.
Step 203: current barrier layer is formed on p type semiconductor layer, current barrier layer is arranged on p type semiconductor layer
The shape on surface includes an annular.
Fig. 5 c is the structural schematic diagram of light-emitting diode chip for backlight unit after step 203 executes, and Fig. 6 c is to shine shown in Fig. 5 c
The top view of diode chip for backlight unit.Wherein, 30 current barrier layer is indicated, 31 indicate annular, and 32 indicate rectangle.Referring to Fig. 5 c and figure
6c, current barrier layer 30 are arranged on the partial region of p type semiconductor layer 23, and current barrier layer 30 is arranged in p type semiconductor layer
The shape on the surface on 23 is annular 31 and the combination of at least one rectangle 32, and each rectangle 32 connects with the outer ring of annular 31 respectively
It connects.
Specifically, which may include:
Current barrier layer is formed on p type semiconductor layer and n type semiconductor layer；
The photoresist of certain figure is formed on current barrier layer using photoetching technique, photoresist is arranged in current barrier layer
On region corresponding with P-type electrode；
Wet etching does not have the current barrier layer of photoresist overlay；
Remove photoresist.
Step 204: forming transparency conducting layer on the region that p type semiconductor layer is located at outside annular and current barrier layer.
Fig. 5 d is the structural schematic diagram of light-emitting diode chip for backlight unit after step 204 executes, and Fig. 6 d is to shine shown in Fig. 5 d
The top view of diode chip for backlight unit.Wherein, 40 transparency conducting layer is indicated.Referring to Fig. 5 d and Fig. 6 d, transparency conducting layer 40 is arranged in p-type
Semiconductor layer 23 is located on the region and current barrier layer 30 outside annular 31.
Optionally, which may include:
It is passed through oxygen, using N-type semiconductor of the magnetron sputtering technique in current barrier layer, p type semiconductor layer and groove
Transparency conducting layer is formed on layer；
Form the photoresist of certain figure over transparent conductive layer using photoetching technique, photoresist is arranged at transparent lead
Electric layer is on the region in addition to n type semiconductor layer and P-type electrode position；
Wet etching does not have the transparency conducting layer of photoresist overlay；
Remove photoresist.
It, can be to avoid the peroxide breaks down in transparency conducting layer by being passed through oxygen during forming transparency conducting layer
At simple substance, avoid generating simple substance and the light transmittance that influences transparency conducting layer.
Specifically, the flow for being passed through oxygen can be 5sccm~10sccm, preferably 8sccm.If being passed through the stream of oxygen
Amount is less than 5sccm, then the transmitance of transparency conducting layer may be caused too low since to be passed through the flow of oxygen too small；If be passed through
The flow of oxygen is greater than 10sccm, then may lead to the resistivity of transparency conducting layer too greatly very much due to being passed through the flow of oxygen
Greatly.
Step 205: N-type electrode being set on the n type semiconductor layer in groove, and is located in annular in p type semiconductor layer
Region and transparency conducting layer region corresponding with current barrier layer on P-type electrode, the material at the top of P-type electrode are set
For gold.
Fig. 5 e is the structural schematic diagram of light-emitting diode chip for backlight unit after step 205 executes, and Fig. 6 e is to shine shown in Fig. 5 e
The top view of diode chip for backlight unit.Wherein, 51 P-type electrode is indicated, 52 indicate N-type electrode.Referring to Fig. 5 e and Fig. 6 e, N-type electrode 52
It is arranged on the n type semiconductor layer 21 in groove 20, and the shape on the surface on n type semiconductor layer 21 is arranged in N-type electrode 52
For sector；The region that p type semiconductor layer 23 is located in annular 31 and transparency conducting layer 40 and electric current is arranged in P-type electrode 51
On the corresponding region in barrier layer 30, and the surface on the region that p type semiconductor layer 23 is located in annular 31 is arranged in P-type electrode 51
For circle, it is the ring covered outside circle that transparency conducting layer 40, which is arranged in, with the surface on annular 31 corresponding regions in P-type electrode 51
Shape, the surface that P-type electrode 51 is arranged on the region corresponding with rectangle 32 of transparency conducting layer 40 are the rectangle connecting with annular.
Optionally, which may include:
The photoresist of certain figure is formed on transparency conducting layer and n type semiconductor layer using photoetching technique, photoresist is set
It sets on region and the n type semiconductor layer in transparency conducting layer in addition to P-type electrode region except N-type electrode region
Except region on；
Vacuum degree is controlled 5 × 10-6Torr or more, in photoresist, transparency conducting layer, p type semiconductor layer and N-type semiconductor
Electrode is formed on layer；
The electrode on photoresist and photoresist is removed, the electrode left on transparency conducting layer and p type semiconductor layer forms p-type
Electrode, the electrode left on n type semiconductor layer form N-type electrode.
By controlling vacuum degree when forming electrode 5 × 10-6Electrode can be effectively prevented by air oxygen in torr or more
Change.
Step 206: adhesion layer is at least formed in P-type electrode, adhesion layer includes at least three sublayers stacked gradually, respectively
The material of a sublayer includes gold and silicon, and molar content golden at least three sublayers successively subtracts along the stacking direction of adhesion layer
Few, the molar content of silicon successively increases along the stacking direction of adhesion layer at least three sublayers.
Fig. 5 f is the structural schematic diagram of light-emitting diode chip for backlight unit after step 206 executes, and Fig. 6 f is to shine shown in Fig. 5 f
The top view of diode chip for backlight unit.Wherein, 70 adhesion layer is indicated.Referring to Fig. 5 f and Fig. 6 f, P-type electrode is arranged in adhesion layer 70 at this time
51 and N-type electrode 52 on.
Specifically, which may include:
Adherency is formed in P-type electrode, transparency conducting layer, n type semiconductor layer and N-type electrode using magnetron sputtering technique
Layer；
The photoresist of certain figure is formed on adhesion layer using photoetching technique, photoresist setting is in adhesion layer and p-type electricity
On pole and the corresponding region of N-type electrode；
Dry etching does not have the adhesion layer of photoresist overlay；
Remove photoresist.
When forming each sublayer in adhesion layer using magnetron sputtering technique, corresponding target is sputtered, it can shape
At corresponding sublayer.For example, the material of sublayer includes gold and silicon, then au-si alloy target is sputtered when forming sublayer；For another example,
The material of sublayer includes gold, silicon and titanium, then sputters when forming sublayer to gold silicon Ti Alloy Target.Further, in sublayer
90% is golden and 10% is silicon, then 90% is gold in the au-si alloy target used when forming sublayer and 10% is silicon；In sublayer
95% be gold, 4% be silicon and 1% be titanium, then in the gold silicon Ti Alloy Target used when forming sublayer 95% for it is golden, 4% be silicon and
1% is titanium.
Step 207: in the side wall of adhesion layer, adhesion layer and P-type electrode, transparency conducting layer, the side wall of groove, groove
Passivation protection layer is formed on n type semiconductor layer and N-type electrode, the material of passivation protection layer is silica.
Fig. 5 g is the structural schematic diagram of light-emitting diode chip for backlight unit after step 207 executes, and Fig. 6 g is to shine shown in Fig. 5 g
The top view of diode chip for backlight unit.Wherein, 60 passivation protection layer is indicated.Referring to Fig. 5 g and Fig. 6 g, passivation protection layer 60 covers at this time
On the upper surface of entire chip.
Specifically, which may include:
Silica is laid with using physical gas phase deposition technology, forms passivation protection layer.
Step 208: removing adhesion layer in the non-edge at the top of P-type electrode and passivation protection layer and N-type electricity
Passivation protection layer in the non-edge at the top of pole.
Fig. 5 h is the structural schematic diagram of light-emitting diode chip for backlight unit after step 208 executes, and Fig. 6 h is to shine shown in Fig. 5 h
The top view of diode chip for backlight unit.Referring to Fig. 5 h and Fig. 6 h, in the non-edge at the top of P-type electrode 51 and N-type electrode 51
Adhesion layer 70 and passivation protection layer 60 have been removed, and are left viscous on the fringe region at the top of P-type electrode 51 and N-type electrode 51
Attached layer 70 and passivation protection layer 60.
Optionally, which may include:
The photoresist of setting figure is formed in passivation protection layer using photoetching technique, photoresist is arranged in passivation protection layer
It is upper partly to be led with the N-type in the edge of adhesion layer, the side wall of adhesion layer and P-type electrode, transparency conducting layer, the side wall of groove, groove
On the corresponding region of body layer and the edge of N-type electrode；
It is passed through sour gas, adhesion layer and passivation protection layer in the non-edge at the top of dry etching P-type electrode,
And the passivation protection layer in the non-edge at the top of N-type electrode；
It is passed through oxygen, dry method removes photoresist.
Photoresist is removed by using the mode that oxygen dry method is removed photoresist is passed through, glue wet process can be gone to remove photoresist to avoid using
When mode removes photoresist, glue is gone to remain on chip, electrode and transparency conducting layer is caused to be corroded.Specifically, dry method is gone
When except photoresist, temperature is 150 DEG C~250 DEG C.Since the main component of photoresist is organic matter, at 150 DEG C~250 DEG C
At a high temperature of, photoresist can be oxidized to carbon dioxide by the oxygen being passed through, to remove photoresist.
Specifically, sour gas can be the mixed gas of chlorine and argon gas, to realize adhesion layer and passivation protection layer
Removal.
In specific implementation, which can also include:
When removing the adhesion layer and passivation protection layer in the non-edge at top of P-type electrode, P-type electrode is removed
The certain thickness layer gold in top.
By removing certain thickness layer gold, the substance in adhesion layer is avoided to be diffused into P-type electrode, it is ensured that P-type electrode
Top non-edge be pure layer gold, improve bonding wire quality when subsequent encapsulation.
In practical applications, the semi-finished product for the only light-emitting diode chip for backlight unit that 201~step 208 of above-mentioned steps obtains, because
This after step 208, which can also include:
Step S1: organic semiconductor device；
Step S2: reflecting layer is formed on the substrate, the surface in reflecting layer is arranged in substrate and n type semiconductor layer is arranged in substrate
Surface is opposite；
Step S3: sliver is carried out to semi-finished product, obtains at least two mutually independent chips；
Step S4: testing obtained chip, picks out satisfactory chip.
Specifically, step S1 may include:
The surface where electrode in semi-finished product is fixed by waxing；
The surface where substrate in semi-finished product is roughly ground using diamantiferous grinding wheel；
Using the Liquid diamond including micron-sized diamond dust and oily matter to the surface where substrate in semi-finished product
Carry out fine grinding；
Using include nanoscale alumina particle and silica dioxide granule and water-soluble substances polishing fluid half-and-half at
It is refined on surface in product where substrate；
Lower wax and cleaning are carried out to semi-finished product.
In specific implementation, the thickness after substrate corase grinding is generally 140 μm~160 μm, and such as 150 μm；Diamond dust
Diameter be generally 2 μm~4 μm, such as 3 μm.
Optionally, step S3 may include:
The power for controlling laser is 5W, and the wavelength of laser is 1024nm, carries out stealthy cutting to substrate；
Cleave semi-finished product.
By being that 5W will not make substrate while effectively being cut to substrate by the power control of laser
At very big damage.And the wavelength of laser is limited to 1024nm, reflecting layer can be effectively penetrated, the stealth of substrate is cut in realization
It cuts.
The light-emitting diode chip for backlight unit and traditional production method that production method provided in an embodiment of the present invention is made make
Light-emitting diode chip for backlight unit carry out aging comparison (formation condition of two kinds of chips is essentially identical, the difference is that only the present invention
It include adhesion layer in the light-emitting diode chip for backlight unit for the production method production that embodiment provides, and the hair of traditional production method production
There is no adhesion layer in luminous diode chip), twice of electric current, 90 DEG C of temperature, 95% damp condition under aging 1000 hours
Later, the brightness decay 5.6% of the light-emitting diode chip for backlight unit of production method provided in an embodiment of the present invention production, on driving voltage
0.3V is risen, the corrosion-free phenomenon of electrode, passivation protection layer is without obscission；And the light-emitting diodes tube core of traditional production method production
The brightness decay 9.8% of piece, driving voltage rise 0.5V, and electrode is corroded nigrescence, and passivation protection layer, which has, to fall off.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of light-emitting diode chip for backlight unit, the light-emitting diode chip for backlight unit includes substrate, n type semiconductor layer, luminescent layer, p-type half
Conductor layer, current barrier layer, transparency conducting layer, P-type electrode, N-type electrode and passivation protection layer；It is the n type semiconductor layer, described
Luminescent layer, the p type semiconductor layer stack gradually over the substrate, and the p type semiconductor layer is equipped with and extends to the N-type
The groove of semiconductor layer；The current barrier layer is arranged on the p type semiconductor layer, and the current barrier layer is arranged in institute
The shape for stating the surface on p type semiconductor layer includes an annular, and the transparency conducting layer is arranged in the p type semiconductor layer position
In on the region and the current barrier layer outside the annular；The P-type electrode setting is located at described in the p type semiconductor layer
On region and the transparency conducting layer region corresponding with the current barrier layer in annular, the N-type electrode setting exists
On n type semiconductor layer in the groove, the top of the transparency conducting layer, the P-type electrode is arranged in the passivation protection layer
The edge and side wall in portion, the side wall of the groove, the n type semiconductor layer in the groove and the N-type electrode top
On edge and side wall；The material of the passivation protection layer is silica, and the material at the top of the P-type electrode is gold；
It is characterized in that, the light-emitting diode chip for backlight unit further includes adhesion layer, the adhesion layer is arranged at the P-type electrode
Top edge and the passivation protection layer between；The adhesion layer includes at least three sublayers stacked gradually, Ge Gesuo
The material for stating sublayer includes gold and silicon, and molar content golden at least three sublayer is along the stacking direction of the adhesion layer
It successively reduces, the molar content of silicon successively increases along the stacking direction of the adhesion layer at least three sublayer.
2. light-emitting diode chip for backlight unit according to claim 1, which is characterized in that be laminated at first at least three sublayer
The material of sublayer further include titanium.
3. light-emitting diode chip for backlight unit according to claim 2, which is characterized in that be laminated at first at least three sublayer
Sublayer in titanium molar content be 0.5%~1.5%.
4. described in any item light-emitting diode chip for backlight unit according to claim 1~3, which is characterized in that at least three sublayer
In molar content golden in the sublayer that is laminated at first be greater than 90%.
5. described in any item light-emitting diode chip for backlight unit according to claim 1~3, which is characterized in that the thickness of each sublayer
Spend equal, and the difference of molar content golden in the two neighboring sublayer, less than 1%, silicon rubs in the two neighboring sublayer
The difference of your content is less than 1%.
6. described in any item light-emitting diode chip for backlight unit according to claim 1~3, which is characterized in that the two neighboring sublayer
The difference of the molar content of middle gold is 3%~8%, in the two neighboring sublayer difference of the molar content of silicon be 3%~
8%.
7. described in any item light-emitting diode chip for backlight unit according to claim 1~3, which is characterized in that the thickness of the adhesion layer
For 20nm~30nm.
8. a kind of production method of light-emitting diode chip for backlight unit, which is characterized in that the production method includes:
N type semiconductor layer, luminescent layer, p type semiconductor layer are successively grown on substrate；
The groove for extending to the n type semiconductor layer is opened up on the p type semiconductor layer；
Current barrier layer is formed on the p type semiconductor layer, the current barrier layer is arranged on the p type semiconductor layer
The shape on surface includes an annular；
Transparency conducting layer is formed on the region that the p type semiconductor layer is located at outside the annular and the current barrier layer；
N-type electrode is set on n type semiconductor layer in the groove, and is located in the annular in the p type semiconductor layer
Region and transparency conducting layer region corresponding with the current barrier layer on P-type electrode, the P-type electrode are set
Top material be gold；
Adhesion layer is at least formed in the P-type electrode, the adhesion layer includes at least three sublayers stacked gradually, Ge Gesuo
The material for stating sublayer includes gold and silicon, and molar content golden at least three sublayer is along the stacking direction of the adhesion layer
It successively reduces, the molar content of silicon successively increases along the stacking direction of the adhesion layer at least three sublayer；
The adhesion layer, the side wall of the adhesion layer and the P-type electrode, the transparency conducting layer, the groove side wall,
Passivation protection layer, the material of the passivation protection layer are formed on n type semiconductor layer and the N-type electrode in the groove
For silica；
Remove adhesion layer in the non-edge at the top of the P-type electrode and passivation protection layer and the N-type electrode
Passivation protection layer in the non-edge at top.
9. production method according to claim 8, which is characterized in that the production method further include:
When removing the adhesion layer and passivation protection layer in the non-edge at top of the P-type electrode, P-type electrode is removed
The certain thickness layer gold in top.
10. production method according to claim 8 or claim 9, which is characterized in that the top of the removal P-type electrode
Passivation in the non-edge at the top of adhesion layer and passivation protection layer and the N-type electrode in non-edge is protected
Sheath, comprising:
The photoresist of setting figure is formed in the passivation protection layer using photoetching technique, the photoresist is arranged described blunt
Change protective layer on the edge of the adhesion layer, the side wall of the adhesion layer and the P-type electrode, the transparency conducting layer, institute
State the side wall of groove, on the corresponding region in edge of the n type semiconductor layer in the groove and the N-type electrode；
It is passed through sour gas, adhesion layer and passivation protection layer in the non-edge at the top of P-type electrode described in dry etching,
And the passivation protection layer in the non-edge at the top of the N-type electrode；
It is passed through oxygen, dry method removes the photoresist.
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| CN102723417A (en) * | 2012-07-03 | 2012-10-10 | 杭州士兰明芯科技有限公司 | Light-emitting diode (LED) chip convenient to route and preparation method thereof |
| CN203218313U (en) * | 2013-03-27 | 2013-09-25 | 安徽三安光电有限公司 | Light emitting diode used in fluorescent lamps |
| CN104037294A (en) * | 2014-06-26 | 2014-09-10 | 圆融光电科技有限公司 | GaN-based light-emitting diode and manufacturing method thereof |
| CN107195745A (en) * | 2017-05-10 | 2017-09-22 | 华灿光电（浙江）有限公司 | Current barrier layer and manufacturing method of light emitting diode chip |
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| CN102723417A (en) * | 2012-07-03 | 2012-10-10 | 杭州士兰明芯科技有限公司 | Light-emitting diode (LED) chip convenient to route and preparation method thereof |
| CN203218313U (en) * | 2013-03-27 | 2013-09-25 | 安徽三安光电有限公司 | Light emitting diode used in fluorescent lamps |
| CN104037294A (en) * | 2014-06-26 | 2014-09-10 | 圆融光电科技有限公司 | GaN-based light-emitting diode and manufacturing method thereof |
| CN107195745A (en) * | 2017-05-10 | 2017-09-22 | 华灿光电（浙江）有限公司 | Current barrier layer and manufacturing method of light emitting diode chip |
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