CN108363549A - A kind of Nand flash elements and its communication control method and device - Google Patents
A kind of Nand flash elements and its communication control method and device Download PDFInfo
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- CN108363549A CN108363549A CN201711449651.9A CN201711449651A CN108363549A CN 108363549 A CN108363549 A CN 108363549A CN 201711449651 A CN201711449651 A CN 201711449651A CN 108363549 A CN108363549 A CN 108363549A
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- nand flash
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Abstract
An embodiment of the present invention provides a kind of Nand flash elements and its communication control method and device, which specifically includes a packaging body, is packaged with Nand flash kernels and internal controller in packaging body.And it is realized especially by product firmware module and ECC check management, bad block management, address of cache management or wear leveling management is carried out to Nand flash kernels, so also just without realizing above-mentioned management by the master controller outside piece, to solve the problems, such as master controller heavy load.
Description
Technical field
The present invention relates to memory techniques field, more particularly to a kind of Nand flash elements and its communication control method and
Device.
Background technology
Nand flash are one kind of flash memory, internal to use non-linear macroelement pattern, are solid-state large-capacity
The realization of memory provides cheap effective solution scheme.Nand flash have the advantages that capacity is larger, and rewriting speed is fast, are applicable in
In the storage of mass data, thus be in the industry cycle more and more widely used, as embedded product include digital camera,
The USB flash disk etc. of MP3 walkmans memory card, compact.
The data of Nand flash are stored in a manner of bit in memory cell, in general, in each cell
A bit can only be stored；These cell are linked to be bit line as unit of 8 or 16, formed so-called byte (x8)/
Word (x16), here it is the bit wides of NAND Device.These bit line recomposition Page, not according to manufacturer or model
Together, every page of bit line numbers are also different；Multiple page form a Block, such as 32 page.Specific a piece of Nand
How many upper Block of flash optionally determine.
Nand flash need its function of controller management, such as ECC check, bad block management, address of cache, wear leveling
Deng, however general Nand flash are not provided with corresponding internal controller in its packaging body, it is therefore, above-mentioned to its work(
The management of energy all relies on corresponding master controller and goes to realize, to increase the burden of corresponding master controller.
Invention content
In view of this, the present invention provides a kind of Nand flash elements and its communication control method and device, to solve
The problem of Nand flash elements lead to master controller heavy load because needing to rely on due to master controller is managed it.
To solve the above-mentioned problems, the invention discloses a kind of Nand flash elements, including a packaging body, the envelopes
Dress is packaged with Nand flash kernels and internal controller in vivo, wherein：
The internal controller is used to reflect the management of Nand flash kernels progress ECC check, bad block management, address
Penetrate management or wear leveling management.
In addition, additionally providing a kind of communication control method, the inside for being applied to Nand flash elements as described above is controlled
Device processed, which is characterized in that the communication control method includes step：
When the basic load-on module of the internal controller is in Debug patterns, receive host computer send data and
Order；
Wiping operation is written and read to the Nand flash kernels of the Nand flash elements according to the data and order.
Optionally, the data for receiving host computer transmission and order, including：
The data and order that the host computer is sent are received by the serial line interface of the Nand flash elements；
Alternatively, receiving the data and order that the host computer is sent by the SPI interface of the Nand flash elements.
Optionally, the serial line interface by the Nand flash elements receive data that the host computer is sent and
Order, including：
It establishes and connects with the host computer；
The multiple data and order that the host computer is sent are received successively, and the data and order include packet header sum number
According to part, the packet header includes command type, command number and configured transmission etc.；
The data and order that storage is received successively；
After the host computer is sent, the connection is released.
Optionally, the SPI interface by the Nand flash elements receive data that the host computer is sent and
Order, including：
Receive data and order of the host computer by preset transmission order transmission；
The data and order are stored successively.
Optionally, described that the Nand flash kernels of the Nand flash elements are carried out according to the data and order
Erasing operation is read and write, including：
Configuration parameter is parsed from data and order and low lattice run program；
Program is run according to the configuration parameter operation low lattice；
The product firmware that program receives the host computer transmission is run by running the low lattice；
The Nand flash kernels are written into the product firmware.
Response, in order to ensure the implementation of the above method, the present invention also provides a kind of communication control units, are applied to such as
The internal controller of the upper Nand flash elements, the communication control unit include：
Data and Order receiver module are used for when the basic load-on module of the internal controller is in Debug patterns,
Receive the data and order that host computer is sent；
Kernel operation module is used for according to the data and order in the Nand flash of the Nand flash elements
Core is written and read erasing operation.
Optionally, the data and Order receiver module include：
First receiving unit, for receiving what the host computer was sent by the serial line interface of the Nand flash elements
Data and order；
Second receiving unit, for receiving what the host computer was sent by the SPI interface of the Nand flash elements
Data and order.
Optionally, first receiving unit is specifically used for establishing with the host computer and connect；It receives successively described upper
The multiple data and order that machine is sent, the data and order include packet header and data portion, and the packet header includes order
Type, command number and configured transmission etc.；The data and order that storage is received successively；When the host computer is sent
Afterwards, the connection is released.
Optionally, second receiving unit is specifically used for receiving what the host computer was sent by preset transmission order
Data and order；The data and order are stored successively.
Optionally, the kernel operation module includes：
Resolution unit is instructed, for parsing configuration parameter and low lattice operation program from data and order；
Low lattice running unit, for running program according to the configuration parameter operation low lattice；
Firmware receiving unit, for solid by running the product that the low lattice operation program receives the host computer transmission
Part；
Firmware writing unit, for the Nand flash kernels to be written in the product firmware.
It can be seen from the above technical proposal that the present invention provides a kind of Nand flash elements and its communication control methods
And device, the Nand flash elements specifically include a packaging body, are packaged with Nand flash kernels and inside in packaging body
Controller.And especially by product firmware module realize to Nand flash kernels carry out ECC check management, bad block management,
Location mapping management or wear leveling management, so also just without realizing above-mentioned management by the master controller outside piece, to
Solve the problems, such as master controller heavy load.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Obtain other attached drawings according to these attached drawings.
Fig. 1 is a kind of structure diagram of Nand flash elements provided in an embodiment of the present invention；
Fig. 2 is a kind of step flow chart of communication control method provided in an embodiment of the present invention；
Fig. 3 is a kind of flow chart communicated using serial line interface provided in an embodiment of the present invention；
Fig. 4 is a kind of flow chart communicated using SPI interface provided in an embodiment of the present invention；
Fig. 5 is a kind of structure diagram of communication control unit provided in an embodiment of the present invention.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Embodiment one
Fig. 1 is a kind of structure diagram of Nand flash elements provided in an embodiment of the present invention.
Shown in referring to Fig.1, Nand flash elements provided in this embodiment include a packaging body 10, are set in the packaging body
It is equipped with Nand flash kernels 11 and an internal controller 12.The Nand flash kernels include multiple Block, each
Block is made of multiple Page, and each Page is then made of multiple Cell line, which further includes storage ECC check code
Storage region.
For controlling Nand flash kernels, which specifically includes basis and matches above-mentioned internal controller
Set module 121, basic load-on module 122, low lattice module 123 and product firmware module 124.
Wherein, above-mentioned configurations module is used to store the basic information and configuration information of the Nand flash kernels, such as
How many block page size, block size contain, search the mode of bad block, ECC etc.；Basic load-on module is for receiving host computer hair
The data information that send and control information, and can will be in product firmware loads to RAM；Low lattice module is used for basis and is connect from host computer
The control information received carries out low-level formatting operation to Nand flash kernels；Product firmware module is then used for according to host computer
The data information of transmission and control information reads and writes Nand flash kernels, erasing operation, ECC check management, bad block pipe
Reason, address of cache management and wear leveling management etc..
It can be seen from the above technical proposal that present embodiments providing a kind of Nand flash elements, one is specifically included
Packaging body is packaged with Nand flash kernels and internal controller in packaging body, and internal controller includes configurations module, base
Plinth load-on module, low lattice module and product firmware module.And it is realized to Nand flash kernels especially by product firmware module
ECC check management, bad block management, address of cache management or wear leveling management are carried out, so also just without by outside piece
Master controller realize above-mentioned management, to solve the problems, such as master controller heavy load.
Embodiment two
Fig. 2 is a kind of step flow chart of communication control method provided in an embodiment of the present invention.
Communication control method provided in this embodiment is applied to the Nand flash elements provided in a upper embodiment
Internal controller, for realizing the communication between internal controller and host computer.
With reference to shown in Fig. 2, communication control method provided in this embodiment specifically comprises the following steps：
S101：Receive the data and order that host computer is sent.
As previously described in a prior embodiment, Nand flash elements internal controller includes basic load-on module, which has two
Kind operating mode, respectively Debug patterns and Normal patterns.When in Normal patterns, basic load-on module is by this yuan
The product firmware of part is directly loaded into RAM possessed by internal controller itself and is run；When the module is in Debug patterns
When, it includes configuration parameter and low lattice operation program to need the data and the order that receive host computer transmission, the data and order.
When receiving the data and order that host computer is sent, two ways can be taken to carry out, one kind is to utilize this element
Serial line interface receive data and order, another kind is receives the data and order using SPI interface.
When carrying out the communications reception data and order using serial ports, data and order are divided into packet header and data portion, packet
Head includes that information, the data portions such as command type, command number, configured transmission and CRC check are then used for transmission data, specific logical
Letter process is as shown in figure 3, be specially：
First, it establishes and connects with the host computer；Then, upon establishment of a connection, the data that host computer is sent are received successively
And order；Meanwhile received data and order are stored successively；Finally, it after host computer transmission data and order, releases
Connection.
When carrying out the communications reception order using SPI interface, transmitted by SPI orders, data transmission procedure such as Fig. 4
It is shown.It is definite value to execute the data volume size that SPI_CMD_PROGRAM_LOAD is transmitted every time, and detailed process is：It receives upper
The order that machine is sent by preset transmission order；The order of reception is stored successively.
S102：Debug operations are carried out to Nand flash kernels according to the data and order that receive.
After by above-mentioned data and order, Nand flash elements are read and write or wiped using the data and order
Division operation specifically reads and writes Nand flash kernels therein or erasing operation, detailed process is as follows：
First, corresponding configuration parameter is parsed from data and order and low lattice run program；Then joined according to configuration
The number operation low lattice operation and instruction；The product firmware that program receives host computer transmission is run by running the low lattice；By the production
Product firmware is written in the Nand flash kernels, to complete corresponding reading and writing or erasing operation.
It can be seen from the above technical proposal that by aforesaid operations, can complete the reading and writing to Nand flash elements or
Erasing operation.
Embodiment three
Fig. 5 is a kind of structure diagram of communication control unit provided in an embodiment of the present invention.
Communication control method provided in this embodiment is applied to the interior of the Nand flash elements provided in embodiment one
Portion's controller, for realizing the communication between internal controller and host computer.
Referring to Figure 5, communication control unit provided in this embodiment specifically includes 20 He of data and Order receiver module
Kernel operation module 30.
Data and Order receiver module are used to receive data and the order of host computer transmission.
As previously described in a prior embodiment, Nand flash elements internal controller includes basic load-on module, which has two
Kind operating mode, respectively Debug patterns and Normal patterns.When in Normal patterns, basic load-on module is by this yuan
The product firmware of part is directly loaded into RAM possessed by internal controller itself and is run；When the module is in Debug patterns
When, it includes configuration parameter and low lattice operation program to need the data and the order that receive host computer transmission, the data and order.
When receiving the data and order that host computer is sent, two ways can be taken to carry out, for correspondence, the module packet
The first receiving unit and the second receiving unit are included, the first receiving unit is used to receive data and life using the serial line interface of this element
It enables, the second receiving unit is used to receive the data and order using SPI interface.
First receiving unit when carrying out the communications reception data and order using serial ports, data and order be divided into packet header and
Data portion, packet header include the information such as command type, command number and configured transmission, and data portion is then used for transmission data, specifically
Communication process as shown in figure 3, be specially：
First, it establishes and connects with the host computer；Then, upon establishment of a connection, the data that host computer is sent are received successively
And order；Meanwhile received data and order are stored successively；Finally, it after host computer transmission data and order, releases
Connection.
Second receiving unit is transmitted, data when carrying out the communications reception order using SPI interface by SPI orders
Transmission process is as shown in Figure 4.It is definite value, specific mistake to execute the data volume size that SPI_CMD_PROGRAM_LOAD is transmitted every time
Cheng Wei：Receive the order that host computer is sent by preset transmission order；The order of reception is stored successively.
Kernel operation module is used to that Nand flash kernels to be read and write or be wiped according to the data and order that receive
Operation.
After by above-mentioned data and order, Nand flash elements are read and write or wiped using the data and order
Division operation specifically carries out Debug operations to Nand flash kernels therein, and it is single which specifically includes instruction parsing
First, low lattice running unit, firmware receiving unit and firmware writing unit.
Instruction resolution unit is used to from data and order parse corresponding configuration parameter and low lattice run program；Low lattice
Running unit is used to run the low lattice according to configuration parameter and runs and instruct；Firmware receiving unit runs journey by running the low lattice
Sequence receives the product firmware that host computer is sent；Firmware writing unit is used to the product firmware being written to the Nand flash kernels
In, to complete corresponding reading and writing or erasing operation.
It can be seen from the above technical proposal that by above-mentioned apparatus, can complete the reading and writing to Nand flash elements or
Erasing operation.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with
The difference of other embodiment, the same or similar parts between the embodiments can be referred to each other.
It should be understood by those skilled in the art that, the embodiment of the embodiment of the present invention can be provided as method, apparatus or calculate
Machine program product.Therefore, the embodiment of the present invention can be used complete hardware embodiment, complete software embodiment or combine software and
The form of the embodiment of hardware aspect.Moreover, the embodiment of the present invention can be used one or more wherein include computer can
With in the computer-usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) of program code
The form of the computer program product of implementation.
The embodiment of the present invention be with reference to according to the method for the embodiment of the present invention, terminal device (system) and computer program
The flowchart and/or the block diagram of product describes.It should be understood that flowchart and/or the block diagram can be realized by computer program instructions
In each flow and/or block and flowchart and/or the block diagram in flow and/or box combination.These can be provided
Computer program instructions are set to all-purpose computer, special purpose computer, Embedded Processor or other programmable data processing terminals
Standby processor is to generate a machine so that is held by the processor of computer or other programmable data processing terminal equipments
Capable instruction generates for realizing in one flow of flow chart or multiple flows and/or one box of block diagram or multiple boxes
The device of specified function.
These computer program instructions, which may also be stored in, can guide computer or other programmable data processing terminal equipments
In computer-readable memory operate in a specific manner so that instruction stored in the computer readable memory generates packet
The manufacture of command device is included, which realizes in one flow of flow chart or multiple flows and/or one side of block diagram
The function of being specified in frame or multiple boxes.
These computer program instructions can be also loaded into computer or other programmable data processing terminal equipments so that
Series of operation steps are executed on computer or other programmable terminal equipments to generate computer implemented processing, thus
The instruction executed on computer or other programmable terminal equipments is provided for realizing in one flow of flow chart or multiple flows
And/or in one box of block diagram or multiple boxes specify function the step of.
Although the preferred embodiment of the embodiment of the present invention has been described, once a person skilled in the art knows bases
This creative concept, then additional changes and modifications can be made to these embodiments.So the following claims are intended to be interpreted as
Including preferred embodiment and fall into all change and modification of range of embodiment of the invention.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that process, method, article or terminal device including a series of elements not only wrap
Those elements are included, but also include other elements that are not explicitly listed, or further include for this process, method, article
Or the element that terminal device is intrinsic.In the absence of more restrictions, being wanted by what sentence "including a ..." limited
Element, it is not excluded that there is also other identical elements in process, method, article or the terminal device including the element.
Technical solution provided by the present invention is described in detail above, specific case used herein is to this hair
Bright principle and embodiment is expounded, the explanation of above example is only intended to help understand the present invention method and its
Core concept；Meanwhile for those of ordinary skill in the art, according to the thought of the present invention, in specific implementation mode and application
There will be changes in range, in conclusion the content of the present specification should not be construed as limiting the invention.
Claims (11)
1. a kind of Nand flash elements, which is characterized in that including a packaging body, be packaged with Nand in the packaging body
Flash kernels and internal controller, wherein：
The internal controller is used to carry out ECC check management, bad block management, address of cache pipe to the Nand flash kernels
Reason or wear leveling management.
2. a kind of communication control method is applied to the internal controller of Nand flash elements as described in claim 1, special
Sign is that the communication control method includes step：
When the basic load-on module of the internal controller is in Debug patterns, the data and order that host computer is sent are received；
Erasing operation is written and read to the Nand flash kernels of the Nand flash elements according to the data packet.
3. communication control method as claimed in claim 2, which is characterized in that the data and life for receiving host computer and sending
It enables, including：
The data and order that the host computer is sent are received by the serial line interface of the Nand flash elements；
Alternatively, receiving the data and order that the host computer is sent by the SPI interface of the Nand flash elements.
4. communication control method as claimed in claim 3, which is characterized in that the string by the Nand flash elements
Line interface receives the data and order that the host computer is sent, including：
It establishes and connects with the host computer；
The multiple data and order that the host computer is sent are received successively, and the data and order include packet header and data portion
Point, the packet header includes command type, command number and configured transmission；
The data and order that storage is received successively；
After the host computer is sent, the connection is released.
5. communication control method as claimed in claim 3, which is characterized in that described by the Nand flash elements
SPI interface receives the data and order that the host computer is sent, including：
Receive data and order of the host computer by preset transmission order transmission；
The data and order are stored successively.
6. communication control method as claimed in claim 2, which is characterized in that it is described according to the data and order to described
The Nand flash kernels of Nand flash elements carry out Debug operations, including：
Configuration parameter is parsed from data and order and low lattice run program；
Program is run according to the configuration parameter operation low lattice；
The product firmware that program receives the host computer transmission is run by running the low lattice；
The Nand flash kernels are written into the product firmware.
7. a kind of communication control unit is applied to the internal controller of Nand flash elements as described in claim 1, special
Sign is that the communication control unit includes：
Data and Order receiver module, for when the basic load-on module of the internal controller is in Debug patterns, receiving
The data and order that host computer is sent；
Kernel operation module, for according to the data and order to the Nand flash kernels of the Nand flash elements into
Row read-write erasing operation.
8. communication control unit as claimed in claim 7, which is characterized in that the data and Order receiver module include：
First receiving unit, for receiving the data that the host computer is sent by the serial line interface of the Nand flash elements
And order；
Second receiving unit, for receiving the data that the host computer is sent by the SPI interface of the Nand flash elements
And order.
9. communication control unit as claimed in claim 8, which is characterized in that first receiving unit be specifically used for it is described
Host computer establishes connection；Multiple data that the host computer is sent are received successively and order, the data and order include
Packet header and data portion, the packet header include command type, command number and configured transmission；The data received are stored successively
And order；After the host computer is sent, the connection is released.
10. communication control unit as claimed in claim 8, which is characterized in that second receiving unit is specifically used for receiving
Data and order of the host computer by preset transmission order transmission；The data and order are stored successively.
11. communication control unit as claimed in claim 7, which is characterized in that the kernel operation module includes：
Resolution unit is instructed, for parsing configuration parameter and low lattice operation program from data and order；
Low lattice running unit, for running program according to the configuration parameter operation low lattice；
Firmware receiving unit, for running the product firmware that program receives the host computer transmission by running the low lattice；
Firmware writing unit, for the Nand flash kernels to be written in the product firmware.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113311988A (en) * | 2020-02-26 | 2021-08-27 | 北京君正集成电路股份有限公司 | Method for ensuring NAND FLASH serial number and MAC address to be stored correctly |
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| 董永帅: "《flash文件系统及存储管理技术研究与实现》", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113311988A (en) * | 2020-02-26 | 2021-08-27 | 北京君正集成电路股份有限公司 | Method for ensuring NAND FLASH serial number and MAC address to be stored correctly |
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