CN104461401A - Data reading and writing management method and device for SPI flash memory - Google Patents
Data reading and writing management method and device for SPI flash memory Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0661—Format or protocol conversion arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Abstract
The invention provides a data reading and writing management method and device for an SPI flash memory. The SPI flash memory is provided with a packaging body, wherein a controller and a NANDFlash memorizer are packaged in the packaging body, and a communication interface and a power interface of the controller are connected with a pin of the packaging body. The data reading and writing management method for the SPI flash memory comprises the steps that the controller converts the received logic address of the SPI flash memory into the physical address of the NANDFlash memorizer, and the controller writes received data into the storage area corresponding to the physical address or reads data from the storage area corresponding to the physical address. The data reading and writing management device for the SPI flash memory comprises an address mapping module and is provided with a data reading and writing module, wherein the address mapping module is used for converting the logic address, received by the controller, of the SPI flash memory into the physical address of the NANDFlash memorizer, and the data reading and writing module is used for writing the data received by the controller into the storage area corresponding to the physical address or reading data from the storage area corresponding to the physical address. By the adoption of the data reading and writing management method and device for the SPI flash memory, the university of the SPI flash memory can be improved, and the service life of the SPI flash memory is prolonged.
Description
Technical field
The present invention relates to data processing field, particularly, is reading and writing data management method and the reading and writing data management devices of SPI flash memory.
Background technology
Present portable electric appts, such as MP3 music player, mobile phone, panel computer etc. use embedded chip in a large number, embedded chip can be considered as an embedded system, it comprises an Embedded microcontroller (MCU) and nonvolatile memory, and nonvolatile memory is flash memory (Flash) normally.Existing SPI flash memory is a kind of low capacity, encapsulates simple, easy to use, can to repeat burning nonvolatile semiconductor memory member, and by 1MB to 16MB not etc., but production cost raises rapidly along with the increase of capacity its memory capacity.
Existing SPI flash memory needs the read-write requests quickly responding to embedded Control, and its storage organization is NOR Flash usually, also referred to as SPI NOR flash storage.Time embedded chip starts, the program be stored in SPI NOR flash storage reads in microcontroller by embedded microcontroller, and runs in random access memory (RAM).Along with embedded chip function from strength to strength, need the data leaving SPI NOR flash storage in except more and more huger program file, also comprise increasing Voice & Video data, therefore, the more and more difficult requirement meeting present electronic product of the capacity of existing SPI NOR flash storage.
NAND flash storage is a kind of Large Copacity, low cost, can repeat the nonvolatile semiconductor memory member of burning, but NAND flash storage access mode is complicated, and input/output port is more, needs powerful error correcting capability during work, and data storage management difficulty is large, storage mode is complicated.In order to meet huge program and data capacity demand, more existing embedded chip adopts NAND flash storage to replace the nonvolatile semiconductor memory member of existing SPI NOR flash storage as embedded chip, but therefore and significantly the production cost embedding chip increases, and the development difficulty of embedded chip is also increasing.
In order to solve the contradiction of memory capacity and cost, people have developed a kind of SPI flash memory being called SPI NAND flash storage, NAND flash storage and microcontroller are packaged together, and are applied in embedded chip.When carrying out reading and writing data, existing SPI NAND flash storage usually only can convert the address of SPI the memory address of NAND flash storage to simply and conduct interviews.
But this SPI NAND flash storage solve only the memory capacity problem of SPI NOR flash storage, but effectively effectively can not manage the address of SPI flash memory, affect the reading and writing data speed of SPI flash memory.
In addition, the bad block characteristic that NAND flash storage has, namely erasable characteristic should not be carried out to same fixed area for a long time, and NAND flash storage also has the various characteristic of type, i.e. memory page capacity, the diversified characteristic of block capacity, etc. the universalization management SPI NAND flash storage being difficult to realize as SPI NOR flash storage that result in embedded system, thus limit the range of application of SPI NAND flash storage.
Summary of the invention
Fundamental purpose of the present invention is to provide and is a kind ofly easy to reading and writing data management regulation the reading and writing data management method of SPI flash memory that realizes.
Another object of the present invention is to provide a kind of reading and writing data management devices being convenient to the accessed SPI flash memory of flash memory.
In order to realize above-mentioned fundamental purpose, in the reading and writing data management method of SPI flash memory provided by the invention, SPI flash memory has packaging body, the NAND flash storage being packaged with controller in packaging body and being electrically connected with controller, the communication interface of controller and power interface are connected with the pin of packaging body, wherein, the method comprises: controller converts the logical address of the SPI flash memory of reception the physical address of NAND flash storage to; The data of reception are written to storage area corresponding to physical address or read data from the storage area that physical address is corresponding by controller.
From such scheme, by converting the physical address of NAND flash storage to the logical address of SPI flash memory, and according to physical address, read-write operation is carried out to the data of NAND flash storage, effectively can set up the corresponding relation of logical address and physical address, the reading and writing data of specification SPI flash memory, improves the read or write speed of SPI flash memory.
Further scheme is, the erasable number of times of each storage area of controller record NAND flash storage, and after the storage area write data that physical address is corresponding, controller upgrades the erasable number of times of the storage area of this physical address; During to NAND flash storage write data, the storage area write data of erasable least number of times selected by controller.
As can be seen here, by selecting the storage area write data of erasable least number of times, SPI flash memory can be avoided too much erasable of same storage area, territory, partial memory area is avoided to cause because erasable number of times is too much the problem that whole NAND flash storage cannot use, thus improve SPI flash memory versatility, extend the serviceable life of SPI flash memory simultaneously.
Further scheme is, the step that the storage area of erasable least number of times selected by controller comprises: before the storage area write data that physical address is corresponding, controller judges that whether the erasable number of times of this storage area is higher than threshold value, in this way, the new physical address of the storage area of erasable least number of times is searched; After new physical address write data, upgrade the mapping relations of physical address and logical address.
As can be seen here, only have and judge that the erasable number of times of a certain storage area stores data to be written higher than just selecting the storage area of erasable least number of times during specific threshold value, avoid selecting when writing data each time, thus improve the writing speed of data.
Further scheme is, NAND flash storage has mapping table storage area, controller is before mapping table storage area write data, when judging the erasable number of times of a certain storage area of mapping table storage area higher than threshold value, new physical address in the mapping table storage area searching erasable least number of times to storage area write data corresponding to new physical address.
Visible, the mapping table storage area of NAND flash storage is also adopted to the storage area write data selecting erasable least number of times, mapping table storage area can be avoided to occur the situation of premature breakdown, extend the serviceable life of SPI storer.
Further scheme is, after SPI flash memory powers on first, the all storage areas of controller to NAND flash storage scan, and shield the storage area damaged, set up the mapping relations of the physical address of available memory area and the logical address of SPI flash memory.
Due to SPI flash memory power on first after namely shield the region damaged, in the storage area avoiding data to be written to having damaged, effectively can avoid the damage of the data being written to SPI storer.
For realizing another above-mentioned object, in the data read-write equipment of SPI flash memory provided by the invention, SPI flash memory has packaging body, the NAND flash storage being packaged with controller in packaging body and being electrically connected with controller, the communication interface of controller and power interface are connected with the pin of packaging body; Wherein, this device comprises address mapping module, the logical address of the SPI flash memory received by controller converts the physical address of NAND flash storage to, also be provided with data read-write module, the data that controller receives be written to storage area corresponding to physical address or read data from the storage area that physical address is corresponding.
From such scheme, during the read-write of SPI Flash data, SPI logical address is converted to the physical address of NAND flash storage, according to physical address, read-write operation is carried out to data again, effectively can realize the management between logical address and physical address, improve the reading and writing data speed of SPI flash memory.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the SPI flash memory of the application embodiment of the present invention.
Fig. 2 is the structured flowchart of the data read-write equipment embodiment of SPI flash memory of the present invention.
Fig. 3 is workflow diagram when SPI flash memory powers in the data read-write method embodiment of SPI flash memory of the present invention.
Fig. 4 is logical address and physical address corresponding relation figure in the data read-write method embodiment of SPI flash memory of the present invention.
Fig. 5 is the schematic diagram of erasable record sheet in the data read-write method embodiment of SPI flash memory of the present invention.
Fig. 6 is the process flow diagram reading and writing step in the data read-write method embodiment of SPI flash memory of the present invention.
Fig. 7 is the schematic diagram of data encoding and data decode in the data read-write method embodiment of SPI flash memory of the present invention.
Fig. 8 is the process flow diagram of data decode in the data read-write method embodiment of SPI flash memory of the present invention.
Below in conjunction with drawings and Examples, the invention will be further described.
Embodiment
The reading and writing data management method of SPI flash memory of the present invention is the management method that a kind of data for storing SPI flash memory carry out read-write operation, comprise the flow processs such as the conversion to address data memory, data encoding and data decode, the reading and writing data management devices of SPI flash memory is the software program that the read-write of application said method to data manages.
As shown in Figure 1, SPI flash memory 10 has a packaging body 11, controller 12 and NAND flash storage 20 is provided with in packaging body 11, controller 12 is microcontroller (MCU) or special logical circuit, Programmable Logic Controller etc., NAND flash storage 20 is electrically connected with controller 12, and can be accessed by controller 12, namely controller 12 can read the data be stored in NAND flash storage 20, also data can be write to NAND flash storage 20.
Packaging body 11 is provided with multiple pin, comprises clock pins CLK, power pins VDD, grounding pin GND, links with SD data pin SD0, the SD1 etc. that connect.Be provided with communication interface 16 and power interface 17 in controller 12, communication interface 16 and power interface 17 are connected with multiple pins of packaging body 11 respectively, the power supply that the pin receiving packaging body provides and data.
Data buffer 18 is provided with in controller 12, for storing the data of reception temporarily, the data that controller 12 receives can be the data from SPI flash memory 10 outside, these data are the data being written to NAND flash storage 20, also can be the data from NAND flash storage 20, these data be data to SPI flash memory 10 outside to be sent.Controller 12 is also provided with control interface 13, for sending control signal to NAND flash storage 20, and the work of control NAND flash storage 20 thus.
In order to realize the storage of data in NAND flash storage 20, it is the physical address that SPI logical address is converted to NAND flash storage 20 that controller 12 needs the memory address of the data of reception, this just needs the mapping relations set up between the physical address of SPI logical address and NAND flash storage 20, such as the storage area of NAND flash storage 20 is divided into multiple storage area, each storage area has a corresponding physical address, and set up a mapping table, SPI logical address is mapped on a physical address.Therefore, there are mapping relations between the physical address of SPI logical address and NAND flash storage 20, these mapping relations form a form, and this form is exactly mapping table.Mapping table needs to be stored in controller 12 and NAND flash storage 20, therefore, be provided with in controller 12 in mapping table storage area 14, NAND flash storage 20 and be also provided with mapping table storage area 21, all store the mapping relations between SPI logical address and physical address.
In addition, be provided with in controller 12 and map impact damper 15, when carrying out read-write operation to data, controller 12 needs the data in mapping table storage area 14 to read in mapping table impact damper 15 temporarily.
Except being provided with mapping table storage area 21 in NAND flash storage 20, be also provided with data storage areas 22, for storing the data being written to NAND flash storage 20.Data storage areas 22 is divided into multiple storage area, and each storage area all has oneself physical address, and the physical address of each storage area is to there being SPI logical address.
As shown in Figure 2, the reading and writing data management devices of SPI flash memory operates in the software program on controller 12, and it comprises address mapping module 31, Read-write Catrol module 32, damages balance module 33, shroud module 34, coding module 35 and decoder module 36.Address mapping module 31 is for converting the physical address of NAND flash storage 20 to by SPI address, namely before writing data to NAND flash storage 20 or when reading data from NAND flash storage 20, according to the data in mapping table storage area, found out the physical address of NAND flash storage 20 corresponding to SPI logical address by the mode of tabling look-up.Read-write Catrol module 32, for the read-write operation of control data, comprises and sends the order of reading data or the order sending erasable data to NAND flash storage 20.
In NAND flash storage 20, the erasable operation of some storage areas too much and easily damages, and controller 12 needs the erasable number of times of balanced multiple storage area.Damage the erasable number of times that balance module 33 stores each storage area of NAND flash storage 20, and when the erasable number of times of the storage area finding data write to be written is too high, select the storage area write data that an erasable number of times is less.
In addition, in order to avoid controller 12 writes data in the storage area that NAND flash storage 20 damaged, the storage area shielding that controller 12 will have been damaged in NAND flash storage 20 by shroud module 34.Coding module 35 is for encoding to the data of NAND flash storage 20 to be written, and decoder module 36 is for operating the decoding data read from NAND flash storage 20.
See Fig. 3, after SPI flash memory powers on first, controller 12 performs step S1, all storage areas of scan N AND flash storage 20, the storage area shielding that shroud module 34 will damage, to avoid writing data in the storage area that damaged.Then, in controller 12 pairs of NAND flash storage 20, unspoiled storage area distributes SPI logical address, is stored in mapping table storage area 14,21 by the mapping relations of physical address and SPI logical address, namely performs step S2.Mapping relations between the physical address of SPI logical address and NAND flash storage 20 as shown in Figure 4.Such as, the data that SPI flash memory 10 will be { Block0, Page0 } to logical address carry out wiping or programming, after address maps, the physical address that erasing or the position of programming are physically located in NAND flash storage 20 is the storage area that { BlockX, Page0 } is corresponding.
When needs write data to NAND flash storage 20 or read data from NAND flash storage 20, controller 12 receives SPI logical address, address mapping module 31 performs step S3, data in mapping table storage area 14 are read in mapping table impact damper 15, and perform step S4, by the mode of tabling look-up, SPI logical address is converted to the physical address of NAND flash storage 20.
Then, controller 12 performs step S5, judge that mapping table is the need of renewal, namely judge whether the corresponding relation between SPI logical address and physical address changes, if changed, then perform step S6, the data that renewal mapping table impact damper and mapping table storage area store, namely upgrade the data of mapping table.
The erasable number of times of each storage area balanced is needed owing to damaging balance module 33, therefore damage in balance module 33 and be provided with a form, as shown in Figure 5, the erasable number of times of the physical address of each storage area of this charting NAND flash storage 20, corresponding SPI logical address and respective memory regions.When damage balance module 33 finds that the erasable number of times of a certain storage area is too high, need the storage area changing data to be written.Like this, controller 12 often needs to change the corresponding relation between SPI logical address and physical address, and when changing corresponding relation, often need the data writing new mapping relations to mapping table impact damper 15, therefore in step S5, whether controller 12 contrasts the data that mapping table storage area 14 and mapping table impact damper 15 store inconsistent, then needs the renewal rewards theory carrying out mapping table time inconsistent.
See Fig. 6, first SPI flash memory 10 performs step S11, the data of reception is stored in data buffer 18 after receiving the outside data sent, then perform step S12, coding module 35 to receive and the data be stored in data buffer 18 encode.
Probably there is the situation that large numerical quantity is similar, the recording data that such as one section of sound is less than normal in the data stored due to embedded system, a high position for data is all binary data " 0 " substantially.If do not do coded treatment before being stored into NAND flash storage 20, most of data that NAND flash storage 20 li stores are all " 0 ".On the contrary, be that the situation of binary data " 1 " is also similar in most of data.Like this, can greatly shorten the serviceable life of NAND flash storage 20.
In addition, the access protocal due to the physical storage areas of NAND flash storage 20 is open and general, if sensitive data did not do special processing before being stored into NAND flash storage 20, just maliciously may be stolen, causes damage.Therefore, be necessary that the data to being stored into NAND flash storage 20 carry out coded treatment.As shown in Figure 7, coding module 35 generates the data stream of NAND flash storage 20 after SPI raw data being flowed through coding, these data stream are temporarily stored in data buffer 18.
When encoding to data, arrange a decoding key, coding module 35 is encoded to the data in data buffer 18 according to this decoding key, and coding method can adopt the algorithm of the simple general-purpose such as CRC or LFSR.
After encoding to data, controller 12 performs step S13, asks the data of erasable NAND flash storage 20, and memory allocated region.Distribute the storage area of data to be written at controller 12 after, damage balance module 33 and perform step S14, judge that whether the erasable number of times of this storage area is too high according to the erasable number of times of each stored storage area.In the present embodiment, damage balance module 33 by judging higher than certain threshold value, whether the erasing times of this storage area judges that whether erasable number of times is too high, preferably, this threshold value is the mean value of the erasable number of times of all storage areas of NAND flash storage 20.
If judge that the erasing times of this storage area is too high, then perform step S15, otherwise perform step S19, data to be written are written to this storage area, damage balance module 33 and perform step S20, the erasable number of times of the storage area of write data is added 1, namely upgrades the form shown in Fig. 5.
In step S15, damage balance module 33 and search a minimum storage area of erasing times in NAND flash storage 20, data after coding are written to this storage area by Read-write Catrol module 22, damage balance module 33 and perform step S16, the erasable number of times of the storage area of write data is added 1.
Finally, controller 12 is wiped and is emptied the data stored in the storage area of original NAND flash storage 20 of distributing, namely step S17 is performed, and perform step S18, upgrade the mapping relations between the SPI logical address of mapping table and physical address, namely the data stored in mapping table storage area 14,21 are upgraded.
Due to the storage area that mapping table storage area 21 is also NAND flash storage 20, also the erasable number of times existed due to this storage area too much affects the problem in serviceable life, therefore the erasable number of times that balance module 33 records each storage area in mapping table storage area 21 is equally damaged, and when erasable operation is carried out to the storage area of mapping table storage area 21, when finding that the erasable number of times of this storage area is too high, select the region write data of erasable least number of times.
When controller 12 reads data from NAND flash storage 20, receive the SPI logical address needing the data read, after then address mapping module 31 converts SPI logical address to physical address, read data according to this physical address.After reading data, perform the flow process shown in Fig. 8, first perform step S21, the data of NAND flash storage 20 are read in data buffer 18, then perform step S22, to the decoding data read.Time owing to writing data to NAND flash storage 20, the data of write are encoded, read after data, decoder module 36 according to decoding key, by the decoding data of data buffer 18.Data before and after decoding as shown in Figure 7.Finally, decoded data are sent by communication interface 16 by controller 12, namely perform step S23.
Because the present invention converts the physical address of NAND flash storage 20 to the SPI address received, then write data into NAND flash storage 20, namely can the time by simple lookup table mode, improve the efficiency of data write.In addition, due to SPI flash memory power on first after namely shield the storage area damaged, in the storage area avoiding data to be written to having damaged, thus avoid the loss of data.In addition, because controller is by controlling the erasing times of different storage zone, avoiding the erasable number of times of same storage area too high, effectively extending the serviceable life of SPI flash memory.
Certainly, above-described embodiment is only the preferred embodiment of the present invention, more change can also be had during practical application, such as damage balance module can set the threshold value of the erasable number of times of storage area is fixed value, instead of the mean value of all storage areas, such change does not affect enforcement of the present invention.
Finally it is emphasized that; the invention is not restricted to above-mentioned embodiment, the quantity of storage area divided as NAND flash storage and the change of size, to encode and the change etc. of decryption method changes and also should be included in the protection domain of the claims in the present invention.
Claims (10)
- The reading and writing data management method of 1.SPI flash memory, described SPI flash memory has packaging body, the NAND flash storage being packaged with controller in described packaging body and being electrically connected with described controller, the communication interface of described controller and power interface are connected with the pin of described packaging body;It is characterized in that, the method comprises:Described controller converts the logical address of the described SPI flash memory received the physical address of described NAND flash storage to;The data of reception are written to storage area corresponding to described physical address or read data from the storage area that described physical address is corresponding by described controller.
- 2. the reading and writing data management method of SPI flash memory according to claim 1, is characterized in that:The erasable number of times of each storage area of NAND flash storage described in described controller record, after the storage area write data that described physical address is corresponding, described controller upgrades the erasable number of times of the storage area of this physical address;During to described NAND flash storage write data, the storage area write data of erasable least number of times selected by described controller.
- 3. the reading and writing data management method of SPI flash memory according to claim 2, is characterized in that:The step that the storage area of erasable least number of times selected by described controller comprises: before the storage area write data that described physical address is corresponding, described controller judges that whether the erasable number of times of this storage area is higher than threshold value, in this way, the new physical address of the storage area of erasable least number of times is searched;After new physical address write data, upgrade the mapping relations of described physical address and described logical address.
- 4. the reading and writing data management method of the SPI flash memory according to Claims 2 or 3, is characterized in that:Described NAND flash storage has mapping table storage area, described controller is before described mapping table storage area write data, when judging the erasable number of times of a certain storage area of described mapping table storage area higher than threshold value, new physical address in the described mapping table storage area searching erasable least number of times to storage area write data corresponding to new physical address.
- 5. the reading and writing data management method of the SPI flash memory according to any one of claims 1 to 3, is characterized in that:After described SPI flash memory powers on first, the all storage areas of described controller to described NAND flash storage scan, shield the storage area damaged, set up the mapping relations of the physical address of available memory area and the logical address of SPI flash memory.
- 6. according to any one of claims 1 to 3 the reading and writing data management method of described SPI flash memory, it is characterized in that:Described controller, before described NAND flash storage write data, is encoded to data to be written;After described controller reads the data of described NAND flash storage, to read decoding data.
- The reading and writing data management devices of 7.SPI flash memory, described SPI flash memory has packaging body, the NAND flash storage being packaged with controller in described packaging body and being electrically connected with described controller, the communication interface of described controller and power interface are connected with the pin of described packaging body;It is characterized in that, this device comprises:Address mapping module, the logical address of the described SPI flash memory received by described controller converts the physical address of described NAND flash storage to;The data that described controller receives are written to storage area corresponding to described physical address or read data from the storage area that described physical address is corresponding by data read-write module.
- 8. the reading and writing data management devices of SPI flash memory according to claim 7, is characterized in that:Also comprise wear leveling module, record the erasable number of times of described each storage area of NAND flash storage, after the storage area write data that described physical address is corresponding, upgrade the erasable number of times of the storage area of this physical address, and when described NAND flash storage write data, select the storage area write data of erasable least number of times.
- 9. the reading and writing data management devices of SPI flash memory according to claim 8, is characterized in that:When described wear leveling module is also for judging the erasable number of times of a certain storage area of the mapping table storage area of described NAND flash storage higher than threshold value, new physical address in the described mapping table storage area searching erasable least number of times to storage area write data corresponding to new physical address.
- 10. the reading and writing data management devices of the SPI flash memory according to any one of claim 7 to 9, is characterized in that:Also comprise shroud module, after described SPI flash memory powers on first, all storage areas of described NAND flash storage are scanned, shields the storage area damaged, set up the mapping relations of the physical address of available memory area and the logical address of SPI flash memory.
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| CN108231124A (en) * | 2017-12-27 | 2018-06-29 | 北京兆易创新科技股份有限公司 | A kind of Nand flash elements and its low lattice control method and device |
| CN108345430A (en) * | 2017-12-27 | 2018-07-31 | 北京兆易创新科技股份有限公司 | A kind of Nand flash elements and its progress control method and device |
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| CN110456726A (en) * | 2019-07-30 | 2019-11-15 | 深圳市云林电气技术有限公司 | A kind of Interface Expanding method of programmable logic controller (PLC) and frequency converter |
| CN111966302A (en) * | 2020-08-26 | 2020-11-20 | 南京扬贺扬微电子科技有限公司 | SPI Nand data writing method based on logical and physical mapping table |
| CN113127402A (en) * | 2021-04-29 | 2021-07-16 | 广东湾区智能终端工业设计研究院有限公司 | SPI (Serial peripheral interface) access control method, system, computing equipment and storage medium |
| WO2022227473A1 (en) * | 2021-04-29 | 2022-11-03 | 广东湾区智能终端工业设计研究院有限公司 | Spi access control method and system, and computing device and storage medium |
| CN113568579A (en) * | 2021-07-28 | 2021-10-29 | 深圳市高川自动化技术有限公司 | Memory, data storage method and data reading method |
| CN113568579B (en) * | 2021-07-28 | 2022-05-03 | 深圳市高川自动化技术有限公司 | Memory, data storage method and data reading method |
| US11908531B2 (en) | 2021-10-06 | 2024-02-20 | International Business Machines Corporation | Detecting and managing under-program failures in non-volatile memory |
| CN114036096A (en) * | 2021-11-04 | 2022-02-11 | 珠海一微半导体股份有限公司 | Read controller based on bus interface |
| CN114036096B (en) * | 2021-11-04 | 2024-05-03 | 珠海一微半导体股份有限公司 | Read controller based on bus interface |
| CN113900994A (en) * | 2021-12-02 | 2022-01-07 | 新华三智能终端有限公司 | File writing method and device |
| CN113900994B (en) * | 2021-12-02 | 2022-03-01 | 新华三智能终端有限公司 | File writing method and device |
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