CN108352839A - A/D conversion equipments - Google Patents
A/D conversion equipments Download PDFInfo
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- CN108352839A CN108352839A CN201580084371.5A CN201580084371A CN108352839A CN 108352839 A CN108352839 A CN 108352839A CN 201580084371 A CN201580084371 A CN 201580084371A CN 108352839 A CN108352839 A CN 108352839A
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- switching circuit
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1071—Measuring or testing
- H03M1/1076—Detection or location of converter hardware failure, e.g. power supply failure, open or short circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
- H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
- H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1071—Measuring or testing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/122—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages
- H03M1/1225—Shared using a single converter or a part thereof for multiple channels, e.g. a residue amplifier for multiple stages using time-division multiplexing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/123—Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters
Abstract
Generate following four pattern：The simulation electrical quantity of object (4,5) is independently exported one by one to the 1st pattern of A/D converter (1)；The 2nd pattern simulation electrical quantity of the object (4,5) not exported all；The 3rd pattern for the simulation electrical quantity of object (4,5) not being exported all and being pulled down the output to A/D converter (1) using pull down resistor (10)；And the simulation electrical quantity of multiple objects (4,5) is exported simultaneously to the 4th pattern of A/D converter (1), the A/D conversion values that object (4,5) are individually obtained in 1 pattern are detected the exception of A/D converter (1) itself or the device being connected with A/D converter (1) in the 2nd pattern to 4 pattern.
Description
Technical field
The present invention relates to the A/D conversion equipments that digital quantity is converted to from analog quantity.
Background technology
In the past, there is the CPU for possessing multiple A/D converters, which is converted to analog quantity can be by CPU
(Central Processing Unit：Central processing unit) etc. used in format digital quantity.In recent years, in a system
The analog signal that middle CPU is inputted increases, and the absolute number of A/D converter (being the ports A/D in CPU) is insufficient.Thus, for example Japanese
As open patent 2007-333574 bulletins (patent document 1) are disclosed, following methods are taken：Using interface circuit from
And selectively switch using the information for being input to A/D converter.
In the occupation mode of A/D converter disclosed in patent document 1, multiple want defeated using switch selectively to switch
The information entered, and it is input to MPU (Micro-processing unit：Microprocessor).The structure can increase the number of input information
The number measured without increasing A/D converter.
However, such a existing apparatus only inhibits the quantity of A/D converter, in its system, need to chase after
Add the switch of switching input information, it is also desirable to so that the fault diagnosis to the switch, function is enriched, it in this case, must
It must be carried out by the way that additional circuit is in addition arranged.
Therefore, that as disclosed in Japanese Patent Laid-Open 2013-225781 bulletins (patent document 2) of the inventors of the present invention
Sample, it is proposed that energy additional fault diagnostic function is without increasing the quantity of A/D converter and being not provided with adding the A/D converting means of circuit
It sets.
Existing technical literature
Patent document
Patent document 1：Japanese Patent Laid-Open 2007-333574 bulletins
Patent document 2：Japanese Patent Laid-Open 2013-225781 bulletins
Invention content
The technical problems to be solved by the invention
It, can not be to this although the quantity of A/D converter can be inhibited in A/D conversion equipments disclosed Patent Document 2
The exception of A/D converter itself and the device being connected with A/D converter is detected, and be will produce needs and is carried out abnormality detection
Demand.
The present invention is completed in view of above-mentioned actual conditions, it is intended that a kind of A/D conversion equipments are provided, the A/D
Conversion equipment inhibits the quantity of A/D converter by required minimal additional component, and to A/D converter sheet
The exception of body and the device being connected with A/D converter is detected.
Technical scheme applied to solve the technical problem
A/D conversion equipments according to the present invention include：A/D converter, the object which will detect
Simulation electrical quantity is converted to digital quantity；Multiple simulation electrical quantity are connected by switching circuit, the switching circuit with the A/D converter
It connects；And control unit, the control unit separately control the switching circuit, the feature of the A/D conversion equipments
It is,
The control unit
Generate following four pattern：1st pattern, it is the simulation electrical quantity of the object is independent one by one in the 1st pattern
Ground is exported to the A/D converter；2nd pattern does not export the simulation electrical quantity of the object all in the 2nd pattern；
3rd pattern does not export the simulation electrical quantity of the object all in the 3rd pattern, and will be turned to the A/D using resistance
The output of parallel operation pulls down；And the 4th pattern, the simulation electrical quantity of multiple objects is exported extremely simultaneously in the 4th pattern
The A/D converter,
The control unit individually obtains the A/D conversion values of the object in 1 pattern, in the 2nd pattern to institute
The exception of described A/D converter itself or the device being connected with the A/D converter is detected when stating 4 pattern.
Invention effect
According to A/D conversion equipments according to the present invention, have the following effects that：It can successively will be multiple by A/D converter
The analog electrical signal for obtaining signal object is converted to digital signal and is obtained, the quantity without increasing A/D converter, into
And additional fault diagnostic function can be carried out with simply additional circuit.
The detailed description of the invention below of purpose other than the above, feature, viewpoint and the effect of the present invention by referring to accompanying drawing
It can further to define.
Description of the drawings
Fig. 1 is the block diagram of the A/D conversion equipments involved by embodiments of the present invention 1.
Fig. 2 is the circuit diagram of the A/D conversion equipments involved by embodiments of the present invention 1.
Fig. 3 is the sequence diagram illustrated to the action of the A/D conversion equipments involved by embodiments of the present invention 1.
Fig. 4 is the circuit diagram of the A/D conversion equipments involved by embodiments of the present invention 2.
Fig. 5 is the sequence diagram illustrated to the action of the A/D conversion equipments involved by embodiments of the present invention 2.
Fig. 6 is other sequence diagrams illustrated to the action of the A/D conversion equipments involved by embodiments of the present invention 2.
Fig. 7 is the circuit diagram of the A/D conversion equipments involved by embodiments of the present invention 3.
Specific implementation mode
In the following, the preferred embodiment of A/D conversion equipments according to the present invention is described in detail with reference to attached drawing.
Embodiment 1.
Fig. 1 is the block diagram of the A/D conversion equipments involved by embodiments of the present invention 1.In Fig. 1, A/D conversion equipments 100A is adopted
To lower structure：Control unit 2 is via switching circuit 3 separately to the simulation electrical quantity of the 1st object 4 and the 2nd object 5
It is controlled and outputs this to A/D converter 1.
Fig. 2 is the circuit diagram of A/D conversion equipments 100A, shows that CPU6 is built-in with the state of A/D converter 1 shown in FIG. 1.
CPU6 has the ports A/D (A/D#1) 6a and common 1st, the 2nd and the 3rd output port (P1, P2, P3) 6b, 6c, 6d.1st
The electric signal that object 4 and the 2nd object 5 are exported respectively by the 1st series resistance 7a and the 2nd series resistance 7b, via
The 1st switching circuit 3a and the 2nd switching circuit 3b controlled by the 1st output port 6b and the 2nd output port 6c, output to A/
The ports D 6a.In addition, the 1st switching circuit 3a and the 2nd switching circuit 3b are made of analog switch.
1st object 4 and the 2nd object 5 generate separately changed electric signal, and according to being respectively connected with
Respective signal is sent to the ports A/D 6a by the turn-on action of the 1st switching circuit 3a or the 2nd switching circuit 3b that connect.The 1st
On the public terminal of switching circuit 3a and the 2nd switching circuit 3b, other than being connected with the ports A/D 6a, also the 1st resistance 8 (with
Be known as pull-up resistor 8 down) and capacitor 9 be connected respectively with power Vcc and ground connection, in addition, also (below via the 2nd resistance 10
Referred to as pull down resistor 10) it is connected with the 3rd port 6d, to constitute interface circuit.
As shown in above-mentioned circuit diagram, the A/D conversion equipments 100A involved by embodiment 1 is configured in 1 ports A/D 6a
On be connected with the 1st object 4 and the 2nd object 5.Then, to the dynamic of the A/D conversion equipments 100A involved by present embodiment 1
It illustrates.
Fig. 3 is the sequence diagram illustrated to the action of the A/D conversion equipments 100A involved by embodiment 1.In figure 3, it marks
Number A1 shows that the action state of the 2nd output port 6c, label B1 are shown with the process of time T with the process of time T
The action state of 1st output port 6b, label C1 show the action state of the 3rd output port 6d with the process of time T.Separately
Outside, label D1 shows the input state of the ports A/D 6a.
First, as the 1st pattern, if the time t2 to t3 of concern Fig. 3, the 2nd output port 6c=is low, the 1st output end
Mouth 6b=high, the 3rd output port 6d=high-Z (Z is impedance).This means that the pair be connected with the 2nd output port 6c the 2nd opens
Powered-down road 3b carries out cut-off control, is off state by the path clustering for the pull down resistor 10 being connected with the 3rd output port 6d,
And pair carry out conducting control with the 1st output port 6b the 1st switching circuit 3a being connected.By only to the 1st switching circuit 3a into
Row conducting control, the bleeder circuit to be constituted the signal of the 1st object 4 via the 1st series resistance 7a, pull-up resistor 8
It is input to the ports A/D 6a, only by the signal acquisition of the 1st object 4 to CPU6.
Then, if the time t3 to t4 of concern Fig. 3, identical as the above situation, by only being carried out to the 2nd switching circuit 3b
Conducting control, to which the signal of the 2nd object 5 is only input to the ports A/D 6a, only by the signal of the 2nd object 5 via the 2nd
The bleeder circuit that series resistance 7b, pull-up resistor 8 are constituted is obtained to CPU6.
Using both controls, the signal that the 1st object 4, the 2nd object 5 are sent out separately is input to 1 A/
6a, CPU6 can obtain its value for the ports D.It is the content that existing apparatus is implemented above.
Then, the A/D conversion equipments 100A involved by embodiment 1 also passes through addition after the input of existing apparatus
Other are simply controlled to carry out fault diagnosis.
First, as the 2nd pattern, Fig. 3 time t0 to during t1, by the 1st output port 6b, the 2nd output port 6c
It is all set as low, the 3rd output port 6d is set as height-Z, cut-off control is all carried out to the 1st switching circuit 3a, the 2nd switching circuit 3b
System, is set as off state by the path of pull down resistor 10, the signal from the 1st object 4 and the 2nd object 5 is not connected to
The ports A/D 6a.In this state, it is only connected with pull-up resistor 8, therefore, will be connect with another as pull-up resistor 8 pair
The essentially identical control source of the voltage of the power Vcc of elephant is to the ports A/D 6a.If A/D conversion equipments are normal, power Vcc
Voltage is entered, and if the voltage in addition to the voltage of power Vcc is entered, can be judged as that A/D conversion equipments are in abnormal
State.
That is, there are the off state of pull-up resistor 8, the short trouble of the 1st switching circuit 3a or the 2nd switching circuit 3b, the 1
At least one of output port 6b and the 2nd output port 6c is in low fixation not in high fixed bad, the 3rd output port 6d
The possibility that good or A/D converter 1 is abnormal is fault detection status.
Then, as the 3rd pattern, Fig. 3 time t1 to during t2, by the 1st output port 6b, the 2nd output port 6c,
3rd output port 6d is all set to low, and the 1st switching circuit 3a, the 2nd switching circuit 3b are set as ending, and by pull down resistor
10 path is set as conducting state.In this case, power Vcc will be divided using pull-up resistor 8, pull down resistor 10
Afterwards gained control source to the ports A/D 6a, if however confirmed that power Vcc is normal as described above, and input have deviation
The voltage of contemplated voltage in the case of normal resistance value can then be judged as pull-up resistor 8 or pull down resistor 10
Resistance value is abnormal.
Finally, as the 4th pattern, during the time t4 to t5 of Fig. 3, by the 1st output port 6b, the 2nd output port
6c is set as high, and the 1st switching circuit 3a, the 2nd switching circuit 3b are remained conducting, makes from the 1st object 4, the 2nd object
The signal of object 5 is inputted (is set as height-Z, pull down resistor all in the state being connected with A/D interfaces 6a by the 3rd output port 6d
10 path is off state).In this case, using by pull-up resistor 8, the 1st series connection being connected with the 1st object 4
The synthesis bleeder circuit that resistance 7a, the 2nd series resistance 7b being equally connected with the 2nd object 5 are constituted will come from the 1st
The resultant voltage of the signal of object 4 and the 2nd object 5 is input to the ports A/D 6a.If the switching behaviour until from time t0 to t5
Make the enough high speeds of variation relative to signal caused by the 1st object 4, the 2nd object 5, then in time t2 to t3 and time
The signal that the 1st object 4, the 2nd object 5 are obtained in a period of t3 to t4, since the constant of synthesis bleeder circuit is also known
, therefore, the properness of resultant voltage can be confirmed.
That is, using the voltage identification during time t4 to t5, can by the 1st series resistance 7a, the 2nd series resistance 7b it is disconnected
Road/short circuit/resistance exception, the open circuit fault of the 1st switching circuit 3a or the 2nd switching circuit 3b, the 1st output port 6b, the 2nd output
Port 6c at least any one in low fixation is bad or the exception of A/D converter 1 is detected as failure.
That is, the time t0 in Fig. 3 to t1, time t1 to the voltage of the ports A/D 6a is input to during t2 is respectively to remove power supply
Voltage other than the voltage of Vcc or except carrying out electric resistance partial pressure to the voltage of power Vcc using pull-up resistor 8, pull down resistor 10
Obtained by voltage other than electric resistance partial pressure voltage when, or the 1st pair is not based on during time t2 to t3 and time t3 to t4
Time t4 to the voltage that the ports A/D 6a is input to during t5 is calculated as the signal acquisition value of object 4 and the 2nd object 5
With matching when, due to being judged as the exception of device, can increase A/D converted channels number without make the 1st switching circuit 3a,
While the structure of 2nd switching circuit 3b becomes complexity, it is also equipped with switching circuit and the fault-finding function of A/D converter 1, by
This, can improve the reliability of the transformation result of signal.
In addition, be set as 2 and the ports A/D are set as to 1 situation being illustrated to object will be detected above, but simultaneously
Not limited to this, the case where more objects are connected with 1 port A/D, can also obtain identical effect.
Embodiment 2.
Then, the A/D conversion equipments involved by embodiments of the present invention 2 are illustrated.Fig. 4 is involved by embodiment 2
A/D conversion equipments 100B circuit diagram, show that CPU6 is built-in with the state of A/D converter 1 shown in FIG. 1.CPU6 has
The ports A/D (A/D#1) 6a and common 1st, the 2nd and the 3rd output port (P1, P2, P3) 6b, 6c, 6d.On the 6a of the ports A/D
It is connected in parallel to the 1st sensor 40 and 2nd sensor 41 similar with the 1st sensor 40.1st sensor 40 and the 2nd sensor
41 respective resistance values Rt1, Rt2 change according to the 1st sensor 40 and 41 respective characteristic of the 2nd sensor.E.g. as with
Temperature change and can be because of movable and changed sensor with the such resistance values of thermistor, potentiometer of resistance variations
Deng.
1st sensor 40 and the 2nd sensor 41 are pulled to power Vcc via pull-up resistor 8.In addition, in the 1st sensing
On device 40 and the 2nd sensor 41, it is connected in series with is opened by the 1st switch element 42 and the 2nd that bipolar transistor is constituted respectively
Close element 43.1st switch element 42 and the 2nd switch element 43 are connected with the 1st output port 6b, the 2nd output port 6c respectively
To be controlled.In addition, in order to inhibit to noise, capacitor 9 is connected with the ports A/D 6a.In addition, in the ports A/D
6a is upper to be connected with the 3rd output port 6d via pull down resistor 10.
Fig. 5 is the sequence diagram illustrated to the action of the A/D conversion equipments 100B involved by embodiment 2.In Fig. 5
In, label A2 shows that the action state of the 2nd output port 6c, label B2 show with the process of time T with the process of time T
The action state of the 1st output port 6b is gone out, label C2 shows the action shape of the 3rd output port 6d with the process of time T
State.In addition, label D2 shows the input status of the ports A/D 6a.
First, as the 1st pattern, if the time t2 to t3 of concern Fig. 5, the 2nd output port 6c=is low, the 1st output end
Mouth 6b=high, the 3rd output port 6d=high-Z (Z is impedance).This means that the pair be connected with the 2nd output port 6c the 2nd opens
Powered-down road 43 carries out cut-off control, is off state by the path clustering of pull down resistor 10, and pair be connected with the 1st output port 6b
The 1st switching circuit 42 connect carries out conducting control.By making the 1st switch element 42=conductings, to only connect the 1st sensor
40, and the 2nd sensor 41 is off state.Therefore, by the resistance value of the resistance value Rt1 of the 1st sensor 40 and pull-up resistor 8 it
Between intrinsic standoff ratio be input to the ports A/D 6a.
Then, if the time t3 to t4 of concern Fig. 5, identical as the above situation, the 2nd sensor 41, result are only connected
It is that the intrinsic standoff ratio between the resistance value Rt2 and the resistance value of pull-up resistor 8 of the 2nd sensor 41 is input to the ports A/D 6a.Profit
The detection signal of the 1st sensor 40 and the 2nd sensor 41 is separately input into the ports A/D 6a with both controls, CPU6 can be obtained
Take its value.It is the content that existing apparatus is implemented above.
Then, the A/D conversion equipments 100B involved by embodiment 2 also passes through addition after the input of existing apparatus
Other are simply controlled to carry out breakdown judge.
First, as the 2nd pattern, Fig. 5 time t0 to during t1, the 1st output port 6b, the 2nd output port 6c are
It is set as low, the 1st switch element 42, the 2nd switch element 43 all carry out cut-off control, are not connected to the 1st sensor 40 and the 2nd sensor
41.In addition, the 3rd output port 6d is set as height-Z, the path of pull down resistor 10 is set as off state.In this state, only connect
It is connected to pull-up resistor 8, it is therefore, the voltage of the power Vcc with another connecting object as pull-up resistor 8 is essentially identical
Control source is to the ports A/D 6a.If device is normal, the voltage of input power Vcc, and if input except power Vcc voltage with
Outer voltage, then exist pull-up resistor 8, power Vcc, the ports A/D 6a, the 1st switch element 42 and the 2nd switch element 43 a side
Or the undesirable possibility of any one output port of two sides, the 1st output port 6b, the 2nd output port 6c, the 3rd output port 6d
Property, also it can not be judged as the 1st sensor 40, the input value of the 2nd sensor 41 is true value.
Then, as the 3rd pattern, Fig. 5 time t1 to during t2, by the 1st output port 6b, the 2nd output port 6c,
3rd output port 6d is all set to low, and the 1st switch element 42, the 2nd switch element 43 are all set as ending, and is not connected to the 1st sensing
Device 40 and the 2nd sensor 41.The path of pull down resistor 10 is set as conducting state.In this case, will utilize pull-up resistor 8,
The control source of gained is to the ports A/D 6a after pull down resistor 10 divides the voltage of power Vcc, if however as described above really
Power Vcc of accepting is normal, and inputs the voltage for having and deviating from contemplated voltage in the case of normal resistance value, then
It can be judged as that the resistance value of pull-up resistor 8 or pull down resistor 10 is abnormal.
Finally, as the 4th pattern, Fig. 5 time t4 to during t5, by the 1st output port 6b, the 2nd output port 6c
It is all set as high, the 1st switch element 42, the 2nd switch element 43 is all set as being connected, the 3rd output port 6d is set as height-Z, if
To be connected with the state of the 1st sensor 40 and the 2nd sensor 41.Connect that is, the 1st sensor 40 and the 2nd sensor 41 become in parallel
The state connect.Therefore, if not becoming lower than the value of time t2 to t4 the 1st sensors 40 and the 2nd sensor 41 inputted
Value, then can be judged as failure.
Here, the time t4 of Fig. 5 to during t5, can also come by searching for conversion methods such as tables in advance by the 1st sensing
Voltage responsive value in the case that device 40 and the 2nd sensor 41 are connected in parallel is equivalent to and is only singly connected with the 1st sensor
The correlation of several volts of voltage responsive value in the case of 40 or the 2nd sensor 41 is compared, to the appropriate of detected value
Property is judged.
As fault mode, it may be considered that have the 1st sensor 40 and the 2nd sensor 41 a side or two sides it is bad, the 1st
Switch element 42, the 2nd switch element 43 or the 1st output port 6b, the 2nd output port 6c, the 3rd output port 6d it is bad etc.,
Either which kind of failure can not all be judged as in time t2 to the 1st sensor 40, the 2nd sensor 41 inputted during t4
Value is true value.
On the contrary, if time t0 is normal value to t2 and time t4 to t5, it can be judged as the 1st sensor the 40, the 2nd
Value accessed by sensor 41 is also normal.It has the following effects that as a result,：By being independently detected to each sensor
The additional pattern different from these control contents after preceding or detection adds fail-safe function to could be used that same circuit.
One example of sequence diagram expression action shown in fig. 5, if each pattern, the setting of switching mode can be realized successively
More freely.For example, sequence diagram as shown in FIG. 6 can also be used as other switching modes, in the selection that can provide signal
The case where on fault-finding function this aspect with the sequence diagram of Fig. 5, is identical.A3, B3, C3, D3 of Fig. 6, which is shown respectively, is equivalent to Fig. 5
A2, B2, C2, D2 action state.
In addition, the case where 2 sensors, 1 port A/D 1 is illustrated, however, it is not limited to this, even if even
Identical effect can be also obtained in the case of being connected to more multisensor.
In addition, in the present embodiment, bipolar transistor is illustrated as switch element, however, it is not limited to this,
As long as such as MOSFET, analog switch IC, mechanical relay etc. have in view of what the upper A/D of application was converted wants refinement
The element for the conduction and cut-off characteristic being met by the basis of degree then can be used freely, and this point is self-evident.
Embodiment 3.
Then, the A/D conversion equipments involved by embodiments of the present invention 3 are illustrated.Fig. 7 is involved by embodiment 3
A/D conversion equipments 100C circuit diagram.In embodiment 2, the 1st switch element 42, the 2nd switch element 43 are connected to and are connect
Ground side, but it can also be connected to power Vcc side as shown in Figure 7.In this case, the pull-up resistor 8 of Fig. 4 is used as pull down resistor
10 and be connected to ground side.Below with action and above-mentioned 1st switch element 42, the 2nd switch element 43 in the case of the structure
Difference between the case where being connected to ground side illustrates for the starting point.
In the figure 7, since check object is pull down resistor 10, in above-mentioned 4th pattern, by the 1st output port
6b, the 2nd output port 6c are set as low, the 3rd output port 6d are set as high, all by the 1st switch element 42, the 2nd switch element 43
It is set as ending, is not connected to the 1st sensor 40, the 2nd sensor 41.The path of pull-up resistor 8 is set as conducting state.In such case
Under, if by using pull down resistor 10, pull-up resistor 8 to the voltage that is obtained after the carry out high partial pressures of the output of the 3rd output port 6d
It is input to the ports A/D 6a, and inputs the voltage for having and deviating from contemplated voltage in the case of normal resistance value, then can be sentenced
Break as the resistance value of pull down resistor 10 or pull-up resistor 8 exception.
In A/D conversion equipments 100A, 100B, 100C of above-mentioned illustrated embodiment 1 to 3, must not necessarily it incite somebody to action
The drop-down object of pull down resistor 10 or the pull-up object of pull-up resistor 8 are set as output port 6d, though by the 1st switch element 42,
2nd switch element 43, which is connected to power Vcc or ground side, can also obtain identical effect.
In addition, the A/D conversion equipments of embodiments of the present invention 1 to 3 are illustrated above, however the present invention can be with
Each embodiment is combined in its invention scope, or each embodiment is suitably changed, is omitted.
Claims (4)
1. a kind of A/D conversion equipments, the A/D conversion equipments include：A/D converter, the object which will detect
Simulation electrical quantity be converted to digital quantity；Switching circuit, the switching circuit is by multiple simulation electrical quantity and the A/D converter phase
Connection；And control unit, the control unit separately control the switching circuit, the spy of the A/D conversion equipments
Sign is,
The control unit generates following four pattern：1st pattern, by the simulation electrical quantity one of the object in the 1st pattern
A one independently exports to the A/D converter；2nd pattern is complete by the simulation electrical quantity of the object in the 2nd pattern
Portion does not export；3rd pattern does not export the simulation electrical quantity of the object all in the 3rd pattern, and will be to using resistance
The output of the A/D converter pulls down；And the 4th pattern, it is the simulation electrical quantity of multiple objects is same in the 4th pattern
When export to the A/D converter,
The control unit individually obtains the A/D conversion values of the object in 1 pattern, in the 2nd pattern to institute
The exception of described A/D converter itself or the device being connected with the A/D converter is detected when stating 4 pattern.
2. A/D conversion equipments as described in claim 1, which is characterized in that
In the 2nd pattern, come to the A/D conversion equipments with reference to the supply voltage being connected with the A/D converter
Exception is detected, in the 3rd pattern, based on the A/D conversion values come pair first device being connected with the A/D converter
The exception of part is detected, and in the 4th pattern, pair is connected with the A/D converter based on the A/D conversion values
The exception of device is detected.
3. A/D conversion equipments as claimed in claim 1 or 2, which is characterized in that
Including：1st resistance, when the switching circuit is connected to ground side relative to the A/D converter, the 1st resistance phase
Mains side is pulled to for the A/D converter；And the 2nd resistance, the 2nd resistance are connected in series with the 1st resistance, it will
The opposite side of the interconnecting piece between the 1st resistance of 2nd resistance is connected to the A/D conversion equipments, described
In 3rd pattern, the 2nd resistance is driven, to carry out pullup or pulldown.
4. A/D conversion equipments as claimed in claim 1 or 2, which is characterized in that
Including：1st resistance, when the switching circuit is connected to mains side relative to the A/D converter, the 1st resistance phase
Ground side is pulled down to for the A/D converter；And the 2nd resistance, the 2nd resistance are connected in series with the 1st resistance, it will
The opposite side of the interconnecting piece between the 1st resistance of 2nd resistance is connected to the A/D conversion equipments, described
In 3rd pattern, the 2nd resistance is driven, to carry out pullup or pulldown.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2015/081692 WO2017081759A1 (en) | 2015-11-11 | 2015-11-11 | A/d conversion device |
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| CN108352839A true CN108352839A (en) | 2018-07-31 |
| CN108352839B CN108352839B (en) | 2023-02-21 |
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| US (1) | US10164652B2 (en) |
| EP (2) | EP3376671B1 (en) |
| JP (1) | JP6516864B2 (en) |
| CN (1) | CN108352839B (en) |
| WO (1) | WO2017081759A1 (en) |
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- 2015-11-11 EP EP15908283.3A patent/EP3376671B1/en active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| WO2017081759A1 (en) | 2017-05-18 |
| JP6516864B2 (en) | 2019-05-22 |
| US20180241411A1 (en) | 2018-08-23 |
| JPWO2017081759A1 (en) | 2018-03-15 |
| CN108352839B (en) | 2023-02-21 |
| US10164652B2 (en) | 2018-12-25 |
| EP3376671A1 (en) | 2018-09-19 |
| EP3376671B1 (en) | 2023-02-15 |
| EP4106206A1 (en) | 2022-12-21 |
| EP3376671A4 (en) | 2019-08-14 |
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