CN108346703A - A method of improving solwution method oxide insulating layer TFT bias stabilities - Google Patents
A method of improving solwution method oxide insulating layer TFT bias stabilities Download PDFInfo
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- CN108346703A CN108346703A CN201810078353.1A CN201810078353A CN108346703A CN 108346703 A CN108346703 A CN 108346703A CN 201810078353 A CN201810078353 A CN 201810078353A CN 108346703 A CN108346703 A CN 108346703A
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- insulating layer
- tft
- oxide insulating
- metal oxide
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 239000010409 thin film Substances 0.000 claims abstract description 94
- 238000004528 spin coating Methods 0.000 claims abstract description 62
- 239000010408 film Substances 0.000 claims abstract description 51
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 46
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 44
- 239000002243 precursor Substances 0.000 claims abstract description 25
- 238000000137 annealing Methods 0.000 claims abstract description 24
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical group OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 claims description 22
- MCMNRKCIXSYSNV-UHFFFAOYSA-N ZrO2 Inorganic materials O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 15
- 239000003960 organic solvent Substances 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 13
- OERNJTNJEZOPIA-UHFFFAOYSA-N zirconium nitrate Chemical compound [Zr+4].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O OERNJTNJEZOPIA-UHFFFAOYSA-N 0.000 claims description 8
- ZNQVEEAIQZEUHB-UHFFFAOYSA-N 2-ethoxyethanol Chemical group CCOCCO ZNQVEEAIQZEUHB-UHFFFAOYSA-N 0.000 claims description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 7
- 230000036571 hydration Effects 0.000 claims description 7
- 238000006703 hydration reaction Methods 0.000 claims description 7
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 6
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 6
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 6
- 230000032683 aging Effects 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 238000003756 stirring Methods 0.000 claims description 5
- BNGXYYYYKUGPPF-UHFFFAOYSA-M (3-methylphenyl)methyl-triphenylphosphanium;chloride Chemical compound [Cl-].CC1=CC=CC(C[P+](C=2C=CC=CC=2)(C=2C=CC=CC=2)C=2C=CC=CC=2)=C1 BNGXYYYYKUGPPF-UHFFFAOYSA-M 0.000 claims description 4
- BNUDRLITYNMTPD-UHFFFAOYSA-N acetic acid;zirconium Chemical compound [Zr].CC(O)=O BNUDRLITYNMTPD-UHFFFAOYSA-N 0.000 claims description 4
- 229910003130 ZrOCl2·8H2O Inorganic materials 0.000 claims description 3
- HDYRYUINDGQKMC-UHFFFAOYSA-M acetyloxyaluminum;dihydrate Chemical compound O.O.CC(=O)O[Al] HDYRYUINDGQKMC-UHFFFAOYSA-M 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229940009827 aluminum acetate Drugs 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 3
- 238000002360 preparation method Methods 0.000 claims description 3
- 229910006213 ZrOCl2 Inorganic materials 0.000 claims description 2
- 239000004411 aluminium Substances 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims description 2
- -1 grid Substances 0.000 claims description 2
- 229910052735 hafnium Inorganic materials 0.000 claims description 2
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- IPCAPQRVQMIMAN-UHFFFAOYSA-L zirconyl chloride Chemical compound Cl[Zr](Cl)=O IPCAPQRVQMIMAN-UHFFFAOYSA-L 0.000 claims description 2
- LCGLNKUTAGEVQW-UHFFFAOYSA-N Dimethyl ether Chemical compound COC LCGLNKUTAGEVQW-UHFFFAOYSA-N 0.000 claims 1
- 239000000052 vinegar Substances 0.000 claims 1
- 235000021419 vinegar Nutrition 0.000 claims 1
- 230000007547 defect Effects 0.000 abstract description 3
- 238000013112 stability test Methods 0.000 description 33
- 238000012546 transfer Methods 0.000 description 24
- 230000000052 comparative effect Effects 0.000 description 14
- 238000012360 testing method Methods 0.000 description 11
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 6
- 239000011521 glass Substances 0.000 description 5
- 238000012423 maintenance Methods 0.000 description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 3
- NZSLBYVEIXCMBT-UHFFFAOYSA-N chloro hypochlorite;zirconium Chemical class [Zr].ClOCl NZSLBYVEIXCMBT-UHFFFAOYSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical group [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 3
- 239000011787 zinc oxide Substances 0.000 description 3
- 229910001928 zirconium oxide Inorganic materials 0.000 description 3
- RTZKZFJDLAIYFH-UHFFFAOYSA-N Diethyl ether Chemical compound CCOCC RTZKZFJDLAIYFH-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- WGCNASOHLSPBMP-UHFFFAOYSA-N hydroxyacetaldehyde Natural products OCC=O WGCNASOHLSPBMP-UHFFFAOYSA-N 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- DOVLZBWRSUUIJA-UHFFFAOYSA-N oxotin;silicon Chemical compound [Si].[Sn]=O DOVLZBWRSUUIJA-UHFFFAOYSA-N 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
- H01L21/441—Deposition of conductive or insulating materials for electrodes
- H01L21/445—Deposition of conductive or insulating materials for electrodes from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
Abstract
The invention belongs to the technical fields of thin film transistor (TFT), disclose a kind of method improving solwution method oxide insulating layer TFT bias stabilities.Method is：When spin coating prepares the insulating layer of thin film transistor (TFT), the metal oxide insulating layer precursor solution of low concentration is subjected to multiple spin coating, it is made annealing treatment after spin coating is complete each time, obtains metal oxide insulating layer film, thin film transistor (TFT) is using the film as insulating layer；A concentration of 0~0.3mol/L of the metal oxide insulating layer precursor solution and be 0.The method of the present invention can reduce the defect in thin film transistor (TFT) inside insulating layer, improve the bias stability of thin film transistor (TFT).
Description
Technical field
The invention belongs to thin-film transistor technologies fields, and in particular to a kind of raising solwution method oxide insulating layer TFT is inclined
The method for pressing stability.
Background technology
Thin film transistor (TFT) (Thin Film Transistor, abbreviation TFT), is a kind of widely used semiconductor devices,
Its most important purposes is to be used to drive liquid crystal arrangement to change in the display and OLED pixel is driven to shine.Oxide is thin
When display screen works, selecting pipe and driving tube can be acted on film transistor device by prolonged electrical bias, thus TFT devices
The TFT device performances whether part can keep stable in bias voltages will determine effect and service life that backboard drives.Using
Metal oxide insulation film prepared by solwution method usually contains more defect, to influence the bias stability of TFT devices.For
Solving the problems, such as this, the method for mainstream is at present, by improving the annealing temperature of insulating layer of thin-film, removing film impurities,
Reduce film internal flaw.But this mode is easy that insulating layer of thin-film is made crystalline state occur, so that under Electrical performance
Drop.
Invention content
For the disadvantage and shortcoming for solving above-mentioned, it includes solution legal system that primary and foremost purpose of the present invention, which is to provide a kind of improve,
The method of thin film transistor (TFT) (TFT) bias stability of standby metal oxide insulating layer.The present invention is by by low-concentration metallic
Oxide insulating layer presoma multiple spin coating improves thin film transistor (TFT) TFT bias stabilities, and it is thin to realize oxide insulating layer
High stability of the film transistor under bias.It is close in film thickness compared to the few spin coating of the insulating layer presoma of high concentration
In the case of, the present invention is by metal oxide (such as ZrO of low concentration2) insulating layer presoma multiple spin coating, surface of insulating layer
More smooth, internal flaw is less, to improve the bias stability of oxide insulating layer TFT.
Another object of the present invention is to provide thin film transistor (TFT)s obtained by the above method.Film crystal prepared by this method
Pipe has preferable bias stability.
The purpose of the present invention is achieved through the following technical solutions：
A method of oxide insulating layer TFT bias stabilities prepared by solwution method are improved, film crystalline substance is prepared in spin coating
When the insulating layer of body pipe, the metal oxide insulating layer precursor solution of low concentration is subjected to multiple spin coating, spin coating is complete each time
After made annealing treatment, obtain metal oxide insulating layer film, thin film transistor (TFT) is using the film as insulating layer.
A concentration of 0~0.3mol/L of the metal oxide insulating layer precursor solution and be 0, preferably 0.01~
0.3mol/L, more preferably 0.1~0.3mol/L.
Number >=4 of spin coating, preferably >=5；Precursor solution multiple spin coating makes insulating layer of thin-film reach required thickness
Degree.
The rotating speed of the spin coating is 4000rpm~6000rpm, and the time of spin coating each time is 30s-40s, each time spin coating
When being made annealing treatment after complete, the temperature of annealing is 200 DEG C~300 DEG C, and the time of annealing is 3~5min.
The metal oxide insulating layer presoma is ZrO2Insulating layer presoma, hafnium oxide insulating layer presoma or oxidation
Aluminum insulation layer presoma.
The ZrO2Insulating layer presoma is ZrOCl2·8H2O (eight hydration zirconium oxychlorides), zirconium nitrate or acetic acid zirconium；
The hafnium oxide insulating layer presoma is eight hydration oxychlorination hafniums；The alumina insulating layer presoma is aluminum nitrate
Or aluminum acetate.
The metal oxide insulating layer precursor solution is that metal oxide insulating layer presoma is dissolved in organic solvent
In obtain；
ZrO2Insulating layer presoma is ZrOCl2·8H2When O (eight hydration zirconium oxychlorides), ZrO2Insulating layer precursor solution
Middle organic solvent is glycol monoethyl ether (2-MOE) or ethylene glycol；ZrO2When insulating layer presoma is zirconium nitrate, organic solvent is
Glycol monoethyl ether；ZrO2When insulating layer presoma is acetic acid zirconium, organic solvent is ethylene glycol；
When hafnium oxide insulating layer presoma is eight hydration oxychlorination hafnium, organic solvent is ethylene glycol or glycol monoethyl ether；
When alumina insulating layer presoma is aluminum nitrate or aluminum acetate, organic solvent is glycol monoethyl ether.
The specific preparation process of the metal oxide insulating layer precursor solution is：By metal oxide insulating layer forerunner
Body is dissolved in organic solvent, and stirring aging obtains；The time of the stirring aging is 24~48h.
In the above method, metal oxide insulating layer film need to make annealing treatment 1~2h at 300 DEG C~400 DEG C.
The thickness of metal oxide insulating layer film is 120~140nm.
A kind of thin film transistor (TFT), including by metal oxide insulating layer film obtained by the above method.
The thin film transistor (TFT), from the bottom to top successively include substrate, grid, metal oxide insulating layer film, active layer,
Source/drain electrode.
The substrate is glass substrate, and the grid is ITO, and the active layer is IGZO (indium gallium zinc oxide), IZO
(tin indium oxide) or STO (mix silicon tin oxide), and the source/drain electrode is Al (aluminium) electrodes or Mo (molybdenum) electrode.
The preparation method of the thin film transistor (TFT), includes the following steps：
(1) on substrate, depositing metal oxide film is as grid；
(2) metal oxide insulating layer presoma is dissolved in organic solvent, stirs aging, obtains the metal oxygen of low concentration
Compound insulating layer precursor solution；On grid, the metal oxide insulating layer precursor solution of low concentration is repeatedly revolved
It applies, is made annealing treatment after spin coating is complete each time, obtain metal oxide insulating layer film；Then by metal oxide insulating layer
Film makes annealing treatment 1~2h in 300~400 DEG C, obtains insulating layer；
(3) magnetron sputtering oxide on the insulating layer, makes annealing treatment at 300~400 DEG C, obtains active layer；
(4) the magnetron sputtering metal on active layer, obtains source/drain electrode.
The substrate is glass, and the film of depositing metal oxide on substrate can be p-type doped silicon as grid
Substrate.
The time made annealing treatment described in step (3) is 0.5~1h.
The thickness of the grid is 140~160nm；The thickness of insulating layer is 120~140nm；The thickness of active layer be 8~
12nm；The thickness of source/drain electrode is 90~110nm.
In the present invention, (such as due to the metal oxide using low concentration：ZrO2) insulating layer presoma, spin coating each time obtains
The film arrived is relatively thin, and organic impurities etc. is easily removed from wet film in annealing process, while relatively thin film is conducive to the biography of heat
It leads, makes heat treatment evenly.Similar in thickness, fewer than the insulating layer presoma of high concentration time of the film being prepared
Film prepared by spin coating, internal flaw is less, and surface is evenly.The TFT devices thus prepared have better bias stability.
Compared with prior art, the present invention has the following advantages and beneficial effects：
The present invention is obtaining expected thickness by the multiple spin coating of low-concentration metallic oxide insulating layer precursor solution
Under the premise of, can reduce insulating layer of thin-film internal flaw, reduce surface roughness so that the TFT devices prepared have compared with
Good bias stability.In short, the method for the present invention can reduce the defect in thin film transistor (TFT) inside insulating layer, film is improved
The bias stability of transistor.
Description of the drawings
Fig. 1 is the structural schematic diagram of high bias stability thin film transistor (TFT) prepared by the present invention；
Fig. 2 is embodiment 1 (0.3mol/L, spin coating 6 times), comparative example 1 (0.3mol/L, spin coating 3 times), comparative example 2
The leakage current density curve of insulating layer of thin-film obtained by (0.6mol/L, spin coating 3 times)；
Fig. 3 is the bias stability test result figure of thin film transistor (TFT) obtained by embodiment 1 (0.3mol/L, spin coating 6 times)；Its
Middle figure a is thin film transistor (TFT) back bias voltage stability test result figure, and figure b is thin film transistor (TFT) positive bias stability test result
Figure；
Fig. 4 is the bias stability test result figure of thin film transistor (TFT) obtained by embodiment 2 (0.26mol/L, spin coating 7 times)；
Wherein figure a is thin film transistor (TFT) back bias voltage stability test result figure, and figure b is thin film transistor (TFT) positive bias stability test result
Figure；
Fig. 5 is the bias stability test result figure of thin film transistor (TFT) obtained by embodiment 3 (0.2mol/L, spin coating 9 times)；Its
Middle figure a is thin film transistor (TFT) back bias voltage stability test result figure, and figure b is thin film transistor (TFT) positive bias stability test result
Figure；
Fig. 6 is the bias stability test result figure of thin film transistor (TFT) obtained by comparative example 2 (0.6mol/L, spin coating 3 times)；Its
Middle figure a is thin film transistor (TFT) back bias voltage stability test result figure, and figure b is thin film transistor (TFT) positive bias stability test result
Figure.
Specific implementation mode
With reference to embodiment and attached drawing, the present invention is described in further detail, but embodiments of the present invention are unlimited
In this.
The structural schematic diagram of the thin film transistor (TFT) (high bias stability thin film transistor (TFT)) of the present invention is as shown in Figure 1, under
Supreme includes substrate 1, grid 2, metal oxide insulating layer film 3, active layer 4, source/drain electrode 5 successively.
Embodiment 1
(1) presoma is prepared：By 0.97g ZrOCl2·8H2O (eight hydration zirconium oxychlorides) is dissolved in 10ml glycol monoethyl ethers
In (2-MOE), stirring aging for 24 hours, obtains the precursor solution of 0.3mol/L；
(2) prepared by substrate：The ITO bottom gates (thickness 150nm) of a layer pattern are deposited in glass baseplate surface, cleaning is dried
It is dry, obtain ito glass substrate；
(3) on ito glass substrate (i.e. on bottom gate), the precursor solution of step (1) is carried out multiple spin coating, and (spin coating turns
The number of fast 5000rpm, spin coating are 6 times, and the time of spin coating each time is 40s (i.e. spin coating time)), spin coating each time is complete laggard
Row annealing (300 DEG C of annealing 5min), obtains metal oxide insulating layer film；Then by metal oxide insulating layer film
1h is made annealing treatment in 350 DEG C, obtains insulating layer；Metal oxide insulating layer film is zirconium oxide insulating layer of thin-film；Insulating layer
Thickness is 132nm；
(4) on the insulating layer by magnetron sputtering IGZO (indium gallium zinc oxide) (thickness 10nm), then at 300 DEG C
Lower annealing 1h, obtains active layer；Source/drain is finally obtained by magnetron sputtering Al on the active layer of indium gallium zinc oxide
Electrode (thickness 100nm).
Embodiment 2
Compared with Example 1, a concentration of 0.26mol/L of precursor solution, spin coating number are 7 times, and thickness of insulating layer is
130nm, other Step By Conditions are identical.
Embodiment 3
Compared with Example 1, a concentration of 0.2mol/L of precursor solution, spin coating number are 9 times, obtained zirconium oxide insulation
Layer thickness is 135nm, other Step By Conditions are identical.
Comparative example 1
Compared with Example 1, spin coating number is 3 times, thickness of insulating layer 67nm, other Step By Conditions are identical.
Comparative example 2
Compared with Example 1, a concentration of 0.6mol/L of precursor solution, spin coating number are 3 times, and thickness of insulating layer is
137nm, other Step By Conditions are identical.
Performance test
(1) with embodiment 1 (0.3mol/L, spin coating 6 times), comparative example 1 (0.3mol/L, spin coating 3 times), comparative example 2
The leakage current density curve of insulating layer of thin-film obtained by (0.6mol/L, spin coating 3 times) is as shown in fig. 2, it can be seen that embodiment 1 is made
Standby insulating layer has lower leakage current density, and comparative example 1 causes larger leakage current since film is relatively thin, comparative example
2 since film internal flaw is more, thus leakage current is also larger.The zirconium oxide insulating layer of thin-film prepared under different condition (is implemented
Insulating layer prepared by example 1, comparative example 1 and comparative example 2) physical characteristic parameter list it is as shown in table 1.
The physical characteristic parameter of insulating layer prepared by 1 embodiment 1 of table, comparative example 1 and comparative example 2
| Precursor concentration | Spin coating number | Density (g/cm3) | Thickness (nm) | Roughness (nm) |
| 0.3M | 6 | 4.77 | 129.29 | 0.41 |
| 0.3M | 3 | 4.83 | 66.98 | 0.26 |
| 0.6M | 3 | 4.75 | 137.14 | 0.42 |
(2) bias stability test result such as Fig. 3 institutes of thin film transistor (TFT) obtained by embodiment 1 (0.3mol/L, spin coating 6 times)
Show, test results are shown in figure 4 for the bias stability of thin film transistor (TFT) obtained by embodiment 2 (0.26mol/L, spin coating 7 times), implements
Test results are shown in figure 5 for the bias stability of thin film transistor (TFT) obtained by example 3 (0.2mol/L, spin coating 9 times)；Comparative example 2
Test results are shown in figure 6 for the bias stability of thin film transistor (TFT) obtained by (0.6mol/L, spin coating 3 times).It can be seen that embodiment
Obtained by 1 (0.3mol/L, spin coating 6 times), embodiment 2 (0.26mol/L, spin coating 7 times) and embodiment 3 (0.2mol/L, spin coating 9 times)
After thin film transistor (TFT) works one hour under positive bias and back bias voltage respectively, the offset of threshold voltage is respectively less than 0.6V.It is right
After thin film transistor (TFT) obtained by ratio 2 (0.6mol/L, spin coating 3 times) works one hour under back bias voltage, the offset of threshold voltage
Amount is more than 1V, and after working one hour under positive bias, the offset of threshold voltage is more than 1.5V.Thus, it will be seen that by low dense
Spend ZrO2The multiple spin coating of insulating layer presoma can be reduced and be lacked inside insulating layer of thin-film under the premise of obtaining expected thickness
It falls into, reduces surface roughness, so that the TFT devices prepared have preferable bias stability.
Fig. 3 is the bias stability test result figure of thin film transistor (TFT) obtained by embodiment 1 (0.3mol/L, spin coating 6 times)；Its
Middle figure a is thin film transistor (TFT) back bias voltage stability test result figure, and figure b is thin film transistor (TFT) positive bias stability test result
Figure；Fig. 4 is the bias stability test result figure of thin film transistor (TFT) obtained by embodiment 2 (0.26mol/L, spin coating 7 times)；Wherein scheme
A is thin film transistor (TFT) back bias voltage stability test result figure, and figure b is thin film transistor (TFT) positive bias stability test result figure；Fig. 5
It is the bias stability test result figure of thin film transistor (TFT) obtained by embodiment 3 (0.2mol/L, spin coating 9 times)；Wherein figure a is film
Transistor back bias voltage stability test result figure, figure b is thin film transistor (TFT) positive bias stability test result figure；Fig. 6 is comparison
The bias stability test result figure of thin film transistor (TFT) obtained by example 2 (0.6mol/L, spin coating 3 times)；Wherein figure a is thin film transistor (TFT)
Back bias voltage stability test result figure, figure b is thin film transistor (TFT) positive bias stability test result figure.
A is thin film transistor (TFT) back bias voltage stability test as a result, applying back bias voltage in the grid of thin film transistor (TFT) in Fig. 3
(- 10V) and a period of time is maintained, later the transfer curve of testing film transistor；0s indicates that grid back bias voltage (- 10V) maintains
The thin film transistor (TFT) transfer curve tested after 0S, 900s indicate that grid back bias voltage (- 10V) maintains the film crystal tested after 900S
Pipe transfer curve, and so on；B is thin film transistor (TFT) positive bias stability test as a result, being applied in the grid of thin film transistor (TFT)
Add positive bias (10V) and maintain a period of time, later the transfer curve of testing film transistor；0s indicates grid positive bias
(10V) maintains the thin film transistor (TFT) transfer curve tested after 0S, is tested after 900s expression grid positive biases (10V) maintenance 900S
Thin film transistor (TFT) transfer curve, and so on.
A is thin film transistor (TFT) back bias voltage stability test as a result, applying back bias voltage in the grid of thin film transistor (TFT) in Fig. 4
(- 10V) and a period of time is maintained, later the transfer curve of testing film transistor；0s indicates that grid back bias voltage (- 10V) maintains
The thin film transistor (TFT) transfer curve tested after 0S, 900s indicate that grid back bias voltage (- 10V) maintains the film crystal tested after 900S
Pipe transfer curve, and so on；B is thin film transistor (TFT) positive bias stability test as a result, being applied in the grid of thin film transistor (TFT)
Add positive bias (10V) and maintain a period of time, later the transfer curve of testing film transistor；0s indicates grid positive bias
(10V) maintains the thin film transistor (TFT) transfer curve tested after 0S, is tested after 900s expression grid positive biases (10V) maintenance 900S
Thin film transistor (TFT) transfer curve, and so on.
Figure a is thin film transistor (TFT) back bias voltage stability test as a result, applying negative bias in the grid of thin film transistor (TFT) in Fig. 5
Pressure (- 10V) simultaneously maintains a period of time, later the transfer curve of testing film transistor；0s indicates that grid back bias voltage (- 10V) is tieed up
The thin film transistor (TFT) transfer curve tested after 0S is held, 900s indicates that grid back bias voltage (- 10V) maintains the film tested after 900S brilliant
Body pipe transfer curve, and so on；Figure b is thin film transistor (TFT) positive bias stability test as a result, i.e. in the grid of thin film transistor (TFT)
Pole applies positive bias (10V) and maintains a period of time, later the transfer curve of testing film transistor；0s indicates grid positive bias
(10V) maintains the thin film transistor (TFT) transfer curve tested after 0S, is tested after 900s expression grid positive biases (10V) maintenance 900S
Thin film transistor (TFT) transfer curve, and so on.
Figure a is thin film transistor (TFT) back bias voltage stability test as a result, applying negative bias in the grid of thin film transistor (TFT) in Fig. 6
Pressure (- 10V) simultaneously maintains a period of time, later the transfer curve of testing film transistor；0s indicates that grid back bias voltage (- 10V) is tieed up
The thin film transistor (TFT) transfer curve tested after 0S is held, 900s indicates that grid back bias voltage (- 10V) maintains the film tested after 900S brilliant
Body pipe transfer curve, and so on；Figure b is thin film transistor (TFT) positive bias stability test as a result, i.e. in the grid of thin film transistor (TFT)
Pole applies positive bias (10V) and maintains a period of time, later the transfer curve of testing film transistor；0s indicates grid positive bias
(10V) maintains the thin film transistor (TFT) transfer curve tested after 0S, is tested after 900s expression grid positive biases (10V) maintenance 900S
Thin film transistor (TFT) transfer curve, and so on.
The above embodiment is a preferred embodiment of the present invention, but embodiments of the present invention are not by above-described embodiment
Limitation, it is other it is any without departing from the spirit and principles of the present invention made by changes, modifications, substitutions, combinations, simplifications,
Equivalent substitute mode is should be, is included within the scope of the present invention.
Claims (10)
1. a kind of method improving oxide insulating layer TFT bias stabilities prepared by solwution method, it is characterised in that：In spin coating system
When the insulating layer of standby thin film transistor (TFT), the metal oxide insulating layer precursor solution of low concentration is subjected to multiple spin coating, it is each
It is made annealing treatment after secondary spin coating is complete, obtains metal oxide insulating layer film, thin film transistor (TFT) is using the film as insulating layer；
A concentration of 0~0.3mol/L of the metal oxide insulating layer precursor solution and be 0.
2. the method for improving oxide insulating layer TFT bias stabilities prepared by solwution method according to claim 1, feature
It is：A concentration of 0.01~0.3mol/L of the metal oxide insulating layer precursor solution；Metal oxide insulating layer is thin
The thickness of film is 120~140nm.
3. the method for improving oxide insulating layer TFT bias stabilities prepared by solwution method according to claim 1, feature
It is：Number >=4 of spin coating；Precursor solution multiple spin coating makes insulating layer of thin-film reach required thickness；
When being made annealing treatment after spin coating is complete each time, the temperature of annealing is 200 DEG C~300 DEG C, time of annealing is 3~
5min；
The rotating speed of the spin coating is 4000rpm~6000rpm, and the time of spin coating each time is 30s~40s.
4. the method for improving oxide insulating layer TFT bias stabilities prepared by solwution method according to claim 1, feature
It is：The metal oxide insulating layer presoma is ZrO2Insulating layer presoma, hafnium oxide insulating layer presoma or aluminium oxide
Insulating layer presoma；
The metal oxide insulating layer precursor solution is that metal oxide insulating layer presoma is dissolved in organic solvent to obtain
It arrives.
5. the method for improving oxide insulating layer TFT bias stabilities prepared by solwution method according to claim 4, feature
It is：The ZrO2Insulating layer presoma is ZrOCl2·8H2O, zirconium nitrate or acetic acid zirconium；
The hafnium oxide insulating layer presoma is eight hydration oxychlorination hafniums；The alumina insulating layer presoma is aluminum nitrate or vinegar
Sour aluminium.
6. the method for improving oxide insulating layer TFT bias stabilities prepared by solwution method according to claim 5, feature
It is：ZrO2Insulating layer presoma is ZrOCl2·8H2When O, ZrO2Organic solvent is ethylene glycol list in insulating layer precursor solution
Methyl ether or ethylene glycol；ZrO2When insulating layer presoma is zirconium nitrate, organic solvent is glycol monoethyl ether；ZrO2Insulating layer forerunner
When body is acetic acid zirconium, organic solvent is ethylene glycol；
When hafnium oxide insulating layer presoma is eight hydration oxychlorination hafnium, organic solvent is ethylene glycol or glycol monoethyl ether；
When alumina insulating layer presoma is aluminum nitrate or aluminum acetate, organic solvent is glycol monoethyl ether.
7. the method for improving oxide insulating layer TFT bias stabilities prepared by solwution method according to claim 1, feature
It is：Metal oxide insulating layer film need to make annealing treatment 1~2h at 300 DEG C~400 DEG C.
8. a kind of thin film transistor (TFT), it is characterised in that：The metal oxidation obtained including any one of claim 1~7 the method
Object insulating layer of thin-film.
9. thin film transistor (TFT) according to claim 8, it is characterised in that：Include substrate, grid, metal oxygen successively from the bottom to top
Compound insulating layer of thin-film, active layer, source/drain electrode.
10. the preparation method of thin film transistor (TFT) according to claim 9, it is characterised in that：Include the following steps：
(1) on substrate, depositing metal oxide film is as grid；
(2) metal oxide insulating layer presoma is dissolved in organic solvent, stirs aging, obtains the metal oxide of low concentration
Insulating layer precursor solution；On grid, the metal oxide insulating layer precursor solution of low concentration is subjected to multiple spin coating, often
It is made annealing treatment after spin coating is complete, obtains metal oxide insulating layer film；Then by metal oxide insulating layer film
1~2h is made annealing treatment in 300~400 DEG C, obtains insulating layer；
(3) magnetron sputtering oxide on the insulating layer, makes annealing treatment at 300~400 DEG C, obtains active layer；
(4) the magnetron sputtering metal on active layer, obtains source/drain electrode.
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