CN108322999B - Circuit board, method for forming solder mask layer of circuit board and chip - Google Patents

Circuit board, method for forming solder mask layer of circuit board and chip Download PDF

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Publication number
CN108322999B
CN108322999B CN201810291297.XA CN201810291297A CN108322999B CN 108322999 B CN108322999 B CN 108322999B CN 201810291297 A CN201810291297 A CN 201810291297A CN 108322999 B CN108322999 B CN 108322999B
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China
Prior art keywords
circuit board
positioning mark
solder mask
mask layer
boundary
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CN108322999A (en
Inventor
刘慎卫
曾腾俊
徐宇博
李振明
杜江涛
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Chengdu Yisiwei Chip Design Co ltd
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Chengdu Yisiwei Chip Design Co ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/282—Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The embodiment of the invention provides a circuit board, a forming method of a solder mask of the circuit board and a chip, wherein the circuit board comprises a first positioning mark and a second positioning mark, the first positioning mark is positioned at a first set position on the circuit board close to the edge of a welding area, the second positioning mark is positioned at a second set position on the circuit board close to the edge of the welding area, so that the boundary of the solder mask of the circuit board is positioned through the first set position and the second set position, the distance between the boundary of the solder mask and the edge of the welding area is a preset value, and the circuit board can control the windowing precision of the solder mask through the positioning marks, thereby improving the reliability of the circuit board.

Description

Circuit board, method for forming solder mask layer of circuit board and chip
Technical Field
The invention relates to the technical field of chips, in particular to a circuit board, a forming method of a solder mask of the circuit board and a chip.
Background
The circuit board generally includes a solder resist layer (SR) which can protect the circuit from corrosion, the solder resist layer is generally provided with a window, and the window can be filled with solder, for example, when the circuit board is a flexible On Film (COF) circuit board with an unpackaged Chip, the windowed area of the solder resist layer can be used as a soldering area, in which a solder joint (bump) suitable for the Chip IC is provided, and the solder joint can be used for further packaging the Chip IC or for connecting the Chip IC with other circuits outside the IC.
However, in order to ensure the success rate of the solder joint in the soldering area, the size of the window is increased when the solder mask is formed, so that the solder mask cannot provide enough protection for the soldering area, and the protection of the soldering area is weakened.
Disclosure of Invention
Embodiments of the present invention provide a circuit board, a method for forming a solder mask layer of the circuit board, and a chip, so as to overcome the problem that the solder mask layer cannot provide sufficient protection for a soldering area.
In one aspect, to achieve the above object, an embodiment of the present invention provides a circuit board, where the circuit board includes a first positioning mark and a second positioning mark, the first positioning mark is located at a first set position on the circuit board near an edge of a soldering region, and the second positioning mark is located at a second set position on the circuit board near the edge of the soldering region, so as to position a boundary of a solder mask layer of the circuit board through the first set position and the second set position, and make a distance between the boundary of the solder mask layer and the edge of the soldering region be a preset value.
Optionally, the first positioning mark and the second positioning mark are rectangular or square in shape.
Optionally, the boundary of the solder resist layer intersects with a connecting line of the first positioning mark and the second positioning mark, and a ratio of a distance from the intersecting point to the first positioning mark to a distance from the intersecting point to the second positioning mark is a preset value.
Optionally, a ratio of a distance from the intersection to the first positioning mark to a distance from the intersection to the second positioning mark is 1.
Optionally, a partial boundary of the solder mask layer is perpendicular to a connection line of the first positioning mark point and the second positioning mark point.
Optionally, when the soldering region on the circuit board includes a corner, the corner of the soldering region includes two sets of the positioning marks, and the two sets of the positioning marks are respectively used for positioning the boundary of the solder resist layer corresponding to two edges of the corner of the soldering region.
Optionally, the solder mask covers the traces of the circuit board.
Optionally, the solder mask layer includes a windowing region surrounded by a boundary of the solder mask layer, and the windowing region is used for exposing the soldering region outside the solder mask layer.
Optionally, the welding area exposed outside the solder resist layer is used for setting a welding part, so that the circuit board is electrically connected with components outside the circuit board through the welding part.
In another aspect, to achieve the above object, an embodiment of the present invention provides a method for forming a solder resist layer of a circuit board, including:
respectively determining a first set position of a first positioning mark on the circuit board close to the edge of a welding area and a second set position of a second positioning mark on the circuit board close to the edge of the welding area;
positioning the boundary of a solder mask layer of a circuit board through the first set position and the second set position, so that the distance between the boundary of the solder mask layer and the edge of the welding area is a preset value;
and forming the solder mask layer on the circuit board according to the positioned boundary of the solder mask layer.
In another aspect, to achieve the above object, embodiments of the present invention provide a chip including the circuit board as described above.
In summary, the circuit board, the method for forming the solder mask layer of the circuit board, and the chip provided by the invention, wherein the circuit board includes a first positioning mark and a second positioning mark, the first positioning mark is located at a first set position on the circuit board close to the edge of the soldering area, and the second positioning mark is located at a second set position on the circuit board close to the edge of the soldering area, so that the boundary of the solder mask layer of the circuit board is positioned through the first set position and the second set position, and the distance between the boundary of the solder mask layer and the edge of the soldering area is a preset value. The circuit board can control the windowing precision of the solder mask layer, so that the distance between the boundary of the solder mask layer and the edge of a welding area is small enough, and the welding area in the windowing is not easy to corrode by the environment; meanwhile, the boundary of the solder mask layer can be close to the welding area enough, but the performance of the welding area can not be influenced, so that the normal welding spot in the welding area can be ensured, and the reliability of the circuit board is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural view of a conventional COF circuit board;
fig. 2 is a schematic structural diagram of a COF circuit board according to an embodiment of the present disclosure;
fig. 3 is a schematic flow chart of a method for forming a solder mask layer of a circuit board according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic structural view of a conventional COF circuit board; as shown in fig. 1, a soldering area 11 is disposed on the circuit board, and a position for disposing a solder bump (bump) and a trace including a portion connected to the solder bump are disposed in the soldering area 11. The soldering region 11 is arranged in a window 12, the window 12 being surrounded by the boundaries of the solder resist, the window 12 shown in fig. 1 being of a large size, resulting in the solder resist not providing sufficient protection for the soldering region 11.
Fig. 2 is a schematic structural view of a COF circuit board provided in an embodiment of the present application, as shown in fig. 2, when a soldering region 11 on the circuit board includes a corner, the corner of the soldering region 11 includes two sets of positioning marks (dual mark), and the two sets of positioning marks are respectively used for positioning a boundary of the solder resist layer corresponding to two edges of the corner of the soldering region 11. Each group of positioning marks comprises a first positioning mark 131 and a second positioning mark 132, the first positioning mark 131 is located at a first set position on the circuit board close to the edge of the welding area 11, the second positioning mark 132 is located at a second set position on the circuit board close to the edge of the welding area 11, so that the boundary defined by the same edge of the solder mask layer of the circuit board is positioned through the first set position and the second set position, the distance between the boundary of the solder mask layer and the edge of the welding area 11 is a preset value, and then two boundaries corresponding to corners can be respectively positioned through the two groups of positioning marks.
Specifically, the corner of the soldering region 11 shown in fig. 2 is a right-angled corner, and the corner is composed of two sides in the horizontal direction and the vertical direction, so that two sets of positioning marks may be included on the circuit board, which are respectively a first set of positioning marks corresponding to the sides in the horizontal direction and arranged in the vertical direction, and a second set of positioning marks corresponding to the sides in the vertical direction and arranged in the horizontal direction, where each set of positioning marks includes a first positioning mark 131 and a second positioning mark 132, the first set of positioning marks may be used to determine the boundary of the solder mask opening window 12 in the vertical direction in fig. 2, and the second set of positioning marks may be used to determine the boundary of the solder mask opening window 12 in the horizontal direction in fig. 2.
In this embodiment, the first position may be outside the corresponding edge of the welding region 11, and the distance from the welding region 11 is a first preset value; the second position is also arranged outside the corresponding edge of the welding area 11 and at a distance from the welding area 11 of a second preset value, while, as shown in the figure, the value of the first preset value is smaller than the value of the second preset value, so that the first positioning marks 131 of the same group are closer to the welding area 11 than the second positioning marks 132.
In order to more conveniently determine the boundary of the solder resist layer, a line connecting the first position and the second position corresponding to each set of positioning marks may be perpendicular to the edge of the soldering region 11 corresponding to the set of positioning marks.
In this embodiment, the boundaries of the two solder resist layers are also determined to be perpendicular to each other, so that when the solder resist layers are drawn, corners formed by the two boundaries of the solder resist layers can be drawn as rounded corners.
In addition, in other implementations of the present embodiment, the edge of the welding region 11 may be only one line segment, and the positioning mark may only include one set.
Of course, in other implementations of the present application, the edge of the soldering region 11 may also be a curve, and the connection line between the first positioning mark 131 and the second positioning mark 132 may also not be perpendicular to the boundary of the solder resist layer, as long as the distance between the boundary of the solder resist layer that can be determined by the first positioning mark 131 and the second positioning mark 132 and the edge of the soldering region 11 is a preset value, which is not limited herein.
The circuit board provided by the embodiment can position the boundary of the solder mask layer by the aid of the first positioning mark 131 and the second positioning mark 132, so that the distance between the boundary of the solder mask layer and the edge of the welding area 11 can be determined to be a preset value to control the precision of the windowing 12 of the solder mask layer, and the distance between the boundary of the solder mask layer and the edge of the welding area 11 can be ensured to be small enough, so that the welding area 11 in the windowing 12 is not easily corroded by the environment; meanwhile, the boundary of the solder mask layer can be close to the welding area 11 enough, but the performance of the welding area 11 cannot be influenced, so that the normal welding points in the welding area 11 can be ensured, and the reliability of the circuit board is improved.
In addition, in the present embodiment, for convenience of determining the distance, the first positioning mark 131 and the second positioning mark 132 are rectangular or square. Of course, in other implementations of the present application, the first positioning mark 131 and the second positioning mark 132 may also have other shapes, such as a circle, a triangle, and the like.
In this embodiment, as shown in fig. 1, for the same boundary of the solder resist layer, in a group of positioning marks configured for the boundary, a connecting line of the first positioning mark 131 and the second positioning mark 132 intersects with the boundary, and a ratio of a distance from the intersection point to the first positioning mark 131 to a distance from the intersection point to the second positioning mark 132 is a predetermined value, for example, it may be determined that the intersection point is located at a trisection point, a quarteection point, and the like of the connecting line of the first positioning mark 131 and the second positioning mark 132, so as to conveniently determine the position of the boundary of the solder resist layer.
Preferably, the ratio of the distance from the intersection point to the first positioning mark 131 in the group to the distance from the intersection point to the second positioning mark 132 in the group is 1, that is, the intersection point is located at the center of the connecting line of the first positioning mark 131 and the second positioning mark 132 in the same group.
In addition, in this embodiment, a partial boundary of the solder resist layer may be perpendicular to a connection line between the first positioning mark 131 and the second positioning mark 132 in a group of positioning marks configured for the boundary. For example, when setting a set of setting marks suitable for the horizontal boundary, the line connecting the first positioning mark 131 and the second positioning mark 132 in the set may be perpendicular to the edge of the soldering region 11, and then the partial horizontal boundary of the solder resist layer may be perpendicular to the line connecting the point of the first positioning mark 131 and the point of the second positioning mark 132, and the partial boundary of the solder resist layer may be parallel to the boundary of the soldering region 11, so that the window 12 is more suitable for the soldering region 11.
Of course, in other implementations of the present application, the connection line of the first positioning mark 131 and the second positioning mark 132 may have other geometric relationships with the boundary of the solder mask layer, for example, the included angle is 60 degrees, and in this case, other auxiliary positioning marks may be further provided to determine the boundary of the solder mask layer.
In this embodiment, after the solder mask is drawn, the solder mask covers the traces of the circuit board to protect the traces of the circuit board; the windowing 12 surrounded by the solder mask boundary and included in the solder mask can expose the welding area 11 outside the solder mask, and further can set welding parts, such as the welding spot bump and the like, through the welding area 11 exposed outside the solder mask, so that the circuit board is electrically connected with components outside the circuit board through the welding parts.
Fig. 3 is a schematic flow chart of a method for forming a solder mask layer of a circuit board according to an embodiment of the present application, and as shown in fig. 3, the method includes:
s11, respectively determining a first set position of a first positioning mark on the circuit board close to the edge of the welding area and a second set position of a second positioning mark on the circuit board close to the edge of the welding area;
s12, positioning the boundary of a solder mask layer of the circuit board through the first set position and the second set position, and enabling the distance between the boundary of the solder mask layer and the edge of the welding area to be a preset value;
and S13, forming the solder mask layer on the circuit board according to the positioned boundary of the solder mask layer.
In this embodiment, the solder resist layer may be formed by a processing method such as coating.
According to the forming method of the circuit board solder mask, the boundary of the solder mask can be positioned through the assistance of the first positioning mark and the second positioning mark, so that the distance between the boundary of the solder mask and the edge of a welding area can be determined to be a preset value to control the windowing precision of the solder mask, the distance between the boundary of the solder mask and the edge of the welding area can be ensured to be small enough, and the welding area in the windowing is not prone to environmental corrosion; meanwhile, the boundary of the solder mask layer can be close to the welding area enough, but the performance of the welding area can not be influenced, so that the normal welding spot in the welding area can be ensured, and the reliability of the circuit board is improved.
The embodiment of the application also provides a chip, which comprises the circuit board.
For example, the chip may be a chip obtained by further packaging the COF provided in the first embodiment.
In the embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately processed, or two or more units may be integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute some steps of the methods according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (11)

1. A circuit board is characterized in that the circuit board comprises a first positioning mark and a second positioning mark, the first positioning mark is located at a first set position on the circuit board close to the edge of a welding area, the second positioning mark is located at a second set position on the circuit board close to the edge of the welding area, so that the boundary of a solder mask layer of the circuit board is positioned through the first set position and the second set position, and the distance between the boundary of the solder mask layer and the edge of the welding area is a preset value;
the distance between the first set position and the welding area is a first preset value, the distance between the second set position and the welding area is a second preset value, and the first preset value is smaller than the second preset value.
2. The circuit board of claim 1, wherein the first and second positioning marks are rectangular or square in shape.
3. The circuit board according to claim 1, wherein a boundary of the solder resist layer intersects a line connecting the first positioning mark and the second positioning mark, and a ratio of a distance from an intersection of the intersection to the first positioning mark to a distance from the intersection to the second positioning mark is a predetermined value.
4. The circuit board according to claim 3, wherein a ratio of a distance from the intersection to the first positioning mark to a distance from the intersection to the second positioning mark is 1.
5. The circuit board according to claim 1, wherein a partial boundary of the solder resist layer is perpendicular to a line connecting the first positioning mark point and the second positioning mark point.
6. The circuit board of claim 1, wherein when the soldering region on the circuit board comprises a corner, the corner of the soldering region comprises two sets of the positioning marks, and the two sets of the positioning marks are respectively used for positioning the boundary of the solder resist layer corresponding to two sides of the corner of the soldering region.
7. The circuit board of claim 1, wherein the solder mask layer covers traces of the circuit board.
8. The circuit board of claim 1, wherein the solder mask layer comprises a windowed area bounded by solder mask layer boundaries for exposing the soldered area outside the solder mask layer.
9. The circuit board of claim 8, wherein the soldering area exposed outside the solder resist layer is used for providing a soldering portion for electrically connecting the circuit board with a component outside the circuit board through the soldering portion.
10. A method for forming a solder mask layer of a circuit board is characterized by comprising the following steps:
respectively determining a first set position of a first positioning mark on the circuit board close to the edge of a welding area and a second set position of a second positioning mark on the circuit board close to the edge of the welding area;
the distance between the first set position and the welding area is a first preset value, the distance between the second set position and the welding area is a second preset value, and the first preset value is smaller than the second preset value;
positioning the boundary of a solder mask layer of a circuit board through the first set position and the second set position, so that the distance between the boundary of the solder mask layer and the edge of the welding area is a preset value;
and forming the solder mask layer on the circuit board according to the positioned boundary of the solder mask layer.
11. A chip comprising a circuit board according to any one of claims 1 to 9.
CN201810291297.XA 2018-03-30 2018-03-30 Circuit board, method for forming solder mask layer of circuit board and chip Active CN108322999B (en)

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CN108322999B true CN108322999B (en) 2020-09-04

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101345228A (en) * 2006-11-08 2009-01-14 三洋电机株式会社 Substrate for mounting device, manufacturing method thereof, semiconductor module and portable equipment
US8436255B2 (en) * 2009-12-31 2013-05-07 Stmicroelectronics Pte Ltd. Fan-out wafer level package with polymeric layer for high reliability

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3031042B2 (en) * 1992-03-17 2000-04-10 松下電器産業株式会社 Printed wiring board for surface mounting
CN105263258A (en) * 2015-11-06 2016-01-20 广东欧珀移动通信有限公司 Flexible circuit board and method for setting positioning logo for the flexible circuit board
CN105430877B (en) * 2015-12-29 2018-06-29 广东欧珀移动通信有限公司 The preparation method of flexible PCB, terminal and flexible PCB

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101345228A (en) * 2006-11-08 2009-01-14 三洋电机株式会社 Substrate for mounting device, manufacturing method thereof, semiconductor module and portable equipment
US8436255B2 (en) * 2009-12-31 2013-05-07 Stmicroelectronics Pte Ltd. Fan-out wafer level package with polymeric layer for high reliability

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