CN108319086A - 显示面板及显示装置 - Google Patents
显示面板及显示装置 Download PDFInfo
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- CN108319086A CN108319086A CN201810264662.8A CN201810264662A CN108319086A CN 108319086 A CN108319086 A CN 108319086A CN 201810264662 A CN201810264662 A CN 201810264662A CN 108319086 A CN108319086 A CN 108319086A
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Classifications
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G09G2300/04—Structural and physical details of display devices
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- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
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- Crystallography & Structural Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
本申请提供一种显示面板及显示装置,显示面板,包括像素结构,像素结构包括多个像素组,像素组包括:第一开关,其第二端耦接第一主像素;第二开关,其第二端耦接第一子像素;第三开关,其第二端耦接第一子像素;第一电容,一端耦接第三开关的第一端,另一端耦接公共电极;第四开关,其第二端耦接第二主像素;第五开关,其第二端耦接第二子像素;第六开关,其第二端耦接第二子像素;第二电容,一端耦接第六开关的第一端,另一端耦接公共电极。第一,第二和第六开关耦接第n扫描线,第三,第四和第五开关耦接第n+1扫描线。
Description
技术领域
本申请涉及显示领域,特别是涉及一种显示面板及显示装置。
背景技术
液晶显示装置,具有低成本、低功耗和高性能的优点,在电子、数码产品等领域有着广泛的运用。而显示装置中像素单元的驱动,则需通过栅极驱动电路和源极驱动电路驱动相应的扫描线和数据线加以实现。为进一步提高用户体验及节约成本,各产商开发了很多有关显示领域的制造技术,如HSD(Half Source Driver,半源极驱动)技术。
HSD技术,其将数据线的数量减半,扫描线的数量加倍,以此使得每一数据线对应连接两列相邻的像素单元,通过此技术,可以节约一半的源极驱动芯片。但此技术亦存在一定的缺陷,由于同一数据线连接两列像素单元,且数量加倍的扫描线使得像素单元的扫描时间缩短,容易出现充电效率不一致,像素单元之间的寄生电容不平衡及信号波形的延迟失真等问题,并导致显示装置出现大视角色偏,垂直亮暗线等现象。
对此,亟需相关的业内技术人员研发设计新的像素电路和结构,以克服上述HSD技术存在的问题和缺陷。
发明内容
为了解决上述技术问题,本申请的目的在于,提供一种显示面板及显示装置。
本申请的目的及解决其技术问题是采用以下技术方案来实现的。依据本申请提出的一种显示面板,包括一像素结构,所述像素结构包括多个像素组,每一所述像素组包括:第一像素单元,包括:第一开关,所述第一开关的控制端耦接第n条扫描线,第一端耦接第m条数据线,第二端耦接第一主像素;第二开关,所述第二开关的控制端耦接所述第n条扫描线,第一端耦接所述第m条数据线,第二端耦接第一子像素;第三开关,所述第三开关的控制端耦接第n+1条扫描线,第二端耦接所述第一子像素;第一电容,所述第一电容一端耦接所述第三开关的第一端,另一端耦接公共电极;第二像素单元,包括:第四开关,所述第四开关的控制端耦接第n+1条扫描线,第一端耦接第m条数据线,第二端耦接第二主像素;第五开关,所述第五开关的控制端耦接所述第n+1条扫描线,第一端耦接所述第m条数据线,第二端耦接第二子像素;第六开关,所述第六开关的控制端耦接第n条扫描线,第二端耦接所述第二子像素,其中,n,m为正数;第二电容,所述第二电容一端耦接所述第六开关的第一端,另一端耦接所述公共电极。
在本申请的一实施例中,在第一期间,第n条扫描线导通,所述第一开关,所述第二开关和所述第六开关打开。
在本申请的一实施例中,所述第一开关和所述第二开关分别给所述第一主像素和所述第一子像素充电。
在本申请的一实施例中,所述第六开关通过所述第二电容给所述第二子像素放电。
在本申请的一实施例中,在第二期间,第n+1条扫描线导通,所述第三开关,所述第四开关和所述第五开关打开。
在本申请的一实施例中,所述第四开关和所述第五开关分别给所述第二主像素和所述第二子像素充电。
在本申请的一实施例中,所述第三开关通过所述第一电容给所述第一子像素放电。
在本申请的一实施例中,所述显示面板的数据扫描方式包括点反转,列反转,行反转或帧反转。
本申请的目的及解决其技术问题还可采用以下技术措施进一步实现。
本申请的另一目的为一种显示面板,包括一像素结构,所述像素结构包括多个像素组,每一所述像素组包括:第一像素单元,包括:第一开关,所述第一开关的控制端耦接第n条扫描线,第一端耦接第m条数据线,第二端耦接第一主像素;第二开关,所述第二开关的控制端耦接所述第n条扫描线,第一端耦接所述第m条数据线,第二端耦接第一子像素;第三开关,所述第三开关的控制端耦接第n+1条扫描线,第二端耦接所述第一子像素;第一电容,所述第一电容一端耦接所述第三开关的第一端,另一端耦接公共电极;第二像素单元,包括:第四开关,所述第四开关的控制端耦接第n+1条扫描线,第一端耦接第m条数据线,第二端耦接第二主像素;第五开关,所述第五开关的控制端耦接所述第n+1条扫描线,第一端耦接所述第m条数据线,第二端耦接第二子像素;第六开关,所述第六开关的控制端耦接第n条扫描线,第二端耦接所述第二子像素,其中,n,m为正数;第二电容,所述第二电容一端耦接所述第六开关的第一端,另一端耦接所述公共电极;在第一期间,第n条扫描线导通,所述第一开关,所述第二开关和所述第六开关打开,所述第一开关和所述第二开关分别给所述第一主像素和所述第一子像素充电,所述第六开关通过所述第二电容给所述第二子像素放电;在第二期间,第n+1条扫描线导通,所述第三开关,所述第四开关和所述第五开关打开,所述第四开关和所述第五开关分别给所述第二主像素和所述第二子像素充电,所述第三开关通过所述第一电容给所述第一子像素放电。
本申请的又一目的为一种显示装置,包括:一显示面板,所述显示面板,包括一像素结构,所述像素结构包括多个像素组,每一所述像素组包括:第一像素单元,包括:第一开关,所述第一开关的控制端耦接第n条扫描线,第一端耦接第m条数据线,第二端耦接第一主像素;第二开关,所述第二开关的控制端耦接所述第n条扫描线,第一端耦接所述第m条数据线,第二端耦接第一子像素;第三开关,所述第三开关的控制端耦接第n+1条扫描线,第二端耦接所述第一子像素;第一电容,所述第一电容一端耦接所述第三开关的第一端,另一端耦接公共电极;第二像素单元,包括:第四开关,所述第四开关的控制端耦接第n+1条扫描线,第一端耦接第m条数据线,第二端耦接第二主像素;第五开关,所述第五开关的控制端耦接所述第n+1条扫描线,第一端耦接所述第m条数据线,第二端耦接第二子像素;第六开关,所述第六开关的控制端耦接第n条扫描线,第二端耦接所述第二子像素,其中,n,m为正数;第二电容,所述第二电容一端耦接所述第六开关的第一端,另一端耦接所述公共电极。
在本申请的一实施例中,在第一期间,第n条扫描线导通,所述第一开关,所述第二开关和所述第六开关打开。
在本申请的一实施例中,所述第一开关和所述第二开关分别给所述第一主像素和所述第一子像素充电。
在本申请的一实施例中,所述第六开关通过所述第二电容给所述第二子像素放电。
在本申请的一实施例中,在第二期间,第n+1条扫描线导通,所述第三开关,所述第四开关和所述第五开关打开。
在本申请的一实施例中,所述第四开关和所述第五开关分别给所述第二主像素和所述第二子像素充电。
在本申请的一实施例中,所述第三开关通过所述第一电容给所述第一子像素放电。
在本申请的一实施例中,所述显示面板的数据扫描方式包括点反转,列反转,行反转或帧反转。
本申请通过像素电路及结构的设计,可以解决HSD显示面板的大视角色偏问题,且不会受到显示面板扫描方向的限制。
附图说明
图1为范例性的像素结构示意图。
图2为范例性的像素结构等效电路示意图。
图3为本申请一实施例的像素结构示意图。
图4为本申请一实施例的像素结构等效电路示意图。
图5为本申请一实施例的电容横截面示意图。
图6为本申请又一实施例的电容横截面示意图。
图7为本申请一实施例的显示装置模块图。
具体实施方式
以下各实施例的说明是参考附加的图式,用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本申请,而非用以限制本申请。
附图和说明被认为在本质上是示出性的,而不是限制性的。在图中,结构相似的单元是以相同标号表示。另外,为了理解和便于描述,附图中示出的每个组件的尺寸和厚度是任意示出的,但是本申请不限于此。
在附图中,为了清晰起见,夸大了层、膜、面板、区域等的厚度。在附图中,为了理解和便于描述,夸大了一些层和区域的厚度。将理解的是,当例如层、膜、区域或基底的组件被称作“在”另一组件“上”时,所述组件可以直接在所述另一组件上,或者也可以存在中间组件。
另外,在说明书中,除非明确地描述为相反的,否则词语“包括”将被理解为意指包括所述组件,但是不排除任何其它组件。此外,在说明书中,“在......上”意指位于目标组件上方或者下方,而不意指必须位于基于重力方向的顶部上。
为更进一步阐述本申请为达成预定发明目的所采取的技术手段及功效,以下结合附图及具体的实施例,对依据本申请提出的一种显示面板及显示装置,其具体实施方式、结构、特征及其功效,详细说明如后。
图1为范例性的像素结构示意图及图2为范例性的像素结构等效电路示意图,请参考图1和图2,一种范例性的像素结构10,包括:多条扫描线(Gn,Gn+1),多条数据线Dm,与所述扫描线交叉配置,定义出多个像素区。多个主动开关(图中例示为主动开关111和主动开关112),对应设置于所述像素区,并耦接对应像素区的像素130。其中,相邻的主动开关111和主动开关112耦接不同扫描线,并耦接相同数据线。通过此像素结构的设计,可以使得数据线的数量减半,减少数据驱动芯片(Source Driver)的数量,同时达到驱动整个像素结构的目的。但由于同一数据线连接相邻的两列像素单元,且数量加倍的扫描线使得像素单元的扫描时间缩短,容易出现充电效率不一致,像素单元之间的寄生电容不平衡及信号波形的延迟失真等问题,并使得成型后的显示面板或显示装置出现大视角色偏,垂直亮暗线甚至是伽马反转的现象。
图3为本申请一实施例的像素结构示意图及图4为本申请一实施例的像素结构等效电路示意图。请参考图3和图4,在本申请的一实施例中,一种显示面板,包括一像素结构20,所述像素结构包括多个像素组,每一所述像素组包括:第一像素单元201,包括:第一开关121,所述第一开关121的控制端耦接第n条扫描线,第一端耦接第m条数据线,第二端耦接第一主像素131;第二开关122,所述第二开关122的控制端耦接所述第n条扫描线,第一端耦接所述第m条数据线,第二端耦接第一子像素132;第三开关123,所述第三开关123的控制端耦接第n+1条扫描线,第二端耦接所述第一子像素132;第一电容141,所述第一电容141一端耦接所述第三开关的第一端,另一端耦接公共电极com;第二像素单元202,包括:第四开关124,所述第四开关124的控制端耦接第n+1条扫描线,第一端耦接第m条数据线,第二端耦接第二主像素133;第五开关125,所述第五开关125的控制端耦接所述第n+1条扫描线,第一端耦接所述第m条数据线,第二端耦接第二子像素134;第六开关126,所述第六开关126的控制端耦接第n条扫描线,第二端耦接所述第二子像素134,其中,n,m为正数;第二电容142,所述第二电容142一端耦接所述第六开关的第一端,另一端耦接所述公共电极com。
在一些实施例中,在第一期间,第n条扫描线Gn导通,所述第一开关121,所述第二开关122和所述第六开关126打开。
在一些实施例中,通过数据线Dm,所述第一开关121和所述第二开关122分别给所述第一主像素131和所述第一子像素132充电。
在一些实施例中,所述第六开关126通过所述第二电容142给第二像素单元202的第二子像素134放电。其中,通过所述第二电容142,将第二子像素134的电荷导通至公共电极com。
在一些实施例中,在第二期间,第n+1条扫描线Gn+1导通,所述第三开关123,所述第四开关124和所述第五开关125打开。
在一些实施例中,所述第四开关124和所述第五开关125分别给所述第二主像素133和所述第二子像素134充电。
在一些实施例中,所述第三开关123通过所述第一电容141给所述第一子像素132放电。其中,通过所述第一电容141,将第一子像素132的电荷导通至公共电极com。
图5为本申请一实施例的电容横截面示意图。请参考图3至图5,在本申请的一实施例中,电容31,包括第一金属层301,栅极绝缘层302,保护层303和第二金属层304。在制程上,所述第一金属层301可与所述扫描线通过同一道光罩工艺形成,所述第二金属层可例如为氧化铟锡ITO。所述电容31可为所述第一电容141和所述第二电容142。
图6为本申请又一实施例的电容横截面示意图。请同时参考图3至图6,在本申请的一实施例中,一种显示面板,包括一像素结构20,所述像素结构包括多个像素组,每一所述像素组包括:第一像素单元201,包括:第一开关121,所述第一开关121的控制端耦接第n条扫描线,第一端耦接第m条数据线,第二端耦接第一主像素131;第二开关122,所述第二开关122的控制端耦接所述第n条扫描线,第一端耦接所述第m条数据线,第二端耦接第一子像素132;第三开关123,所述第三开关123的控制端耦接第n+1条扫描线,第二端耦接所述第一子像素132;第一电容141,所述第一电容141一端耦接所述第三开关的第一端,另一端耦接公共电极com;第二像素单元202,包括:第四开关124,所述第四开关124的控制端耦接第n+1条扫描线,第一端耦接第m条数据线,第二端耦接第二主像素133;第五开关125,所述第五开关125的控制端耦接所述第n+1条扫描线,第一端耦接所述第m条数据线,第二端耦接第二子像素134;第六开关126,所述第六开关126的控制端耦接第n条扫描线,第二端耦接所述第二子像素134,其中,n,m为正数;第二电容142,所述第二电容142一端耦接所述第六开关的第一端,另一端耦接所述公共电极com。其中,所述第一电容141和所述第二电容142可为电容32,包括第一金属层301,介质层305和第二金属层304。
在本申请的一实施例中,所述介质层305可例如为栅极绝缘层,绝缘保护层或钝化层中之一,其材料可例如为氮化硅,氧化硅,或铝硅氧化物。所述第一金属层可例如与所述扫描线使用同一材料,于同一道制程工艺形成。所述第二金属层可例如与所述数据线使用同一材料,于同一道制程工艺形成。
请再参考图5和图6,如图5所示,所述第一金属层301和所述第二金属层304之间的距离为所述栅极绝缘层302和所述保护层303的厚度D1。如图6所示,所述第一金属层301和所述第二金属层304之间的距离为所述介质层305的厚度D2,于同一制程设备中,厚度D2可以做到小于厚度D1,且由于金属层(301,304)之间仅为一层的介质层,由于电容的大小与两金属层之间的重叠面积成正比,与两金属层之间的距离成反比,图6的电容32与图5的电容31相比,可以具有更小的面积,就达到相同的电容。基于面积变小,可以提高像素单元的开口率及穿透率。
在一些实施例中,所述显示面板的数据扫描方式包括点反转,列反转,行反转或帧反转。其中,当扫描方向从G1到Gn时(于本实施例中,即由第一期间到第二期间),奇数列的像素起到低色偏的作用。当扫描方向从Gn到G1时(于本实施例中,即由第二期间到第一期间),偶数列的像素起到低色偏的作用。因而,依据扫描方式及其对应扫描方向的变化,所述像素结构20均有一半像素(包括主像素和子像素)起到低色偏的作用。
在一些实施例中,所述第一开关121和所述四开关124通过第一保护层151分别与所述第一主像素131和所述第二主像素133相连。所述第二开关122和所述第三开关123通过第二保护层152与所述第一子像素132相连。所述第五开关125和所述第六开关126通过第二保护层152与所述第二子像素134相连。
在一些实施例中,本申请的显示面板可例如为液晶显示面板,然不限于此,其亦可为OLED显示面板,W-OLED显示面板,QLED显示面板,等离子体显示面板,曲面型显示面板或其他类型显示面板。
图7为本申请一实施例的显示装置模块图。请同时参考图3至图5,一种显示装置1,包括上述各实施例中所述的显示面板2,及其像素结构20。
本申请通过像素电路及结构的设计,可以解决HSD显示面板的大视角色偏问题,提高显示面板的开口率,且不会受到显示面板扫描方向的限制。
“在一些实施例中”及“在各种实施例中”等用语被重复地使用。所述用语通常不是指相同的实施例;但它也可以是指相同的实施例。“包含”、“具有”及“包括”等用词是同义词,除非其前后文意显示出其它意思。
以上所述,仅是本申请的实施例,并非对本申请作任何形式上的限制,虽然本申请已以具体的实施例揭露如上,然而并非用以限定本申请,任何熟悉本专业的技术人员,在不脱离本申请技术方案范围内,当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例,但凡是未脱离本申请技术方案的内容,依据本申请的技术实质对以上实施例所作的任何简单修改、等同变化与修饰,均仍属于本申请技术方案的范围内。
Claims (10)
1.一种显示面板,其特征在于,包括一像素结构,所述像素结构包括多个像素组,每一所述像素组包括:
第一像素单元,包括:
第一开关,所述第一开关的控制端耦接第n条扫描线,第一端耦接第m条数据线,第二端耦接第一主像素;
第二开关,所述第二开关的控制端耦接所述第n条扫描线,第一端耦接所述第m条数据线,第二端耦接第一子像素;
第三开关,所述第三开关的控制端耦接第n+1条扫描线,第二端耦接所述第一子像素;
第一电容,所述第一电容一端耦接所述第三开关的第一端,另一端耦接公共电极;
第二像素单元,包括:
第四开关,所述第四开关的控制端耦接第n+1条扫描线,第一端耦接第m条数据线,第二端耦接第二主像素;
第五开关,所述第五开关的控制端耦接所述第n+1条扫描线,第一端耦接所述第m条数据线,第二端耦接第二子像素;
第六开关,所述第六开关的控制端耦接第n条扫描线,第二端耦接所述第二子像素,其中,n,m为正数;
第二电容,所述第二电容一端耦接所述第六开关的第一端,另一端耦接所述公共电极。
2.如权利要求1所述的显示面板,其特征在于,在第一期间,第n条扫描线导通,所述第一开关,所述第二开关和所述第六开关打开。
3.如权利要求2所述的显示面板,其特征在于,所述第一开关和所述第二开关分别给所述第一主像素和所述第一子像素充电。
4.如权利要求3所述的显示面板,其特征在于,所述第六开关通过所述第二电容给所述第二子像素放电。
5.如权利要求1所述的显示面板,其特征在于,在第二期间,第n+1条扫描线导通,所述第三开关,所述第四开关和所述第五开关打开。
6.如权利要求5所述的显示面板,其特征在于,所述第四开关和所述第五开关分别给所述第二主像素和所述第二子像素充电。
7.如权利要求6所述的显示面板,其特征在于,所述第三开关通过所述第一电容给所述第一子像素放电。
8.如权利要求1所述的显示面板,其特征在于,所述显示面板的数据扫描方式包括点反转,列反转,行反转或帧反转。
9.一种显示面板,其特征在于,包括一像素结构,所述像素结构包括多个像素组,每一所述像素组包括:
第一像素单元,包括:
第一开关,所述第一开关的控制端耦接第n条扫描线,第一端耦接第m条数据线,第二端耦接第一主像素;
第二开关,所述第二开关的控制端耦接所述第n条扫描线,第一端耦接所述第m条数据线,第二端耦接第一子像素;
第三开关,所述第三开关的控制端耦接第n+1条扫描线,第二端耦接所述第一子像素;
第一电容,所述第一电容一端耦接所述第三开关的第一端,另一端耦接公共电极;
第二像素单元,包括:
第四开关,所述第四开关的控制端耦接第n+1条扫描线,第一端耦接第m条数据线,第二端耦接第二主像素;
第五开关,所述第五开关的控制端耦接所述第n+1条扫描线,第一端耦接所述第m条数据线,第二端耦接第二子像素;
第六开关,所述第六开关的控制端耦接第n条扫描线,第二端耦接所述第二子像素,其中,n,m为正数;
第二电容,所述第二电容一端耦接所述第六开关的第一端,另一端耦接所述公共电极;
在第一期间,第n条扫描线导通,所述第一开关,所述第二开关和所述第六开关打开,所述第一开关和所述第二开关分别给所述第一主像素和所述第一子像素充电,所述第六开关通过所述第二电容给所述第二子像素放电;
在第二期间,第n+1条扫描线导通,所述第三开关,所述第四开关和所述第五开关打开,所述第四开关和所述第五开关分别给所述第二主像素和所述第二子像素充电,所述第三开关通过所述第一电容给所述第一子像素放电。
10.一种显示装置,其特征在于,包括如权利要求1至9中任一项所述的显示面板。
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CN108919583A (zh) * | 2018-09-11 | 2018-11-30 | 惠科股份有限公司 | 显示面板 |
CN111210783A (zh) * | 2018-11-22 | 2020-05-29 | 惠科股份有限公司 | 画素结构及其显示面板 |
WO2023028883A1 (zh) * | 2021-08-31 | 2023-03-09 | 京东方科技集团股份有限公司 | 显示基板及显示面板 |
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CN104166287A (zh) * | 2014-08-13 | 2014-11-26 | 深圳市华星光电技术有限公司 | 阵列基板以及液晶显示装置 |
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WO2023028883A1 (zh) * | 2021-08-31 | 2023-03-09 | 京东方科技集团股份有限公司 | 显示基板及显示面板 |
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