CN108242394A - A kind of silicon carbide mos gated power device and preparation method thereof - Google Patents

A kind of silicon carbide mos gated power device and preparation method thereof Download PDF

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Publication number
CN108242394A
CN108242394A CN201611224421.8A CN201611224421A CN108242394A CN 108242394 A CN108242394 A CN 108242394A CN 201611224421 A CN201611224421 A CN 201611224421A CN 108242394 A CN108242394 A CN 108242394A
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silicon carbide
ion
epitaxial film
power device
gated power
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Inventor
郑柳
杨霏
李玲
夏经华
桑玲
李嘉琳
田亮
查祎英
杜玉杰
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State Grid Corp of China SGCC
State Grid Shandong Electric Power Co Ltd
Global Energy Interconnection Research Institute
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State Grid Corp of China SGCC
State Grid Shandong Electric Power Co Ltd
Global Energy Interconnection Research Institute
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Priority to CN201611224421.8A priority Critical patent/CN108242394A/en
Publication of CN108242394A publication Critical patent/CN108242394A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H01L21/0465Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The present invention provides a kind of silicon carbide mos gated power devices and preparation method thereof, the front that the preparation method is included in silicon carbide substrates forms epitaxial film, and using the upper surface injection ion of epitaxial film described in the ion implanting of falling doping type normal direction, form doped well region;Source contact area and base contact regions are respectively formed to the injection of falling doped well region ion;In the upper surface of epitaxial film, deposit metal is respectively formed gate electrode and source electrode, and at the back side of silicon carbide substrates, deposit metal forms drain electrode.Compared with prior art, a kind of silicon carbide mos gated power device provided by the invention and preparation method thereof, can to avoid silicon carbide mos gated power device bear reversely pressure resistance when because the break-through of well region bottom due to lead to component failure or damage.

Description

A kind of silicon carbide mos gated power device and preparation method thereof
Technical field
The present invention relates to technical field of semiconductor device, and in particular to a kind of silicon carbide mos gated power device and its system Preparation Method.
Background technology
Carbofrax material has broad-band gap, high breakdown field strength, high heat conductance, high saturated electrons migration rate and fabulous The characteristics such as physical and chemical stability, suitable for high temperature, high frequency, the work of high-power and extreme environment.Silicon carbide is uniquely may be used To generate SiO by thermal oxide2The wide bandgap semiconductor materials of dielectric layer so that silicon carbide is especially suitable for preparing various MOS knots The semiconductor devices of structure, silicon carbide mos power device have as a kind of unipolar device than silicon IGBT device more high voltage energy Power and more high power capacity, and frequency higher, power consumption smaller.However well region uses in traditional silicon carbide mos power device Box injection, if implantation concentration is too small, device bears the easy break-through in well region bottom during reversed pressure resistance, leads to device voltage endurance capability Decline or premature deterioration;If implantation concentration is too big, device grids threshold voltage can be caused excessively high, device grid-control reduced capability.
Invention content
In order to meet the defects of overcoming the prior art, the present invention provides a kind of silicon carbide mos gated power device and its Preparation method.
In a first aspect, a kind of technical solution of the preparation method of silicon carbide mos gated power device is in the present invention:
The preparation method includes:
Epitaxial film is formed, and using epitaxial film described in the ion implanting of falling doping type normal direction in the front of silicon carbide substrates Upper surface injection ion, formed fall doped well region;
Source contact area and base contact regions are respectively formed to the injection of the falling doped well region ion;
In the upper surface of the epitaxial film, deposit metal is respectively formed gate electrode and source electrode, in the silicon carbide substrates The back side deposit metal formed drain electrode.
Further, an optimal technical scheme provided by the invention is:It is described to use the ion implanting of falling doping type normal direction Include before the upper surface injection ion of epitaxial film:
The silicon carbide substrates and epitaxial film are cleaned using RCA standard cleanings method;
The upper surface of epitaxial film after the cleaning forms ion implantation mask layer;
The upper surface of the ion implantation mask layer formed ion implanting window, and by the ion implanting window to Epitaxial film injects ion.
Further, an optimal technical scheme provided by the invention is:It is described to use the ion implanting of falling doping type normal direction The upper surface injection ion of epitaxial film includes:It is injected using single ion injection method or multistep ion implantation to epitaxial film Ion.
Further, an optimal technical scheme provided by the invention is:
The temperature of the ion implantation of falling doping type is 0~1000 DEG C, and ion implantation energy is 1kev~100MeV, from Sub- implantation dosage is 1 × 1010-1×1016(atom/cm-2)。
Second aspect, the present invention in a kind of technical solution of silicon carbide mos gated power device be:
The silicon carbide mos gated power device includes:
Silicon carbide substrates;
Epitaxial film is arranged on the front of the silicon carbide substrates;
Doped well region is arranged in the epitaxial film;The doped well region is to pass through the ion of falling doping type to note Enter the well region that the upper surface injection ion of epitaxial film described in normal direction is formed;
Source contact area and base contact regions;The source contact area and base contact regions are arranged at the dopant well In area;
Gate electrode, source electrode and drain electrode;The gate electrode and source electrode are arranged at the upper surface of the epitaxial film; The drain electrode is arranged on the back side of the silicon carbide substrates.
Further, an optimal technical scheme provided by the invention is:
The silicon carbide substrates are N-shaped or p-type silicon carbide, and the silicon carbide is 4H-SiC or 6H-SiC;
The thickness of the epitaxial film is 0.1 μm -500 μm, and doping concentration is 1 × 1013-1×1021cm-3
It is described fall doped well region Doped ions for Nitrogen ion, phosphonium ion, aluminium ion or boron ion, the Doped ions A concentration of 1 × 1010-1×1016cm-2
Further, an optimal technical scheme provided by the invention is:The silicon carbide mos gated power device also wraps Ion implantation mask layer is included, is arranged on the upper surface of the epitaxial film;
The ion implantation mask layer includes ion implanting window.
Further, an optimal technical scheme provided by the invention is:
The ion implantation mask layer is the single film layer being made of silicon, silicon oxide compound, silicon-nitrogen compound or metal; Alternatively,
The ion implantation mask layer is by least two material structures in silicon, silicon oxide compound, silicon-nitrogen compound and metal Into multi-layer thin film layer;The thickness of each film layer is 0.001~200 μm in the multi-layer thin film layer.
Further, an optimal technical scheme provided by the invention is:
The length and width or radius of the ion implanting window are 0.01 μm~50cm;
The ion implanting window is interdigital structure or parallel strip or circular ring shape or rectangular, the parallel strip packet Include multiple parallel rectangles;Alternatively, the ion implanting window is includes the interdigital structure, parallel strip, circular ring shape With it is rectangular at least two shapes composite figure.
Further, an optimal technical scheme provided by the invention is:The silicon carbide mos gated power device is carbon SiClx MOSFET, silicon carbide IGBT or silicon carbide mos GCT.
Compared with the immediate prior art, the beneficial effects of the invention are as follows:
1st, the preparation method of a kind of silicon carbide mos gated power device provided by the invention is noted using the ion of falling doping type Doped well region can be formed down by entering normal direction epitaxial film injection ion, and the ion doping concentration of bottom is more than top in doped well region The ion doping concentration in portion, can to avoid silicon carbide mos gated power device bear reversely pressure resistance when because of the break-through of well region bottom And lead to component failure or damage.
2nd, a kind of silicon carbide mos gated power device provided by the invention, including falling doped well region, and doped well region The ion doping concentration of middle bottom is more than the ion doping concentration at top, therefore can be to avoid silicon carbide mos gated power device Lead to component failure or damage when bearing reversely pressure resistance because the break-through of well region bottom.
Description of the drawings
Fig. 1:The preparation method implementing procedure figure of a kind of silicon carbide mos gated power device in the embodiment of the present invention;
Fig. 2:Epitaxial film schematic diagram in the embodiment of the present invention;
Fig. 3:Intermediate ion injection masking layer schematic diagram of the embodiment of the present invention;
Fig. 4:Intermediate ion of the embodiment of the present invention injects window schematic diagram;
Fig. 5:The schematic diagram of falling doped well region in the embodiment of the present invention;
Fig. 6:Silicon carbide mos gated power device cross-section schematic diagram in the embodiment of the present invention;
Fig. 7:In the embodiment of the present invention fall doped well region Doped ions concentration distribution schematic diagram;
Wherein, 11:Silicon carbide substrates;12:Epitaxial film;13:Ion implantation mask layer;14:Include ion implanting window Ion implantation mask layer;15:Doped well region;16:Gate electrode;17:Source electrode;18:Drain electrode.
Specific embodiment
Purpose, technical scheme and advantage to make the embodiment of the present invention are clearer, below in conjunction with the embodiment of the present invention In attached drawing, the technical solution in the embodiment of the present invention is clearly and completely illustrated, it is clear that described embodiment is Part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art All other embodiments obtained without making creative work shall fall within the protection scope of the present invention.
Separately below with reference to attached drawing, to a kind of preparation of silicon carbide mos gated power device provided in an embodiment of the present invention Method illustrates.
Fig. 1 is a kind of preparation method implementing procedure figure of silicon carbide mos gated power device in the embodiment of the present invention, is such as schemed Shown, the present embodiment can prepare silicon carbide mos gated power device as steps described below, specially:
Step S101:Epitaxial film is formed, and outside using the ion implantation of falling doping type in the front of silicon carbide substrates Prolong the upper surface injection ion of film, form doped well region.
Step S102:Source contact area and base contact regions are respectively formed to the injection of falling doped well region ion.
Step S103:In the upper surface of epitaxial film, deposit metal is respectively formed gate electrode and source electrode, is served as a contrast in silicon carbide The back side deposit metal at bottom forms drain electrode.
Doped well region can be formed down to epitaxial film injection ion using the ion implantation of falling doping type in the present embodiment, The ion doping concentration of bottom, can be to avoid silicon carbide mos grid-control work(more than the ion doping concentration at top in doped well region Rate device bear reversely pressure resistance when because the break-through of well region bottom due to lead to component failure or damage.
Further, step S101 can also include the following steps in the present embodiment, specially:
1st, after forming epitaxial film in the front of silicon carbide substrates, using RCA standard cleanings method to silicon carbide substrates and Epitaxial film is cleaned.RCA standard cleaning methods are briefly described below, specially:
(1) cleaning solution is configured.Wherein, the mixed solution of hydrofluoric acid HF and distilled water H2O, hydrogen fluorine are used in the present embodiment Sour HF and distilled water H2The ratio of O is 1:10.
(2) with step (1) be configured cleaning solution cleaning sample stent and dry up, silicon carbide sample is fixed on stent On.
(3) 3# solution is configured, the stent for being fixed with silicon carbide sample is placed in 250 DEG C of 3# solution and cleans 15min, clearly End is washed later with hot water injection's stent.Wherein, 3# solution is the mixed solution of sulfuric acid and hydrogen peroxide, sulfuric acid and oxydol H2O2 Ratio be 3:1.
(4) 1# solution is configured, after 1# solution is heated to 75~85 DEG C and continues 10~20min, silicon carbide will be fixed with The stent of sample is placed on 10~20min of cleaning in 1# solution, and cleaning uses hot water injection's stent after terminating.Wherein, 1# solution is Ammonium hydroxide, oxydol H2O2With distilled water H2The mixed solution of O, ammonium hydroxide, oxydol H2O2With distilled water H2The ratio of O is 1:1:5~ 1:1:7。
(5) 2# solution is configured, the stent for being fixed with silicon carbide sample is placed in 2# solution and cleans 15min, cleaning terminates Hot water injection's stent is used later.Wherein, 2# solution is hydrochloric acid, oxydol H2O2With distilled water H2The mixed solution of O, hydrochloric acid, dioxygen Water H2O2With distilled water H2The ratio of O is 1:1:5.
(6) 5~10s of stent for being fixed with silicon carbide sample is cleaned with a concentration of 10% hydrofluoric acid HF, to remove carbonization The oxide layer on silicon sample surface.
(7) the stent 20min for being fixed with silicon carbide sample is cleaned with deionized water.
2nd, the upper surface of epitaxial film after cleaning forms ion implantation mask layer.
3rd, ion implanting window is formed in the upper surface of ion implantation mask layer.
4th, ion is injected to the upper surface of epitaxial film by ion implanting window using the ion implantation of falling doping type.This Single ion injection method may be used in embodiment, multistep ion implantation can also be used to inject ion to epitaxial film.Its In:The temperature for the ion implantation of falling doping type be 0~1000 DEG C, ion implantation energy be 1kev~100MeV, ion implanting agent Measure is 1 × 1010-1×1016(atom/cm-2)。
Fig. 7 be the embodiment of the present invention in fall doped well region Doped ions concentration distribution schematic diagram, wherein, each Doped ions The injection condition of concentration distribution is as shown in table 1.
Table 1
Implantation Energy 30kev 45kev 120kev 250kev 300kev 350kev 450kev Total
Implantation dosage 1.65e+12 2.3e+12 1.26e+13 8.3e+13 9.3e+13 1.0e+14 1.15e+13 3.0e+14
The present invention also provides a kind of silicon carbide mos gated power device, and provide specific embodiment.
Silicon carbide mos gated power device includes silicon carbide substrates, epitaxial film, doped well region, source in the present embodiment Pole contact zone, base contact regions, gate electrode, source electrode and drain electrode.
Wherein, epitaxial film is arranged on the front of silicon carbide substrates, and source contact area and base contact regions are arranged at institute It states down in doped well region, gate electrode and source electrode are arranged at the upper surface of epitaxial film, and drain electrode is arranged on silicon carbide substrates The back side.
Doped well region is arranged in epitaxial film.Doped well region is fallen in the present embodiment to pass through the ion implanting of falling doping type The well region that the upper surface injection ion of normal direction epitaxial film is formed.
The ion doping concentration of bottom in doped well region of being fallen in the present embodiment is more than the ion doping concentration at top, therefore can To avoid silicon carbide mos gated power device bear reversely pressure resistance when because the break-through of well region bottom due to lead to component failure or damage It is bad.
Further, it may be p-type silicon carbide, wherein carbon that silicon carbide substrates, which can be N-shaped silicon carbide, in the present embodiment SiClx may be used as 4H-SiC or 6H-SiC.The thickness of epitaxial film can be 0.1 μm -500 μm, doping concentration for 1 × 1013-1×1021cm-3.The Doped ions of doped well region be Nitrogen ion, phosphonium ion, aluminium ion or boron ion, Doped ions A concentration of 1 × 1010-1×1016cm-2
Further, silicon carbide mos gated power device can also include ion implantation mask layer in the present embodiment, should be from Sub- injection masking layer is arranged on the upper surface of epitaxial film, and including ion implanting window.
Wherein, ion implantation mask layer can be the single thin layer being made of silicon, silicon oxide compound, silicon-nitrogen compound or metal Film layer, or the multi-layer thin film layer being made of at least two materials in silicon, silicon oxide compound, silicon-nitrogen compound and metal, The thickness of each film layer is 0.001~200 μm in multi-layer thin film layer.
The length and width or radius of ion implanting window are 0.01 μm~50cm.
Ion implanting window can be interdigital structure or parallel strip or circular ring shape or rectangular, or comprising interdigital Structure, parallel strip, circular ring shape and it is rectangular at least two shapes composite figure.Wherein, parallel strip includes multiple Parallel rectangle.
Further, silicon carbide mos gated power device can be silicon carbide MOSFET, silicon carbide IGBT in the present embodiment Or silicon carbide mos GCT.
The present invention also provides the preferred embodiment of a silicon carbide mos gated power device, below in conjunction with the accompanying drawings to this The preparation method of silicon carbide mos gated power device is described in detail.
1st, epitaxial film is prepared
Fig. 2 is epitaxial film schematic diagram in the embodiment of the present invention, as shown in the figure, in silicon carbide substrates 11 in the present embodiment Front forms epitaxial film 12, and cleaning sic substrate 11 and epitaxial film 12.Wherein:Silicon carbide substrates 11 are N-shaped 4H- SiC, thickness are 380 μm, and Doped ions are Nitrogen ion N, and doping concentration is 5 × 1018cm-3.Epitaxial film 12 is N-shaped 4H-SiC, Thickness is 12 μm, and Doped ions are Nitrogen ion N, and doping concentration is 8 × 1018cm-3
2nd, ion implantation mask layer is prepared
Fig. 3 is intermediate ion injection masking layer schematic diagram of the embodiment of the present invention, as shown in the figure, using PECVD in the present embodiment Deposition method forms ion implantation mask layer 13 in the upper surface of epitaxial film 12.Wherein:Ion implantation mask layer 13 is by two The single film layer that silica is formed, thickness are 2 μm.
3rd, ion implanting window is prepared
Fig. 4 injects window schematic diagram for intermediate ion of the embodiment of the present invention, as shown in the figure, in the present embodiment, to ion implanting Mask layer 13 carries out lithography and etching, forms ion implanting window 14.Wherein:Ion implanting window 14 is the side of 10 μm of 10 μ m Shape ion implanting window.
4th, prepare doped well region
Fig. 5 be the embodiment of the present invention in the schematic diagram of falling doped well region, as shown in the figure, in the present embodiment using doping type from Sub- injection method injects aluminium ion Al by ion implanting window 14 to epitaxial film 12, forms doped well region 15.
5th, the electrode of silicon carbide mos gated power device is prepared
Fig. 6 is silicon carbide mos gated power device cross-section schematic diagram in the embodiment of the present invention, as shown in the figure, to mixing Miscellaneous well region 15 injects ion and is respectively formed source contact area and base contact regions, epitaxial film upper surface deposited metal simultaneously Lithography and etching is carried out to the metal layer and forms gate electrode 16 and source electrode 17, in the back side deposited metal of silicon carbide substrates, And lithography and etching is carried out to the metal layer and forms drain electrode 18.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art God and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies Within, then the present invention is also intended to include these modifications and variations.

Claims (10)

1. a kind of preparation method of silicon carbide mos gated power device, which is characterized in that the preparation method includes:
Epitaxial film is formed, and using the upper of epitaxial film described in the ion implanting of falling doping type normal direction in the front of silicon carbide substrates Ion is injected on surface, forms doped well region;
Source contact area and base contact regions are respectively formed to the injection of the falling doped well region ion;
In the upper surface of the epitaxial film, deposit metal is respectively formed gate electrode and source electrode, in the back of the body of the silicon carbide substrates Face deposit metal forms drain electrode.
2. a kind of preparation method of silicon carbide mos gated power device as described in claim 1, which is characterized in that described to adopt Included before to the upper surface injection ion of epitaxial film with the ion implantation of falling doping type:
The silicon carbide substrates and epitaxial film are cleaned using RCA standard cleanings method;
The upper surface of epitaxial film after the cleaning forms ion implantation mask layer;
Ion implanting window is formed in the upper surface of the ion implantation mask layer, and by the ion implanting window to extension Film injects ion.
3. a kind of preparation method of silicon carbide mos gated power device as described in claim 1, which is characterized in that described to adopt Included with the ion implantation of falling doping type to the upper surface injection ion of epitaxial film:Using single ion injection method or multistep from Sub- injection method injects ion to epitaxial film.
4. a kind of preparation method of silicon carbide mos gated power device as described in claim 1, which is characterized in that
The temperature of the ion implantation of falling doping type is 0~1000 DEG C, and ion implantation energy is 1kev~100MeV, and ion is noted It is 1 × 10 to enter dosage10-1×1016(atom/cm-2)。
5. a kind of silicon carbide mos gated power device, which is characterized in that the silicon carbide mos gated power device includes:
Silicon carbide substrates;
Epitaxial film is arranged on the front of the silicon carbide substrates;
Doped well region is arranged in the epitaxial film;The doped well region is passes through the ion implantation of falling doping type The well region formed to the upper surface injection ion of the epitaxial film;
Source contact area and base contact regions;The source contact area and base contact regions are arranged at the doped well region It is interior;
Gate electrode, source electrode and drain electrode;The gate electrode and source electrode are arranged at the upper surface of the epitaxial film;It is described Drain electrode is arranged on the back side of the silicon carbide substrates.
6. a kind of silicon carbide mos gated power device as claimed in claim 5, which is characterized in that
The silicon carbide substrates are N-shaped or p-type silicon carbide, and the silicon carbide is 4H-SiC or 6H-SiC;
The thickness of the epitaxial film is 0.1 μm -500 μm, and doping concentration is 1 × 1013-1×1021cm-3
It is described fall doped well region Doped ions for Nitrogen ion, phosphonium ion, aluminium ion or boron ion, the concentration of the Doped ions It is 1 × 1010-1×1016cm-2
A kind of 7. silicon carbide mos gated power device as claimed in claim 5, which is characterized in that the silicon carbide mos grid-control Power device further includes ion implantation mask layer, is arranged on the upper surface of the epitaxial film;
The ion implantation mask layer includes ion implanting window.
8. a kind of silicon carbide mos gated power device as claimed in claim 7, which is characterized in that
The ion implantation mask layer is the single film layer being made of silicon, silicon oxide compound, silicon-nitrogen compound or metal;Or Person,
The ion implantation mask layer is made of at least two materials in silicon, silicon oxide compound, silicon-nitrogen compound and metal Multi-layer thin film layer;The thickness of each film layer is 0.001~200 μm in the multi-layer thin film layer.
9. a kind of silicon carbide mos gated power device as claimed in claim 7, which is characterized in that
The length and width or radius of the ion implanting window are 0.01 μm~50cm;
The ion implanting window is interdigital structure or parallel strip or circular ring shape or rectangular, and the parallel strip includes more A parallel rectangle;Alternatively, the ion implanting window is includes the interdigital structure, parallel strip, circular ring shape and side The composite figure of at least two shapes in shape.
A kind of 10. silicon carbide mos gated power device as claimed in claim 5, which is characterized in that the silicon carbide mos grid Control power device is silicon carbide MOSFET, silicon carbide IGBT or silicon carbide mos GCT.
CN201611224421.8A 2016-12-27 2016-12-27 A kind of silicon carbide mos gated power device and preparation method thereof Pending CN108242394A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109473485A (en) * 2018-12-29 2019-03-15 重庆伟特森电子科技有限公司 Silicon carbide diode and preparation method thereof

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