CN108231871B - MoS (MoS) 2 Base quantum well type modulation doped field effect transistor and preparation method thereof - Google Patents

MoS (MoS) 2 Base quantum well type modulation doped field effect transistor and preparation method thereof Download PDF

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CN108231871B
CN108231871B CN201810097611.0A CN201810097611A CN108231871B CN 108231871 B CN108231871 B CN 108231871B CN 201810097611 A CN201810097611 A CN 201810097611A CN 108231871 B CN108231871 B CN 108231871B
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quantum well
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CN108231871A (en
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李国强
黄烈根
王文樑
郑昱林
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South China University of Technology SCUT
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Abstract

The invention belongs to the technical field of microelectronic devices, and discloses a MoS 2 A base quantum well type modulation doped field effect transistor and a preparation method thereof. MoS (MoS) 2 The base quantum well type modulation doped field effect transistor sequentially comprises a substrate, an AlN buffer layer, an AlGaN buffer layer, a GaN layer and a quantum well type structural layer from bottom to top, wherein the quantum well type structural layer is MoS 2x Se 2(1‑x) layer/MoS 2 layer/MoS 2x Se 2(1‑x) A layer; a source electrode, a drain electrode and a gate electrode are arranged above the quantum well type structure layer; the gate electrode is disposed between the source electrode and the drain electrode. The invention adopts a quantum well type structure, two parallel heterogeneous interfaces exist in the structure, and the maximum current thin layer and the current are doubled; moS (MoS) 2 The channel layer is sandwiched between two barriers, which can better confine carriers. In summary, the transistor of the present invention has excellent performance.

Description

MoS (MoS) 2 Base quantum well type modulation doped field effect transistor and preparation method thereof
Technical Field
The invention belongs to the field of microelectronic devices, relates to a semiconductor device and a related preparation process, and in particular relates to a MoS 2 A base quantum well type modulation doped field effect transistor (MODFET) and a method for manufacturing the same.
Background
In recent years, with the rapid development of microelectronic technology and urgent demands in related fields such as aerospace, electronic countermeasure, radar communication and the like, the development of novel high-frequency and high-power semiconductor devices has received more and more attention. Bipolar transistors (BJFs) and power Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) have been widely used for high power applications. BJFs are few-sub devices whose power handling capability is not limited at higher operating frequencies. The manufacturing process of the MOSFET is complex, the ridge capacitance is large, and the frequency characteristic of the MOSFET is seriously influenced. The modulation doped channel of the MODFET can avoid impurity scattering which plays a main role at low temperature, so that the modulation doped channel has excellent mobility, and the MODFET can be better applied to the field of high-frequency microwaves.
MODFETs mainly employ III-V compound semiconductor materials such as gallium arsenide, but their relatively low bow tie breakdown electric field and thermal conductivity limit their application in high power applications. Two-dimensional transition metal chalcogenides have received extensive attention due to their abundant electrical, optical, mechanical, chemical and physical properties. In particular molybdenum disulphide (MoS) 2 ) MoS as a wide bandgap (1.8 eV monolayer) low-dimensional semiconductor material 2 The material has good application in low static power consumption and high switching ratio devices, and is a potential post-silicon material.
Under the background, moS with excellent structure and excellent performance is designed and prepared 2 The base MODFET is particularly important.
Disclosure of Invention
In order to overcome the disadvantages and shortcomings of the prior art, the present invention aims to provide a MoS 2 A base quantum well type modulation doped field effect transistor.
Another object of the present invention is to provide the MoS 2 A preparation method of a base quantum well type modulation doped field effect transistor.
The aim of the invention is achieved by the following technical scheme:
MoS (MoS) 2 The base quantum well type modulation doped field effect transistor sequentially comprises a substrate, an AlN buffer layer, an AlGaN buffer layer, a GaN layer and a quantum well type structural layer from bottom to top, wherein the quantum well type structural layer is MoS 2x Se 2(1-x) layer/MoS 2 layer/MoS 2x Se 2(1-x) A layer; a source electrode, a drain electrode and a gate electrode are arranged above the quantum well type structure layer; the gate electrode is disposed between the source electrode and the drain electrode.
The substrate comprises sapphire, si, siC, gaN, znO, liGaO 2 、LaSrAlTaO 6 Al or Cu.
MoS in quantum well type structure layer 2x Se 2(1-x) The layers are the same or different, and x is more than or equal to 0.2 and less than or equal to 0.9;
source and drain electrodes MoO 3 Au, ti/Al/Ni/Au or Ni/Au, au being located at the topmost layer;
the gate electrode is ZrO 2 Ni or TiO 2 /Ni，ZrO 2 、TiO 2 Is arranged above the quantum well type structure layer.
MoS 2x Se 2(1-x) The thickness of the layer is 10-30nm, moS 2 The thickness of the layer is 5-20nm; the thickness of the AlN buffer layer is 100-250nm; the thickness of the AlGaN buffer layer is 300-500 nm, and the Al/N mole ratio in the AlGaN buffer layer is=0.1-0.9; the thickness of the GaN layer is 400-1500 nm.
The MoS 2 The preparation method of the base quantum well type modulation doped field effect transistor comprises the following steps:
(1) Sequentially growing an AlN buffer layer, an AlGaN buffer layer and a GaN layer on a substrate by a metal organic vapor phase epitaxy method;
(2) By molecular beam epitaxy (MoO) 3 Growing MoS on GaN layer by using S powder and Se powder as sources 2x Se 2(1-x) A layer, wherein x is more than or equal to 0.2 and less than or equal to 0.9;
(3) By molecular beam epitaxy (MoO) 3 And S powder as a source, moS in step (2) 2x Se 2(1-x) Growth of MoS on layer 2 A layer;
(4) By molecular beam epitaxy (MoO) 3 S powder and Se powder as sources, in MoS 2 Growth of MoS on layer 2x Se 2(1-x) A layer, wherein x is more than or equal to 0.2 and less than or equal to 0.9;
(5) MoS in step (4) by electron beam evaporation and stripping techniques 2x Se 2(1-x) Depositing a metal layer on the layer to form an ohmic contact electrode serving as a source/drain electrode;
(6) MoS in step (4) by electron beam evaporation and stripping techniques 2x Se 2(1-x) Depositing gold on a layerAnd forming a Schottky contact electrode serving as a gate electrode.
MoS in step (4) in step (5) 2x Se 2(1-x) Depositing a metal layer on the layer means MoS in step (4) 2x Se 2(1-x) Deposition of MoO on layers in sequence 3 And (3) carrying out high-temperature annealing on the four layers of metal of/Au, ti/Al/Ni/Au or the two layers of metal of Ni/Au to form an ohmic contact electrode. The high-temperature annealing temperature is 700-900 ℃.
MoS in step (4) in step (6) 2x Se 2(1-x) Depositing a metal layer on the layer means MoS in step (4) 2x Se 2(1-x) Deposition of ZrO on layers in sequence 2 Ni or TiO 2 and/Ni, forming a Schottky contact electrode as a gate electrode.
Compared with the prior art, the invention has the beneficial effects that: the transistor of the invention comprises a quantum well structure MoS 2x Se 2(1-x) /MoS 2 /MoS 2x Se 2(1-x) In MoS 2x Se 2(1-x) /MoS 2 /MoS 2x Se 2(1-x) In the quantum well structure, two parallel heterogeneous interfaces exist, so that the maximum current thin layer and the current are doubled; moS (MoS) 2 The channel layer is sandwiched between two barriers, which can better confine carriers. At the same time MoO 3 The electrode structure of/Au is advantageous in reducing the contact resistance of the source/drain electrode. In summary, the transistor of the present invention has excellent performance.
Drawings
FIG. 1 is a MoS of the present invention 2 A structure schematic diagram of a base quantum well type modulation doped field effect transistor; 1-a substrate; a 2-AlN buffer layer; 3-AlGaN buffer layer; a 4-GaN layer; 5-MoS 2x Se 2(1-x) A layer; 6-MoS 2 A layer; 7-MoS 2x Se 2(1-x) A layer; 8-a source electrode; 9-a drain electrode; 10-gate electrode.
Detailed Description
The present invention will be described in further detail with reference to specific examples and drawings, but embodiments of the present invention are not limited thereto.
MoS of the invention 2 Structure of base quantum well type modulation doped field effect transistorThe schematic diagram is shown in figure 1, and comprises a substrate 1, an AlN buffer layer 2, an AlGaN buffer layer 3, a GaN layer 4 and MoS from bottom to top 2x Se 2(1-x) Layer 5, moS 2 Layer 6, moS 2x Se 2(1-x) Layer 7, moS 2x Se 2(1-x) Layer 5/MoS 2 Layer 6/MoS 2x Se 2(1-x) Layer 7 is a quantum well structure layer; a source electrode, a drain electrode and a gate electrode are arranged above the quantum well structure layer; the gate electrode is disposed between the source electrode and the drain electrode.
The substrate comprises sapphire, si, siC, gaN, znO, liGaO 2 、LaSrAlTaO 6 Al or Cu.
Quantum well type structure MoS 2x Se 2(1-x) /MoS 2 /MoS 2x Se 2(1-x) X is more than or equal to 0.2 and less than or equal to 0.9; the source electrode and the drain electrode have the structure of MoO 3 /Au，MoO 3 The quantum well type structure layer is arranged above the quantum well type structure layer; the gate electrode is ZrO 2 /Ni，ZrO 2 Is arranged above the quantum well type structure layer.
MoS 2x Se 2(1-x) The thickness of the layer is 10-30nm, moS 2 The thickness of the layer is 5-20nm; the thickness of the AlN buffer layer is 100-250nm; the thickness of the AlGaN buffer layer is 300-500 nm, and the Al/N molar ratio=0.1-0.9; the thickness of the GaN layer is 400-1500 nm.
Example 1
MoS of the present embodiment 2 The base quantum well type modulation doped field effect transistor sequentially comprises a Si substrate, an AlN buffer layer with the thickness of 100nm and Al with the thickness of 300nm from bottom to top 0.7 Ga 0.3 N buffer layer, gaN layer with thickness of 400nm and MoS with thickness of 15nm 1.4 Se 0.6 Layer, 7nm MoS 2 MoS with thickness of 15nm 1.4 Se 0.6 A layer, a source electrode with a thickness of 2nm, a drain electrode with a thickness of 2nm, and a gate electrode with a thickness of 2 nm.
MoS of the present embodiment 2 The preparation method of the base quantum well type modulation doped field effect transistor comprises the following steps:
(1) At room temperature, placing a monocrystalline Si (111) substrate into 10% hydrofluoric acid solution with volume percentage, ultrasonically cleaning for 30 seconds, ultrasonically cleaning for 60 seconds by using deionized water, and finally placing the monocrystalline Si (111) substrate into a spin dryer, and drying the monocrystalline Si substrate by using high-purity dry nitrogen for later use;
(2) Delivering the monocrystalline Si (111) substrate into an MOCVD reaction chamber, keeping the temperature of the reaction chamber at 1000 ℃, keeping the air pressure at 100Torr, introducing ammonia gas, hydrogen gas and trimethylaluminum, and growing an AlN buffer layer with the thickness of 100nm on the monocrystalline Si (111) substrate;
(3) The temperature of the MOCVD reaction chamber is kept at 1000 ℃, the air pressure is kept at 100Torr, ammonia gas, hydrogen gas, trimethylgallium and trimethylaluminum are introduced, and Al with the thickness of 300nm is grown on the AlN buffer layer in the step (2) 0.7 Ga 0.3 An N buffer layer;
(4) The temperature of the MOCVD reaction chamber is kept at 800 ℃, the air pressure is kept at 200Torr, ammonia gas, nitrogen gas and trimethylgallium are introduced, a GaN layer grows on the AlGaN buffer layer, and the thickness is 400nm, so that an epitaxial wafer is obtained;
(5) Transferring the epitaxial wafer of step (4) into a Molecular Beam Epitaxy (MBE) reaction chamber, maintaining the substrate temperature at 600deg.C, and at a pressure of 8.0X10 -5 Under the conditions of Pa and growth speed of 0.8ML/s, the growth rate is controlled by MoO 3 Se powder and S powder as source, on the GaN layer, moS with thickness of 15nm is grown 1.4 Se 0.6 A layer;
(6) The substrate temperature in the MBE reaction chamber was maintained at 600℃and the pressure in the reaction chamber was 8.0X10 @ -5 Under the conditions of Pa and growth speed of 0.8ML/s, the growth rate is controlled by MoO 3 And S powder as source, in MoS 1.4 Se 0.6 MoS with thickness of 7nm on layer 2 A layer;
(7) The substrate temperature in the MBE reaction chamber was maintained at 600℃and the pressure in the reaction chamber was 8.0X10 @ -5 Under the conditions of Pa and growth speed of 0.8ML/s, the growth rate is controlled by MoO 3 Se powder and S powder as sources, in MoS 2 MoS with thickness of 15nm on layer 1.4 Se 0.6 A layer;
(8) MoS at step (7) 1.4 Se 0.6 After photoetching source electrode and drain electrode patterns on the layer, transferring the patterns to an electron beam evaporation reaction cavity, taking Mo particles as a source, introducing 5sccm of oxygen, and evaporating MoO of 0.8nm 3 Layer, closing oxygen, taking gold particles as source, steamingPlating 1.2nm Au layer to form MoO 3 And finally, removing photoresist and cleaning, and then, rapidly annealing for 30s at 850 ℃ to obtain a source electrode and a drain electrode;
step 9, moS in step (7) 1.4 Se 0.6 Photoetching a gate electrode pattern on the surface of the layer by ZrO 2 The harrow is used as a source, 5sccm of oxygen is firstly introduced, and 0.6nm of ZrO is evaporated 2 Layer, closing oxygen, taking Ni particles as a source, evaporating a Ni layer of 1.6nm to form ZrO 2 And (3) removing photoresist and cleaning to obtain the gate electrode.
The source electrode and the drain electrode of the invention are MoO 3 In the case of/Au, the thickness of each layer is MoO 3 (0.2-2 nm)/Au (0.5-4 nm); the gate electrode of the invention is ZrO 2 In the case of Ni, the thickness of each layer is ZrO 2 (0.2～2nm)/Ni(0.5～4nm)。
The source and drain electrodes may be Ti (0.3 nm)/Al (1.5 nm)/Ni (0.5 nm)/Au (0.6 nm) and Ni (2 nm)/Au (0.6 nm); the gate electrode of the present invention is other than ZrO 2 Ni, also TiO 2 (0.2～2nm)/Ni(0.5～4nm)。
In this embodiment, moS is adopted first 2x Se 2(1-x) /MoS 2 /MoS 2x Se 2(1-x) A quantum well structure in which there are two parallel heterogeneous interfaces, so the maximum current thin layer and the current are doubled; moS (MoS) 2 The channel layer is sandwiched between two barriers, which can better confine carriers. At the same time MoO 3 The electrode structure of/Au is advantageous in reducing the contact resistance of the source/drain electrode.
The foregoing description of the embodiments has been provided for the purpose of illustrating the general principles of the invention, and is not meant to limit the invention thereto, but to limit the invention thereto, and any modifications, equivalents, improvements and equivalents thereof may be made without departing from the spirit and principles of the invention.

Claims (6)

1. MoS (MoS) 2 The base quantum well type modulation doped field effect transistor is characterized in that: comprises a substrate, an AlN buffer layer and an AlGaN buffer layer from bottom to topThe GaN-based semiconductor device comprises a GaN layer and a quantum well type structure layer, wherein the quantum well type structure layer is MoS 2x Se 2(1-x) layer/MoS 2 layer/MoS 2x Se 2(1-x) A layer; a source electrode, a drain electrode and a gate electrode are arranged above the quantum well type structure layer; the gate electrode is arranged between the source electrode and the drain electrode;
MoS in quantum well type structure layer 2x Se 2(1-x) The layers are the same or different, and x is more than or equal to 0.2 and less than or equal to 0.9;
the substrate comprises sapphire, si, siC, gaN, znO, liGaO 2 、LaSrAlTaO 6 Al or Cu;
source and drain electrodes MoO 3 Au, ti/Al/Ni/Au or Ni/Au, au being located at the topmost layer;
the gate electrode is ZrO 2 Ni or TiO 2 /Ni，ZrO 2 、TiO 2 Is arranged above the quantum well type structure layer.
2. The MoS of claim 1 2 The base quantum well type modulation doped field effect transistor is characterized in that: moS (MoS) 2x Se 2(1-x) The thickness of the layer is 10-30nm, moS 2 The thickness of the layer is 5-20nm; the thickness of the AlN buffer layer is 100-250nm; the thickness of the AlGaN buffer layer is 300-500 nm, and the Al/N mole ratio in the AlGaN buffer layer is=0.1-0.9; the thickness of the GaN layer is 400-1500 nm.
3. MoS according to any one of claims 1-2 2 The preparation method of the base quantum well type modulation doped field effect transistor is characterized by comprising the following steps of: the method comprises the following steps:
(1) Sequentially growing an AlN buffer layer, an AlGaN buffer layer and a GaN layer on a substrate by a metal organic vapor phase epitaxy method;
(2) By molecular beam epitaxy (MoO) 3 Growing MoS on GaN layer by using S powder and Se powder as sources 2x Se 2(1-x) A layer, wherein x is more than or equal to 0.2 and less than or equal to 0.9;
(3) By molecular beam epitaxy (MoO) 3 And S powder as a source, moS in step (2) 2x Se 2(1-x) Growth of MoS on layer 2 A layer;
(4) By molecular beam epitaxy (MoO) 3 S powder and Se powder as sources, in MoS 2 Growth of MoS on layer 2x Se 2(1-x) A layer, wherein x is more than or equal to 0.2 and less than or equal to 0.9;
(5) MoS in step (4) by electron beam evaporation and stripping techniques 2x Se 2(1-x) Depositing a metal layer on the layer to form an ohmic contact electrode serving as a source/drain electrode;
(6) MoS in step (4) by electron beam evaporation and stripping techniques 2x Se 2(1-x) And depositing a metal layer on the layer to form a Schottky contact electrode serving as a gate electrode.
4. A MoS according to claim 3 2 The preparation method of the base quantum well type modulation doped field effect transistor is characterized by comprising the following steps of: moS in step (4) in step (5) 2x Se 2(1-x) Depositing a metal layer on the layer means MoS in step (4) 2x Se 2(1-x) Deposition of MoO on layers in sequence 3 And (3) carrying out high-temperature annealing on the four layers of metal of/Au, ti/Al/Ni/Au or the two layers of metal of Ni/Au to form an ohmic contact electrode.
5. MoS according to claim 4 2 The preparation method of the base quantum well type modulation doped field effect transistor is characterized by comprising the following steps of: the high-temperature annealing temperature is 700-900 ℃.
6. A MoS according to claim 3 2 The preparation method of the base quantum well type modulation doped field effect transistor is characterized by comprising the following steps of: moS in step (4) in step (6) 2x Se 2(1-x) Depositing a metal layer on the layer means MoS in step (4) 2x Se 2(1-x) Deposition of ZrO on layers in sequence 2 Ni or TiO 2 and/Ni, forming a Schottky contact electrode as a gate electrode.
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CN106030807A (en) * 2014-03-21 2016-10-12 英特尔公司 Transition metal dichalcogenide semiconductor assemblies
CN207834306U (en) * 2018-01-31 2018-09-07 华南理工大学 A kind of MoS2Based quantum well type modulation-doped FET

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