CN108231124B - 一种Nand flash元件及其低格控制方法和装置 - Google Patents
一种Nand flash元件及其低格控制方法和装置 Download PDFInfo
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- CN108231124B CN108231124B CN201711449645.3A CN201711449645A CN108231124B CN 108231124 B CN108231124 B CN 108231124B CN 201711449645 A CN201711449645 A CN 201711449645A CN 108231124 B CN108231124 B CN 108231124B
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- nand flash
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
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- Techniques For Improving Reliability Of Storages (AREA)
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Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201711449645.3A CN108231124B (zh) | 2017-12-27 | 2017-12-27 | 一种Nand flash元件及其低格控制方法和装置 |
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CN201711449645.3A CN108231124B (zh) | 2017-12-27 | 2017-12-27 | 一种Nand flash元件及其低格控制方法和装置 |
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CN108231124A CN108231124A (zh) | 2018-06-29 |
CN108231124B true CN108231124B (zh) | 2020-11-06 |
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CN201711449645.3A Active CN108231124B (zh) | 2017-12-27 | 2017-12-27 | 一种Nand flash元件及其低格控制方法和装置 |
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Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2004102508A (ja) * | 2002-09-06 | 2004-04-02 | Renesas Technology Corp | 半導体記憶装置 |
JP2006048777A (ja) * | 2004-08-02 | 2006-02-16 | Toshiba Corp | Nandフラッシュメモリおよびデータ書き込み方法 |
CN104461401A (zh) * | 2014-12-25 | 2015-03-25 | 珠海煌荣集成电路科技有限公司 | Spi闪速存储器的数据读写管理方法及数据读写管理装置 |
CN105740163A (zh) * | 2016-01-29 | 2016-07-06 | 山东鲁能智能技术有限公司 | 一种Nand Flash坏块管理方法 |
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PB01 | Publication | ||
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Effective date of registration: 20201009 Address after: 2301, 23rd floor, East Building, building B, Tengfei Kehui City, Singapore, No.88 Tiangu 7th Road, hi tech Zone, Xi'an City, Shaanxi Province 710000 Applicant after: XI'AN GEYI ANCHUANG INTEGRATED CIRCUIT Co.,Ltd. Applicant after: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. Address before: 100083 Beijing City, Haidian District Xueyuan Road No. 30, large industrial building A block 12 layer Applicant before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. |
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GR01 | Patent grant | ||
CP03 | Change of name, title or address |
Address after: 23 / F, East Building, Tengfei Kehui City, 88 tianguqi Road, high tech Zone, Xi'an, Shaanxi 710000 Patentee after: XI'AN GEYI ANCHUANG INTEGRATED CIRCUIT Co.,Ltd. Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd. Address before: 2301, 23 / F, East Building, building B, Tengfei Kehui City, 88 Tiangu 7th Road, high tech Zone, Xi'an, Shaanxi, 710000 Patentee before: XI'AN GEYI ANCHUANG INTEGRATED CIRCUIT Co.,Ltd. Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. |
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CP03 | Change of name, title or address |