CN108231029A - Gate driving circuit, display device and driving method - Google Patents
Gate driving circuit, display device and driving method Download PDFInfo
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- CN108231029A CN108231029A CN201810085313.XA CN201810085313A CN108231029A CN 108231029 A CN108231029 A CN 108231029A CN 201810085313 A CN201810085313 A CN 201810085313A CN 108231029 A CN108231029 A CN 108231029A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The disclosure provides a kind of gate driving circuit and its driving method, display device and its driving method.Gate driving circuit includes multi-stage shift register unit and the control circuit of initial signal is provided for multi-stage shift register unit.Control circuit includes：First control unit, connection control signal end, initial signal end and the first signal output end；Second control unit, connection control signal end, initial signal end and second signal output terminal.First signal output end is connected to the input signal end of the first order shift register cell of multi-stage shift register unit, and second signal output terminal is connected to the input signal end of N grades of shift register cells of multi-stage shift register unit, N>1.Control circuit is configured as under control of the control signal, exporting initial signal to the first signal output end or second signal output terminal via the first control unit or the second control unit.The disclosure can realize that partial sweep is shown, therefore can save power consumption.
Description
Technical field
This disclosure relates to display technology field more particularly to a kind of gate driving circuit and its driving method, display device
And its driving method.
Background technology
In recent years, display device presents the development trend of high integration and low cost.It is driven with array substrate row
Dynamic (Gate Driver on Array, GOA) technology is representative, and gate driving circuit is integrated in array base using GOA technologies
The neighboring area of plate, so as to while narrow frame design is realized, effectively improve the integrated level of display device, and reduce its manufacture
Cost.The output terminal grid line corresponding with one of every level-one shift register cell in GOA circuits is connected, for defeated to the grid line
Go out gate drive signal, to realize progressive scan function.
The display product of mainstream includes liquid crystal display (Liquid Crystal Display, LCD) and organic hair at present
Optical diode display (Organic Light Emitting Diode, OLED).These display products are in routine use process
In be frequently encountered the following two kinds situation：First, it, can be with 16 when not needing to full screen display such as broadcasting video or film:9
Or 4:The Zoom display pattern of 3 equal proportions shown, the both sides up and down of such display pattern can there are black surround region, and
The display content in the black surround region remains unchanged for a long time；Second, mobile phone or laptop etc. show product in the application,
Display interface often rests on an opposing stationary picture, such as the typewriting when standby interface or file process of mobile phone
Interface, at this time the image content of most of display area be to maintain constant.In these cases, although the display of subregion
Picture is to maintain constant, but all grid lines and all data lines will necessarily cause power consumption so always all in continuous firing
Waste.
It should be noted that information is only used for strengthening the reason to the background of the disclosure disclosed in above-mentioned background technology part
Solution, therefore can include not forming the information to the prior art known to persons of ordinary skill in the art.
Invention content
The disclosure is designed to provide a kind of gate driving circuit and its driving method, display device and its driving side
Method, power wastage during for solving the problems, such as that partial picture content is constant.
Other characteristics and advantages of the disclosure will be by the following detailed description apparent from or partially by the disclosure
Practice and acquistion.
According to one aspect of the disclosure, provide a kind of gate driving circuit, including multi-stage shift register unit with
And the control circuit of initial signal is provided for the multi-stage shift register unit.The control circuit includes：First control is single
Member, connection control signal end, initial signal end and the first signal output end；And second control unit, connect the control
Signal end, the initial signal end and second signal output terminal.First signal output end is connected to the stages shift
The input signal end of the first order shift register cell of register cell, the second signal output terminal are connected to the multistage
The input signal end of N grades of shift register cells of shift register cell, N>1.The control circuit is configured as in institute
Under the control for stating control signal, via first control unit or second control unit by the initial signal export to
First signal output end or the second signal output terminal.
In accordance with an embodiment of the present disclosure, first control unit can include first switching element, the first switch
The control terminal of element connects the control signal end, first end connects the initial signal end, second end connection first letter
Number output terminal.Second control unit can include second switch element, the control terminal connection institute of the second switch element
Control signal end is stated, first end connects the second signal output terminal and connects the initial signal end, second end via resistance
Ground connection.The first switching element is identical with the conduction level of the second switch element.
In accordance with an embodiment of the present disclosure, the control circuit can also include：First diode is connected to the starting letter
Number end first control unit between and from the initial signal end to the first control unit one-way conduction；And/or
Second diode is connected between the initial signal end and second control unit and from the initial signal end to described
Second control unit one-way conduction.
In accordance with an embodiment of the present disclosure, the first switching element and the second switch element can be P-type crystal
It manages or is N-type transistor.
In accordance with an embodiment of the present disclosure, first control unit can include first switching element, the first switch
The control terminal of element connects the control signal end, first end connects the initial signal end, second end connection first letter
Number output terminal.Second control unit can include second switch element, the control terminal connection institute of the second switch element
State control signal end, first end connects the initial signal end, second end connects the second signal output terminal.Described first opens
The conduction level for closing element and the second switch element is opposite.
In accordance with an embodiment of the present disclosure, one in the first switching element and the second switch element can be P
Transistor npn npn, another can be N-type transistor.
In accordance with an embodiment of the present disclosure, gate driving circuit can also include at least one partition control module, described point
Area's control module includes control and switchs.The control terminal of the control switch connects the control signal end of the control circuit, first
Described in end connects the signal output end of M grades of shift register cells of the multi-stage shift register unit, second end connects
The input signal end of M+1 grades of shift register cells of multi-stage shift register unit, M>N.The closing of the control switch
Time is identical with the signal output time of the second control unit of the control circuit.
According to another aspect of the present disclosure, a kind of display device is provided, including above-mentioned gate driving circuit.
In accordance with an embodiment of the present disclosure, the display device can include liquid crystal display device.
In accordance with an embodiment of the present disclosure, the display area of the liquid crystal display device can be by control circuit or by control electricity
Road and partition control module are divided into multiple regions.The liquid crystal display device can include multiple public electrodes, the multiple
Public electrode corresponds to the multiple region respectively.
According to the another aspect of the disclosure, a kind of driving method of gate driving circuit is provided, for driving above-mentioned grid
Pole driving circuit, including：Under full screen scanning display pattern, by the first signal output end of control circuit to the first order
Shift register cell exports initial signal；Under partial sweep display pattern, pass through the second signal output terminal of control circuit
Initial signal is exported to the N grades of shift register cells.
In accordance with an embodiment of the present disclosure, when the gate driving circuit includes partition control module, the gate driving
The driving method of circuit can also include：The control circuit second signal output terminal to the N grades of shift registers
When unit exports initial signal, M grades of shift registers of the gate driving circuit are blocked by the partition control module
The output signal of unit is transmitted to the input signal end of M+1 grades of shift register cells.
According to the another further aspect of the disclosure, a kind of driving method of display device, the display of the display device are provided
Region is divided into multiple regions by control circuit or by control circuit and partition control module.The driving method of the display device
It can include：Obtain the data-signal of the image to be displayed in each region in the multiple region；In the figure of adjacent two frame
When all being changed in all the multiple regions as corresponding data-signal, according to the driving side of above-mentioned gate driving circuit
Method drives the gate driving circuit under full screen scanning display pattern；And the corresponding data letter of image in adjacent two frame
When number unchanged in the region of at least one of the multiple region, according to the driving method of above-mentioned gate driving circuit,
Gate driving circuit is driven under partial sweep display pattern.
In accordance with an embodiment of the present disclosure, include liquid crystal display device, and the liquid crystal display device in the display device
In the case of multiple public electrodes including corresponding to the multiple region respectively, in the corresponding data-signal of image of adjacent two frame
When unchanged in the region of at least one of the multiple region, to removing at least one region in the multiple region
Except region corresponding to public electrode apply exchange common electrode signal.
Gate driving circuit and its driving method, display device and its driving side that disclosure exemplary embodiment is provided
Method is controlled by the first control unit and the second control unit of control signal by setting, by the initial signal at initial signal end
It is selectively carried out by the first signal output end of the first control unit or the second signal output terminal of the second control unit defeated
Go out.Since the first signal output end and second signal output terminal connect the grade of the shift register cell in gate driving circuit
Number is different, thus by control initial signal outgoing position can selection gate driving circuit initial sweep position, with
Full screen scanning is needed to carry out complete grid line scanning when showing, and local grid line is only carried out when not needing to full screen scanning display
Scanning, can avoid carrying out recharge to every a line grid line and corresponding pixel in this way, so as to reduce power consumption.
It should be understood that above general description and following detailed description are only exemplary and explanatory, not
The disclosure can be limited.
Description of the drawings
Attached drawing herein is incorporated into specification and forms the part of this specification, shows the implementation for meeting the disclosure
Example, and for explaining the principle of the disclosure together with specification.It should be evident that the accompanying drawings in the following description is only the disclosure
Some embodiments, for those of ordinary skill in the art, without creative efforts, can also basis
These attached drawings obtain other attached drawings.
Fig. 1 schematically shows the module diagram of control circuit in disclosure exemplary embodiment；
Fig. 2 schematically shows the structure diagram one of control circuit in disclosure exemplary embodiment；
Fig. 3 schematically shows the timing control figure of full screen scanning display pattern in disclosure exemplary embodiment；
Fig. 4 schematically shows the timing control figure of partial sweep display pattern in disclosure exemplary embodiment；
Fig. 5 schematically shows the structure diagram two of control circuit in disclosure exemplary embodiment；
Fig. 6 schematically shows the structure diagram three of control circuit in disclosure exemplary embodiment；
Fig. 7 schematically shows the cascade structure schematic diagram one of gate driving circuit in disclosure exemplary embodiment；
Fig. 8 schematically shows the cascade structure schematic diagram two of gate driving circuit in disclosure exemplary embodiment；
Fig. 9 schematically shows the driving method flow chart of gate driving circuit in disclosure exemplary embodiment；
Figure 10 schematically shows the driving method flow chart of display device in disclosure exemplary embodiment.
Specific embodiment
Example embodiment is described more fully with reference to the drawings.However, example embodiment can be real in a variety of forms
It applies, and is not understood as limited to example set forth herein；On the contrary, these embodiments are provided so that the disclosure will more comprehensively and
Completely, and by the design of example embodiment comprehensively it is communicated to those skilled in the art.Described feature, structure or characteristic
It can in any suitable manner be incorporated in one or more embodiments.In the following description, many details are provided
Embodiment of the disclosure is fully understood so as to provide.It will be appreciated, however, by one skilled in the art that the disclosure can be put into practice
Technical solution and omit one or more in the specific detail or may be used other methods, constituent element, device,
Step etc..In other cases, known solution is not shown in detail or describes to avoid all aspects of this disclosure is made to become mould
Paste.
In addition, attached drawing is only the schematic illustrations of the disclosure, it is not necessarily drawn to scale.The thickness of each layer in attached drawing
Do not reflect actual proportions with shape, be merely for convenience and purposes of illustration content of this disclosure.Identical reference numeral represents identical in figure
Or similar part, thus repetition thereof will be omitted.
The exemplary embodiment of the disclosure provides a kind of gate driving circuit.The gate driving circuit includes stages shift
Register cell and the control circuit that initial signal is provided for multi-stage shift register unit.
As shown in Figure 1, control circuit 10 can include：Connection control signal end Control, first control unit 101 rises
Beginning signal end STV and the first signal output end STV1, for initial signal to be transmitted to first under the action of signal is controlled
Signal output end STV1；Second control unit 102, connection control signal end Control, the letters of initial signal end STV and second
Number output terminal STV2, for initial signal to be transmitted to second signal output terminal STV2 under the action of signal is controlled.
First signal output end STV1 is connected to the first order displacement of the multi-stage shift register unit of gate driving circuit
The input signal end of register cell, second signal output terminal STV2 are connected to the multi-stage shift register list of gate driving circuit
The input signal end of N grades of shift register cells of member, N>1.
Control circuit 10 will rise under control of the control signal via the first control unit 101 or the second control unit 102
Beginning signal is exported to the first signal output end STV1 or second signal output terminal STV2.That is, control circuit 10 is in control signal
Under control selectively initial signal is exported via the first signal output end STV1 or second signal output terminal STV2.
It should be noted that：First signal output end STV1 and second signal output terminal STV2 in gate driving circuit
Shift register cell be connected, it is different to differ only in connected shift register cell series.That is, first
Signal output end STV1 and second signal output terminal STV2 can export the initial signal of initial signal end STV to different shiftings
Bit register unit.
The control circuit 10 that disclosure exemplary embodiment is provided is controlled by the first control of control signal by setting
101 and second control unit 102 of unit, by the initial signal of initial signal end STV selectively by the first control unit 101
First signal output end STV1 or the second signal output terminal STV2 of the second control unit 102 are exported.Due to the first letter
The series of shift register cell in the gate driving circuit that number output terminal STV1 and second signal output terminal STV2 are connected
Difference, thus by control initial signal outgoing position can selection gate driving circuit initial sweep position, with need
Complete grid line scanning is carried out when full screen scanning being wanted to show, and only carries out local grid line when not needing to full screen scanning display and sweeps
It retouches, can avoid charging to every a line grid line and corresponding pixel in this way, so as to reduce power consumption.That is, pass through control
Circuit 10 processed can not be corresponding to the constant region of the display content to display area grid line carry out recharge, so as to make this
Charge and discharge are not repeated in pixel in region, so as to reduce power consumption.
Here, full screen scanning display pattern refers to scan whole grid lines of display panel by gate driving circuit to show
Image, partial sweep display pattern refer to scan the selected grid line of display panel by gate driving circuit not to be selected grid
The image shown by pixel corresponding to line is constant to show image.
According to an exemplary embodiment of the present disclosure, as shown in Fig. 2, the first control unit 101 can include first switch member
The control terminal connection control signal end Control of part T1, first switching element T1, first end connection initial signal end STV, the
Two ends connect the first signal output end STV1.Second control unit 102 can include second switch element T2, second switch member
The control terminal connection control signal end Control of part T2, first end connect second signal output terminal STV2 and via resistance R connections
Initial signal end STV, second end ground connection.
First switching element T1 is identical with the conduction level of second switch element T2.Such as in first switching element T1 and
In the case that two switch element T2 are transistor, first switching element T1 and second switch element T2 can be P-type crystal
It manages or is N-type transistor.
Below to the control circuit 10 by taking first switching element T1 and second switch element T2 are N-type transistor as an example
Operation principle illustrate.
As shown in Figures 2 and 3, under full screen scanning display pattern, the control signal of control signal end Control is high electricity
Flat, first switching element T1 and second switch element T2 are in conducting state.At this point, the initial signal of initial signal end STV
For high level, which is transmitted to the first signal output end STV1 to be exported by first switching element T1.Due to
Resistance R, and the second end of second switch element T2 are provided between the first end of second switch element T2 and initial signal end STV
Ground connection, therefore can be under the premise of ensureing that circuit not be short-circuited so that be connected to the of the first end of second switch element T2
The output of binary signal output terminal STV2 is low level.
As shown in Figure 2 and Figure 4, under partial sweep display pattern, the control signal of control signal end Control is low electricity
Flat, first switching element T1 and second switch element T2 are in closed state.At this point, the initial signal of initial signal end STV
For high level, which can be transmitted to second signal output terminal STV2 to be exported by resistance R.
It follows that when the control signal of control signal end Control is high level, initial signal can be from the first signal
Output terminal STV1 is exported, to realize full screen scanning display pattern；And the control signal in control signal end Control is low
During level, initial signal can be exported from second signal output terminal STV2, to realize partial sweep display pattern.
It should be noted that：First switching element T1 and second switch element T2 can also use P-type transistor, but consider
It is typically to make on the glass substrate to control circuit 10, and the performance of N-type amorphous silicon film transistor on the glass substrate
More stablize, therefore the present embodiment preferred first switching element T1 and second switch element T2 use N-type transistor.
On this basis, it is contemplated that under full screen scanning display pattern, the control signal of control signal end Control is height
Level, first switching element T1 and second switch element T2 can be connected, and the first signal output end STV1 and second signal are defeated
Outlet STV2 can also be connected, such as second signal is defeated with the signal output end of certain grade of shift register cell of gate driving circuit
Outlet STV2 can also connect N-1 grades of shift registers while the input signal end of N grades of shift register cells of connection
The signal output end of unit, so, when the N-1 grades of shift register cells that second signal output terminal STV2 is connected
When signal output end normally exports high level signal, it is defeated will the first signal to be transmitted to by resistance R and first switching element T1
Outlet STV1 makes first signal output end STV1 be exported again, so as to cause the pixel column of this frame scan has been completed
It is again turned on.
Based on this, as shown in figure 5, control circuit 10 can also include being connected to the control lists of initial signal end STV and first
Member 101 between the first diode D1 and/or be connected between initial signal end STV and the second control unit 102 the two or two
Pole pipe D2, the first diode D1 are from initial signal end STV to 101 one-way conduction of the first control unit, second diode D2
From initial signal end STV to 102 one-way conduction of the second control unit.
It so, can be by first switching element T1 by setting the first diode D1 and/or the second diode D2
It is spaced from each other with second switch element T2, so as to prevent between the first signal output end STV1 and second signal output terminal STV2
It interferes with each other.
In another exemplary embodiment of the present disclosure, as shown in fig. 6, the first control unit 101 can be opened including first
Close element T1, the control terminal connection control signal end Control of first switching element T1, first end connection initial signal end
STV, second end connect the first signal output end STV1；Second control unit 102 can include second switch element T2, this second
The control terminal connection control signal end Control of switch element T2, first end connection initial signal end STV, second end connection the
Binary signal output terminal STV2.
The conduction level of first switching element T1 and second switch element T2 are opposite.For example, in first switching element T1 and
In the case that second switch element T2 is transistor, one in first switching element T1 and second switch element T2 can be
P-type transistor, and another can be N-type transistor.
Below to the control by taking first switching element T1 is N-type transistor, second switch element T2 is P-type transistor as an example
The operation principle of circuit 10 processed illustrates.
As indicated in fig. 6 and fig. 3, under full screen scanning display pattern, the control signal of control signal end Control is high electricity
Flat, first switching element T1 conductings, second switch element T2 is closed.At this point, the initial signal of initial signal end STV is high electricity
Flat, then the initial signal is transmitted to the first signal output end STV1 to be exported by first switching element T1.
As shown in Fig. 6 and Fig. 4, under partial sweep display pattern, the control signal of control signal end Control is low electricity
Flat, first switching element T1 is closed, second switch element T2 conductings.At this point, the initial signal of initial signal end STV is high electricity
Flat, which is transmitted to second signal output terminal STV2 to be exported by second switch element T2.
It follows that when the control signal of control signal end Control is high level, initial signal can be from the first signal
Output terminal STV1 is exported, to realize full screen scanning display pattern；And the control signal in control signal end Control is low
During level, initial signal can be exported from second signal output terminal STV2, to realize partial sweep display pattern.
Exemplary embodiment according to the present invention, as shown in fig. 7, the first signal output end STV1 connections of control circuit 10
To the input signal end INPUT of the first order shift register cell GOA-1 of the gate driving circuit；The second of control circuit 10
Signal output end STV2 is connected to the input signal end of N grades of shift register cell GOA-N of the gate driving circuit
INPUT。
The gate driving circuit that the exemplary embodiment of the disclosure is provided, by the starting for controlling initial signal end STV
Signal is exported by the first signal output end STV1 or second signal output terminal STV2 of control circuit 10, you can reaches choosing
The purpose of the initial sweep position of gate driving circuit is selected, to carry out complete grid line scanning when full screen scanning is needed to show,
And do not needing to only carry out local grid line scanning during full screen scanning display, it can be avoided in this way to every a line grid line and display surface
The pixel of plate carries out recharge, so as to reduce power consumption.
It should be noted that：In gate driving circuit shown in Fig. 7, pass through the first output signal of control circuit and
Two output signals are only capable of the initial sweep position of control gate drive circuit, but still the cut-off for being unable to control gate driving circuit is swept
Position is retouched, is may result in this way when carrying out partial sweep display, although the gate driving circuit can be since a certain center row
Scanning, but can scan a line to the end always from the center row can terminate the image scanning of a frame, this is for showing picture
Content constant situation in face bottom is for example with 16:9 zoom mode still has certain limitation when playing film.
Based on this, as shown in figure 8, gate driving circuit can also include at least one partition control module 20, the subregion
Control switch Tw may be used to realize in control module 20.Specifically, the control terminal of control switch Tw can be connected to control
The control signal end Control of circuit 10 processed, first end can connect M grades of shift register cells of gate driving circuit
GOA-M signal output ends OUTPUT, second end can connect M+1 grades of shift register cell GOA- (M of gate driving circuit
+ 1) input signal end INPUT, M>N.
The control switchs the shut-in time of Tw and the signal output time phase of the second control unit 102 of control circuit 10
Together.For example, the control switch Tw and second switch element T2 in the second control unit 102 of control circuit 10 can be P
Transistor npn npn is N-type transistor, can be exported in this way in the second signal of the second control unit 102 of control circuit 10
End STV2 carries out ensureing that control switch Tw is closed while signal output.
It should be noted that：The control terminal of control switch Tw can also be connected to other signals end, as long as can be in phase
The period answered meets the connection and blocking relationship between two-stage shift register cell up and down, other to be not especially limited.
So, the cut-off that can reach control gate drive circuit by setting the partition control module 20 scans
The purpose of position, so as to fulfill the controllable multi-section display effect in scanning whole story position.
By taking 1366 × 768 resolution ratio as an example, display area can be divided into 3 parts by the present embodiment, i.e., it is aobvious that every 256 row forms one
Show region.First signal output end STV1 of control circuit 10 can be used as conventional initial signal to be connected to first order shift register
The input signal end INPUT of unit, the second signal output terminal STV2 of control circuit 10 may be connected to the 257th grade of shift register
The input signal end INPUT of unit, in signal output end OUTPUT and the 513rd grade of displacement of the 512nd grade of shift register cell
Also increase by a partition control module 20 between the input signal end INPUT of register cell and control switch Tw such as N-type crystal
Pipe.Based on this, need carry out the 257th row to the 512nd row partial sweep display when, the control of control signal end Control
Signal is set low, and the first signal output end STV1 is exported from second signal output terminal STV2 to the 256th grade of shifting without output, initial signal
The input signal end INPUT of bit register unit is so that it is started to work；When scanning is to 512 row, since control signal is put
Low, the N-type transistor as control switch Tw is closed, therefore the signal output end OUTPUT of the 512nd grade of shift register cell
Can not only be exported as the reset signal of upper level also can not as the input signal of the 513rd grade of shift register cell,
It can realize that the partial sweep of the 256th row to the 512nd row is shown in this way.
Exemplary embodiment according to the present invention can set multiple control circuits 10 and multiple partition control modules 20,
To carry out zonal control to display area, that is, subarea-scanning.Control circuit 10 and partition control module 20 set more, then institute
The subregion that can be realized is more.Ideally, first order shift register cell and other per level-one shift registers it
Between be both provided with control circuit 10, and partition control module is both provided between every two-stage neighboring shift register cell
20, in this case, the display that the analysis prediction of display data can be realized arbitrary region in coupled system refreshes.But consider
Corresponding wiring quantity is may result in often increase control circuit and partition control module to increase, therefore in the design of actual product
In should to number of partitions and wiring quantity carry out comprehensive consideration.
Correspondingly, the exemplary embodiment of the disclosure additionally provides a kind of driving method of gate driving circuit, for driving
Dynamic above-mentioned gate driving circuit.As shown in figure 9, the driving method of the gate driving circuit can include：
S1, under full screen scanning display pattern, by the first signal output end STV1 of control circuit 10 to gate driving
The first order shift register cell GOA-1 output initial signals of circuit, so that gate driving circuit output grid from the first row
Pole drive signal；
S2, under partial sweep display pattern, by the second signal output terminal STV2 of control circuit 10 to gate driving
The N grades of shift register cell GOA-N output initial signals of circuit, so that gate driving circuit output grid from Nth row
Drive signal.
The driving method for the gate driving circuit that disclosure exemplary embodiment is provided, by controlling initial signal end
The initial signal of STV is exported by the first signal output end STV1 or second signal output terminal STV2 of control circuit 10,
Can reach the purpose of the initial sweep position of selection gate driving circuit, with when full screen scanning is needed to show from the first row
Export gate drive signal, and do not need to full screen scanning display when from Nth row output gate drive signal, can keep away in this way
Exempt to charge to every a line grid line and corresponding pixel, so as to reduce power consumption.
In an exemplary embodiment of the disclosure, when gate driving circuit further includes partition control module 20, the grid
The driving method of pole driving circuit can also include：
S3, control circuit 10 N grades of shift register lists from second signal output terminal STV2 to gate driving circuit
During first GOA-N outputs initial signal, M grades of shift register lists of gate driving circuit are also blocked by partition control module 20
The output signal of first GOA-M is transmitted to the input signal end INPUT of M+1 grades of shift register cell GOA- (M+1), so that grid
Pole driving circuit exports gate drive signal from Nth row to M rows.
Based on this, the cut-off scan position of gate driving circuit is controlled by using the partition control module 20,
It can realize the controllable multi-section display effect in scanning whole story position.
Below by taking first switching element T1, second switch element T2 and control switch Tw are N-type transistor as an example,
The course of work of gate driving circuit is illustrated with reference to Fig. 8.
When carrying out full screen scanning display, the control signal Control of control signal end is high level, at this time control circuit
10 the first signal output end STV1 is to the input signal end of the first order shift register cell GOA-1 of gate driving circuit
INPUT exports initial signal, using the pumping signal as first order shift register cell GOA-1.At the same time, control is opened
It is in the conduction state to close Tw, the signal output end OUTPUT of M grades of shift register cell GOA-M of gate driving circuit and the
The input signal end INPUT of M+1 grades of shift register cell GOA- (M+1) is connected, therefore M grades of shift register cells
The output signal of GOA-M can normally be transmitted to the input signal end of M+1 grades of shift register cell GOA- (M+1)
INPUT.Based on this, which can be from first order shift register cell GOA-1 level-one shift registers to the end
Unit GOA-Z exports gate drive signal, is shown so as to fulfill full screen scanning.
When carrying out partial sweep display, the control signal Control of control signal end is low level, at this time control circuit
10 second signal output terminal STV2 is to the input signal end of N grades of shift register cell GOA-N of gate driving circuit
INPUT exports initial signal, using the pumping signal as the N grades of shift register cell GOA-N.At the same time, control is opened
It closes Tw to be closed, the signal output end OUTPUT of M grades of shift register cell GOA-M of gate driving circuit and the
The input signal end INPUT of M+1 grades of shift register cell GOA- (M+1) is blocked, therefore M grades of shift register cells
The output signal of GOA-M is only capable of as the reset signal of M-1 grades of shift register cell GOA- (M-1) meeting upper level shifting
The electric discharge demand of bit register unit, and can not as the input signal of M+1 grades of shift register cell GOA- (M+1), because
This can only realize the output of N grades of shift register cell GOA-N to M grades of shift register cell GOA-M.It, should based on this
Gate driving circuit can drive from N grades of shift register cell GOA-N to M grades shift register cell GOA-M output grids
Dynamic signal, the partial sweep so as to fulfill Nth row to M rows show that the grid line of remaining row and corresponding pixel are without repeatedly
Charge and discharge and so that corresponding image does not change, so as to achieve the purpose that save power consumption.
The exemplary embodiment of the disclosure provides a kind of display device, which includes above-mentioned gate driving electricity
Road.
According to an exemplary embodiment of the present disclosure, display device can be liquid crystal display device.In this case, it shows
Device can also include multiple public electrodes, multiple public electrode can correspond respectively to display area by control circuit or
The multiple regions divided by control circuit and partition control module.
In particular, for example, when display device includes control circuit 10, control circuit 10 can be by the aobvious of display device
It is at least two regions to show region division, that is, the 1st grade of shift LD of the first signal output end STV1 connections of control circuit 10
Region corresponding to device unit GOA-1 to N grades of shift register cell GOA-N of second signal output terminal STV2 connections, with
And the region corresponding to N+1 grades of shift register cell GOA- (N+1) grades to afterbody shift register cell.This
In the case of, multiple public electrodes can correspond to above at least two regions respectively.
For example, when display device includes control circuit 10 and partition control module 20, control circuit 10 and zonal control
The display area of display device is divided at least three regions by module 20, that is, the first signal output end of control circuit 10
1st grade of shift register cell GOA-1 of STV1 connections to the STV2 connections of second signal output terminal N grades of shift register lists
Region corresponding to first GOA-N, the first end institute of N+1 grades of shift register cell GOA- (N+1) to partition control module 20
Region and M+1 grades of shift register cell GOA- (M+1) corresponding to M grades of shift register cell GOA-M of connection
To the region corresponding to afterbody shift register cell.In this case, multiple public electrodes can correspond respectively to
More than at least three regions.
Exemplarily only illustrate that display area is divided into two regions and three regions above, however the present invention is unlimited
In this, display area can be divided into more regions by control circuit and partition control module.It in such a case, it is possible to will
Multiple open electrodes are respectively set to corresponding with more regions.
By set with by control circuit or by control circuit and partition control module division multiple regions it is corresponding
Multiple public electrodes it is public can to apply exchange under partial sweep display pattern to the pixel corresponding to not selected grid line
Electrode signal, to prevent the liquid crystal polarization of liquid crystal display device.
Although being above that liquid crystal display device is illustrated to display device, however, the present invention is not limited thereto, display dress
It can be organic light-emitting display device to put.
The exemplary embodiment of the disclosure additionally provides a kind of driving method of above-mentioned display device, as above, display device
Display area be divided into multiple regions by control circuit or by control circuit and partition control module.As shown in Figure 10, it is described
The driving method of display device can include：
The data-signal of the image to be displayed in each region in S10, the multiple region of acquisition；
S20, when the corresponding data-signal of image of adjacent two frame all changes in all the multiple regions, according to
The driving method of above-mentioned gate driving circuit drives the gate driving circuit under full screen scanning display pattern；
S30, adjacent two frame the corresponding data-signal of image in the region of at least one of the multiple region nothing
During variation, according to the driving method of above-mentioned gate driving circuit, gate driving circuit is driven under partial sweep display pattern.
As described above, display device according to the exemplary embodiment of the disclosure, when not needing to full screen scanning display only
The grid line scanning of part is carried out, can carry out recharge, therefore can drop to avoid to every a line grid line and corresponding pixel
The power consumption of low display device.
According to an exemplary embodiment of the present disclosure, include liquid crystal display device, and liquid crystal display device packet in display device
In the case of including the multiple public electrodes for corresponding to the multiple region respectively, exist in the corresponding data-signal of image of adjacent two frame
When unchanged in the region of at least one of the multiple region, in the multiple region except at least one region it
Public electrode corresponding to outer region applies exchange common electrode signal.In such a case, it is possible to not being selected grid line
Corresponding pixel applies exchange common electrode signal, so as to prevent the liquid crystal polarization of liquid crystal display device.
It should be noted that：All technical solutions of the disclosure are also extensible to be applied to two side direction of grid line such as display
The constant situation of left and right sides picture, as long as in a word by stopping show the signal wire of content invariant region include grid line and
The scheme of data line repeated charge, within protection scope of the present invention.
Display device according to the exemplary embodiment of the disclosure can include mobile phone, tablet computer, television set, notebook
Any product or component with display function such as computer, Digital Frame, navigator.
Those skilled in the art will readily occur to the disclosure its after considering specification and putting into practice invention disclosed herein
Its embodiment.This application is intended to cover any variations, uses, or adaptations of the disclosure, these modifications, purposes or
Person's adaptive change follows the general principle of the disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.Description and embodiments are considered only as illustratively, and the true scope and spirit of the disclosure are by appended
Claim is pointed out.
It should be understood that the present disclosure is not limited to the precise structures that have been described above and shown in the drawings, and
And various modifications and changes may be made without departing from the scope thereof.The scope of the present disclosure is only limited by appended claim.
Claims (14)
1. a kind of gate driving circuit is provided including multi-stage shift register unit and for the multi-stage shift register unit
The control circuit of initial signal,
Wherein, the control circuit includes：
First control unit, connection control signal end, initial signal end and the first signal output end；And
Second control unit connects the control signal end, the initial signal end and second signal output terminal,
Wherein, first signal output end is connected to the first order shift register cell of the multi-stage shift register unit
Input signal end, the second signal output terminal is connected to N grades of shift registers of the multi-stage shift register unit
The input signal end of unit, N>1,
Wherein, the control circuit is configured as under the control of said control signal, via first control unit or institute
The second control unit is stated to export the initial signal to first signal output end or the second signal output terminal.
2. gate driving circuit according to claim 1, wherein, first control unit includes first switching element,
The control terminal of the first switching element connects the control signal end, first end connects the initial signal end, second end connects
Connect first signal output end；
Second control unit includes second switch element, and the control terminal of the second switch element connects the control signal
End, first end connect the second signal output terminal and connect the initial signal end via resistance, second end is grounded；
Wherein, the first switching element is identical with the conduction level of the second switch element.
3. gate driving circuit according to claim 2, wherein, the control circuit further includes：
First diode, be connected between the initial signal end and first control unit and from the initial signal end extremely
The first control unit one-way conduction；And/or
Second diode, be connected between the initial signal end and second control unit and from the initial signal end extremely
The second control unit one-way conduction.
4. gate driving circuit according to claim 2, wherein, the first switching element and the second switch element
It is P-type transistor or is N-type transistor.
5. gate driving circuit according to claim 1, wherein, first control unit includes first switching element,
The control terminal of the first switching element connects the control signal end, first end connects the initial signal end, second end connects
Connect first signal output end；
Second control unit includes second switch element, and the control terminal of the second switch element connects the control signal
End, first end connect the initial signal end, second end connects the second signal output terminal,
Wherein, the first switching element and the conduction level of the second switch element are opposite.
6. gate driving circuit according to claim 5, wherein, the first switching element and the second switch element
In one for P-type transistor, another is N-type transistor.
7. gate driving circuit according to claim 1 further includes at least one partition control module, the zonal control
Module includes control and switchs,
The control terminal of the control switch connects the control signal end of the control circuit, first end connects the stages shift and posts
The signal output end of M grades of shift register cells of storage unit, second end connect the multi-stage shift register unit
The input signal end of M+1 grades of shift register cells, M>N,
Wherein, the shut-in time of the control switch and the signal output time phase of the second control unit of the control circuit
Together.
8. a kind of display device, including the gate driving circuit described in any one in claim 1 to 7.
9. display device according to claim 8, wherein, the display device includes liquid crystal display device.
10. display device according to claim 9, wherein, the display area of the liquid crystal display device is by control circuit
Or multiple regions are divided by control circuit and partition control module,
Wherein, the liquid crystal display device includes multiple public electrodes, and the multiple public electrode corresponds to the multiple area respectively
Domain.
11. a kind of driving method of gate driving circuit, for driving the gate driving described in any one of claim 1 to 7
Circuit, including：
Under full screen scanning display pattern, by the first signal output end of control circuit to the first order shift register list
Member output initial signal；
Under partial sweep display pattern, by the second signal output terminal of control circuit to the N grades of shift register lists
Member output initial signal.
12. driving method according to claim 11, wherein, include partition control module in the gate driving circuit
When, the driving method of the gate driving circuit further includes：
When the second signal output terminal of the control circuit exports initial signal to the N grades of shift register cells, lead to
Crossing the partition control module blocks the output signal of M grades of shift register cells of the gate driving circuit to be transmitted to the
The input signal end of M+1 grades of shift register cells.
13. a kind of driving method of display device as described in any one in claim 8 to 10, the display device is shown
Show that region is divided into multiple regions by control circuit or by control circuit and partition control module,
Wherein, the driving method of the display device includes：
Obtain the data-signal of the image to be displayed in each region in the multiple region；
When the corresponding data-signal of image of adjacent two frame all changes in all the multiple regions, according to claim
The driving method of gate driving circuit in 11 and 12 described in any one drives the grid under full screen scanning display pattern
Driving circuit；And
When the corresponding data-signal of image of adjacent two frame is unchanged in the region of at least one of the multiple region, root
According to the driving method of the gate driving circuit described in any one in claim 11 and 12, driven under partial sweep display pattern
Dynamic gate driving circuit.
14. the driving method of display device according to claim 13, wherein, include liquid crystal display in the display device
Device, and in the case of multiple public electrodes of the liquid crystal display device including corresponding to the multiple region respectively, adjacent
When the corresponding data-signal of image of two frames is unchanged in the region of at least one of the multiple region, to the multiple area
Public electrode corresponding to the region in addition at least one region in domain applies exchange common electrode signal.
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| CN201810085313.XA CN108231029A (en) | 2018-01-29 | 2018-01-29 | Gate driving circuit, display device and driving method |
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Application publication date: 20180629 |