CN108198913B - A kind of growing method of LED epitaxial slice - Google Patents

A kind of growing method of LED epitaxial slice Download PDF

Info

Publication number
CN108198913B
CN108198913B CN201711240279.0A CN201711240279A CN108198913B CN 108198913 B CN108198913 B CN 108198913B CN 201711240279 A CN201711240279 A CN 201711240279A CN 108198913 B CN108198913 B CN 108198913B
Authority
CN
China
Prior art keywords
gallium nitride
nitride layer
layer
growth
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711240279.0A
Other languages
Chinese (zh)
Other versions
CN108198913A (en
Inventor
从颖
姚振
胡加辉
李鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boe Huacan Optoelectronics Suzhou Co ltd
Original Assignee
HC Semitek Suzhou Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HC Semitek Suzhou Co Ltd filed Critical HC Semitek Suzhou Co Ltd
Priority to CN201711240279.0A priority Critical patent/CN108198913B/en
Publication of CN108198913A publication Critical patent/CN108198913A/en
Application granted granted Critical
Publication of CN108198913B publication Critical patent/CN108198913B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a kind of growing methods of LED epitaxial slice, belong to technical field of semiconductors.It include: that a substrate is provided;Successively grown buffer layer, undoped gallium nitride layer, n type semiconductor layer, multiple quantum well layer and p type semiconductor layer over the substrate;Wherein, the buffer layer includes (n+1) a first gallium nitride layer and n the second gallium nitride layers of alternating growth, n >=2 and n is integer;The growth temperature of each second gallium nitride layer is higher than the growth temperature of respectively adjacent first gallium nitride layer, the growth rate of each second gallium nitride layer is faster than the growth rate of respectively adjacent first gallium nitride layer, and the thickness of each second gallium nitride layer is less than the thickness of respectively adjacent first gallium nitride layer.The present invention greatly improves the crystal quality of buffer layer entirety using higher compared with the second gallium nitride layer crystal quality of Seedling height temperature, reduces defect generation, improves the luminous efficiency and antistatic effect of light emitting diode.

Description

A kind of growing method of LED epitaxial slice
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of growing method of LED epitaxial slice.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is a kind of semi-conductor electricity that can be luminous Subcomponent, have the characteristics that efficiently, environmental protection, green, be widely used in traffic lights, automobile interior exterior lamp, landscape light in city, The technical fields such as cell phone back light source.Chip is the core component of LED, including epitaxial wafer and the electrode that extension on piece is arranged in.
Existing LED epitaxial wafer includes substrate and stacks gradually buffering (English: buffer) layer on substrate, undoped Gallium nitride layer, n type semiconductor layer, multiple quantum wells (English: Multiple Quantum Well, abbreviation: MQW) layer and p-type are partly led Body layer.Wherein, multiple quantum well layer includes that multiple Quantum Well and multiple quantum are built, and multiple Quantum Well and multiple quantum base are alternately laminated Setting.After the hole injection multiple quantum well layer that the electronics and p type semiconductor layer that n type semiconductor layer provides provide, is built and limit by quantum Progress radiation recombination in Quantum Well is scheduled on to shine.
Buffer layer is usually the gallium nitride layer in 500 DEG C~600 DEG C grown at low temperature, to be nucleated using low temperature;And Undoped gallium nitride layer is the gallium nitride layer grown under 1000 DEG C~1100 DEG C high temperature, to utilize high temperature on the basis of nucleation The preferable crystal of growth quality is formed, provides good growth base for n type semiconductor layer, multiple quantum well layer and p type semiconductor layer Plinth.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The buffer layer crystal poor quality of grown at low temperature, can generate many defects, these defects can be with epitaxial wafer It grows and constantly extends.Although high temperature advantageously forms the preferable undoped gallium nitride layer of crystal quality, avoid undoped with nitridation Gallium layer generates new defect, but undoped gallium nitride layer can not play effective blocking to the defect that buffer layer has generated Effect, defect can extend to n type semiconductor layer, multiple quantum well layer and p type semiconductor layer, the hair for causing non-radiative recombination luminous It is raw, seriously affect the luminous efficiency and antistatic effect of light emitting diode.
Summary of the invention
In order to solve the problems, such as that the prior art seriously affects the luminous efficiency and antistatic effect of light emitting diode, the present invention Embodiment provides a kind of growing method of LED epitaxial slice.The technical solution is as follows:
The embodiment of the invention provides a kind of growing method of LED epitaxial slice, the growing method includes:
One substrate is provided;
Successively grown buffer layer, undoped gallium nitride layer, n type semiconductor layer, multiple quantum well layer and p-type over the substrate Semiconductor layer;
Wherein, the buffer layer includes (n+1) a first gallium nitride layer and n the second gallium nitride layers of alternating growth, and n >= 2 and n is integer;The growth temperature of each second gallium nitride layer is higher than the growth of respectively adjacent first gallium nitride layer Temperature, the growth rate of each second gallium nitride layer are faster than the growth rate of respectively adjacent first gallium nitride layer, The thickness of each second gallium nitride layer is less than the thickness of respectively adjacent first gallium nitride layer.
Optionally, the life of the growth temperature of each second gallium nitride layer first gallium nitride layer more adjacent than respectively Long temperature is 20 DEG C high~and 60 DEG C.
Preferably, the direction of growth of the growth temperature of each second gallium nitride layer along the LED epitaxial slice Successively increase.
Preferably, the direction of growth of the growth temperature of each first gallium nitride layer along the LED epitaxial slice Successively increase.
Optionally, the growth rate of each second gallium nitride layer is the life of respectively adjacent first gallium nitride layer 5 times of long rate~10 times.
Preferably, the direction of growth of the growth rate of each second gallium nitride layer along the LED epitaxial slice Successively become faster.
Preferably, the direction of growth of the growth rate of each first gallium nitride layer along the LED epitaxial slice Successively become faster.
Optionally, the overall thickness of the n the second gallium nitride layers is the overall thickness of described (n+1) a first gallium nitride layer 1/6~1/3.
Preferably, the thickness of each second gallium nitride layer is layer-by-layer along the direction of growth of the LED epitaxial slice Increase.
Optionally, doped with aluminium in each first gallium nitride layer part adjacent with second gallium nitride layer.
Technical solution provided in an embodiment of the present invention has the benefit that
It is formed by being inserted into higher second gallium nitride layer of growth temperature in lower first gallium nitride layer of growth temperature Buffer layer, it is higher using the second gallium nitride layer crystal quality compared with Seedling height temperature, to greatly improve the crystalline substance of buffer layer entirety Weight reduces the generation of defect, and then reduces and extend to lacking for n type semiconductor layer, multiple quantum well layer and p type semiconductor layer It falls into, the generation for avoiding non-radiative recombination luminous improves the luminous efficiency and antistatic effect of light emitting diode.And second nitrogenizes The growth rate of gallium layer is very fast, thickness is smaller, it is possible to reduce the higher growth temperature of the second gallium nitride layer is lower to growth temperature The first gallium nitride layer influence, avoid gallium nitride seed crystals from decomposing.In addition, the second gallium nitride layer is inserted in the first gallium nitride layer In, the first gallium nitride layer preferred growth on substrate, is conducive to be nucleated gallium nitride seed crystals at low temperature, while the second gallium nitride layer It with the first gallium nitride layer is formed using gallium nitride material, is conducive to form Lattice Matching with undoped gallium nitride layer.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing.
Fig. 1 is a kind of flow chart of the growing method for LED epitaxial slice that the embodiment of the present invention one provides;
Fig. 2 is the structural schematic diagram for the LED epitaxial slice that the embodiment of the present invention one provides;
Fig. 3 is the structural schematic diagram for the buffer layer that the embodiment of the present invention one provides;
Fig. 3 a is the schematic diagram of aluminium doping position in the buffer layer of the offer of the embodiment of the present invention one;
Fig. 3 b is the schematic diagram of aluminium doping concentration in the buffer layer of the offer of the embodiment of the present invention one;
Fig. 4 is a kind of flow chart of the growing method of LED epitaxial slice provided by Embodiment 2 of the present invention;
Fig. 5 is the comparison diagram of sample detection result provided by Embodiment 2 of the present invention;
Fig. 5 a is the comparison diagram for the sample detection result that the embodiment of the present invention three provides;
Fig. 5 b is the comparison diagram for the sample detection result that the embodiment of the present invention four provides.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention Formula is described in further detail.
Embodiment one
The embodiment of the invention provides a kind of growing method of LED epitaxial slice, Fig. 1 is provided in this embodiment The flow chart of growing method, referring to Fig. 1, which includes:
Step 101: a substrate is provided.
Step 102: successively grown buffer layer, undoped gallium nitride layer, n type semiconductor layer, multiple quantum well layer on substrate And p type semiconductor layer.
Fig. 2 is the structural schematic diagram for the LED epitaxial slice to be formed.Wherein, 1 is substrate, and 2 be buffer layer, and 3 is not Doped gallium nitride layer, 4 be n type semiconductor layer, and 5 be multiple quantum well layer, and 6 be p type semiconductor layer.Referring to fig. 2, buffer layer 2, do not mix Miscellaneous gallium nitride layer 3, n type semiconductor layer 4, multiple quantum well layer 5, p type semiconductor layer 6 are sequentially laminated on substrate 1.
Fig. 3 is the structural schematic diagram of buffer layer, and referring to Fig. 3, in the present embodiment, buffer layer 2 includes the (n+ of alternating growth 1) a first gallium nitride layer 21 and n the second gallium nitride layers 22, n >=2 and n are integer.The growth of each second gallium nitride layer 22 Temperature is higher than the growth temperature of the first respectively adjacent gallium nitride layer 21, and the growth rate of each second gallium nitride layer 22 is faster than respectively From the growth rate of the first adjacent gallium nitride layer 21, the thickness of each second gallium nitride layer 22 is less than the first respectively adjacent nitrogen Change the thickness of gallium layer 21.
For example, buffer layer 2 includes the first gallium nitride layer 21a, the second gallium nitride layer 22a, the first gallium nitride successively grown Layer 21b, the second gallium nitride layer 22b and the first gallium nitride layer 21c, then the growth temperature of the first gallium nitride layer 21a is lower than the second nitrogen Change the growth temperature of gallium layer 22a, the growth rate of the first gallium nitride layer 21a is slower than the growth rate of the second gallium nitride layer 22a, the The thickness of one gallium nitride layer 21a is greater than the thickness of the second gallium nitride layer 22a;The growth temperature of second gallium nitride layer 22a is higher than the The growth temperature of one gallium nitride layer 21b, the growth rate of the second gallium nitride layer 22a are faster than the growth speed of the first gallium nitride layer 21b Rate, thickness of the thickness less than the first gallium nitride layer 21b of the second gallium nitride layer 22a;The growth temperature of first gallium nitride layer 21b is low In the growth temperature of the second gallium nitride layer 22b, the growth rate of the first gallium nitride layer 21b is slower than the life of the second gallium nitride layer 22b Long rate, the thickness of the first gallium nitride layer 21b are greater than the thickness of the second gallium nitride layer 22b;The growth temperature of second gallium nitride layer 22b Degree is higher than the growth temperature of the first gallium nitride layer 21c, and the growth rate of the second gallium nitride layer 22b is faster than the first gallium nitride layer 21c Growth rate, thickness of the thickness less than the first gallium nitride layer 21c of the second gallium nitride layer 22b.
The embodiment of the present invention in lower first gallium nitride layer of growth temperature by being inserted into growth temperature higher second Gallium nitride layer forms buffer layer, higher using the second gallium nitride layer crystal quality compared with Seedling height temperature, to greatly improve slow The crystal quality for rushing layer entirety reduces the generation of defect, and then reduces and extend to n type semiconductor layer, multiple quantum well layer and p-type half The defect of conductor layer, the generation for avoiding non-radiative recombination luminous, improves the luminous efficiency and antistatic effect of light emitting diode.And And second gallium nitride layer growth rate is very fast, thickness is smaller, it is possible to reduce the higher growth temperature of the second gallium nitride layer is to life The influence of long lower first gallium nitride layer of temperature, avoids gallium nitride seed crystals from decomposing.In addition, the second gallium nitride layer is inserted in first In gallium nitride layer, the first gallium nitride layer preferred growth on substrate, is conducive to be nucleated gallium nitride seed crystals at low temperature, while second Gallium nitride layer and the first gallium nitride layer are formed using gallium nitride material, are conducive to form lattice with undoped gallium nitride layer Match.
Optionally, n≤8.On the one hand the waste of material and the increase of production cost are avoided, on the other hand also avoids inserting Second gallium nitride layer of the high growth temperature entered is too many and influences to need the generation of the gallium nitride seed crystals of low-temperature epitaxy and its growth matter Amount.
It optionally, can be doped with aluminium, to stop in each first gallium nitride layer part adjacent with the second gallium nitride layer First gallium nitride layer low-temperature epitaxy bring defect extends along the direction of growth of the light emitting diode.
It or include the first gallium nitride layer 21a, the second gallium nitride layer 22a, the first gallium nitride successively grown with buffer layer 2 For layer 21b, the second gallium nitride layer 22b and the first gallium nitride layer 21c, the first gallium nitride layer 21a and the second gallium nitride layer 22a phase Adjacent part, the first gallium nitride layer 21b adjacent with the second gallium nitride layer 22a part, the first gallium nitride layer 21b and second are nitrogenized All doped with aluminium (Fig. 3 a in part gallium layer 22b adjacent part, the first gallium nitride layer 21c adjacent with the second gallium nitride layer 22b It is middle to be indicated with blacking).
Preferably, the doping concentration of aluminium can be along the growth side of the LED epitaxial slice in each first gallium nitride layer It is increased to layer-by-layer, to stop the first gallium nitride layer low-temperature epitaxy bring defect along the direction of growth of the light emitting diode as far as possible Extend.
It or include the first gallium nitride layer 21a, the second gallium nitride layer 22a, the first gallium nitride successively grown with buffer layer 2 For layer 21b, the second gallium nitride layer 22b and the first gallium nitride layer 21c, as shown in Figure 3b, the first gallium nitride layer 21a and the second nitrogen Change the part adjacent with the second gallium nitride layer 22a the adjacent part gallium layer 22a, the first gallium nitride layer 21b, the first gallium nitride layer Aluminium in part 21b adjacent with the second gallium nitride layer 22b part, the first gallium nitride layer 21c adjacent with the second gallium nitride layer 22b Doping concentration gradually rise.
Specifically, the doping concentration of aluminium can be 10 in each first gallium nitride layer20/cm3~1021/cm3
It or include the first gallium nitride layer 21a, the second gallium nitride layer 22a, the first gallium nitride successively grown with buffer layer 2 For layer 21b, the second gallium nitride layer 22b and the first gallium nitride layer 21c, the first gallium nitride layer 21a and the second gallium nitride layer 22a phase The doping concentration of aluminium can be 2*10 in adjacent part20/cm3, the first gallium nitride layer 21b is adjacent with the second gallium nitride layer 22a The doping concentration of aluminium can be 4*10 in part20/cm3, the first gallium nitride layer 21b adjacent with the second gallium nitride layer 22b part The doping concentration of middle aluminium can be 6*1020/cm3, aluminium in part the first gallium nitride layer 21c adjacent with the second gallium nitride layer 22b Doping concentration can be 8*1020/cm3
Optionally, the growth temperature for the first gallium nitride layer that the growth temperature of each second gallium nitride layer can be more adjacent than respectively Spend it is 20 DEG C high~60 DEG C.If 20 DEG C higher than the growth temperature of the first adjacent gallium nitride layer of the growth temperature of the second gallium nitride layer with Under, then the effect for improving crystal quality may be not achieved since the growth temperature of the second gallium nitride layer is too low;If the second nitridation The growth temperature of gallium layer, then may be due to the second gallium nitride layer than high 60 DEG C of growth temperature or more of the first adjacent gallium nitride layer Growth temperature it is too high and gallium nitride seed crystals are damaged.
Preferably, the growth temperature for the first gallium nitride layer that the growth temperature of each second gallium nitride layer can be more adjacent than respectively Spend it is 30 DEG C high~50 DEG C.
Further, the growth temperature of each second gallium nitride layer can be along the direction of growth of the LED epitaxial slice Successively increase.The growth temperature that second gallium nitride layer starts is lower, can avoid damage to the gallium nitride for just starting growth as far as possible Crystal seed, gradually stable with subsequent nitridation gallium crystal seed, the growth temperature of the second gallium nitride layer successively increases, can be maximumlly Improve crystal quality.
Preferably, the difference of the growth temperature of two neighboring second gallium nitride layer can be 5 DEG C.It is successively mentioned with 5 DEG C for interval The growth quality of high second gallium nitride layer, can to growth temperature have it is certain promote effect in the case where, avoid as far as possible due to Growth temperature is improved too fast and is damaged to the gallium nitride seed crystals of low-temperature epitaxy.
Further, the growth temperature of each first gallium nitride layer can be along the direction of growth of the LED epitaxial slice Successively increase.Gradually stable with subsequent nitridation gallium crystal seed, the growth temperature of the first gallium nitride layer successively increases, can be maximum Change ground and improves crystal quality.
Preferably, the difference of the growth temperature of two neighboring first gallium nitride layer can be 3 DEG C.It is successively mentioned with 3 DEG C for interval The growth quality of high first gallium nitride layer, can to growth temperature have it is certain promote effect in the case where, avoid as far as possible due to Growth temperature is improved too fast and is damaged to the gallium nitride seed crystals of low-temperature epitaxy.
In practical applications, the growth temperature of each second gallium nitride layer can be 600 DEG C~625 DEG C.Such as n=4,4 The growth temperature of a second gallium nitride layer is followed successively by 600 DEG C, 605 DEG C, 610 DEG C and 615 DEG C.While each first gallium nitride layer Growth temperature can be 540 DEG C~560 DEG C.Or by taking n=4 as an example, the growth temperature of 5 the first gallium nitride layers is followed successively by 540 DEG C, 543 DEG C, 546 DEG C, 549 DEG C and 552 DEG C.
Optionally, the growth rate of each second gallium nitride layer can be the average life of the first respectively adjacent gallium nitride layer 5 times of long rate~10 times.If the growth rate of the second gallium nitride layer is less than the 5 of the growth rate of the first adjacent gallium nitride layer Times, then the quality of gallium nitride seed crystals may be influenced since the growth rate of the second gallium nitride layer is too slow;If the second gallium nitride layer Growth rate be greater than 10 times of growth rate of the first adjacent gallium nitride layer, then may be due to the life of the second gallium nitride layer Long rate is too fast and influences the stabilization of gallium nitride seed crystals and crystal quality.
Preferably, the growth rate of each second gallium nitride layer can be the average life of the first respectively adjacent gallium nitride layer 7 times of long rate~8 times.
Further, the growth rate of each second gallium nitride layer can be along the direction of growth of the LED epitaxial slice It successively becomes faster, is matched with the situation of change with each second gallium nitride layer growth temperature, in the nitrogen for avoiding damage to low-temperature epitaxy In the case where changing gallium crystal seed, the crystal quality of buffer layer is improved as far as possible.
Specifically, the growth rate of each first gallium nitride layer can along the LED epitaxial slice the direction of growth by Layer becomes faster, and is matched with the situation of change with each first gallium nitride layer growth temperature, in the case where realizing low temperature nucleation, to the greatest extent The crystal quality of buffer layer may be improved.It is gradually stable with subsequent nitridation gallium crystal seed simultaneously, crystal quality it is poor first The growth rate of gallium nitride layer gradually rises the raising to bulk crystal quality with positive influence.
In practical applications, the growth rate of each second gallium nitride layer can be 25nm/min~50nm/min.For example, The growth rate of n=4,4 the second gallium nitride layers are followed successively by 25nm/min, 35nm/min, 40nm/min and 50nm/min.Simultaneously The growth rate of each first gallium nitride layer can be 5nm/min~10nm/min.Or by taking n=4 as an example, 5 first nitridations The growth rate of gallium layer is followed successively by 5nm/min, 6nm/min, 7nm/min, 8nm/min and 9nm/min.
Optionally, the overall thickness of n the second gallium nitride layers can be the 1/6 of the overall thickness of (n+1) a first gallium nitride layer ~1/3.It, may be by if the overall thickness of n the second gallium nitride layer is less than the 1/6 of the overall thickness of (n+1) a first gallium nitride layer Effect that is too small in the thickness of the second gallium nitride layer and not having raising buffer layer crystal quality, it is also possible to due to the first gallium nitride The thickness of layer is too big and influences the crystal quality of buffer layer;If the overall thickness of n the second gallium nitride layers is greater than (n+1) a first nitrogen Change the 1/3 of the overall thickness of gallium layer, then gallium nitride seed crystals may be damaged since the thickness of the second gallium nitride layer is too big, It may cause to build brilliant failure since the thickness of the first gallium nitride layer is too small.
Preferably, the overall thickness of n the second gallium nitride layers can be the 1/5 of the overall thickness of (n+1) a first gallium nitride layer ~1/4.
Further, the thickness of each second gallium nitride layer can successively increase along the direction of growth of LED epitaxial slice Greatly.Since the crystal quality improvement that the thickness of the second gallium nitride layer plays it has a great impact, with cryogenic nitrogen Change the gradually stable of gallium crystal seed, influence of the second gallium nitride layer of high growth temperature to low temperature nitride gallium crystal seed is smaller and smaller, successively The thickness of the second gallium nitride layer is improved, gallium nitride seed crystals will not be damaged, while can maximumlly improve buffer layer Crystal quality.
In practical applications, the thickness of each second gallium nitride layer can be 0.2nm~1nm.For example, n=4,4 second The thickness of gallium nitride layer is followed successively by 0.2nm, 0.4nm, 0.8nm and 1nm.The thickness of each first gallium nitride layer can be simultaneously 2nm~4nm.Or by taking n=4 as an example, the thickness of 5 the first gallium nitride layers is followed successively by 2nm, 2.5nm, 3nm, 3.5nm and 4nm.
In the concrete realization, the growth pressure of buffer layer can be 200torr~500torr.
Specifically, substrate can be Sapphire Substrate, and buffer growth is on sapphire [0001] face.N-type semiconductor Layer can be the gallium nitride layer of n-type doping;P type semiconductor layer can be the gallium nitride layer of p-type doping.Multiple quantum well layer can wrap It includes multiple Quantum Well and multiple quantum is built, multiple Quantum Well and multiple quantum build alternately laminated setting.
More specifically, the thickness of undoped gallium nitride layer can be 2 μm~3.5 μm.The thickness of n type semiconductor layer can be 2 μm~3 μm.The thickness of p type semiconductor layer can be 50nm~80nm.The thickness of each Quantum Well can be 2nm~3nm;Respectively The thickness of a quantum barrier layer can be 8nm~11nm;The quantity that quantum is built is identical as the quantity of Quantum Well, and the quantity of Quantum Well can Think 11~13;The thickness of multiple quantum well layer can be 130nm~160nm.
In the concrete realization, the growth temperature of undoped gallium nitride layer can be 1000 DEG C~1100 DEG C, and growth pressure can Think 200torr~600torr, growth rate can be 2 μm/h~5 μm/h.The growth temperature of n type semiconductor layer can be 1000 DEG C~1100 DEG C, growth pressure can be 200torr~300torr, and growth rate can be 3 μm/h~8 μm/h.P-type The growth temperature of semiconductor layer can be 940 DEG C~980 DEG C, and growth pressure can be 200torr~600torr, growth rate It can be 0.3 μm/h~1 μm/h.The growth temperature of each Quantum Well can be 760 DEG C~780 DEG C, and growth pressure can be 200torr, growth rate can be 0.2nm/min~0.6nm/min;The growth temperature of each quantum barrier layer can be 860 DEG C ~890 DEG C, growth pressure can be 200torr, and growth rate can be 2nm/min~5nm/min.
Optionally, which can also include:
Electronic barrier layer is grown, between multiple quantum well layer and p type semiconductor layer to stop electron injection p type semiconductor layer Non-radiative recombination occurs with hole.
Specifically, electronic barrier layer can be the gallium nitride layer of p-type doping, specially AlyGa1-yN layers, 0.15≤y≤ 0.25。
More specifically, the thickness of electronic barrier layer can be 30nm~50nm.
In the concrete realization, the growth temperature of electronic barrier layer can be 930 DEG C~970 DEG C, and growth pressure can be 100torr, growth rate can be 0.2 μm/h~0.8 μm/h.
Optionally, before step 102, which can also include:
In a hydrogen atmosphere, controlled at 1000 DEG C~1100 DEG C, pressure is 200torr~500torr, handles substrate 5min~6min, to clean substrate surface.
Optionally, which can also include:
The surface of p type semiconductor layer is activated, p-type contact layer is formed, to be led in epitaxial wafer with transparent in chip Ohmic contact is formed between electric layer.
It should be noted that p type semiconductor layer, which generallys use magnesium, carries out p-type doping, activation p type semiconductor layer is primarily referred to as P-type is activated the magnesium adulterated in semiconductor layer, more holes is generated after activating magnesium, avoids leading to ohm due to not activating It is poor to contact, and the case where high voltage low-light level occurs in chip.
Specifically, the surface of p type semiconductor layer is activated, forms p-type contact layer, may include:
In a nitrogen atmosphere, controlled at 650 DEG C~750 DEG C, p type semiconductor layer 20min~30min is handled.
Embodiment two
The embodiment of the invention provides a kind of growing method of LED epitaxial slice, growth side provided in this embodiment Method is a kind of specific implementation for the growing method that embodiment one provides.In the present embodiment, using Veeco K465i or C4 gold Category organic compound chemical gaseous phase deposition (English: Metal Organic Chemical Vapor Deposition, referred to as: MOCVD) equipment realizes the growth of LED epitaxial wafer.Using high-purity hydrogen (H2) or high pure nitrogen (N2) or high-purity H2And high-purity N2's Mixed gas is as carrier gas, high-purity N H3As nitrogen source, trimethyl gallium (TMGa) and triethyl-gallium (TEGa) are used as gallium source, front three Base indium (TMIn) is used as indium source, and trimethyl aluminium (TMAl) is used as silicon source, and silane (SiH4) is used as N type dopant, two luxuriant magnesium (CP2Mg) it is used as P-type dopant.Chamber pressure is controlled in 100torr~600torr.
Specifically, Fig. 4 is the flow chart of growing method provided in this embodiment, and referring to fig. 4, which includes:
Step 301: control reaction chamber temperature be 1050 DEG C, pressure 250torr, by Sapphire Substrate hydrogen atmosphere The lower high-temperature process for carrying out 5.5min.
Step 302: control chamber pressure is 400torr, forms buffer layer on a sapphire substrate.
In the present embodiment, buffer layer includes 7 the first gallium nitride layers and 6 the second gallium nitride layers of alternating growth.7 The thickness of first gallium nitride layer is 3nm;The growth temperature of 7 the first gallium nitride layers is followed successively by 540 DEG C, 543 along the direction of growth DEG C, 546 DEG C, 549 DEG C, 552 DEG C, 555 DEG C and 558 DEG C;The growth rate of 7 the first gallium nitride layers is followed successively by along the direction of growth 5nm/min, 6nm/min, 7nm/min, 8nm/min, 9nm/min, 10nm/min and 11nm/min.6 the second gallium nitride layers Thickness is followed successively by 0.2nm, 0.4nm, 0.8nm, 1nm, 1.2nm and 1.5nm along the direction of growth;The growth of 6 the second gallium nitride layers Temperature is followed successively by 600 DEG C, 605 DEG C, 610 DEG C, 615 DEG C, 620 DEG C and 625 DEG C along the direction of growth;The life of 6 the second gallium nitride layers Long rate is followed successively by 25nm/min, 30nm/min, 35nm/min, 40nm/min, 45nm/min and 50nm/min along the direction of growth.
Step 303: control reaction chamber temperature is 1050 DEG C, pressure 400torr, and growth rate is 3.5 μm/h, is being buffered The undoped gallium nitride layer that growth thickness is 2.75 μm on layer.
Step 304: control reaction chamber temperature is 1050 DEG C, pressure 250torr, and growth rate is 5.5 μm/h, is not being mixed The n type gallium nitride layer that growth thickness is 2.5 μm on miscellaneous gallium nitride layer.
Step 305: control chamber pressure is 200torr, and multiple quantum well layer is grown on n type semiconductor layer.
In the present embodiment, multiple quantum well layer includes that alternately stacked 12 Quantum Well and 12 quantum are built.Each quantum Well layer is indium gallium nitrogen layer, and with a thickness of 2.5nm, growth temperature is 770 DEG C, growth pressure 200torr, growth rate 0.4nm/ min;Each quantum barrier layer is gallium nitride layer, and growth temperature is 875 DEG C, growth pressure 200torr, growth rate 3.5nm/ Min, with a thickness of 12nm.
Step 306: control growth temperature is 950 DEG C, growth pressure 150torr, and growth rate is 0.6 μm/h, more Growth thickness is the gallium nitride layer of 40nm on quantum well layer, forms electronic barrier layer.
Step 307: control growth temperature is 960 DEG C, growth pressure 400torr, and growth rate is 0.65 μm/h, in electricity Growth thickness is the p-type gallium nitride layer of 65nm on sub- barrier layer.
Plate the tin indium oxide metal oxygen of 110nm under identical process conditions to the first sample and the second sample separately below Compound (English: Indium Tin Oxides, referred to as: ITO) layer, the Cr/Pt/Au electrode of 120nm and the SiO of 40nm2Protection Layer, and respectively will treated the first sample and the second sample grinding and cutting at 305 μm * 635 μm (12mi*25mil) core particles With the core particles of 229 μm * 559 μm (9mi*22mil).Wherein, the second sample is using outside light emitting diode provided in this embodiment Prolong what the growing method of piece obtained, the growing method and the second sample that the first sample uses are essentially identical, the difference is that, the It is 545 DEG C, pressure 250torr that buffer layer, which is control reaction chamber temperature, in a sample, and growth rate is 15nm/min growth With a thickness of the gallium nitride layer of 22.5nm.
Then the same position of the first sample and the second sample after treatment respectively selects 300 crystal grain, identical Under process conditions, it is packaged into white light LEDs.It is tested under the conditions of driving current 120mA from the first sample respectively using integrating sphere The photoelectric properties of the crystal grain of product and the crystal grain from the second sample.
Fig. 5 be above-mentioned test comparative result figure, referring to Fig. 5, test result show, from the second sample crystal grain and Than comparing from the crystal grain of the first sample, light intensity is obviously improved under the driving current of 120mA, and antistatic effect increases By force, illustrate that the epitaxial wafer that growing method provided in this embodiment is formed can reduce defect, improve crystal quality.
Embodiment three
The embodiment of the invention provides a kind of growing method of LED epitaxial slice, growth side provided in this embodiment Method is another specific implementation for the growing method that embodiment one provides.Growing method provided in this embodiment is mentioned with embodiment two The growing method of confession is essentially identical, the difference is that, buffer layer include alternating growth 6 the first gallium nitride layers and 5 Nitride gallium layer.The thickness of 7 the first gallium nitride layers is 3nm;The growth temperature of 7 the first gallium nitride layers is 550 DEG C;7 The growth rate of a first gallium nitride layer is along the direction of growth successively 8nm/min.The thickness of 6 the second gallium nitride layers is along the direction of growth It is followed successively by 0.2nm, 0.4nm, 0.8nm, 1nm, 1.2nm and 1.5nm;The growth temperature of 6 the second gallium nitride layers is along the direction of growth It is followed successively by 600 DEG C, 605 DEG C, 610 DEG C, 615 DEG C, 620 DEG C and 625 DEG C;The growth rate of 6 the second gallium nitride layers is along growth side To being followed successively by 25nm/min, 30nm/min, 35nm/min, 40nm/min, 45nm/min and 50nm/min.
The LED epitaxial slice that the present embodiment is obtained is processed into sample identical with embodiment two and tests, Fig. 5 a is the comparative result figure of above-mentioned test, and referring to Fig. 5 a, test result is shown, light intensity has under the driving current of 120mA It is obviously improved, and antistatic effect enhances.
Example IV
The embodiment of the invention provides a kind of growing method of LED epitaxial slice, growth side provided in this embodiment Method is another specific implementation for the growing method that embodiment one provides.Growing method provided in this embodiment is mentioned with embodiment two The growing method of confession is essentially identical, the difference is that, buffer layer include alternating growth 7 the first gallium nitride layers and 6 Nitride gallium layer.The thickness of 7 the first gallium nitride layers is 3nm;The growth temperature of 7 the first gallium nitride layers along the direction of growth according to Secondary is 540 DEG C, 543 DEG C, 546 DEG C, 549 DEG C, 552 DEG C, 555 DEG C and 558 DEG C;The growth rate of 7 the first gallium nitride layers is along raw Length direction is followed successively by 5nm/min, 6nm/min, 7nm/min, 8nm/min, 9nm/min, 10nm/min and 11nm/min.6 The thickness of nitride gallium layer is followed successively by 0.2nm, 0.4nm, 0.8nm, 1nm, 1.2nm and 1.5nm along the direction of growth;6 the second nitrogen The growth temperature for changing gallium layer is followed successively by 610 DEG C along the direction of growth;The growth rate of 6 the second gallium nitride layers along the direction of growth successively For 35nm/min.
The LED epitaxial slice that the present embodiment is obtained is processed into sample identical with embodiment two and tests, Fig. 5 b is the comparative result figure of above-mentioned test, and referring to Fig. 5 b, test result is shown, light intensity has under the driving current of 120mA It is obviously improved, and antistatic effect enhances.
It should be noted that in other embodiments, the parameters such as growth temperature of each layer can also take other values, the present invention The numerical value being not restricted in above-described embodiment.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.

Claims (10)

1. a kind of growing method of LED epitaxial slice, which is characterized in that the growing method includes:
One substrate is provided;
Successively grown buffer layer, undoped gallium nitride layer, n type semiconductor layer, multiple quantum well layer and p-type are partly led over the substrate Body layer;
Wherein, the buffer layer includes (n+1) a first gallium nitride layer and n the second gallium nitride layers, n >=2 and n of alternating growth For integer;The growth temperature of each second gallium nitride layer is higher than the growth temperature of respectively adjacent first gallium nitride layer Degree, the growth rate of each second gallium nitride layer are faster than the growth rate of respectively adjacent first gallium nitride layer, often The thickness of a second gallium nitride layer is less than the thickness of respectively adjacent first gallium nitride layer.
2. growing method according to claim 1, which is characterized in that the growth temperature ratio of each second gallium nitride layer Respectively the growth temperature of adjacent first gallium nitride layer it is 20 DEG C high~60 DEG C.
3. growing method according to claim 2, which is characterized in that the growth temperature edge of each second gallium nitride layer The direction of growth of the LED epitaxial slice successively increases.
4. growing method according to claim 2, which is characterized in that the growth temperature edge of each first gallium nitride layer The direction of growth of the LED epitaxial slice successively increases.
5. growing method according to any one of claims 1 to 4, which is characterized in that each second gallium nitride layer Growth rate is 5 times~10 times of the growth rate of respectively adjacent first gallium nitride layer.
6. growing method according to claim 5, which is characterized in that the growth rate edge of each second gallium nitride layer The direction of growth of the LED epitaxial slice successively becomes faster.
7. growing method according to claim 5, which is characterized in that the growth rate edge of each first gallium nitride layer The direction of growth of the LED epitaxial slice successively becomes faster.
8. growing method according to any one of claims 1 to 4, which is characterized in that the n the second gallium nitride layer it is total With a thickness of the 1/6~1/3 of the overall thickness of (n+1) a first gallium nitride layer.
9. growing method according to claim 8, which is characterized in that the thickness of each second gallium nitride layer is described in The direction of growth of LED epitaxial slice successively increases.
10. growing method according to any one of claims 1 to 4, which is characterized in that each first gallium nitride layer with Doped with aluminium in the adjacent part of second gallium nitride layer.
CN201711240279.0A 2017-11-30 2017-11-30 A kind of growing method of LED epitaxial slice Active CN108198913B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711240279.0A CN108198913B (en) 2017-11-30 2017-11-30 A kind of growing method of LED epitaxial slice

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711240279.0A CN108198913B (en) 2017-11-30 2017-11-30 A kind of growing method of LED epitaxial slice

Publications (2)

Publication Number Publication Date
CN108198913A CN108198913A (en) 2018-06-22
CN108198913B true CN108198913B (en) 2019-08-02

Family

ID=62573251

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711240279.0A Active CN108198913B (en) 2017-11-30 2017-11-30 A kind of growing method of LED epitaxial slice

Country Status (1)

Country Link
CN (1) CN108198913B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110767782A (en) * 2018-07-26 2020-02-07 上海亚曼光电科技有限公司 High-brightness light-emitting diode epitaxial wafer and preparation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104157750A (en) * 2014-08-25 2014-11-19 圆融光电科技有限公司 Light-emitting diode epitaxial growth method
CN105576090A (en) * 2016-01-25 2016-05-11 华灿光电(苏州)有限公司 Preparation method of LED epitaxial wafer and LED epitaxial wafer
CN107086256A (en) * 2017-03-15 2017-08-22 华灿光电(浙江)有限公司 Manufacturing method of light-emitting diode epitaxial wafer

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838029A (en) * 1994-08-22 1998-11-17 Rohm Co., Ltd. GaN-type light emitting device formed on a silicon substrate
JPH11274649A (en) * 1998-03-26 1999-10-08 Hitachi Ltd Semiconductor optical element and manufacture thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104157750A (en) * 2014-08-25 2014-11-19 圆融光电科技有限公司 Light-emitting diode epitaxial growth method
CN105576090A (en) * 2016-01-25 2016-05-11 华灿光电(苏州)有限公司 Preparation method of LED epitaxial wafer and LED epitaxial wafer
CN107086256A (en) * 2017-03-15 2017-08-22 华灿光电(浙江)有限公司 Manufacturing method of light-emitting diode epitaxial wafer

Also Published As

Publication number Publication date
CN108198913A (en) 2018-06-22

Similar Documents

Publication Publication Date Title
CN108091741B (en) A kind of growing method of LED epitaxial slice
CN106611808B (en) Growth method of light-emitting diode epitaxial wafer
CN107195738B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN107293619B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN106887494B (en) Epitaxial wafer of light emitting diode and manufacturing method thereof
CN103824908B (en) A kind of epitaxial growth method improving GaN base LED electrostatic tolerance
CN103337573A (en) Epitaxial wafer of semiconductor light emitting diode and manufacturing method of epitaxial wafer
CN109346583A (en) A kind of LED epitaxial slice and preparation method thereof
CN107086256B (en) Manufacturing method of light-emitting diode epitaxial wafer
CN106206866A (en) Manufacturing method of light-emitting diode and light-emitting diode
CN105870277A (en) Light-emitting diode epitaxial wafer and growth method thereof
CN107887485B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN109065679A (en) A kind of LED epitaxial slice and its manufacturing method
CN109860358A (en) A kind of gallium nitride based LED epitaxial slice and preparation method thereof
CN109920884A (en) LED epitaxial slice and its growing method
CN108987544A (en) A kind of LED epitaxial slice and its manufacturing method
CN109473514A (en) A kind of gallium nitride based LED epitaxial slice and its manufacturing method
CN107068824B (en) Epitaxial wafer of light emitting diode and manufacturing method thereof
CN109671817B (en) Light emitting diode epitaxial wafer and preparation method thereof
CN109065682B (en) A kind of LED epitaxial slice and its manufacturing method
CN108550676A (en) A kind of LED epitaxial slice and its manufacturing method
CN108461582B (en) A kind of growing method and LED epitaxial slice of LED epitaxial slice
CN108470808A (en) A kind of LED epitaxial slice and its manufacturing method
CN108198913B (en) A kind of growing method of LED epitaxial slice
CN109473521B (en) Light emitting diode epitaxial wafer and preparation method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address

Address after: 215600 CHENFENG highway, Zhangjiagang Economic Development Zone, Suzhou City, Jiangsu Province

Patentee after: BOE Huacan Optoelectronics (Suzhou) Co.,Ltd.

Country or region after: China

Address before: 215600 CHENFENG highway, Zhangjiagang Economic Development Zone, Suzhou City, Jiangsu Province

Patentee before: HC SEMITEK (SUZHOU) Co.,Ltd.

Country or region before: China