CN108198849B - Zener diode and manufacturing method thereof - Google Patents

Zener diode and manufacturing method thereof Download PDF

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CN108198849B
CN108198849B CN201711189305.1A CN201711189305A CN108198849B CN 108198849 B CN108198849 B CN 108198849B CN 201711189305 A CN201711189305 A CN 201711189305A CN 108198849 B CN108198849 B CN 108198849B
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epitaxial layer
well region
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semiconductor substrate
doping
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CN108198849A (en
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殷登平
赵豹
王世军
姚飞
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Nanjing Xilijie Semiconductor Technology Co., Ltd.
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Nanjing Sili Microelectronics Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/866Zener diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes

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Abstract

The application discloses a Zener diode and a manufacturing method thereof, comprising the following steps: a semiconductor substrate; a first epitaxial layer on the semiconductor substrate; the well region is positioned in the first epitaxial layer; the second epitaxial layer is positioned on the well region; and the doped region is positioned in the second epitaxial layer, wherein the semiconductor substrate, the first epitaxial layer and the well region are respectively of a first doping type, the doped region is of a second doping type, the first doping type is opposite to the second doping type, and the doping concentration of the first epitaxial layer is higher than that of the second epitaxial layer. The first doping type is one of an N-type and a P-type, and the second doping type is the other of the N-type and the P-type. The Zener diode can simultaneously improve the stability of breakdown voltage and reduce the dynamic resistance by adding a second epitaxial layer and forming a well region in the first epitaxial layer by high-energy ion implantation.

Description

Zener diode and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a Zener diode and a manufacturing method thereof.
Background
The structure diagram of the zener diode in the prior art is shown in fig. 1a, and includes a heavily doped semiconductor substrate 110, a lightly doped epitaxial layer 120, a well region 130, and a doped region 140, where the doped region 140 is opposite to the doping type of the heavily doped semiconductor substrate 110, the lightly doped epitaxial layer 120, and the well region 130, and a PN junction is formed between the well region 130 and the doped region 140. In order to obtain a higher breakdown voltage, the thermal diffusion time needs to be increased to ensure that the depth of the well region 130 is greater than the width of the depletion layer in the epitaxial layer 120 at the junction breakdown. When the well region 130 diffuses in the epitaxial layer, the doping impurities of the heavily doped semiconductor substrate 110 also diffuse into the epitaxial layer 120 from the bottom of the epitaxial layer 120, thereby affecting the doping concentrations of the epitaxial layer 120 and the bottom of the well 130.
If the thickness of the lightly doped epitaxial layer 120 is not large enough, the heavily doped semiconductor substrate 110 will diffuse outward to increase the concentration of the epitaxial layer 120 and the bottom of the well region 130, with a carrier concentration profile as shown by the solid line a in fig. 1 b. Since the breakdown voltage of the zener diode is mainly determined by the doping concentration of the well region 130, the breakdown voltage of the zener diode is higher as the doping concentration of the well region 130 is lower, and thus the breakdown voltage of the zener diode is affected by the semiconductor substrate 110, and thus is unstable, when the zener diode breaks down, if the edge of the depletion layer is close to the bottom of the well region and even extends into the epitaxial layer, an electric field exists at the bottom of the well region 130 and even in the epitaxial layer 120, and the breakdown electric field distribution is shown by the dotted line b in fig. 1 b.
For example, in a diode having a breakdown voltage of 70V, the depletion layer width is about 4 μm, and the semiconductor substrate resistance is 0.0025 to 0.004. omega. cm. If the thickness of the prepared epitaxial layer is 6 μm (larger than the width of the depletion layer), the actual epitaxial layer will have a certain error in the manufacturing process, and the error will be within ± 10%, i.e. the distribution range of the thickness of the epitaxial layer is about 5.4 μm to 6.6 μm. The variation of the concentration of the epitaxial layer and the bottom of the well region, the diffusion of the semiconductor substrate, and the variation of the thickness of the epitaxial layer can cause the variation range of the breakdown voltage of the diode to be 55V-85V. If the thickness of the epitaxial layer is increased from 6um to 9um, impurities of the semiconductor substrate are prevented from diffusing to the bottom of the well region, so that the breakdown voltage of the diode can be ensured to be stable, but the increase of the thickness of the epitaxial layer with low concentration can increase the on-resistance of the diode. For example, for a diode with a breakdown voltage of 70V, the resistance of a 6um thick epitaxial layer is about 1.5 Ω with the same other parameters, and when the thickness of the epitaxial layer is increased to 9um, the resistance increases to 4 Ω. The corresponding current down clamp voltage increases from 80V to 100V due to the low doped epitaxial layer.
Thus, the breakdown voltage as well as the resistance of the prior art zener diodes is affected by the thickness of the lightly doped epitaxial layer. On the premise of ensuring that the resistance of the Zener diode is small, obtaining a high stable breakdown voltage has certain challenges.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a zener diode and a method for manufacturing the same, which can improve the stability of breakdown voltage and reduce the dynamic resistance by adding a second epitaxial layer and forming a well region in a first epitaxial layer by high energy ion implantation.
According to a first aspect of the present invention, there is provided a zener diode comprising: a semiconductor substrate; the first epitaxial layer is positioned on the semiconductor substrate; the well region is positioned in the first epitaxial layer; the second epitaxial layer is positioned on the well region; and the doped region is positioned in the second epitaxial layer, wherein the semiconductor substrate, the first epitaxial layer and the well region are respectively of a first doping type, the doped region is of a second doping type, and the first doping type is opposite to the second doping type.
Preferably, the well region is formed by high-energy ion implantation, and the implantation energy is more than 1100 KeV.
Preferably, the first doping type is one of an N-type and a P-type, and the second doping type is the other of the N-type and the P-type.
Preferably, the doping concentration of the first epitaxial layer is 1014-1016Atoms per cubic centimeter.
Preferably, the doping concentration of the second epitaxial layer is 1013-1014Atoms per cubic centimeter.
Preferably, the doping concentration of the semiconductor substrate is 2 × 1019-1×1020Atoms per cubic centimeter.
Preferably, the peak doping concentration of the well region is located inside the first epitaxial layer.
Preferably, the thickness of the first epitaxial layer is selected in accordance with the dopant profile of the well region such that the dopants of the well region diffuse to abut the semiconductor substrate.
Preferably, the thickness of the second epitaxial layer is selected according to a breakdown voltage of the zener diode.
Preferably, the method further comprises the following steps: a trench isolation structure surrounding the first epitaxial layer, the well region, the second epitaxial layer and the doped region and extending into the semiconductor substrate; the dielectric layer is positioned on the groove isolation structure and the doped region; a first electrode on the dielectric layer, the first electrode at least partially penetrating the dielectric layer to connect to the doped region; a passivation layer at an edge on the first electrode; and the second electrode is positioned on the surface of the semiconductor substrate opposite to the first epitaxial layer.
According to a second aspect of the present invention, there is provided a method for manufacturing a zener diode, comprising:
forming a first epitaxial layer on the semiconductor substrate; forming a well region in the first epitaxial layer through high-energy ion implantation, so that the peak value of the doping concentration of the well region is positioned inside the first epitaxial layer; forming a second epitaxial layer on the well region; and forming a doped region in the second epitaxial layer, wherein the semiconductor substrate, the first epitaxial layer and the well region are respectively of a first doping type, the doped region is of a second doping type, and the first doping type is opposite to the second doping type.
Preferably, the implantation energy for forming the well region in the first epitaxial layer by high-energy ion implantation is more than 1100 KeV.
Preferably, a thermal treatment process is performed after the formation of the well region, and the thickness of the first epitaxial layer is selected according to the dopant distribution of the well region, so that the well region is diffused in the first epitaxial layer to be adjacent to the semiconductor substrate.
Preferably, the first doping type is one of an N-type and a P-type, and the second doping type is the other of the N-type and the P-type.
Preferably, the doping concentration of the first epitaxial layer is 1014-1016Atoms per cubic centimeter.
Preferably, the doping concentration of the second epitaxial layer is 1013-1014Atoms per cubic centimeter.
Preferably, the doping concentration of the semiconductor substrate is 2 × 1019-1×1020Atoms per cubic centimeter.
Preferably, the method further comprises the following steps: forming a trench isolation structure surrounding the first epitaxial layer, the well region, the second epitaxial layer and the doped region and extending into the semiconductor substrate; forming a dielectric layer on the trench isolation structure and the doped region; forming a first electrode on the dielectric layer, so that the first electrode penetrates through the dielectric layer and is connected with the doped region; and forming a second electrode on the surface of the semiconductor substrate opposite to the first epitaxial layer.
According to the Zener diode provided by the embodiment of the invention, the Zener diode comprises the first epitaxial layer and the second epitaxial layer, wherein the doping concentration of the first epitaxial layer is higher than that of the second epitaxial layer, and the high-energy doped well region is formed in the first epitaxial layer, so that the stability of breakdown voltage can be improved and the dynamic resistance can be reduced at the same time.
In a preferred embodiment, the thickness of the first epitaxial layer is selected in accordance with the dopant profile of the well region, such that the dopants of the well region diffuse into the adjoining semiconductor substrate after the thermal treatment process. Therefore, the breakdown voltage of the Zener diode is mainly determined by the thickness and the concentration of the second epitaxial layer, and the influence of the doping concentration change of the first epitaxial layer on the breakdown voltage is reduced, so that the stability of the breakdown voltage is further improved.
Compared with the prior art that the Zener diode is a low-concentration epitaxial layer outside the depletion region, the dynamic resistance of the Zener diode can be further reduced in the preferred embodiment that the depletion region is heavily doped outside the high-concentration well region connected with the substrate.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
figure 1a shows a cross-sectional view of a zener diode according to the prior art;
FIG. 1b shows a Zener diode doping concentration profile and a breakdown electric field profile according to the prior art;
figure 2 shows a cross-sectional view of a zener diode according to an embodiment of the invention;
figures 3a to 3f show cross-sectional views of stages in a method of fabricating a zener diode according to an embodiment of the invention;
figure 4 illustrates a zener diode doping concentration profile and a breakdown electric field profile according to embodiments of the present invention.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown. For simplicity, the semiconductor structure obtained after several steps can be described in one figure.
It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
If for the purpose of describing the situation directly above another layer, another region, the expression "a directly above B" or "a above and adjacent to B" will be used herein. In the present application, "a is directly in B" means that a is in B and a and B are directly adjacent, rather than a being in a doped region formed in B.
In the present application, the term "semiconductor structure" refers to the general term for the entire semiconductor structure formed in the various steps of manufacturing a semiconductor device, including all layers or regions that have been formed. The term "laterally extending" refers to extending in a direction substantially perpendicular to the depth direction of the trench.
In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
Unless otherwise specified below, various portions of the semiconductor device may be composed of materials well known to those skilled in the art. Semiconductor materials include, for example, group III-V semiconductors such as GaAs, InP, GaN, SiC, and group IV semiconductors such as Si, Ge.
The present invention may be embodied in various forms, some examples of which are described below.
Figure 2 illustrates a cross-sectional view of a zener diode according to an embodiment of the present invention.
The semiconductor substrate 210 is composed of, for example, silicon and is of a first doping type. The first doping type is one of an N-type and a P-type, and the second doping type is the other of the N-type and the P-type. To form the N-type epitaxial semiconductor layer or region, N-type dopants (e.g., P, As) may be implanted in the epitaxial semiconductor layer and region. To form the P-type epitaxial semiconductor layer or region, a P-type dopant (e.g., B) may be doped into the epitaxial semiconductor layer and region. In one example, the semiconductor substrate 210 is doped N + type.
The doping concentration of the semiconductor substrate 210 of the zener diode according to the embodiment of the present invention may be 2 × 1019-1×1020Atoms per cubic centimeter. A first epitaxial layer 221 of the first doping type is located on the surface of the semiconductor substrate 210. The well region 230 is located in the first epitaxial layer 221 and is of the first doping type, and the well region 230 is formed in the first epitaxial layer 221 by ion implantation, and the implantation energy thereof may be greater than 1100 KeV. Wherein the peak doping concentration of the well region 230 is located inside the first epitaxial layer 221. The second epitaxial layer 222 is located over the well region 230, and the second epitaxial layer 222 may be of the first doping type or the second doping type. The doping concentration of the first epitaxial layer 221 is higher than the doping concentration of the second epitaxial layer 222, wherein the doping concentration of the first epitaxial layer 221 may be 1014-1016The doping concentration of the second epitaxial layer 222 may be 10 atoms/cubic centimeter13-1014Atoms per cubic centimeter. The thickness of the first epitaxial layer 221 may be selected according to the dopant profile of the well region 230 such that the dopants of the well region 230 may diffuse to the adjoining semiconductor substrate 210; the thickness of the second epitaxial layer 222 may be selected according to a preset breakdown voltage of the zener diode. The doped region 240 is in the second epitaxial layer 222 and is of the second doping type. When the second epitaxial layer 222 is the secondA PN junction at the interface of the second epitaxial layer 222 and the doped region 240 when of one doping type; when the second epitaxial layer 222 is of the second doping type, the PN junction is located at the boundary between the second epitaxial layer 222 and the well region 230, and the electric field strength at the PN junction is the greatest. The first doping type and the second doping type are N type or P type, and the first doping type and the second doping type are opposite.
The lower surface of the semiconductor substrate 210 (i.e., the surface of the semiconductor substrate 210 opposite to the first epitaxial layer 221) is thinned by a thinning technique, and the second electrode 290 is formed on the lower surface of the semiconductor substrate 210. The trench isolation structure 250 surrounds the first epitaxial layer 221, the well region 230, the second epitaxial layer 222, and the doped region 240 and extends into the semiconductor substrate 210, and the trench isolation structure 250 may form a thermal oxide layer in the trench to perform an isolation function. A dielectric layer 260 is disposed on the surface of the trench isolation structure 250 and a portion of the doped region 240, covering the entire upper surface of the trench isolation structure 250 and a portion of the upper surface of the doped region 240. The first electrode 270 is located on the upper surface of the dielectric layer 260, and the edge of the first electrode 270 does not cover the upper surface of the dielectric layer 260, and at least a portion of the first electrode 270 penetrates through the dielectric layer 260 and is connected to the doped region 240. A passivation layer 280 is located at the edge of the upper surface of the first electrode 270 and the dielectric layer 260. The interlayer dielectric layer 260 may be an oxide layer having a certain thickness, such as silicon oxide.
Figures 3a to 3f show cross-sectional views of various stages of a method of zener diodes according to embodiments of the present invention.
As shown in fig. 3a, a semiconductor substrate 210 of a first doping type is formed with a doping concentration range of about 2 x 1019-1×1020Atoms per cubic centimeter. The semiconductor substrate 210 may be formed by ion implantation, and the doping ions may be one or more of phosphorus ions, boron ions, arsenic ions, germanium ions, and argon ions. If the first doping type is N-type, the resistivity of the semiconductor substrate 210 may be 0.0001-0.1 Ω · cm; if the first doping type is P-type, the resistivity of the semiconductor substrate 210 may be 0.005 Ω · cm. The lower the resistivity, the semiconductor substrate 210The lower the dynamic resistance of (a), and thus the clamping voltage of the zener diode is reduced, it is preferable that the resistivity of the semiconductor substrate 210 is less than 0.005 Ω · cm.
Subsequently, as shown in fig. 3b, a first epitaxial layer 221 of the first doping type is formed on the semiconductor substrate 210 of the first doping type with a doping concentration of 1014-1016Atoms per cubic centimeter. The thickness of the first epitaxial layer 221 may be much smaller than the thickness of the semiconductor substrate 210.
Subsequently, as shown in fig. 3c, a well region 230 is formed by high-energy ion implantation into the first epitaxial layer 221, the implantation energy may be greater than 1100keV, a doping concentration peak of the well region 230 is located inside the first epitaxial layer 221, and then a heat treatment is performed, so that diffusion occurs inside the well region 230, and a dopant of the well region 230 may completely cover the first epitaxial layer 221 and diffuse to the adjacent semiconductor substrate 210, so that the doping concentration of the first epitaxial layer 221 changes; while the thickness of the first epitaxial layer 221 is sufficient to allow the thermally treated well region 230 to diffuse to the adjoining semiconductor substrate 210. The doping concentration of the well 230 is determined by the required breakdown voltage, for example, a lower doping concentration can result in a higher breakdown voltage; with higher doping concentration, a lower breakdown voltage can be obtained. By controlling the parameters of the ion implantation, such as implantation energy and dose, the desired depth can be achieved and the desired doping concentration can be obtained.
Subsequently, as shown in fig. 3d, a second epitaxial layer 222 is grown on the well region 230, which is lightly doped with respect to the first epitaxial layer 221, i.e. the doping concentration of the first epitaxial layer 221 is higher than that of the second epitaxial layer 222, and the doping concentration of the second epitaxial layer 222 may be 1013-1014Atoms per cubic centimeter. The thickness of the second epitaxial layer 222 may be selected according to a predetermined breakdown voltage of the zener diode. The second epitaxial layer 222 may be of the first doping type or the second doping type. When the second epitaxial layer 222 is of the first doping type, a PN junction is at the interface of the second epitaxial layer 222 and the doped region 240; when the second epitaxial layer 222 is of the second doping type, the PN junction is at the interface of the second epitaxial layer 222 and the well region 230, and the electric field strength at the PN junction is greatest.
Subsequently, as shown in fig. 3e, a doped region 240 is formed on the second epitaxial layer 222 by ion implantation, wherein the doped region is of the second doping type. Then, heat treatment is performed to diffuse the inside thereof, for example, annealing treatment is performed. By controlling the parameters of the ion implantation, such as implantation energy and dose, the desired depth can be achieved and the desired doping concentration can be obtained.
Subsequently, as shown in fig. 3f, an etching process is adopted to form a trench isolation structure 250 around the first epitaxial layer 221, the well region 230, the second epitaxial layer 222 and the doped region 240 and extending into the semiconductor substrate 210, so that the trench isolation structure 250 is in contact with the semiconductor substrate 210, the first epitaxial layer 221, the well region 230, the second epitaxial layer 222 and the doped region 240, and the trench isolation structure 250 can form a thermal oxide layer in the trench to perform an isolation function. A dielectric layer 260 is formed over the trench isolation structure 250 and at least a portion of the doped region 240, and the dielectric layer 260 may be composed of an oxide or a nitride, such as silicon oxide or silicon nitride. A first electrode 270 is formed on the dielectric layer 260 thinned by the thinning technique through a deposition process, and the first electrode 270 is connected to the doped region 240 through the dielectric layer 260.
Subsequently, as shown in fig. 2, a second electrode 290 is formed on the surface of the semiconductor substrate 210 thinned by the thinning technique opposite to the first epitaxial layer 221 by a deposition process.
In the above-described embodiment, the first electrode 270 and the second electrode 290 may be respectively formed of a conductive material including a metal material such as an aluminum alloy or copper.
Figure 4 illustrates a zener diode doping concentration profile and a breakdown electric field profile according to embodiments of the present invention. In this embodiment, taking the second epitaxial layer 222 as the first doping type as an example, after the zener diode according to the embodiment of the invention is diffused by the heat treatment, the well region 230 completely covers the first epitaxial layer 221 and is diffused to the adjacent semiconductor substrate 210, so that the doping concentration in the first epitaxial layer 221 changes, and the highly doped well region 230 is formed in the first epitaxial layer 221. The peak doping concentration of the well region 230 is 2 μm from its upper surface, and it can be seen that the doping concentration of the lower surface of the well region 230 is higher than that of the upper surface thereof, as shown by the solid line c in fig. 4. It can be seen that the semiconductor substrate 210 and the first epitaxial layer 221 are heavily doped, which can reduce the dynamic resistance of the zener diode.
In addition, the time for the well region 230 to diffuse is reduced by the high energy ion implantation process, so that the out-diffusion of the semiconductor substrate 210 can be reduced. The peak of the electric field is located near the second epitaxial layer 222 due to the different doping types. Since the well region 230 can diffuse to the adjoining semiconductor substrate 210 such that the first epitaxial layer 221 is entirely covered by the well region 230, the electric field disappears in the well region 230 but not in the region bordering the semiconductor substrate 210 by the well region 230, so that the influence of the variations of the semiconductor substrate 210 and the first epitaxial layer 221 on the breakdown voltage can be neglected, as shown by the dashed line d in fig. 4. In summary, the breakdown voltage is not affected by the thickness of the first epitaxial layer 221, but only by the thickness of the second epitaxial layer 222, so as to improve the stability of the breakdown voltage.
For example, for a zener diode with a breakdown voltage of 70V, the thickness of the second epitaxial layer 222 is 2 μm, and if there is an error of ± 10%, the thickness of the second epitaxial layer 222 ranges from 1.8 μm to 2.2 μm, resulting in a breakdown voltage range of 67 to 73V, which is relatively stable. In addition, since the high doping concentration region of the high energy well region 230 borders on the high doping concentration semiconductor substrate 210, there is no low doping region outside the depletion region when breakdown occurs, which can greatly reduce the resistance of the zener diode. Compared with the prior art, as shown in fig. 1a, the diode resistance of 70V in the prior art is 1.5 Ω; the resistance of the Zener diode and the 70V breakdown voltage diode adopting high-energy injection is only 0.53 omega, and the resistance is obviously reduced.
According to the zener diode of the embodiment of the present invention, the zener diode includes the first epitaxial layer 221 and the second epitaxial layer 222, wherein the doping concentration of the first epitaxial layer 221 is higher than the doping concentration of the second epitaxial layer 222, and the high energy doped well region 230 is formed in the first epitaxial layer 221, which can improve the stability of the breakdown voltage and reduce the dynamic resistance at the same time.
In a preferred embodiment, the thickness of the first epitaxial layer 221 is selected according to the dopant profile of the well region 230, such that the dopants of the well region 230 diffuse to abut the semiconductor substrate 210 after the thermal treatment process. Therefore, the breakdown voltage is not affected by the thickness of the first epitaxial layer 221, but is affected only by the thickness of the second epitaxial layer 222, thereby further improving the stability of the breakdown voltage.
In the preferred embodiment, the dynamic resistance of the zener diode is further reduced compared to the zener diode of the prior art in which the zener diode is a low concentration epitaxial layer outside the depletion region, and in the preferred embodiment, the zener diode is heavily doped outside the depletion region, where the high concentration well region 230 is connected to the semiconductor substrate 210.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.

Claims (18)

1. A zener diode, comprising:
a semiconductor substrate;
the first epitaxial layer is positioned on the semiconductor substrate;
the well region is positioned in the first epitaxial layer;
the second epitaxial layer is positioned on the well region;
a doped region in the second epitaxial layer,
the semiconductor substrate, the first epitaxial layer and the well region are respectively of a first doping type, the doping region is of a second doping type, the first doping type is opposite to the second doping type, and the doping concentration of the first epitaxial layer is higher than that of the second epitaxial layer.
2. The zener diode of claim 1 wherein the well region is formed in the first epitaxial layer by ion implantation with an implant energy greater than 1100 KeV.
3. The zener diode of claim 1 wherein the first doping type is one of N-type and P-type and the second doping type is the other of N-type and P-type.
4. The zener diode of claim 1 wherein the first epitaxial layer has a doping concentration of 1014-1016Atoms per cubic centimeter.
5. The zener diode of claim 1 wherein the second epitaxial layer has a doping concentration of 1013-1014Atoms per cubic centimeter.
6. The zener diode of claim 1 wherein the semiconductor substrate has a doping concentration of 2 x 1019-1×1020Atoms per cubic centimeter.
7. The zener diode of claim 1 wherein a doping concentration peak of the well region is located inside the first epitaxial layer.
8. The zener diode of claim 1 wherein a thickness of the first epitaxial layer is selected according to a dopant profile of the well region such that the dopants of the well region diffuse to abut the semiconductor substrate.
9. The zener diode of claim 1 wherein a thickness of the second epitaxial layer is selected according to a breakdown voltage of the zener diode.
10. The zener diode of claim 1 further comprising:
a trench isolation structure surrounding the first epitaxial layer, the well region, the second epitaxial layer and the doped region and extending into the semiconductor substrate;
the dielectric layer is positioned on the groove isolation structure and the doped region;
the first electrode is positioned on the dielectric layer, and at least part of the first electrode penetrates through the dielectric layer to be connected to the doped region;
a passivation layer at an edge on the first electrode;
and the second electrode is positioned on the surface of the semiconductor substrate opposite to the first epitaxial layer.
11. A method for manufacturing a Zener diode comprises the following steps:
forming a first epitaxial layer on a semiconductor substrate;
forming a well region in the first epitaxial layer through high-energy ion implantation, so that the peak value of the doping concentration of the well region is positioned inside the first epitaxial layer;
forming a second epitaxial layer on the well region;
forming a doped region in the second epitaxial layer,
the semiconductor substrate, the first epitaxial layer and the well region are respectively of a first doping type, the doping region is of a second doping type, the first doping type is opposite to the second doping type, and the doping concentration of the first epitaxial layer is higher than that of the second epitaxial layer.
12. The method of claim 11, wherein the well region is formed in the first epitaxial layer by high energy ion implantation at an implant energy of greater than 1100 KeV.
13. The method of claim 11, wherein a thermal treatment process is performed after the well region is formed, and a thickness of the first epitaxial layer is selected according to a dopant profile of the well region such that the well region diffuses in the first epitaxial layer to abut the semiconductor substrate.
14. The method of claim 11, wherein the first doping type is one of N-type and P-type and the second doping type is the other of N-type and P-type.
15. The method of claim 11, wherein the first epitaxial layer has a doping concentration of 1014-1016Atoms per cubic centimeter.
16. The method of claim 11, wherein the second epitaxial layer has a doping concentration of 1013-1014Atoms per cubic centimeter.
17. The method of claim 11, wherein the semiconductor substrate has a doping concentration of 2 x 1019-1×1020Atoms per cubic centimeter.
18. The method of claim 11, further comprising:
forming a trench isolation structure surrounding the first epitaxial layer, the well region, the second epitaxial layer and the doped region and extending into the semiconductor substrate;
forming a dielectric layer on the trench isolation structure and the doped region;
forming a first electrode on the dielectric layer, so that the first electrode penetrates through the dielectric layer and is connected with the doped region;
and forming a second electrode on the surface of the semiconductor substrate opposite to the first epitaxial layer.
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