CN108196099A - ON-OFF control circuit and test equipment - Google Patents

ON-OFF control circuit and test equipment Download PDF

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Publication number
CN108196099A
CN108196099A CN201711387106.1A CN201711387106A CN108196099A CN 108196099 A CN108196099 A CN 108196099A CN 201711387106 A CN201711387106 A CN 201711387106A CN 108196099 A CN108196099 A CN 108196099A
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China
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voltage
circuit
device under
under test
test
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CN201711387106.1A
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CN108196099B (en
Inventor
代勇
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Guangzhou Grg Metrology & Test Shanghai Co ltd
Radio And Tv Measurement And Testing Group Co ltd
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Guangzhou Radio And Television Measurement Inspection (shanghai) Co Ltd
Guangzhou GRG Metrology and Test Technology Co Ltd
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Priority to CN201711387106.1A priority Critical patent/CN108196099B/en
Publication of CN108196099A publication Critical patent/CN108196099A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/30Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/001Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/40Testing power supplies

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The present invention relates to a kind of ON-OFF control circuits, including sequentially connected sample circuit, delay circuit and executing agency;The voltage input end of the input terminal connection Device under test of sample circuit, executing agency connect the switch of Device under test;Sample circuit is sampled the test voltage signal of Device under test, detects the phase value of test voltage signal, when phase value is target phase value, output control level to delay circuit;Delay circuit is exported to controlling level into line delay to executing agency;Wherein, delay and the switch response time of voltage signal transmission time and Device under test are correspondingly arranged;Executing agency switches on-off according to control level control Device under test.The program causes the switch of Device under test to be accurately controlled by the control level postponed, improves the switch control efficiency of Device under test, and then the testing efficiency to improve Device under test provides guarantee.A kind of test equipment is also provided.

Description

ON-OFF control circuit and test equipment
Technical field
The present invention relates to technical field of electronic equipment, more particularly to a kind of ON-OFF control circuit and test equipment.
Background technology
Requirement of the with the rapid development of electronic technology, to electronic equipment quality is higher and higher, to the performance of electronic equipment It is to ensure the important channel of electronic equipment quality to carry out test comprehensively.
By taking the electromagnetic compatibility of electronic equipment and power supply characteristic experiment as an example, done carrying out power cord transient state to Device under test When disturbing test, the switch of testing standard requirement Device under test can carry out accurately break-make under various exemplary operation states, and The Device under test can accurately be read in the parameters such as spiking Amplitude maxima caused by switching time.However test voltage The peak value of signal, valley are different with impulse disturbances caused by carrying out power on/off to Device under test at zero, need to by The switch of examination equipment is accurately controlled.
The scheme that traditional technology provides, which needs repeatedly to receive externally input control signal, could complete opening for Device under test Control is closed, causes the efficiency that switch controls relatively low, and the control signal is inputted generally by manual mode, manually Mode is easily influenced by subjective factor, and the efficiency for reducing the accuracy of switch control and switch being caused to control declines.
Invention content
Based on this, it is necessary to the problem of efficiency controlled is relatively low is switched for traditional technology, provides a kind of switch control electricity Road.
A kind of ON-OFF control circuit, including sequentially connected sample circuit, delay circuit and executing agency;
The voltage input end of the input terminal connection Device under test of the sample circuit, the executing agency connect Device under test Switch;
The sample circuit detects the test voltage for being sampled to the test voltage signal of the Device under test The phase value of signal, and when the phase value is target phase value, output control level to the delay circuit;
The delay circuit is used for the control level into line delay, and is exported to executing agency;Wherein, the delay It is correspondingly arranged with the switch response time of voltage signal transmission time and Device under test, the voltage signal transmission time is test Voltage signal is transferred to the time of Device under test from voltage input end;
The executing agency is used to control switching on-off for the Device under test according to the control level.
Above-mentioned ON-OFF control circuit, sample circuit, delay circuit and executing agency are sequentially connected, the input terminal of sample circuit The voltage input end of Device under test is connected, executing agency connects the switch of Device under test, and sample circuit is to the Device under test The phase value of test voltage signal is sampled, and the phase value of test voltage signal is detected, in the phase of the test voltage signal When place value is target phase value, output control level to the delay circuit, delay circuit controls level into line delay to described And export to executing agency, executing agency controls switching on-off for the Device under test according to the control level.The program So that the switch of Device under test is accurately controlled by the control level postponed, overcoming traditional technology needs repeatedly to receive outside Signal causes to switch the problem of control efficiency is low, improves the switch control efficiency of Device under test, and then to improve Device under test Testing efficiency provide guarantee.
In one embodiment, the sample circuit includes:Voltage amplitude detection circuit, voltage edge sense circuit and One voltage comparator circuit;
The input terminal of the first voltage comparison circuit is respectively connected to the voltage amplitude detection circuit and voltage edge The output terminal of detection circuit, the output terminal of the first voltage comparison circuit connect the delay circuit;
The voltage amplitude detection circuit connects the Device under test with the voltage input end of voltage edge sense circuit Voltage input end;
The voltage amplitude detection circuit is used to detect the voltage magnitude of the test voltage signal, and in the voltage amplitude When being worth for target voltage amplitude, output the first son control level to first voltage comparison circuit;
The voltage edge sense circuit is used to detect the edge placement of the test voltage signal, and in the edge position When being set to target edge placement, output the second son control level to first voltage comparison circuit;
The first voltage comparison circuit is connecing for receiving the first son control level and the second son control level Control level is exported to delay circuit when receiving the first son control level and the second son control level.
In one embodiment, the target phase value is zero phase;
The voltage amplitude detection circuit is zero passage voltage detection circuit, and the voltage edge sense circuit is examined for rising edge Slowdown monitoring circuit;
The voltage amplitude detection circuit is used to detect the voltage magnitude of test voltage signal, and is in the voltage magnitude During zero passage voltage value, the first high level of output to the first voltage comparison circuit;
The voltage edge sense circuit is used to detect the edge placement of test voltage signal, and is in the edge placement During leading edge position, the second high level of output to the first voltage comparison circuit;
The first voltage comparison circuit is used to receive first high level and the second high level, and described receiving Output controls level to delay circuit when the first high level and the second high level.
In one embodiment, the ON-OFF control circuit further includes the electricity being connected between sample circuit and delay circuit Holding circuit is pressed, for control level progress voltage self-locking export to the detection unit and is exported the control level to prolonging When circuit.
In one embodiment, the zero passage voltage detection circuit includes second voltage comparison circuit;
The in-phase input end of the second voltage comparison circuit connects the voltage input end of the Device under test;Described second The inverting input connection reference voltage source of voltage comparator circuit;
The second voltage comparison circuit is used to detect the voltage of in-phase input end and inverting input, and in homophase input When end is equal with the input voltage of inverting input, the first high level of output to the first voltage comparison circuit.
In one embodiment, the rising edge detection circuit includes tertiary voltage comparison circuit and phase-shift network;
The input terminal of the tertiary voltage comparison circuit connects sample circuit by phase-shift network, and the tertiary voltage compares The output terminal connection first voltage comparison circuit of circuit;
The phase-shift network is used to lag behind the input voltage of the in-phase input end of the tertiary voltage comparison circuit instead The input voltage signal of phase input terminal;
The tertiary voltage comparison circuit is input to the input voltage of in-phase input end and inverting input for detecting, and When the input voltage of in-phase input end is more than the input voltage of inverting input, the second high level of output to the first voltage Comparison circuit.
In one embodiment, the phase-shift network includes RC retarded type phase-shift circuits.
In one embodiment, the RC retarded types phase-shift circuit includes the shifting resistance and shift capacitor of series connection;
The shifting resistance of the series connection connects the voltage input end of the Device under test with shift capacitor, and test voltage is believed It number is sampled;
The shift capacitor is connected in parallel to the inverting input of the tertiary voltage comparator, the test voltage signal that will be late by It is input to second voltage comparator.
In one embodiment, the delay circuit is RC delay circuits.
In one embodiment, a kind of test equipment is provided, the test equipment include ON-OFF control circuit as described above, Test voltage source, line impedance stabilization net work, oscillograph and the load resistance for connecting the line impedance stabilization net work;
The test voltage source connects the control source port of Device under test by line impedance stabilization net work, is set to tested Standby input test voltage signal;
The control source port of the oscillograph connection Device under test, detection Device under test is to the sound of test voltage signal It should;
The control source port of the ON-OFF control circuit connection Device under test and the switch of Device under test, to Device under test Test voltage sample of signal and detection, control switching on-off for Device under test.
Description of the drawings
Fig. 1 is the structure diagram of the ON-OFF control circuit in one embodiment;
Fig. 2 is the connection diagram of the voltage hold circuit in one embodiment;
Fig. 3 is the schematic diagram of the circuit structure in one embodiment;
Fig. 4 is the structure diagram of the sample circuit in one embodiment;
Fig. 5 is the schematic diagram of the delay circuit in one embodiment;
Fig. 6 is the schematic diagram of the delay principle in one embodiment;
Fig. 7 is the structure diagram of the test equipment in one embodiment;
Fig. 8 is the structure diagram of the executing agency in one embodiment.
Specific embodiment
The specific embodiment of the ON-OFF control circuit of the present invention is described in detail below in conjunction with the accompanying drawings.
In one embodiment, a kind of ON-OFF control circuit is provided, described in reference diagram 1, Fig. 1 is opening in one embodiment The structure diagram of control circuit is closed, which can include sequentially connected sample circuit 110, delay circuit and execution machine Structure;
The sample circuit 110 input terminal connection Device under test voltage input end, the executing agency 130 connect by Try the switch of equipment;
The sample circuit 110 detects the test for being sampled to the test voltage signal of the Device under test The phase value of voltage signal, and when the phase value is target phase value, output control level to the delay circuit 120;
The delay circuit 120 is used for the control level into line delay, and is exported to executing agency 130;Wherein, institute It states delay and the switch response time of voltage signal transmission time and Device under test is correspondingly arranged, the voltage signal transmission time It is the time that test voltage signal is transferred to Device under test from voltage input end;
The executing agency 130 is used to control switching on-off for the Device under test according to the control level.
In the present embodiment, test voltage signal refers to when Device under test is tested, and test voltage source is to Device under test The input of control source port test voltage signal, test voltage signal can include the waves such as sine wave, square wave or triangular wave The voltage signal of shape.
Sample circuit 110 is connect with the voltage input end of Device under test, to the test electricity of the voltage input end of Device under test Pressure signal is sampled, and can obtain the information such as voltage magnitude, phase value, frequency or the period of test voltage signal, wherein, it surveys The value range for trying the phase value of voltage signal is from 0 degree to 360 degree, and different phase values can correspond to test voltage signal Different waveform positions, by taking sine wave signal as an example, zero of the phase value for 0 degree of corresponding sine wave signal, 90 degree of corresponding voltages The valley of signal, the peak value of 270 degree of corresponding voltage signals.
Sample circuit 110 is detected the phase value of test voltage signal, when the phase value of test voltage signal is mesh When marking phase value, output control level to the delay circuit 120.Target phase value can be configured according to actual conditions for Any phase angle in 0 degree to 360 degree, such as target phase value is set as 0 degree, i.e., it ought detect the phase value of test voltage When being 0 degree, output control level realizes the output control level at the random waveform position of test voltage signal.
Delay circuit 120 receives the control level that sample circuit 110 exports, and control level into line delay and is exported to holding Row mechanism 130.Since test voltage signal needs one section from the control source port transmission of test voltage signal to Device under test Time, and the switch of Device under test when carrying out break-make there is also certain operating lag, so the delay is according to voltage What the switch response time of signal transmission time and Device under test was correspondingly arranged, to ensure that it is tested that test voltage signal reaches The switch of Device under test is accurately triggered during equipment.
The control level that 130 reception delay circuit 120 of executing agency is sent, and control Device under test according to the control level Switch on-off.Executing agency 130 is for performing the switching manipulation of control Device under test, according to the control level of delay output The switch of Device under test is controlled so that the Device under test can be accurately in any waveform position of test voltage signal It is switched when reaching Device under test.
Above-mentioned ON-OFF control circuit, sample circuit 110, delay circuit 120 and executing agency 130 are sequentially connected, sampling electricity The voltage input end of the input terminal connection Device under test on road 110, executing agency 130 connect the switch of Device under test, sample circuit The phase value of the test voltage signal of 110 pairs of Device under test is sampled, and the phase value of test voltage signal is detected, in institute When the phase value for stating test voltage signal is target phase value, output control level to the delay circuit 120, delay circuit 120 pairs of control level are into line delay and export to executing agency 130, and executing agency 130 is according to the control level control The Device under test switches on-off.The program causes the switch of Device under test by the accurate control of control level postponed System, overcoming traditional technology needs repeatedly to receive the problem of external signal causes switch control efficiency low, improves Device under test Switch control efficiency, and then for improve Device under test testing efficiency guarantee is provided.
In one embodiment, with reference to figure 2, connection diagrams of the Fig. 2 for the voltage hold circuit in one embodiment, institute It states ON-OFF control circuit and further includes the voltage hold circuit 140 being connected between sample circuit 110 and delay circuit 120, be used for Voltage self-locking is carried out to the control level of detection unit output and is exported to delay circuit 120.
The present embodiment is mainly the voltage hold circuit by being connected between sample circuit 110 and delay circuit 120 140, it realizes and voltage self-locking is carried out to control level, keep control stabilization of level within a certain period of time.
Specifically, with reference to figure 3, Fig. 3 is the schematic diagram of the circuit structure in one embodiment, be may be used as shown in Figure 3 Voltage hold circuit 140, which is kept amplifier IC4, such as SF357 using signal, is kept based on signal Amplifier IC4 can realize the voltage self-locking to controlling level signal, do not change with front end input voltage and change.
Such as when front-end circuit input high level and when passing through resistance R9 and being input to IC4, IC4 maintain the level and It is allowed to the variation for the level not exported with front-end circuit and changes, it is possible to the locking of voltage is realized, no matter the voltage of front end is such as What changes, and the control level that port 1 exports can be kept with the long period to delay circuit 120, it is achieved thereby that controlling level It keeps.
In one embodiment, as shown in figure 4, Fig. 4 is the structure diagram of the sample circuit in one embodiment, this is opened Closing the sample circuit 110 of control circuit can include:Voltage amplitude detection circuit 111, voltage edge sense circuit 112 and first Voltage comparator circuit 113;
The input terminal of the first voltage comparison circuit 113 is respectively connected to the voltage amplitude detection circuit 111 and electricity The output terminal of edge sense circuit 112 is pressed, the output terminal of the first voltage comparison circuit 113 connects the delay circuit 120;
The voltage amplitude detection circuit 111 connects described tested with the voltage input end of voltage edge sense circuit 112 The voltage input end of equipment;
The voltage amplitude detection circuit 111 is used to detect the voltage magnitude of the test voltage signal, and in the electricity When pressure amplitude value is target voltage amplitude, output the first son control level to first voltage comparison circuit 113;
The voltage edge sense circuit 112 is used to detect the edge placement of the test voltage signal, and on the side When along position being target edge placement, output the second son control level is to first voltage comparison circuit 113;
The first voltage comparison circuit 113 controls level for receiving the first son control level and the second son, and When receiving the described first sub- control level and the second son control level, output controls level to delay circuit 120.
The present embodiment is mainly the amplitude that test voltage signal is detected by voltage amplitude detection circuit 111, passes through voltage Edge sense circuit 112 detects the edge placement of signal, and mesh is realized when detecting target voltage amplitude and target edge placement The detection of phase value is marked, control level is exported to delay circuit 120 by first voltage comparison circuit 113.
By taking sinusoidal signal as an example, the amplitude size of voltage signal refers to the voltage between the peak value of sine wave signal and valley Value, the edge placement of signal waveform refer to the rising edge of sine voltage signal or failing edge position, by amplitude size and The detection of edge placement, can the accurately phase value of detectable voltage signals and the waveform with the corresponding voltage signal of phase value Position.
Specifically, voltage amplitude detection circuit 111 connects the voltage input end of Device under test, test voltage signal is carried out Sampling, the voltage magnitude of detection test voltage signal, the input terminal of outputs level signals to first voltage comparison circuit 113, When the voltage magnitude for detecting test voltage signal is target voltage amplitude, the output of voltage amplitude detection circuit 111 first son control Level processed is to first voltage comparison circuit 113.
Voltage edge sense circuit 112 connects the voltage input end of Device under test, and test voltage signal is sampled, and examines The edge placement of test voltage signal is surveyed, wherein, edge placement refers to the rising edge of voltage signal or failing edge position, voltage side Along 112 outputs level signals of detection circuit to the voltage input end of first voltage comparison circuit 113, on the side of test voltage signal When along position being target edge placement, output the second son control level is to first voltage comparison circuit 113.
The electricity that first voltage comparison circuit 113 can be exported by in-phase input end receiving voltage amplitude detection circuit 111 Ordinary mail number, the level signal exported by inverting input receiving voltage edge sense circuit 112 are receiving voltage amplitude inspection During the second son control level that the first son control level and voltage edge sense circuit 112 that slowdown monitoring circuit 111 inputs input, Output controls level to delay circuit 120.
In one embodiment, above-mentioned target phase value can be zero phase;
The voltage amplitude detection circuit 111 is zero passage voltage detection circuit, and the voltage edge sense circuit 112 is upper It rises along detection circuit;
The voltage amplitude detection circuit 111 is used to detect the voltage magnitude of test voltage signal, and in the voltage amplitude When being worth for zero passage voltage value, the first high level of output to the first voltage comparison circuit 113;
The voltage edge sense circuit 112 is used to detect the edge placement of test voltage signal, and in the edge position When being set to leading edge position, the second high level of output to the first voltage comparison circuit 113;
The first voltage comparison circuit 113 is used to receive first high level and the second high level, and receiving Output controls level to delay circuit 120 when first high level and the second high level.
In the present embodiment, zero phase refers to that the phase angle value of voltage signal is 0 degree, and zero passage voltage value, which refers to, to be referred to test Voltage value when the signal waveform of voltage signal being converted from positive half cycle to negative half period by point of zero voltage, if detecting survey The amplitude for trying voltage signal is the zero passage voltage value of test voltage signal, and detects that test voltage signal is in rising edge position It puts, then judges that test voltage signal is in zero phase, the corresponding phase angle value of the voltage signal is 0 degree.If it is appreciated that inspection The amplitude for measuring test voltage signal is the zero passage voltage value of test voltage signal but detects that test voltage signal is in decline Along position, then judge the phase angle value of test voltage signal for 180 degree.
Specifically, zero passage voltage detection circuit is detected the zero passage voltage value of test voltage signal, work as voltage magnitude During for zero passage voltage value, the voltage input end of output high level signal to first voltage comparison circuit 113.
Rising edge detection circuit is detected the leading edge position of test voltage signal, when edge placement is rising edge position When putting, the voltage input end of output high level signal to the first voltage comparison circuit 113.
With reference to figure 3, Fig. 3 is the schematic diagram of the circuit structure in one embodiment, and first voltage comparison circuit 113 can be Voltage comparator ic 3 with in-phase input end and inverting input, two input ports of IC3 respectively by diode D2 and The voltage signal of diode D3 access inputs, by the voltage output end of diode D2 connection zero passage voltage detection circuits, passes through The voltage output end of diode D3 connection voltages edge sense circuit 112, when two control source ports of voltage comparator ic 3 When receiving the high level signal that zero passage voltage detection circuit and voltage edge sense circuit 112 export simultaneously, company can be passed through The diode D4 output control level of IC3 voltage output ends is connected on to delay circuit 120, which is usually high level.
In one embodiment, zero passage voltage detection circuit includes second voltage comparison circuit;
The in-phase input end of the second voltage comparison circuit connects the voltage input end of the Device under test;
The inverting input connection reference voltage source of the second voltage comparison circuit;
The second voltage comparison circuit is used to detect the voltage of in-phase input end and inverting input, and described second When the in-phase input end of voltage comparator circuit is equal with the input voltage of inverting input, the first high level of output to described first Voltage comparator circuit 113.
In the present embodiment, reference voltage source is to provide the electricity of reference voltage level for the inverting input of the second comparison circuit Potential source, the reference voltage level can be the zero passage voltage values of test voltage signal.
With reference to figure 3, Fig. 3 is the schematic diagram of the circuit structure in one embodiment, and reference voltage source can be the voltage of 5V Reference voltage level is input to the inverting input of second voltage comparison circuit by divider resistance R4 and R5 by source.Wherein, this Voltage comparator ic 1, the in-phase input end connection Device under test of second voltage comparison circuit may be used in two voltage comparator circuits Voltage input end, the test voltage signal of input is sampled, by the amplitude of test voltage signal and inverting input Reference voltage is compared, and when the voltage of in-phase input end and inverting input is equal, illustrates test voltage signal at this time Amplitude be zero passage voltage value, output high level to the first voltage comparison circuit 113, the high level generally use voltage value for The level signal of 5V.
In one embodiment, rising edge detection circuit includes tertiary voltage comparison circuit and phase-shift network;The third The input terminal of voltage comparator circuit connects sample circuit 110, the output terminal of the tertiary voltage comparison circuit by phase-shift network Connect first voltage comparison circuit 113;
The phase-shift network is used to lag behind the input voltage of the in-phase input end of the tertiary voltage comparison circuit instead The input voltage signal of phase input terminal;The tertiary voltage comparison circuit is input to in-phase input end and anti-phase input for detecting The input voltage at end, and when the input voltage of in-phase input end is more than the input voltage of inverting input, the high electricity of output second It puts down to the first voltage comparison circuit 113.
In the present embodiment, the tertiary voltage comparison circuit and phase-shift network are used to judge whether test voltage signal is located In leading edge position, voltage comparator ic 2, such as LM393 may be used in tertiary voltage comparison circuit.
The test voltage that two control source ports of voltage comparator ic 2 access Device under test by phase-shift network is believed Number, although the phase-shift network makes the voltage for being input to voltage comparator ic 2 all be derived from test voltage signal, since phase shift acts on So that the input voltage of one of input port lags behind the input voltage of another input port so that works as voltage comparator When the input voltage of the in-phase input end of IC2 is more than the input voltage of inverting input, it may be determined that test voltage signal is just located In leading edge position, and the output port for passing through voltage comparator ic 2 exports high level to first voltage comparison circuit 113, real Now to the detection of leading edge position.
In one embodiment, phase-shift network can include RC retarded type phase-shift circuits;The RC retarded type phase-shift circuits can With the RC retarded types being arranged between the voltage input end of the Device under test and the inverting input of tertiary voltage comparison circuit Phase-shift circuit.
In the present embodiment, the in-phase input end of tertiary voltage comparison circuit can access test voltage by resistance R7 and believe Number, the inverting input of tertiary voltage comparison circuit accesses test voltage signal by RC retarded types phase-shift circuit.
RC retarded type phase-shift circuits cause the input voltage of the inverting input of tertiary voltage comparison circuit to lag behind same phase The voltage of input terminal, when the voltage magnitude of in-phase input end is higher than the voltage magnitude of inverting input, tertiary voltage is more electric Road exports high level to first voltage comparison circuit 113.
In one embodiment, RC retarded types phase-shift circuit can include the shifting resistance R8 of series connection and shift capacitor C1; The shifting resistance R8 of the series connection connects the voltage input end of the Device under test with shift capacitor C1, to test voltage signal into Row sampling;
The shift capacitor C1 is connected in parallel to the inverting input of the tertiary voltage comparator, the test voltage letter that will be late by Number it is input to the inverting input of second voltage comparator.
In one embodiment, ON-OFF control circuit further includes the voltage input end and sample circuit for being arranged on Device under test Bleeder circuit 150 between 110.Bleeder circuit 150 divides test voltage signal, avoid test voltage signal excessively high and ON-OFF control circuit is caused to damage.
Specifically, with reference to figure 3, Fig. 3 is the schematic diagram of the circuit structure in one embodiment, and above-mentioned bleeder circuit 150 can To use bleeder circuit 150 as shown in Figure 3, resistance R1, resistance R2, resistance R3 and diode D1 can be included;Wherein, R1 and The effect of R2 is to form partial pressure input terminal, and the test voltage signal for dividing output is input to sample circuit 110 by R3.
In one embodiment, the delay circuit 120 is RC delay circuits.
RC delay circuits set delay time by the time-lag action of resistance capacitance by the numerical value of regulation resistance and capacitance To controlling level into line delay.
Specifically, with reference to figure 5, Fig. 5 is the schematic diagram of the delay circuit in one embodiment, be may be used shown in fig. 5 RC delay circuits are to controlling level into line delay.Wherein, adjustable resistance R11, resistance R12 and capacitance C2 are sequentially connected in series, capacitance C2 The base stage and emitter of triode Q1 are connected in parallel to by resistance R11, the collector of the triode Q1 is connected with electromagnetism in parallel J1 and diode D5 is switched, for exporting the control level of delay.
In actual use, the delay of RC delay circuits can be configured by adjusting adjustable resistance R11, to port The control level of 1 input is into line delay, and when reaching delay time, the port 2 of electromagnetic switch J1 and port 3 are exported after being delayed Level is controlled to executing agency 130.
The scheme of above-described embodiment realizes the adjusting to delay and controls the output of level, improves switch control Accuracy and efficiency.
The basic functional principle of the ON-OFF control circuit of the present invention is illustrated below by a specific example, with reference to figure 6, figure 6 schematic diagram for the delay principle in one embodiment.
The basic principle of the ON-OFF control circuit is:Detection is sampled to test voltage signal by sample circuit 110, When detecting target phase value, a control level signal is exported, it can be using the time of output control level signal as prolonging When circuit 120 zero-time, delay circuit 120 is an adjustable delay circuit 120, by adjusting delay time, is made Executing agency 130 can occur action control Device under test within the controllable time and switch on-off.
If sample circuit 110 has got the zero phase of test voltage signal, then can be using zero phase as during reference Between starting point, by the delays time to control of delay circuit 120, the switch motion of executing agency 130 can be caused to be happened at controllable n Arbitrary phase angle after cycle T, wherein, n is natural number, and T represents the period of test voltage signal.
Wherein, the delay t of delay circuit 1204It can be according to voltage signal transmission time t2And the switch of Device under test is rung T between seasonable3It is adjusted, to meet:t4=t1+t2+t3+ n*T, wherein t4Represent the delay of delay circuit 120, t1Represent reference Start time, t2Represent voltage signal transmission time, t3Represent the switch response time of Device under test, n*T represents test voltage letter Number n cycle T time, n can take zero.
By taking the sine wave signal of 50Hz as an example, if wanting to make the action of executing agency 130 to be happened at the 90 of test voltage signal When spending, then can be the period, that is, the period is 20ms first by the frequency translation, then a cycle 20ms, when taking When the phase angle that sample circuit 110 samples is 0 degree, at this time for zero-time t1, t is set2And t3, adjust delay circuit 120 delay t4So that it is triggered after the time that the action of executing agency 130 can add 5ms in n 20ms, wherein 90 degree of correspondences 1/4 period, that is, 5ms.
Said program can make very accurately executing agency 130 the phase angle of test voltage signal be 90 degree when triggering by The switch of equipment is tried, realizes and Device under test switch is accurately controlled.It is appreciated that using the ON-OFF control circuit, it can also The switch of Device under test is made to be triggered in other phase angle values.
In one embodiment, a kind of test equipment is provided, which can be included described in as above any one embodiment ON-OFF control circuit, test voltage source, line impedance stabilization net work, oscillograph and the connection line impedance stabilization net work Load;
The test voltage source connects the control source port of Device under test by line impedance stabilization net work, is set to tested Standby input test voltage signal;
The control source port of the oscillograph connection Device under test, detection Device under test is to the sound of test voltage signal It should;
The control source port of the ON-OFF control circuit connection Device under test and the switch of Device under test, to Device under test Test voltage signal be sampled and detect, control switching on-off for Device under test.
By taking the test equipment that pulse glitch in electromagnetic compatibility is tested as an example, with reference to figure 7, Fig. 7 is in one embodiment Test equipment structure diagram, which includes:Test voltage source and Device under test, the test voltage source pass through LISN Test voltage is input to tested set by (Line Impedance Stabilization Network, line impedance stabilization net work) The oscillograph of standby control source port, 50 ohm loads for connecting LISN and the control source port for connecting Device under test, The oscillograph can be the oscillograph of high-impedance state.
ON-OFF control circuit can connect the control source port of Device under test by sample circuit 110, and pass through execution Mechanism 130 connects the switch of Device under test.
When being tested, ON-OFF control circuit passes through survey of the sample circuit 110 to the control source port of Device under test Examination voltage signal is sampled, and the phase value of test voltage signal is detected, and is detecting that phase value is target phase value When, output control level to delay circuit 120, delay circuit 120 will control level into line delay, executing agency 130 according to Switching on-off for Device under test is controlled according to the control level of delay.
With reference to figure 8, Fig. 8 is the structure diagram of the executing agency in one embodiment, can for different Device under test To control the switch of Device under test using different executing agencies 130.
As shown in Fig. 8 (a), for being equipped with the Device under test of physical switch, executing agency 130 can be with execution unit Executing agency 130, after which receives control level, Device under test is stirred in triggering execution unit generation action Switch realizes that the switch of control Device under test carries out break-make.
As shown in Fig. 8 (b), Device under test can also be the equipment controlled by pulse signal, may be used with synchronous work( The executing agency 130 of energy, for example, by using signal trigger generator etc., after which receives control level, together Walk the control that output pulse signal realizes switch to Device under test.
As shown in Fig. 8 (c), Device under test can also be the Device under test of connection signal trigger generator, and signal Physical switch is typically provided on trigger generator, the executing agency 130 with execution unit may be used and believed by controlling The physical switch of number trigger generator is so as to control the switch of Device under test.
The technical solution that above-described embodiment provides enables Device under test when carrying out glitch experiment in test electricity It presses and accurate switch on and off is carried out at the peak value, valley or zero of signal, improve switch control efficiency, also improve glitch The testing efficiency of experiment.It is appreciated that the technical solution can also be applied to CS106, the examinations such as CS115, CS116 or power interruptions In testing.
Embodiment described above only expresses the several embodiments of the present invention, and description is more specific and detailed, but simultaneously It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that those of ordinary skill in the art are come It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the protection of the present invention Range.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.

Claims (10)

1. a kind of ON-OFF control circuit, which is characterized in that including sequentially connected sample circuit, delay circuit and executing agency;
The voltage input end of the input terminal connection Device under test of the sample circuit, executing agency's connection Device under test are opened It closes;
The sample circuit detects the test voltage signal for being sampled to the test voltage signal of the Device under test Phase value, and when the phase value is target phase value, output control level is to the delay circuit;
The delay circuit is used for the control level into line delay, and is exported to executing agency;Wherein, the delay and electricity The switch response time of pressure signal transmission time and Device under test is correspondingly arranged, and the voltage signal transmission time is test voltage Signal is transferred to the time of Device under test from voltage input end;
The executing agency is used to control switching on-off for the Device under test according to the control level.
2. ON-OFF control circuit according to claim 1, which is characterized in that the sample circuit includes:Voltage amplitude is examined Slowdown monitoring circuit, voltage edge sense circuit and first voltage comparison circuit;
The input terminal of the first voltage comparison circuit is respectively connected to the voltage amplitude detection circuit and voltage Edge check The output terminal of circuit, the output terminal of the first voltage comparison circuit connect the delay circuit;
The voltage amplitude detection circuit connects the voltage of the Device under test with the voltage input end of voltage edge sense circuit Input terminal;
The voltage amplitude detection circuit is used to detect the voltage magnitude of the test voltage signal, and is in the voltage magnitude During target voltage amplitude, output the first son control level to first voltage comparison circuit;
The voltage edge sense circuit is used to detect the edge placement of the test voltage signal, and is in the edge placement During target edge placement, output the second son control level to first voltage comparison circuit;
The first voltage comparison circuit is receiving institute for receiving the first son control level and the second son control level Control level is exported to delay circuit when stating the first son control level and the second son control level.
3. ON-OFF control circuit according to claim 2, which is characterized in that the target phase value is zero phase;
The voltage amplitude detection circuit is zero passage voltage detection circuit, and the voltage edge sense circuit is rising edge detection electricity Road;
The voltage amplitude detection circuit is used to detect the voltage magnitude of test voltage signal, and is zero passage in the voltage magnitude During voltage value, the first high level of output to the first voltage comparison circuit;
The voltage edge sense circuit is used to detect the edge placement of test voltage signal, and in the edge placement to rise During along position, the second high level of output to the first voltage comparison circuit;
The first voltage comparison circuit is used to receive first high level and the second high level, and receiving described first Output controls level to delay circuit when high level and the second high level.
4. ON-OFF control circuit according to any one of claims 1 to 3, which is characterized in that further include and be connected to sampling electricity Voltage hold circuit between road and delay circuit, the control level for being exported to the detection unit carry out voltage self-locking simultaneously The control level is exported to delay circuit.
5. ON-OFF control circuit according to claim 3, which is characterized in that the zero passage voltage detection circuit includes second Voltage comparator circuit;
The in-phase input end of the second voltage comparison circuit connects the voltage input end of the Device under test;The second voltage The inverting input connection reference voltage source of comparison circuit;
The second voltage comparison circuit is used to detecting the voltage of in-phase input end and inverting input, and in-phase input end with When the input voltage of inverting input is equal, the first high level of output to the first voltage comparison circuit.
6. ON-OFF control circuit according to claim 3, which is characterized in that the rising edge detection circuit includes third electricity Press comparison circuit and phase-shift network;
The input terminal of the tertiary voltage comparison circuit connects sample circuit, the tertiary voltage comparison circuit by phase-shift network Output terminal connection first voltage comparison circuit;
The phase-shift network is defeated for the input voltage of the in-phase input end of the tertiary voltage comparison circuit to be lagged behind reverse phase Enter the input voltage signal at end;
The tertiary voltage comparison circuit is input to the input voltage of in-phase input end and inverting input for detecting, and same When the input voltage of phase input terminal is more than the input voltage of inverting input, output the second high level to the first voltage compares Circuit.
7. ON-OFF control circuit according to claim 6, which is characterized in that the phase-shift network includes RC retarded type phase shifts Circuit.
8. ON-OFF control circuit according to claim 7, which is characterized in that the RC retarded types phase-shift circuit includes series connection Shifting resistance and shift capacitor;
The shifting resistance of the series connection connects the voltage input end of the Device under test with shift capacitor, to test voltage signal into Row sampling;
The shift capacitor is connected in parallel to the inverting input of the tertiary voltage comparator, the test voltage signal input that will be late by To second voltage comparator.
9. ON-OFF control circuit according to claim 1, which is characterized in that the delay circuit is RC delay circuits.
10. a kind of test equipment, which is characterized in that including ON-OFF control circuit as described in any one of claim 1 to 9, survey Try the load resistance of voltage source, line impedance stabilization net work, oscillograph and the connection line impedance stabilization net work;
The test voltage source connects the control source port of Device under test by line impedance stabilization net work, defeated to Device under test Enter test voltage signal;
The control source port of the oscillograph connection Device under test, response of the detection Device under test to test voltage signal;
The control source port of the ON-OFF control circuit connection Device under test and the switch of Device under test, the survey to Device under test Voltage signal sampling and detection are tried, controls switching on-off for Device under test.
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