CN202565154U - Multiphase switching converter and controller thereof - Google Patents

Abstract

Multiphase switching converters and controllers thereof are disclosed. The controller includes: a comparison circuit coupled to output terminals of the plurality of switching circuits, generating a comparison signal based on the reference signal and the output voltage; the control circuit is coupled to the comparison circuit to receive the comparison signal and generates a plurality of control signals according to the comparison signal so as to control the plurality of switch circuits to be sequentially conducted; when the conducting time of the current switching circuit is longer than the difference between the first time threshold and the second time threshold, the control circuit can conduct the next phase of switching circuit according to the comparison signal after the time from the current switching circuit to the conducting time reaches the first time threshold; when the on-time of the current switch circuit is less than the difference between the first time threshold and the second time threshold, the control circuit can turn on the next phase switch circuit according to the comparison signal after the off-time of the current switch circuit reaches the second time threshold, wherein the first time threshold is greater than the second time threshold.

Description

Heterogeneous switch converters and controller thereof

Technical field

The embodiment of the utility model relates to electronic circuit, relates in particular to a kind of heterogeneous switch converters and controller thereof.

Background technology

In recent years,, need the switch converters that output voltage is littler, output current is bigger, the requirement of hot property, EMI and the load transient response of switch converters is also improved constantly along with the appearance of some high-performance CPU.Heterogeneous switch converters is widely used in the solution of high-performance cpu power with its superior performance.

Fig. 1 is the block diagram of existing heterogeneous switch converters 100.Heterogeneous switch converters 100 comprises N switching circuit, and wherein N is the integer greater than 2.The input of this N switching circuit receives input voltage VIN, and output is coupled in together so that output voltage VO UT to be provided.Comparator C MP1 compares output voltage VO UT and reference signal VREF, produces comparison signal CMPO.Control circuit produces N control signal CTRL1～CTRLN according to comparison signal CMPO, with the conducting and the shutoff of N switching circuit of control.Usually, when comparison signal CMPO was high level, control circuit provided energy with the respective switch circuit turn-on so that this switching circuit is load.When the conducting duration of switching circuit reached preset duration, control circuit turn-offed this switching circuit.

In the prior art, in order to guarantee each phase switch circuit operate as normal successively, control circuit reaches minimum turn-off duration t at the shutoff duration of current switching circuit _{Min_off_time}After, root comes next switching circuit of conducting according to comparison signal CMPO, but this undoubtedly can be to the maximum duty cycle D of heterogeneous switch converters _MaxCause restriction.Maximum duty cycle D _MaxCan be expressed as:

$D_{\max }=\frac{t_{\mathrm{on}}}{N(t_{\mathrm{on}}+t_{\min \_\mathrm{off}\_\mathrm{time}})}<\left(\frac{100}{N}\right)\%---\left(1\right)$

T wherein _OnConducting duration for switching circuit.In the application scenario of required duty ratio greater than (100/N) %, existing heterogeneous switch converters can't operate as normal.

Shown in Figure 2 is the working waveform figure of existing four phase switch converters.Can know the maximum duty cycle D of this four phases switch converters according to formula (1) _MaxLess than 25%, thereby can't be applied in required duty ratio greater than 25% occasion.

The utility model content

A kind of controller that is used for heterogeneous switch converters according to the utility model embodiment; This heterogeneous switch converters comprises a plurality of switching circuits, and the output of these a plurality of switching circuits is coupled in together so that output voltage to be provided, and it is characterized in that; This controller comprises: comparison circuit; Have first input end, second input and output, wherein first input end be coupled to a plurality of switching circuits output to receive output voltage, second input receives reference signal; Comparison circuit produces comparison signal based on reference signal and output voltage at output; And control circuit; Have input and a plurality of output; Wherein input be coupled to comparison circuit output to receive comparison signal, control circuit produces a plurality of control signals according to comparison signal at a plurality of outputs, to control the conducting successively of a plurality of switching circuits; Wherein after the time that is switched on apart from current switching circuit reached very first time threshold value, control circuit can be according to comparison signal with next phase switch circuit conducting.

In one embodiment; During greater than the difference of the very first time threshold value and second time threshold, control circuit can be according to comparison signal with next phase switch circuit conducting after the time that is switched on apart from current switching circuit reaches very first time threshold value at the conducting duration of current switching circuit; At the conducting duration of current switching circuit during less than the difference of the very first time threshold value and second time threshold; Control circuit can be according to comparison signal with next phase switch circuit conducting after the shutoff duration of current switching circuit reaches second time threshold, and wherein very first time threshold value is greater than second time threshold.

In one embodiment, control circuit comprises: testing circuit, and whether the shutoff duration whether detection reaches very first time threshold value and current switching circuit apart from the time that current switching circuit is switched on reaches second time threshold, produces shielded signal; Frequency dividing circuit; Have first input end, second input and a plurality of output; Wherein first input end be coupled to comparison circuit output to receive comparison signal; Second input is coupled to testing circuit to receive shielded signal, and frequency dividing circuit produces a plurality of asserts signal according to comparison signal and shielded signal at a plurality of outputs; And a plurality of sub-control circuits, each sub-control circuit all has input and output, wherein input be coupled to frequency dividing circuit corresponding output end to receive asserts signal, output is coupled to the respective switch circuit so that control signal to be provided.

In one embodiment; Testing circuit comprises: timing circuit; Have a plurality of inputs and an output; Wherein a plurality of inputs are coupled to the output of a plurality of sub-control circuits respectively to receive a plurality of control signals, and timing circuit carries out timing based on the control signal of current switching circuit, and produce timing signal at output; First comparison circuit; Have first input end, second input and output; Wherein first input end be coupled to timing circuit output to receive timing signal; Second input receives very first time threshold value, and first comparison circuit produces first comparison signal based on timing signal and very first time threshold value at output; Second comparison circuit; Have first input end, second input and output; Wherein first input end be coupled to timing circuit output to receive timing signal; Second input receives the current switching circuit conducting duration and the second time threshold sum, and second comparison circuit produces second comparison signal based on timing signal and the current switching circuit conducting duration and the second time threshold sum at output; And first gate circuit; Have first input end, second input and output; Wherein first input end be coupled to first comparison circuit output to receive first comparison signal; Second input is coupled to the output of second comparison circuit to receive second comparison signal, and first gate circuit produces shielded signal based on first comparison signal and second comparison signal at output.

In one embodiment; Frequency dividing circuit comprises: second gate circuit; Have first input end, second input and output, wherein first input end be coupled to comparison circuit output to receive comparison signal, second input is coupled to testing circuit to receive shielded signal; Second gate circuit produces the preassignment signal based on shielded signal and comparison signal at output; And multi-channel conversion circuit, have input and a plurality of output, wherein input is coupled to second gate circuit to receive the preassignment signal, and multi-channel conversion circuit is coupled to a plurality of outputs to produce a plurality of asserts signal at a plurality of outputs successively with input.

In one embodiment, each sub-control circuit comprises: conducting duration control circuit, the conducting duration control signal of generation control switch circuit turn-on duration; Minimum turn-off duration control circuit, the minimum turn-off duration control signal of generation control switch circuit minimum turn-off duration; The 3rd gate circuit; Have first input end, second input and output; Wherein first input end be coupled to frequency dividing circuit corresponding output end to receive asserts signal; Second input is coupled to minimum turn-off duration control circuit to receive minimum turn-off duration control signal, and the 3rd gate circuit produces logic output signal based on asserts signal and minimum turn-off duration control signal at output; And logical circuit; Have first input end, second input and output; Wherein first input end is coupled to conducting duration control circuit to receive conducting duration control signal; Second input is coupled to the output of the 3rd gate circuit and exports signal with RL, and logical circuit produces control signal based on conducting duration control signal and logic output signal at output.

In one embodiment, second time threshold equates with the minimum turn-off duration.

A kind of heterogeneous switch converters according to the utility model embodiment is characterized in that, comprising: a plurality of switching circuits; And foregoing controller.

In one embodiment, each switching circuit comprises: drive circuit, have the input and first output, second output, and wherein input is coupled to controller to receive control signal; First switching tube has first end, second end and control end, and wherein first termination is received input voltage, and control end is coupled to first output of drive circuit; The second switch pipe has first end, second end and control end, and wherein first end is coupled to second end of first switching tube, the second end ground connection, and control end is coupled to second output of drive circuit; And inductor, have first end and second end, wherein first end is coupled to second end of first switching tube and first end of second switch pipe, and second end is as the output of switching circuit.

Embodiment according to the utility model; After the time that is switched on apart from current switching circuit reaches very first time threshold value; Can control next phase switch circuit conducting, like this, the conducting of can overlapping of adjacent two phase switch circuits; (100/N) % that makes the duty ratio of heterogeneous switching circuit no longer be subject to, thus can satisfy the requirement of big space rate application scenario.

Description of drawings

Fig. 1 is the block diagram of existing heterogeneous switch converters 100;

Fig. 2 is the working waveform figure of existing four phase switch converters;

Fig. 3 is the block diagram according to the heterogeneous switch converters 300 of the utility model one embodiment;

Fig. 4 is the circuit theory diagrams according to the control circuit shown in Figure 3 303 of the utility model one embodiment;

Fig. 5 A and 5B are the oscillogram of shown in Figure 3 heterogeneous switch converters 300 under the different operating state according to the utility model one embodiment;

Fig. 6 is the circuit theory diagrams according to the four phase switch converters 600 of the utility model one embodiment;

Fig. 7 A and 7B are shown in Figure 6 four oscillograms of switch converters 600 under the different operating state mutually according to the utility model one embodiment;

Fig. 8 is the circuit theory diagrams according to the sub-control circuit shown in Figure 4 of the utility model one embodiment.

Embodiment

To describe the specific embodiment of the utility model below in detail, should be noted that the embodiments described herein only is used to illustrate, be not limited to the utility model.In the following description, for the thorough to the utility model is provided, a large amount of specific detail have been set forth.Yet, it will be obvious to those skilled in the art that and needn't adopt these specific detail to carry out the utility model.In other instances,, do not specifically describe known circuit, material or method for fear of obscuring the utility model.

In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: the special characteristic, structure or the characteristic that combine this embodiment or example to describe are comprised among at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " that occurs in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can make up specific characteristic, structure or property combination in one or more embodiment or example with any suitable combination and/or son.In addition, it should be understood by one skilled in the art that at this accompanying drawing that provides all be for illustrative purposes, and accompanying drawing is not necessarily to draw in proportion.Should be appreciated that when claiming that " element " " is connected to " or " coupling " during to another element it can be directly to connect or be couple to another element or can have intermediary element.On the contrary, when claiming that element " is directly connected to " or during " directly being couple to " another element, not having intermediary element.Identical Reference numeral indication components identical.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.

Fig. 3 is the block diagram according to the heterogeneous switch converters 300 of the utility model one embodiment, comprises controller (shown in frame of broken lines among Fig. 3) and N the switching circuit 301_1～301_N with switching tube, and wherein N is the integer more than or equal to 2.The input of switching circuit 301_1～301_N receives input voltage VIN, and output is coupled in together so that output voltage VO UT to be provided.Switching circuit 301_1～301_N can adopt any DC-DC or ac/dc transformation topology structure, for example synchronous or asynchronously boosts, buck converter, and normal shock, anti exciting converter or the like.Switching tube among switching circuit 301_1～301_N can be any controllable semiconductor switch device, for example mos field effect transistor (MOSFET), igbt (IGBT) etc.Controller produces conducting and the shutoff of control signal CTRL1～CTRLN with control switch circuit 301_1～301_N.

Controller comprises comparison circuit 302 and control circuit 303.Comparison circuit 302 is coupled to the output of switching circuit 301_1～301_N with reception output voltage VO UT, and produces comparison signal CMPO based on reference signal VREF and output voltage VO UT.Control circuit 303 is coupled to comparison circuit 302 to receive comparison signal CMPO; And according to N control signal CTRL1～CTRLN of comparison signal CMPO generation; With control switch circuit 301_1～301_N conducting successively, make switching circuit 301_1～301_N be followed successively by load energy is provided.

In order to guarantee each phase switch circuit operate as normal successively, control circuit 303 can be according to comparison signal CMPO with next phase switch circuit conducting after the time that is switched on apart from current switching circuit reaches time threshold TTH1.Usually, time threshold TTH1 is set to less than Ts/N, and wherein Ts is the switch periods of single-phase switch circuit.Like this, in the bigger application scenario of duty ratio, switching circuit conducting duration t for example _OnDuring greater than Ts/N, the conducting of can overlapping of adjacent two phase switch circuits, the % that makes that the duty ratio of heterogeneous switching circuit no longer is subject to (100/N).In one embodiment, as output voltage VO UT during less than reference signal VREF, control circuit 303 provides energy with the respective switch circuit turn-on so that this switching circuit is load.

In one embodiment; The shutoff duration that control circuit 303 reaches time threshold TTH1 or current switching circuit in the time that is switched on apart from current switching circuit reaches after arbitrary condition satisfies among the time threshold TTH2; Can be according to comparison signal CMPO with next phase switch circuit conducting, wherein time threshold TTH1 is greater than time threshold TTH2.

For heterogeneous switch converters shown in Figure 3; Control circuit 303 through control signal CTRL1 with switching circuit 301_1 conducting after; Even output voltage VO UT is still less than reference signal VREF, control circuit 303 can be immediately with next phase switch circuit 301_2 conducting yet.After the shutoff duration that reaches time threshold TTH1 or switching circuit 301_1 until the time that is switched on apart from switching circuit 301_1 reaches time threshold TTH2, control circuit 303 just can output voltage VO UT during less than reference signal VREF with next phase switch circuit 301_2 conducting.

Correspondingly, pass through control signal CTRLK with switching circuit 301_K (K=1,2 at control circuit 303; ...; N-1) after the conducting, though output voltage VO UT still less than reference signal VREF, control circuit 303 can be immediately with next phase switch circuit 301_K+1 conducting yet.After the shutoff duration that reaches time threshold TTH1 or switching circuit 301_1 until the time that is switched on apart from switching circuit 301_K reaches time threshold TTH2, control circuit 303 just can output voltage VO UT during less than reference signal VREF with next phase switch circuit 301_K+1 conducting.

In like manner, control circuit 303 through control signal CTRLN with switching circuit 301_N conducting after, even output voltage VO UT still less than reference signal VREF, control circuit 303 can be immediately with next phase switch circuit 301_1 conducting yet.After the shutoff duration that reaches time threshold TTH1 or switching circuit 301_N until the time that is switched on apart from switching circuit 301_N reaches time threshold TTH2, control circuit 303 just can output voltage VO UT during less than reference signal VREF with next phase switch circuit 301_1 conducting.

In the bigger application scenario of duty ratio, the conducting duration t of switching circuit _OnGreater than TTH1-TTH2, before the shutoff duration of current switching circuit reached time threshold TTH2, time threshold TTH1 arrived.Control circuit 303 can be according to comparison signal CMPO with next phase switch circuit conducting after time threshold TTH1 arrives.The conducting of can overlapping of adjacent two phase switch circuits, thus each phase switch circuit operate as normal successively under big space rate guaranteed.In duty ratio smaller applications occasion, the conducting duration t of switching circuit _OnLess than TTH1-TTH2, before time threshold TTH1 arrived, the shutoff duration of current switching circuit had reached time threshold TTH2.Then with prior art similarly; After current switching circuit turn-offs duration threshold value time of advent TTH2; Control circuit 303 can be according to comparison signal CMPO with next phase switch circuit conducting, thereby guarantees that when load current increased suddenly, next phase switch circuit can in time be switched on.Therefore; Heterogeneous switch converters 300 shown in Figure 3 can be regulated the phase difference between adjacent two phase switch circuits automatically according to demand; Thereby both can satisfy the requirement of big space rate application scenario, can under duty ratio smaller applications occasion, keep good transient response again.

In one embodiment, if detect load current and increase suddenly, the conducting no longer successively of each phase switch circuit, all or part of switching circuit in the heterogeneous switching circuit 300 will be by the while conducting, thereby bigger electric current is provided for load.

Fig. 4 is the circuit theory diagrams according to the control circuit shown in Figure 3 303 of the utility model one embodiment.Control circuit 303 comprises testing circuit 404, frequency dividing circuit 405 and N sub-control circuit 406_1～406_N.Whether the shutoff duration whether testing circuit 404 detections reach time threshold TTH1 and current switching circuit apart from the time that current switching circuit is switched on reaches time threshold TT2, and produces shielded signal SET_BLK.Frequency dividing circuit 405 has first input end, second input and N output; Wherein first input end is coupled to comparison circuit to receive comparison signal CMPO; Second input is coupled to testing circuit 404 to receive shielded signal SET_BLK, and frequency dividing circuit 405 produces N asserts signal SET1～SETN according to comparison signal CMPO and shielded signal SET_BLK at N output.Each sub-control circuit 306_i all has input and output (i=1; 2 ..., N); Wherein input be coupled to frequency dividing circuit 405 corresponding output end to receive asserts signal SETi, output is coupled to the respective switch circuit so that control signal CTRLi to be provided.

In one embodiment, testing circuit 404 comprises timing circuit 407, first comparison circuit 408, second comparison circuit 409 and first gate circuit 410.Timing circuit 407 has N input and an output, and wherein N input is coupled to sub-control circuit 406_1～406_N to receive control signal CTRL1～CTRLN.Timing circuit 407 carries out timing based on the control signal of current switching circuit, and produces timing signal TIME at output.First comparison circuit 408 is coupled to timing circuit 407 to receive timing signal TIME, timing signal TIME and time threshold TTH1 is compared, and produce the first comparison signal SYS_BLK1.Second comparison circuit 409 is coupled to timing circuit 407 to receive timing signal TIME, with timing signal TIME with current switching circuit conducting duration t _OnCompare with time threshold TTH2 sum, and produce the second comparison signal SYS_BLK2.First gate circuit 410 is coupled to first comparison circuit 408 and second comparison circuit 409 receiving the first comparison signal SYS_BLK1 and the second comparison signal SYS_BLK2, and produces shielded signal SET_BLK according to these two signals.

In one embodiment, be switched at current switching circuit, when promptly corresponding control signal became high level by low level, timing circuit 407 picked up counting, and this moment, the first comparison signal SYS_BLK1 and the second comparison signal SYS_BLK2 were high level.When timing signal TIME reached time threshold TTH1, the first comparison signal SYS_BLK1 became low level.When timing signal TIME reaches current switching circuit conducting duration t _OnDuring with time threshold TTH2 sum, the second comparison signal SYS_BLK2 becomes low level.First gate circuit 410 is and door that frequency dividing circuit 405 only when shielded signal SET_BLK is low level, is regulated asserts signal SET1～SETN according to comparison signal CMPO.

In one embodiment, frequency dividing circuit 405 comprises second gate circuit 411 and multi-channel conversion circuit 412.Second gate circuit 411 is coupled to testing circuit 404 and comparison circuit 302 receiving shielded signal SET_BLK and comparison signal CMPO, and based on these two signals generation preassignment signal DIST.Multi-channel conversion circuit 412 has input and a plurality of output; Wherein input is coupled to second gate circuit 411 to receive preassignment signal DIST, and multi-channel conversion circuit 412 is coupled to a plurality of outputs to produce a plurality of asserts signal SET1～SETN successively with input.

Fig. 5 A and 5B are the oscillogram of shown in Figure 3 heterogeneous switch converters 300 under the different operating state according to the utility model one embodiment.Fig. 5 A is depicted as heterogeneous switch converters 300 in duty ratio oscillogram hour.Conducting this moment duration t _OnWith time threshold TTH2 sum less than time threshold TTH1, before time threshold TTH1 arrived, the shutoff duration of current switching circuit had reached time threshold TTH2.Thereby after the shutoff duration of current switching circuit reached time threshold TTH2, control circuit 303 can be according to comparison signal CMPO, for example when comparison signal CMPO is high level, with next phase switch circuit conducting.

Fig. 5 B is depicted as the oscillogram of heterogeneous switch converters 300 when duty ratio is big.Conducting this moment duration t _OnWith time threshold TTH2 sum greater than time threshold TTH1, before the shutoff duration of current switching circuit reached time threshold TTH2, time threshold TTH1 arrived.Thereby after time threshold TTH1 arrived, control circuit 303 can be according to comparison signal CMPO, for example when comparison signal CMPO is high level, with next phase switch circuit conducting.

Fig. 6 is the circuit theory diagrams according to the four phase switch converters 600 of the utility model one embodiment.Four phase switch converters 600 comprise controller, feedback circuit 614 and switching circuit 601_1～601_4.Controller comprises comparison circuit 602 and control circuit 603.Switching circuit 601_1～601_4 adopts buck converter topology, and each switching circuit 601_j includes drive circuit 613_j, switching tube Sj, switching tube SRj and inductor Lj, j=1 wherein, and 2,3,4, its connection is as shown in Figure 5.

Feedback circuit 614 is coupled to the output of switching circuit 601_1～601_4 with reception output voltage VO UT, and produces feedback signal FB.In one embodiment, feedback circuit 614 comprises resitstance voltage divider.Comparison circuit 602 comprises comparator C MP1.Comparator C MP1 has in-phase input end, inverting input and output, and wherein in-phase input end receives reference signal VREF, and inverting input is coupled to feedback circuit 614 with receiving feedback signals FB, and output provides comparison signal CMPO.Control circuit 603 is coupled to the output of comparator C MP1 with reception comparison signal CMPO, and produces control signal CTRL1～CTRL4 according to comparison signal CMPO, with conducting and the shutoff of control switch circuit 601_1～601_4.In order to guarantee each phase switch circuit operate as normal successively; The shutoff duration that control circuit 603 reaches time threshold TTH1 or current switching circuit in the time that is switched on apart from current switching circuit reaches after arbitrary condition satisfies among the time threshold TTH2, can be according to comparison signal CMPO with next phase switch circuit conducting.

In one embodiment, controller also comprises the slope compensation circuit 615 that produces slope compensation signal VSLOPE, to prevent the generation of subharmonic oscillation.Slope compensation signal VSLOPE can be applied to feedback signal FB, also can from reference signal VREF, be deducted.In the embodiment shown in fig. 6, slope compensation signal VSLOPE is deducted from reference signal VREF.In one embodiment; Slope compensation signal VSLOPE is reset to when switching circuit is switched on maximum or the slope and rises; The shutoff duration that reaches time threshold TTH1 or switching circuit in the time that is switched on apart from switching circuit reaches after arbitrary condition satisfies among the time threshold TTH2, and beginning descends with preset slope gradually.

Fig. 7 A and 7B are shown in Figure 6 four oscillograms of switch converters 600 under the different operating state mutually according to the utility model one embodiment, and wherein Fig. 7 A is depicted as four phase switch converters 600 in duty ratio oscillogram hour.After the shutoff duration of current switching circuit reaches time threshold TTH2; Slope compensation signal VSLOPE begins to descend gradually with preset slope; Control circuit 603 can be according to comparison signal CMPO, for example when comparison signal CMPO is high level, with next phase switch circuit conducting.

And Fig. 7 B is depicted as the oscillogram of four phase switch converters 600 when duty ratio is big.After the time that current switching circuit is switched on reaches time threshold TTH1; Slope compensation signal VSLOPE begins to descend gradually with preset slope; Control circuit 603 can be according to comparison signal CMPO, for example when comparison signal CMPO is high level, with next phase switch circuit conducting.

Fig. 8 is the circuit theory diagrams according to the sub-control circuit shown in Figure 4 of the utility model one embodiment.Sub-control circuit 406_i comprises conducting duration control circuit 816, minimum turn-off duration control circuit 817, the 3rd gate circuit 818 and logical circuit 819.Conducting duration control circuit 816 produces control switch circuit turn-on duration t _OnConducting duration control signal COTi.Minimum turn-off duration control circuit 817 produces control switch circuit minimum turn-off duration t _{Min_off_time}Minimum turn-off duration control signal OFFMINi.The 3rd gate circuit 818 is coupled to frequency dividing circuit 405 and minimum turn-off duration control circuit 817 receiving asserts signal SETi and minimum turn-off duration control signal OFFMINi, and based on these two signals generation logic output signals.Logical circuit 819 is coupled to the 3rd gate circuit 818 and exports signal and conducting duration control signal COTi with conducting duration control circuit 816 with RL, and produces control signal CTRLi based on these two signals.In one embodiment, the 3rd gate circuit 808 is and door, and logical circuit 819 is a rest-set flip-flop.

The conducting duration t of switching circuit _OnCan be set to steady state value, or with input voltage VIN and/or the relevant variable value of output voltage VO UT.In one embodiment, time threshold TTH2 and minimum turn-off duration t _{Min_off_time}Equate.

Though described the utility model with reference to several exemplary embodiments, should be appreciated that used term is explanation and exemplary and nonrestrictive term.Because the utility model practical implementation and do not break away from the spirit or the essence of utility model in a variety of forms; So be to be understood that; The foregoing description is not limited to any aforesaid details; And should in enclose spirit that claim limited and scope, explain widely, therefore fall into whole variations and remodeling in claim or its equivalent scope and all should be the claim of enclosing and contain.

Claims (9)

1. controller that is used for heterogeneous switch converters, this heterogeneous switch converters comprises a plurality of switching circuits, the output of these a plurality of switching circuits is coupled in together so that output voltage to be provided, and it is characterized in that this controller comprises:

Comparison circuit; Have first input end, second input and output, wherein first input end be coupled to a plurality of switching circuits output to receive output voltage, second input receives reference signal; Comparison circuit produces comparison signal based on reference signal and output voltage at output; And

Control circuit has input and a plurality of output, wherein input be coupled to comparison circuit output to receive comparison signal, control circuit produces a plurality of control signals according to comparison signal at a plurality of outputs, to control the conducting successively of a plurality of switching circuits;

Wherein after the time that is switched on apart from current switching circuit reached very first time threshold value, control circuit can be according to comparison signal with next phase switch circuit conducting.

2. controller as claimed in claim 1; It is characterized in that; During greater than the difference of the very first time threshold value and second time threshold, control circuit can be according to comparison signal with next phase switch circuit conducting after the time that is switched on apart from current switching circuit reaches very first time threshold value at the conducting duration of current switching circuit; At the conducting duration of current switching circuit during less than the difference of the very first time threshold value and second time threshold; Control circuit can be according to comparison signal with next phase switch circuit conducting after the shutoff duration of current switching circuit reaches second time threshold, and wherein very first time threshold value is greater than second time threshold.

3. controller as claimed in claim 2 is characterized in that control circuit comprises:

Testing circuit, whether the shutoff duration whether detection reaches very first time threshold value and current switching circuit apart from the time that current switching circuit is switched on reaches second time threshold, produces shielded signal;

Frequency dividing circuit; Have first input end, second input and a plurality of output; Wherein first input end be coupled to comparison circuit output to receive comparison signal; Second input is coupled to testing circuit to receive shielded signal, and frequency dividing circuit produces a plurality of asserts signal according to comparison signal and shielded signal at a plurality of outputs; And

A plurality of sub-control circuits, each sub-control circuit all has input and output, wherein input be coupled to frequency dividing circuit corresponding output end to receive asserts signal, output is coupled to the respective switch circuit so that control signal to be provided.

4. controller as claimed in claim 3 is characterized in that testing circuit comprises:

Timing circuit; Have a plurality of inputs and an output; Wherein a plurality of inputs are coupled to the output of a plurality of sub-control circuits respectively to receive a plurality of control signals, and timing circuit carries out timing based on the control signal of current switching circuit, and produce timing signal at output;

First comparison circuit; Have first input end, second input and output; Wherein first input end be coupled to timing circuit output to receive timing signal; Second input receives very first time threshold value, and first comparison circuit produces first comparison signal based on timing signal and very first time threshold value at output;

Second comparison circuit; Have first input end, second input and output; Wherein first input end be coupled to timing circuit output to receive timing signal; Second input receives the current switching circuit conducting duration and the second time threshold sum, and second comparison circuit produces second comparison signal based on timing signal and the current switching circuit conducting duration and the second time threshold sum at output; And

First gate circuit; Have first input end, second input and output; Wherein first input end be coupled to first comparison circuit output to receive first comparison signal; Second input is coupled to the output of second comparison circuit to receive second comparison signal, and first gate circuit produces shielded signal based on first comparison signal and second comparison signal at output.

5. controller as claimed in claim 3 is characterized in that frequency dividing circuit comprises:

Second gate circuit; Have first input end, second input and output; Wherein first input end be coupled to comparison circuit output to receive comparison signal; Second input is coupled to testing circuit to receive shielded signal, and second gate circuit produces the preassignment signal based on shielded signal and comparison signal at output; And

Multi-channel conversion circuit has input and a plurality of output, and wherein input is coupled to second gate circuit to receive the preassignment signal, and multi-channel conversion circuit is coupled to a plurality of outputs to produce a plurality of asserts signal at a plurality of outputs successively with input.

6. controller as claimed in claim 3 is characterized in that, each sub-control circuit comprises:

Conducting duration control circuit, the conducting duration control signal of generation control switch circuit turn-on duration;

Minimum turn-off duration control circuit, the minimum turn-off duration control signal of generation control switch circuit minimum turn-off duration;

The 3rd gate circuit; Have first input end, second input and output; Wherein first input end be coupled to frequency dividing circuit corresponding output end to receive asserts signal; Second input is coupled to minimum turn-off duration control circuit to receive minimum turn-off duration control signal, and the 3rd gate circuit produces logic output signal based on asserts signal and minimum turn-off duration control signal at output; And

Logical circuit; Have first input end, second input and output; Wherein first input end is coupled to conducting duration control circuit to receive conducting duration control signal; Second input is coupled to the output of the 3rd gate circuit and exports signal with RL, and logical circuit produces control signal based on conducting duration control signal and logic output signal at output.

7. controller as claimed in claim 6 is characterized in that, second time threshold equates with the minimum turn-off duration.

8. a heterogeneous switch converters is characterized in that, comprising:

A plurality of switching circuits; And

Like each described controller in the claim 1 to 7.

9. heterogeneous switch converters as claimed in claim 8 is characterized in that, each switching circuit comprises:

Drive circuit has the input and first output, second output, and wherein input is coupled to controller to receive control signal;

First switching tube has first end, second end and control end, and wherein first termination is received input voltage, and control end is coupled to first output of drive circuit;

The second switch pipe has first end, second end and control end, and wherein first end is coupled to second end of first switching tube, the second end ground connection, and control end is coupled to second output of drive circuit; And

Inductor has first end and second end, and wherein first end is coupled to second end of first switching tube and first end of second switch pipe, and second end is as the output of switching circuit.

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