CN108181568B

CN108181568B - Wafer test protection pad and test method

Info

Publication number: CN108181568B
Application number: CN201810025264.0A
Authority: CN
Inventors: 吴苑
Original assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2018-01-11
Filing date: 2018-01-11
Publication date: 2021-04-06
Anticipated expiration: 2038-01-11
Also published as: CN108181568A

Abstract

The invention discloses a wafer test protection pad which is suitable for a wafer probe test machine, the protection pad is annular, the diameter of the outer edge of the protection pad is larger than that of a wafer borne by the protection pad, the protection pad covers the peripheral area of the wafer, and the protection pad is made of elastic and insulating materials and comprises rubber and plastic. The invention also discloses a use method of the wafer test protection pad, when CP test is carried out, peripheral probes on a probe card directly hit the protection pad without contacting with test points on the wafer, the probe card can be cleaned by the elastic protection pad, and the insulating protection pad can effectively prevent needle burning.

Description

Wafer test protection pad and test method

Technical Field

The present invention relates to the field of semiconductor integrated circuit manufacturing and testing, and more particularly to a wafer test protection pad in wafer testing.

Background

On a wafer, after a semiconductor device is manufactured and before scribing and packaging are carried out, the wafer is tested, because the wafer is not packaged at this time, a device to be tested (DUT) on the wafer is tested by contacting a probe on a probe card to a reserved PAD for testing on the surface of the wafer, then a corresponding test electrical signal is loaded on the probe through a test program to test, and some performance information of a die (die) on the whole wafer, including whether short circuit exists, whether the function is normal, the performance is high or low and the like, is obtained, so that a plurality of dies on the wafer are screened and classified into bins. The test is called a CP test (chip bonding), which picks out bad Die, so as to reduce the cost of packaging and testing and to know the yield of Wafer more directly. The chips that pass the CP test are unpackaged. In the aspect of testing, CP is difficult to manufacture a probe card and has an interference problem in parallel testing.

When a plurality of devices to be tested are tested simultaneously, a plurality of DUTs share a power supply, the incomplete circuit of a tube core positioned in the edge area of a wafer can cause a probe to be pricked down and possibly short-circuited, if so, a plurality of DUTs sharing the power supply can be completely failed, and even the current impact damage is seriously caused to the probe, so that the subsequent test is influenced.

Disclosure of Invention

The invention provides a wafer test protection pad, which can prevent a probe at the edge of a wafer from short-circuiting during testing.

The invention also aims to provide a test method for testing the protection pad by using the wafer.

In order to solve the above problems, the present invention provides a wafer test protection pad: the wafer test protection pad is suitable for a wafer probe test CP machine, is annular, has an outer edge diameter larger than a wafer borne by the protection pad, and covers the peripheral area of the wafer.

Furthermore, the protection pad is made of elastic materials which are insulated and resistant to temperature change, and can stably work within the range of-55-150 ℃.

Furthermore, the material comprises various materials such as rubber, resin and the like and a combined structure thereof, and the upper layer of the material can contain abrasive particles such as silicon carbide (SiC) and the like, so that the material has a cleaning effect on the needle point.

The invention relates to a test method of a wafer test protection pad, which is characterized in that an annular elastic insulating protection pad is covered on a test surface of a wafer, and a circle of crystal grains close to the outer edge of the wafer are covered by the protection pad; when CP test is carried out, the probe card is directly hit on the protection pad by the peripheral probe without contacting with the test point on the wafer.

Further, the probes printed on the protection pad can be cleaned by the protection pad, and the insulated protection pad can prevent needle burning.

The wafer test protection pad covers the periphery of the wafer with incomplete circuits on the wafer, when CP test is carried out, the probes arranged on the periphery of the wafer are in an insulated state, the phenomenon of short circuit and needle burning of the probes is effectively prevented, and meanwhile, the elastic protection pad has a cleaning effect on the probes.

Drawings

FIG. 1 is a schematic structural diagram of a wafer test protection pad according to the present invention, including a cross-sectional view.

Fig. 2 is a partially enlarged view of the protective pad covering the wafer.

FIG. 3 is a schematic diagram of a test performed on a wafer using a probe behind a protective pad according to the present invention.

Detailed Description

The wafer test protection pad is used for a wafer probe test CP machine, as shown in figure 1, the protection pad is annular, the diameter of the outer edge of the protection pad is larger than that of a wafer borne by the protection pad, and the protection pad covers the peripheral area of the wafer.

The protective pad is made of various materials such as rubber and resin with elasticity, insulation and temperature change resistance, or has a combined structure, the upper layer of the material can contain materials such as silicon carbide (SiC) and grinding particles, and the materials have a cleaning effect on the needle point.

When a CP machine is used for testing, an annular elastic insulating protection pad is used for covering the testing surface of the wafer, and the protection pad covers a circle of crystal grains close to the outer edge of the wafer; the covered circle of die near the outer edge is a die near the outer ring of the wafer where it is difficult to form effective devices on the wafer in the semiconductor process, as shown in fig. 2. When CP test is carried out, the peripheral probes on the probe card directly hit the protection pad and are not contacted with the test points on the wafer. Thus, the incomplete crystal grains on one circle of the wafer close to the outer edge are insulated from the probe, the probe in the middle part is not affected, the incomplete crystal grains keep good contact with the crystal grains to be tested, and the normal electric signal test can be carried out, as shown in fig. 3.

The wafer test protection pad covers the periphery of the wafer with an incomplete circuit on the wafer, the probes arranged on the peripheral part of the wafer are in an insulated state, the phenomenon of short circuit and needle burning of the probes is effectively prevented, and meanwhile, the elastic protection pad has a cleaning effect on the probes and further protects the probes.

The above are merely preferred embodiments of the present invention, and are not intended to limit the present invention. Various modifications and alterations to this invention will become apparent to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. The utility model provides a wafer test protection pad, is applicable to wafer probe test CP board, its characterized in that: the protective pad is annular, the diameter of the outer edge of the protective pad is larger than that of the wafer covered by the protective pad, and the diameter of the inner edge of the protective pad is smaller than that of the wafer covered by the protective pad, so that the annular protective pad covers the peripheral area of the wafer.

2. The wafer test protection pad of claim 1, wherein: the protection pad is made of elastic, insulating and high-temperature-resistant materials.

3. The wafer test protection pad of claim 2, wherein: the material can stably work at the temperature of-55 to 150 ℃.

4. The wafer test protection pad of claim 2, wherein: the material comprises rubber, resin material or the combination thereof; the upper layer of the material can optionally increase silicon carbide abrasive particles, and the needle point is cleaned.

5. A test method for testing a protection pad of a wafer is characterized by comprising the following steps: the annular elastic insulating protection pad covers the test surface of the wafer, and the protection pad covers a circle of crystal grains close to the outer edge of the wafer; when CP test is carried out, the probe card is directly hit on the protection pad by the peripheral probe without contacting with the test point on the wafer.

6. The method as claimed in claim 5, wherein the step of testing the protection pad comprises: the probes printed on the protective pad can be cleaned by the protective pad, and the insulated protective pad can prevent needle burning.