CN108155911A - Non-uniform ultra-wideband sparse signal sampling method based on FPGA - Google Patents
Non-uniform ultra-wideband sparse signal sampling method based on FPGA Download PDFInfo
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Abstract
The invention discloses a non-uniform ultra-wideband sparse signal sampling method based on an FPGA (field programmable gate array), which solves the problems that the hardware of the conventional compression sampling method is difficult to realize and the traditional uniform sampling method is limited by the Nyquist theorem. The implementation steps are as follows: building a hardware platform; determining a sampling rate parameter; setting an AD sampling rate according to a required compression ratio; determining a pseudo-random symbol formula; generating a pseudo-random sequence; storing the pseudo-random sequence into an RAM of the FPGA; the non-uniform sampling of the sparse signals is completed by sending the signals through a gigabit transceiver in the FPGA and using the signals as a working clock of a sampling holder; the signal is reconstructed by a recovery algorithm. The invention can realize 10 times compression of the maximum 4GHz Nyquist sampling rate, and the rear end completes compression sampling of sparse signals in the 2GHz bandwidth range through the AD with the sampling rate of 400 MHz. The invention greatly reduces the complexity and the expense of the whole compression sampling system, is easy to realize in engineering, is applied to electronic reconnaissance and collects frequency domain sparse radar signals.
Description
Technical field
The invention belongs to technical field of signal sampling, relate generally to special compression sampling technology, specifically a kind of to be based on
The non-homogeneous ultra wide band sparse signal method of sampling of FPGA is acquired available for ultra wide band sparse signal.
Background technology
With the continuous development of electronic technology, electromagnetic environment becomes increasingly complicated various now, radar and electronic warfare system
Signal band width to be treated increased dramatically.The radiofrequency signal that several GHz reach tens GHz what is more is up in face of frequency,
The confidential useful information that obtained out of so big frequency range of digital received needs to use the high ADC chips of many sample rates,
This not only considerably increases research and development and data storage, the cost of transmission, but also in ultra wide band field, many times existing chip
Performance can not meet the requirement of nyquist sampling theorem at all.
Also it is solution while the appearance of compressive sensing theory (CS) brings great challenge to conventional Nyquist sampling thheorem
The difficulty that certainly nyquist sampling faces brings new resolving ideas.CS theories are pointed out, for sparse signal, even if to be less than
The sample rate of Nyquist rate samples signal, can also obtain all information of original signal.It is limited so as to utilize
Observation data can with great probability accurately to original signal complete signal reconstruction.Since compressive sensing theory is application
It in discrete signal, therefore first has to solve the problems, such as to be how to carry out compression sampling to continuous analog signal, realizes observation
The matrix multiplication of matrix and original signal, this hardware for needing to combine reality is designed, existing to be converted based on analog information
The scheme of device (AIC), such as modulation wide-band transducer (MWC), Stochastic Modulation pre-integration (RMPI) need simultaneously to pass through signal
Multiple channels are acquired with multi-channel A/D, and not only resource consumption is big, of high cost, and the clock between multi-channel A/D C synchronizes also pole
It is difficult, and realizes relatively simple random demodulation (RD) and be only used for acquisition and include limited a discrete frequency component
Multitone (multitone) signal.
Non-uniform sampling is also known as pseudorandom sampling, is the emphasis of signal sampling technology development in recent years.It is basic
Principle be on the basis of uniform sampling random delay or advanced sampling time.Nonuniform sampling can reduce quantization bit mistake
Difference increases dynamic range, while has the characteristic of anti-spectral aliasing.It is combined with compressive sensing theory, nonuniform sampling can dash forward
The limitation of sampling thheorem in the case of broken uniform sampling uses the information of the ADC acquisition ultra wide band sparse signals of low speed.Compared with other
Existing AIC schemes, the realization of nonuniform sampling is more convenient, and hardware cost is lower, while not to sparse signal type
Limitation.Which kind of method is pseudo-random sequence is generated, and it is that the program is realized ADC to be controlled to carry out pseudorandom sampling to signal with it using
Difficult point, foreign countries have team to design and Implement an AIC using the principle of nonuniform sampling, but in its scheme using
The chip and ADC specially designed, development cost are very high.
Invention content
Present invention aims at the deficiencies for existing compression sampling implementation, propose that a kind of realization is simple, are easy to
It is engineered the non-homogeneous ultra wide band sparse signal method of sampling based on FPGA of application.
The present invention is a kind of non-homogeneous ultra wide band sparse signal method of sampling based on FPGA, which is characterized in that is included
Following steps：
1) hardware platform for signal sampling is built, platform mainly includes FPGA, ADC, DSP, high-speed sampling retainer,
For wherein sampling holder for keeping analog signal, low speed ADC is used for the analog signal digital for exporting sampling holder,
FPGA is used for the digital signal for receiving ADC outputs and the pseudo random clock signal for generating control sampling holder working condition,
DSP is used to be configured the running parameter of related device；
2) signal band limits is acquired according to actual needs, obtains a Nyquist for being more than 2 times of signal maximum frequency
Sample frequency Fs；
3) assume to need to compress Nyquist rate progress for K times, low speed analog-digital converter AD sample rates are F, then F=
Fs/K, wherein K are positive integer.
4) pseudo-random sequence for high-speed sampling retainer to be controlled to accept or reject input discrete signal is generated, if symbol
Sum is N, and N=nK, n are positive integer, then generates K bit symbols, cycle generation n times every time using pseudorandom symbol generation formula；
5) obtained n group K bit symbols are joined end to end in order, the N positions pseudo-random sequence P finally needed；
6) RAM being stored in pseudo-random sequence P in FPGA, if the user clock frequency of FPGA gigabit transceivers is
Fuser, the data width of RAM is width, depth depth, then：
7) pseudo-random sequence P is sent into control with Nyquist rate Fs using the gigabit transceiver GTH of FPGA
High-speed sampling retainer to the holding of signal with passing through, the low speed ADC of rear end exports sampling holder at this time analog signal
Discrete signal is obtained after digitlization, which contains the complete information of original sparse signal.
8) rarefaction representation vector of the original signal in sparse domain is recovered by the signal recovery algorithms in compressed sensing.
The present invention is based on compressive sensing theories, can utilize nonuniform sampling by existing device using FPGA as core
Technology completes the compression sampling to ultra wide band sparse signal, and actual sample rate is far below nyquist sampling rate, is non-homogeneous adopt
A kind of innovation that sample is combined with compressive sensing theory.
The present invention has the following advantages compared with prior art：
1) present invention completes the observing matrix in compressive sensing theory to original signal using non-uniform sampling
Compression observation, compared with the existing scheme based on AIC compression sampling models, such as modulation wide-band transducer (MWC) and random tune
For pre-integration (RMPI) processed, the device that the scheme of nonuniform sampling needs is less, and cost is lower, the side with random demodulation (RD)
Case is compared, and nonuniform sampling is without being only applicable in the limitation of multi-tone signal, while the scheme that existing nonuniform sampling is realized uses
Be the sample circuit and ADC specially designed, the cost is relatively high, and method proposed by the present invention, can use in the market
The device of volume production is realized, greatly reduces complexity and expense that entire compression sampling system is realized.
2) present invention is compared with traditional uniform sampling based on Nyquist's theorem, due to the corresponding observation of nonuniform sampling
Matrix form meets to the requirement of observing matrix in compressive sensing theory, and observing matrix is the random matrix for meeting Uniformly distributed,
Therefore the present invention can be to be far below the sample rate of Nyquist rate acquisition ultra wide band sparse signal, and collected signal includes
All information of original sparse signal reduce signal transmission in signal processing, the burden of storage.
Description of the drawings
Fig. 1 is the realization flow chart of the present invention；
Fig. 2 is the functional module structure block diagram of the present invention；
Fig. 3 is the hardware block diagram of the present invention；
Fig. 4 is nonuniform sampling function and ADC sampling function relational graphs in the present invention；
Fig. 5 is sampling holder working timing figure in the present invention；
Fig. 6 is the spectrogram of the pseudo-random sequence used in the present invention；
The emulation that Fig. 7 is the present invention restores signal spectrum figure；
The experiment that Fig. 8 is the present invention restores signal spectrum figure；
Fig. 9 is the main hardware platform pictorial diagram of the present invention；
Figure 10 is the sampling holder pictorial diagram used in the present invention.
Specific embodiment
Referring to the drawings, technical solutions and effects of the present invention is described in detail
Embodiment 1
The implementation of existing compression sampling, generally existing realize it is complicated, it is of high cost, adapt to that signal type is limited etc. to ask
Topic, the present invention expand research for these problems, it is proposed that a kind of non-homogeneous ultra wide band sparse signal sampling based on FPGA
Method, referring to Fig. 1, including having the following steps：
1) it designs and builds the hardware platform for signal sampling, platform is mainly comprising FPGA, ADC, DSP, high-speed sampling
For keeping analog signal, how maximum sample frequency needs can meet signal to be collected for retainer, wherein sampling holder
Qwest's sampling rate；Low speed ADC is used for the signal for keeping sampling holder and digitizes, what method proposed by the present invention used
It is the ADC of uniform sampling rate, specific sampling rate, compression factor are related with the nyquist sampling rate of signal；FPGA is used
It is selected in the digital signal and the pseudo random clock signal of generation control sampling holder working condition that receive ADC outputs
Fpga chip need gigabit transceiver, and its max line speed can reach the nyquist sampling rate of signal；DSP is used for
The running parameter of related device is configured.
2) the main applying electronic of the present invention scouts field, and in electronics investigation, the bandwidth of radar signal is relative to entirely detecing
It is typically sparse, as needed scouting band limits to examine for band bandwidth, that is, actual needs acquisition signal frequency range
Range, obtain one be more than wait to detect the Nyquist sampling frequency Fs of 2 times of collection of letters maximum frequency.If necessary to the frequency range of scouting
Range is 0~Fc, then nyquist sampling rate Fs >=2Fc。
3) applied compression perception theory can sample signal to be far below Nyquist rate, it is assumed that need to how
Nyquist rate carries out K times and compresses, and low speed analog-digital converter AD sample rates are F, and sample rate needs to meet F=Fs/K, wherein K
For positive integer, AD used in existing non-uniform sampling method usual right and wrong at the uniform velocity, need special when realizing in this way
The circuit that controls it of door design, increases implementation complexity, and in the present invention, the sample rate of low speed AD be it is fixed,
Hardware circuit design is easier to realize.
4) pseudo-random sequence for high-speed sampling retainer to be controlled to accept or reject input discrete signal is generated, if symbol
Sum is N, and N=nK, n are positive integer, then generates K bit symbols, cycle generation n times every time using pseudorandom symbol generation formula.
Since method of the invention is using the AD of fixed rate, actually there was only a code in the K bit symbols generated every time
Member realizes the sampling to discrete Nai Kuisisite rate signals.
5) operating procedure 4) in symbol generation formula n times, obtained n group K bit symbols are joined end to end by genesis sequence,
The N positions pseudo-random sequence P finally needed.The pseudo-random sequence has actually corresponded to the random observation in compressive sensing theory
Matrix.
6) RAM being stored in pseudo-random sequence P in FPGA, if the user clock frequency of FPGA gigabit transceivers is Fuser
The data width of RAM be width, depth depth, then：
Set in the IP kernel that the relevant parameter of more than gigabit transceiver is provided in FPGA developing instruments, in FPGA two into
The pseudo-random sequence of system is there are in RAM by group, and the transmission chip rate of gigabit transceiver is equal to Fs, and internal logic
Circuit is operated in FuserUnder, from RAM by groups of width be width pseudo-random sequence each clock cycle rising
Along write-in gigabit transceiver module, the bit wide of every group of pseudo noise code is changed, then corresponding FuserAll can with RAM depth depth
Change, under the premise of above formula relationship is met, while to ensure FuserNo more than the maximum operation frequency of chip.
7) pseudo-random sequence P is sent into control with Nyquist rate Fs using the gigabit transceiver GTH of FPGA
High-speed sampling retainer is to the holding of signal with passing through, and the low speed ADC of rear end is by the output analog signal figure of retainer at this time
Change the discrete signal obtained later, which contains the complete information of original sparse signal.
8) rarefaction representation vector of the original signal in sparse domain is recovered by the signal recovery algorithms in compressed sensing.
In electronics investigation, traditional digital channelized receiver based on uniform sampling usually first receives antenna
Radiofrequency signal carry out analog filtering, mixing output intermediate-freuqncy signal, then by high-speed ADC will input intermediate-freuqncy signal digitize,
Digitized intermediate-freuqncy signal is finally subjected to subchannel division and Digital Down Convert.However when instantaneous scope of reconnaissance is expanded to ultra-wide
When band, the ADC for needing more high sampling rate could meet nyquist sampling law, considerably increase R＆D costs in this way,
Secondly, even if there is the high-speed ADC met the requirements, but its often to face quantization bit wide relatively low, it is expensive the problem of, it is difficult to it is real
With.The present invention is based on compressive sensing theories, ultra wide band sparse signal are acquired using non-uniform sampling, compared with tradition
For digital channelized receiver, it is easier to realize, cost is lower.Meanwhile it completes to press using method proposed by the present invention
Observing matrix in contracting perception theory observes the compression of original signal, compared with traditional compression sampling scheme, reality of being more convenient for
Realization and engineer application.
Embodiment 2
The non-homogeneous ultra wide band sparse signal method of sampling based on FPGA is with embodiment 1, the pseudo noise code described in step 4
Member generation formula, it is specific as follows
Wherein PiRepresenting the sequence of symhols of ith generation, k represents symbol serial number k=1,2,3...K；uiIt is one random
Number, value range 1~(K-2), each round update before generating symbol.
Method proposed by the present invention, the n group symbols ultimately generated constitute the pseudo random clock sequence of control sampling holder
Row, the sequence correspond to the random observation matrix in compressive sensing theory, the original discrete signal phase with Nyquist rate
Multiply, realize the observation of the compression to ultra wide band sparse signal, it can be with to the result applied compression perceptual signal restructing algorithm of observation
Recover original signal.
Embodiment 3
For the non-homogeneous ultra wide band sparse signal method of sampling based on FPGA with embodiment 1-2, this example is described in step 1
For a kind of implementation of the hardware platform of ultra wide band sparse signal sampling, referring to Fig. 3, in this example hardware platform using FPGA as
Core is connected with crystal oscillator, provides reference input clock for it, is connected to clock chip, and the gigabit transceiver internal for it provides
Operating reference clock, is connected to digital signal processor DSP, is ADC, clock chip configuration parameter, is connected to ADC for receiving number
Compression sampling signal after change；The gigabit transceiver of FPGA be used for the pseudo-random sequence that keeps internal RAM in advance with how Kui
Si Site rates send control sampling holder to the holding of input analog signal with passing through, and clock chip is simultaneously to ADC
Operating reference clock is provided；FPGA is transferred to after the analog signal digital that ADC exports sampling holder.
In this example, the fpga chip as core has used the high-end V family chips of Xilink companies, in practice, application
This method completes the sampling of ultra wide band sparse signal, can according to actual demand, using the chip of different company's different series, as long as
Gigabit transceiver is integrated in used fpga chip, and its max line speed supported is to be achieved more than or equal to needing
Nyquist sampling rate.The selection of sampling holder is very crucial, and the height of performance directly affects the effect finally sampled
Quality, therefore the HMC760 fully differentials of ADI companies has been selected to sample in this example and have kept chip, it can be carried for signal acquiring system
The dynamic characteristic become reconciled for larger bandwidth.The chip can provide accurate signal sampling, table in the bandwidth more than 5GHz
The linear characteristic of 9 to 10 now is kept for the output in the range of 5GHz, and only introduces the noise of 0.9mV, while random aperture
Shake is also below 70fs.In addition, being allowed in this example using eight core DSP of TI company's Ts MS320c6678 may use it to pair
Sampled result is analyzed, and otherwise actually it only serves the effect that parameter is configured, if only considering the sampling to signal, DSP
It can also be replaced, such as microcontroller with simpler device, can utmostly reduce expense in this way.
Invention software and hardware design are combined, and interrelated and fusion is supported, can be in fast construction compressed sensing
The hardware platform of analog information converter AIC.
Embodiment 4
The non-homogeneous ultra wide band sparse signal method of sampling based on FPGA is with embodiment 1-3, in this example
Step 1：Build the hardware platform for compression sampling.
Step 2：Determine nyquist sampling rate Fs.
Assuming that need to be acquired the sparse signal of 0-2GHz, then nyquist sampling rate Fs=2x2GHz=4GHz.
Step 3：The compression sampling ratio reached as needed selects the ADC of corresponding speed.
For example, it is assumed that Fs=3GHz, compression sampling ratio K=5, then the sample rate of ADC：
In another example, it is assumed that Fs=8GHz, compression sampling ratio K=20, the then sample rate of ADC：
Step 4：Generate the pseudo random clock sequence for driving sampling holder.
Assuming that K=20, the practical formula for generating pseudorandom two into sequence is as follows：
Symbol generation formula performs every time can generate K random codes, perform n times altogether.
Wherein PiRepresenting the sequence of symhols of ith generation, n represents the number of cycle generation, and k represents symbol serial number k=1,
2,3...K；uiIt is a random number, value range 1~(20-2) is updated before each round generation symbol, this shows practical
Sampling time interval ranging from 3Tnyq~37Tnyq。
In another example K=5, then pseudorandom symbol formula is as follows：
Symbol generation formula performs every time can generate K random codes, perform n times altogether.
Wherein PiRepresenting the sequence of symhols of ith generation, n represents the number of cycle generation, and k represents symbol serial number k=1,
2,3...K；uiIt is a random number, value range 1~(5-2) is updated before each round generation symbol, this shows practical adopt
Sample time interval ranging from 3Tnyq~7Tnyq。
Step 5：The n group K bit symbols head and the tail connection obtained in step 4 is obtained into final N positions pseudo random clock sequence
The randomness of pseudo-random sequence is stronger, better to the collection effect of signal, can usually be sentenced by its spectral characteristic
Disconnected, the pseudo-random sequence of better performances should have the spectral characteristic of approximate Gaussian white noise, i.e., in Nyquist sampling frequency
In the range of be Stationary Distribution.
Step 4 is performed repeatedly, the pseudo-random sequence that multigroup length is N is obtained, to the pseudorandom sequence of generation in Matlab
Row do Fourier transformation and obtain its frequency spectrum, select wherein effect it is best as the pseudo-random sequence finally used, wherein it is pseudo- with
The length of machine sequence is longer, then higher to the frequency resolution of signal, but final extensive time multiplexed signal, the time complexity of calculating
Also higher, the relationship between them is represented with following formula：
Wherein f represents the frequency resolution of sampled signal, for example, working as Fs=4GHz, if frequency resolution will reach
1MHz, then the length N of pseudo-random sequence be：
In another example work as Fs=8GHz, it is desirable that frequency resolution will reach 0.5MHz, then the length N of pseudo-random sequence is：
Step 6：Pseudo-random sequence P is stored in the RAM in FPGA.
Assuming that the internal user clock frequency of gigabit transceiver is Fuser, line rate is equal to Fs, therefore the data of RAM
Bit wide width and depth depth：
Pseudo-random sequence P is divided into a binary number per width using Matlab, divides depth groups two altogether
System number is exported these binary numbers, using FPGA developing instruments, in synthetic circuit from Matlab with COE file formats
Before code, COE files are loaded by the configuration interface of developing instrument in RAM, realize design later, generation is corresponding can be right
The binary bits stream file of FPGA programmings.
Step 7：FPGA is programmed, the pseudo-random sequence for being stored RAM using the gigabit transceiver of FPGA is with line rate
Fs is sent for controlling sampling holder to the holding of signal with passing through, and discrete compression is obtained eventually by rear end ADC
Observation signal.
By the use of high speed PRBS as the work clock of sampling holder, the complete pair signals of sampling holder can be allowed
Random to accept or reject, since chip rate is Fs, this process, which is equivalent to, has first carried out input signal the sampling of Nyquist rate,
Then nonuniform sampling has been carried out to the discrete signal of Nyquist rate on this basis.
If it is sparse signal to input original signal, the signal obtained by compression sampling of the present invention contains original dilute
Dredge all information of signal.
Step 8：Original signal is restored by orthogonal matching pursuit OMP algorithms.
The present invention, can be to be far below adopting for Nyquist rate compared with traditional uniform sampling based on Nyquist's theorem
Sample rate acquires ultra wide band sparse signal, and collected signal contains all information of original sparse signal, reduces signal
Signal transmission, the burden of storage in processing procedure.
A more detailed example is given below, technical scheme of the present invention is described further
Embodiment 5
The non-homogeneous ultra wide band sparse signal method of sampling based on FPGA is with embodiment 1-3, with reference to Fig. 1, reality of the invention
Existing step is as follows：
Step 1：Build the hardware platform for compression sampling.
As shown in Figure 2, entire sampling platform is mainly by non-uniform clock generation module, data sampling module and adopts
Sample keeps module composition.
As shown in figure 3, in the actual hardware of the present invention is realized, the function of clock generation module is received by the gigabit of FPGA
Device and clock chip are sent out to complete, sampling and keep module is made of the sampling holder of high input bandwidth, data sampling module
Then it is made of a piece of low speed ADC chips.
Step 2：Determine nyquist sampling rate Fs.
Assuming that need to be acquired the sparse signal of 0-2GHz frequency ranges, then nyquist sampling rate Fs=2x2GHz=
4GHz, the highest sample rate that can actually the reach hardware realization related, of the invention with the chip performance selected, highest can reach
The sample rate arrived is 4GHz, while the compression ratio K the big, and the sampling rate of the ADC needed is lower, but signaling protein14-3-3 is imitated
Fruit is poorer, and through overtesting, the present invention is more than or equal to the inhibition of spurious signal when reaching preferable signal recovery effects
During 15dB, the maximum compression ratio that can reach is K=10, that is, realizes 10 times of compressions to Nyquist rate.In this example,
Fs=4GHz, K=10.
Step 3：The compression sampling ratio reached as needed selects the ADC of corresponding speed.
By Fs=4GHz, compression sampling ratio K=10, the sample rate of ADC is obtained：
In hardware realization of the present invention, the ADC chip EV10AQ190 that use, be 4 channels ADC, by changing it
Externally input reference clock frequency makes it be operated under different sample rates, meets different compression factors.
Step 4：Generate the pseudo random clock sequence for driving sampling holder.
Referring to Fig. 4, Fig. 4 is nonuniform sampling function and ADC sampling function relational graphs in the present invention, wherein function above
pNU(t) it is nonuniform sampling function, function p belowADC(t) it is ADC sampling functions,
K=10, { unIt is one group of stochastic variable, value range is 0~9, TnyqIt is between potential nyquist sampling
Every Tnyq=1/Fs.pNU(t) and pADC(t) relationship can represent as follows：
pNU(t)=pADC(t-un)
In order to accurately control the relationship of the sampling instant of non-uniform clock and ADC sampling instants, by pseudorandom two into
Code processed does level conversion to generate non-uniform clock, the present invention using the gigabit transceiver of FPGA come realize level translation so as to
Generate non-uniform clock.Referring to Fig. 5, Fig. 5 a are the analog signal waveform figures of input sample retainer, and Fig. 5 b are that input sample is protected
The pseudo random clock oscillogram of holder, Fig. 5 c are sampling holder signal output waveform figures, when Fig. 5 a, 5b, 5c correspond to same
Between reference axis.The sampling holder that can be seen that the present invention by this three width figure samples signal in clock falling edge, and
Output amplitude is the signal of sampled value in the interval of clock low.For failing edge, " 10 " sequence is utilized to realize, low level
Then by the way that symbol is allowed to be obtained for ' 0 ', so as to which the design of non-uniform clock to be converted to the design to pseudo-random binary sequence.
Enable the symbol width T of pseudo-random binary codeb=Tnyq=1/Fs, N are pseudo random sequence length, due to adopting for ADC
Sample clock fADCIt is changeless, it is possible to utilize and ADC sampling clocks fADCWith the homologous clock driving pseudorandom two of frequency
System symbol generator so that carved at the beginning of the 10N+1 symbol identical with the sampling instant of ADC clocks.Then STOCHASTIC CONTROL
" 10 " sequence exists, the position occurred in+1 sections of 10N+1 to 10 (N+1), can be so that the sampling function p of non-uniform clockNU
(t) meet formula.In view of gigabit transceiver in positive and negative level conversion there are isostatic compensation and ADC sampling to have delay,
The practical formula for generating pseudorandom two into sequence is as follows：
Symbol generation formula performs every time can generate K random codes, perform n times altogether.
Wherein PiRepresenting the sequence of symhols of ith generation, n represents the number of cycle generation, and k represents symbol serial number k=1,
2,3...K；uiIt is a random number, value range 1~(10-2) is updated before each round generation symbol, this shows practical
Sampling time interval ranging from 3Tnyq~17Tnyq。
Step 5：The n group K bit symbols head and the tail connection obtained in step 4 is obtained into final N positions pseudo random clock sequence
The randomness of pseudo-random sequence is stronger, better to the collection effect of signal, can usually be sentenced by its spectral characteristic
Disconnected, the pseudo-random sequence of better performances should have the spectral characteristic of approximate Gaussian white noise, i.e., in Nyquist sampling frequency
In the range of be Stationary Distribution.
Step 4 is performed repeatedly, the pseudo-random sequence that multigroup length is N is obtained, to the pseudorandom sequence of generation in Matlab
Row do Fourier transformation and obtain its frequency spectrum, select wherein effect it is best as the pseudo-random sequence finally used, wherein it is pseudo- with
The length of machine sequence is longer, then higher to the frequency resolution of signal, but final extensive time multiplexed signal, the time complexity of calculating
Also higher, the relationship between them is represented with following formula：
Wherein frRepresent the frequency resolution of sampled signal, Fs=4GHz, frequency resolution 0.5MHz in this example, then it is pseudo- with
The length N of machine sequence is：
Therefore need to perform the symbol generation formula in step 4
Step 6：Pseudo-random sequence P is stored in the RAM in FPGA.
The internal user clock frequency for setting gigabit transceiver is Fuser=200MHz, line rate are equal to Fs, therefore
The data bit width width of RAM and depth depth：
Pseudo-random sequence P is divided into one group as single binary number per width by the use of Matlab, is divided altogether
Depth group binary numbers export these binary numbers from Matlab with COE file formats, using FPGA developing instruments,
Before synthetic circuit code, COE files are loaded by the configuration interface of developing instrument in RAM, realize design later, generation corresponds to
Can to FPGA program binary bits stream file.
Step 7：FPGA is programmed, the pseudo-random sequence for being stored RAM using the gigabit transceiver of FPGA is with line rate
Fs is sent for controlling sampling holder to the holding of signal with passing through, and discrete compression is obtained eventually by rear end ADC
Observation signal.
By the use of high speed PRBS as the work clock of sampling holder, the complete pair signals of sampling holder can be allowed
Random to accept or reject, since chip rate is Fs, this process, which is equivalent to, has first carried out input signal the sampling of Nyquist rate,
Then nonuniform sampling has been carried out to the discrete signal of Nyquist rate on this basis.
In the hardware realization of the present invention, pseudo random clock rate reaches 4GHz, and rear end uses the fixation of a 400MHz
Rate ADC digitizes sampling holder signal, realizes 10 times of compressions to nyquist sampling rate.
If it is sparse signal to input original signal, the signal obtained by compression sampling of the present invention contains original dilute
Dredge all information of signal.
Step 8：Original signal is restored by orthogonal matching pursuit OMP algorithms.
If EN×NFor N rank unit matrixs, signal degree of rarefication is L, and compression sampling process is described as with formula：
Y=Φ X
WhereinRepresent compression observation as a result,
Φ represents pseudorandom observing matrix, by EN×NIn randomly select M row vectors composition,M=N/K；
X represents discrete original input signal,Its sample rate is Fs.
Recovery algorithms flow is as follows：
(1) respectively to residual errorε, the number t for indexing set S and iteration does following initialization：
R=y,T=1.
(2) residual error is found outεWith the maximum value φ in observing matrix Φ column vector inner productsjCorresponding subscript St, then solve
Optimization problem
(3) indexed set is updated,.
(4) estimation of x can be obtained according to least square method
(5) residual error is updated
(6) t is allowed from adding 1, and then judges whether to meet t more than L, if t is more than L, iteration terminates, otherwise returns
Step (2) continues to execute.
The present invention completes the compression sampling to ultra wide band sparse signal, by recovery algorithms by master of the signal in sparse domain
Component is wanted to reconstruct out, illustrates that sampling process utilizes the AD of 400MHz there is no the self-contained information of signal, the present invention is destroyed
Complete the sparse signal sampling of 2G bandwidth ranges, broken the limitation of nyquist sampling rate, be non-uniform sampling with
The combined innovation of compressive sensing theory has important practical significance, especially in electronic reconnaissance, by developing signal not
With the rarefaction representation under transform domain, many kinds of parameters estimation of signal can be obtained.
The technique effect of the present invention can be further illustrated by following emulation and experiment：
Embodiment 6
The non-homogeneous ultra wide band sparse signal method of sampling based on FPGA with embodiment 1-5,
1 simulated conditions
Nyquist sampling rate is set as Fs=4GHz, pseudo random sequence length N=8000, compression factor K=10.
2. emulation content
Emulation one：To the pseudo-random sequence that pseudorandom symbol formula generates in step 4 is used to do Fourier transformation, it is obtained
Spectrogram is shown in Fig. 6.
From fig. 6, it can be seen that the frequency spectrum of pseudo-random sequence that the present invention generates is evenly distributed in entire frequency domain, entire
In normalized frequency domain, the envelope of spectrum component is gentle and consistent, is more than the frequency of 50dB without larger fluctuating, and without amplitude
Spectral component illustrates that it, with preferable randomness, is used as the clock of sampling holder, has preferable sample effect.
Embodiment 7
The non-homogeneous ultra wide band sparse signal method of sampling based on FPGA with embodiment 1-5, simulated conditions with embodiment 6,
Emulation two：Setting input signal is x (t)=100sin (2 π f1t)+100sin(2πf2T), wherein f1=500MHz,
f2=1300MHz samples the signal using the pseudo-random sequence of generation, sampling number 800.It is realized due to us
It is ten times of compressions to Nyquist rate, so the points of reconstruction signal are 8000, while adds in white Gaussian noise, set
SNR=0dB restores degree of rarefication L=4, and referring to Fig. 7, Fig. 7 a are original input signal frequency spectrum, and Fig. 7 b pass through for compression sampling signal
Frequency spectrum after the reconstruct of OMP algorithms.
From figure 7 it can be seen that the signal spectrum that the present invention recovers is consistent with original signal x (t) frequency spectrums, due to known
The degree of rarefication of signal, thus while restoring with OMP algorithms eliminate the noise component(s) in original signal spectrum.
Embodiment 8
The non-homogeneous ultra wide band sparse signal method of sampling based on FPGA with embodiment 1-5,
Experiment condition
Main hardware chip type selecting：
Fpga chip:The Virtex7-690T-1 of Xilink companies
ADC chips：The EV10AQ190A of E2V companies
Clock chip：The ADF4350 of ADI companies
Sampling holder chip：The HMC760LC4B of ADI companies
Dsp chip：Ti company's Ts MS320C6678
Signal source：The SMA100A of Rohde＆Schwarz companies
The line rate of FPGA gigabit transceivers is set as 4GHz, pseudo random sequence length N=8000；Clock chip exports
Frequency 800M is supplied to ADC and gigabit transceiver as with reference to clock, after device power, preprepared configuration in DSP
Program is run, and ADC is initialized, and it is 400MHz to set its sample rate.
Fig. 9, Figure 10 are the hardware platform figures of the present invention, and ADC, FPGA are mainly contained in the PCB circuit board in Fig. 9,
DSP, clock chip, Figure 10 are the sampling holder pictorial diagrams that experiment uses.
Experiment content and result
(a) input frequency in setting signal source is 1.35GHz sinusoidal signals, and signal level is set as 200mv, will be collected
Signal is restored with OMP algorithms, and degree of rarefication L is set as 20.
(b) input frequency in setting signal source is 800MHz sinusoidal signals, and signal level is set as 200mv, will be collected
Signal is restored with OMP algorithms, and degree of rarefication L is set as 20.
(c) pulse signal of setting signal source input carrier frequency 1.4GHz, pulse width 5us, pulse repetition period 10us, letter
Number level is set as 200mv, collected signal is restored with OMP algorithms, degree of rarefication L is set as 100.
Under conditions of online programming is carried out to FPGA, the input under (a), (b) (c) experimental condition is believed using the present invention
Number carry out compression sampling, exploitation tool ISE provide online logic analysis core Chipscope by obtained compression sampling believe
It number exports in Matlab, is restored using OMP algorithms, experimental result such as Fig. 8 a, 8b, shown in 8c.
Referring to Fig. 8 a, Fig. 8 b, the signal after compression sampling obtains the frequency of original sparse signal by OMP recovery algorithms
Spectrum, it can be seen that two maximum spectrum components, it is consistent with original input signal, it makes an uproar since real input signal necessarily contains
Sound, therefore also have many spurious components in spectrogram, but this does not influence the estimation to original signal spectrum, maximum two points
Measure the inhibition about 20dB to spurious signal.
Referring to Fig. 8 c, the input signal of the experiment is pulse signal, and pulse signal is due to the Truncation of time domain, in frequency domain
There are spectral leakage phenomenons, and for such case, compressed sensing recovery algorithms are merely able to will be larger under signal sparse transform-domain
Coefficient component recover, can not accomplish complete Accurate Reconstruction.It can be seen that the signal spectrum largest component recovered and original
Beginning signal is consistent, and in electronic reconnaissance, often only certain parameters of the signal to receiving are interested, such as in this example, profit
With input signal in the openness of frequency domain, signal in the larger component in the part of frequency domain finite is restored, can be obtained to letter
The estimation of number frequency.
In summary experimental result can see, and the present invention completes the compression sampling to ultra wide band sparse signal, passes through
Recovery algorithms, which can reconstruct main component of the signal in sparse domain, to be come, and sampling process does not destroy the self-contained letter of signal
Breath, the sparse signal that the present invention completes 2G bandwidth ranges using the AD of 400MHz sample, and have broken nyquist sampling rate
Limitation is the combined innovation of non-uniform sampling and compressive sensing theory, has important practical significance, especially in electronics
In scouting, using the present invention by developing rarefaction representation of the signal under different transform domains, many kinds of parameters of signal can be obtained
Estimation.
In brief, the invention discloses a kind of non-homogeneous ultra wide band sparse signal method of sampling based on FPGA, mainly
Solve the problems, such as that existing compressive sampling method hardware realization is difficult and the conventional uniform method of sampling is limited by Nyquist's theorem
The problem of processed.Implementation step is：1) hardware platform is built；2) sampling rate parameter is determined；3) compression factor as needed, if
Put the sample rate of AD；4) pseudorandom symbol formula is determined；5) pseudo-random sequence is generated；6) pseudo-random sequence of generation is stored in
In the RAM of FPGA；7) by the gigabit transceiver inside FPGA, pseudo-random sequence is sent as sampling holder work
Make clock, complete the nonuniform sampling to sparse signal.8) pass through compressed sensing recovery algorithms reconstruction signal.The present invention can be real
Now to 10 times of the nyquist sampling rate of maximum 4GHz compressions, rear end can be completed pair by the AD of a 400MHz sample rate
The compression sampling of sparse signal in 2GHz bandwidth ranges.
Method proposed by the present invention can greatly reduce entire compression with the device of volume production is realized in the market
The complexity and expense that sampling system is realized, while solve based on the uniform sampling of nyquist sampling theorem in certain applications
Middle sample rate higher the problem of being difficult to realize, present invention can apply in electronic reconnaissance, acquire the dilute of ultra wideband frequency range
Dredge radar signal.
Claims (3)
1. a kind of non-homogeneous ultra wide band sparse signal method of sampling based on FPGA, which is characterized in that including having the following steps：
1) hardware platform sampled for ultra wide band sparse signal is built, platform is mainly comprising FPGA, ADC, DSP, high-speed sampling
For keeping analog signal, low speed ADC is used for the signal for keeping sampling holder number for retainer, wherein sampling holder
Change, FPGA is used to receive the digital signal of ADC outputs and generates the pseudo random clock letter of control sampling holder working condition
Number, DSP is used to be configured the running parameter of related device；
2) signal band limits is acquired according to actual needs, obtains a nyquist sampling for being more than 2 times of signal maximum frequency
Frequency Fs；
3) to assume to need to compress Nyquist rate progress for K times, low speed analog-digital converter AD sample rates are F, then F=Fs/K,
Wherein K is positive integer；
4) pseudo-random sequence for high-speed sampling retainer to be controlled to accept or reject input discrete signal is generated, if symbol is total
For N, N=nK, n are positive integer, then generate K bit symbols, cycle generation n times every time using pseudorandom symbol generation formula；
5) obtained n group K bit symbols are joined end to end in order, the N positions pseudo-random sequence P finally needed；
6) RAM being stored in pseudo-random sequence P in FPGA, if the user clock frequency of FPGA gigabit transceivers is Fuser, RAM
Data width for width, depth depth, then：
7) pseudo-random sequence P is sent into control at a high speed with Nyquist rate Fs using the gigabit transceiver GTH of FPGA
Sampling holder is to the holding of signal with passing through, and the low speed ADC of rear end will be after retainer output analog signal digital at this time
Discrete signal is obtained, which contains the complete information of original sparse signal.
8) rarefaction representation vector of the original signal in sparse domain is recovered by the signal recovery algorithms in compressed sensing.
2. a kind of non-homogeneous ultra wide band sparse signal method of sampling based on FPGA according to claim 1, feature exist
In the pseudorandom symbol generation formula described in step 4 is specific as follows：
Wherein PiRepresenting the sequence of symhols of ith generation, k represents symbol serial number k=1,2,3...K；uiIt is a random number,
Value range 1~(K-2), each round update before generating symbol.
3. a kind of non-homogeneous ultra wide band sparse signal method of sampling based on FPGA according to claim 1, feature exist
In a kind of implementation of the hardware platform for the sampling of ultra wide band sparse signal described in step 1, hardware platform is with FPGA
For core, crystal oscillator is connected with, reference input clock is provided for it, is connected to clock chip, the gigabit transceiver internal for it carries
For operating reference clock, digital signal processor DSP is connected to, the transfer of parameter transmission is configured as it, is connected to ADC for receiving
Compression sampling signal after digitlization；Gigabit transceiver inside FPGA provides work clock to sampling holder；Clock core
Piece provides operating reference clock to ADC simultaneously；FPGA is transferred to after the analog signal digital that ADC exports sampling holder.
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