CN108153669B - Method for realizing FPGA software simulation task scheduling by applying time axis configuration mode - Google Patents
Method for realizing FPGA software simulation task scheduling by applying time axis configuration mode Download PDFInfo
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- CN108153669B CN108153669B CN201711225458.7A CN201711225458A CN108153669B CN 108153669 B CN108153669 B CN 108153669B CN 201711225458 A CN201711225458 A CN 201711225458A CN 108153669 B CN108153669 B CN 108153669B
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3684—Test management for test design, e.g. generating new test cases
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3676—Test management for coverage analysis
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3688—Test management for test execution, e.g. scheduling of test suites
Abstract
The invention belongs to the technical field of FPGA software simulation testing, and particularly relates to a method for realizing FPGA software simulation task scheduling by applying a time axis configuration mode. The invention realizes the FPGA software test case in a task scheduling mode, and configures the task scheduling in a task point mode. The task points are arranged on a coordinate axis, the coordinate axis is a two-dimensional coordinate axis consisting of a transverse device and longitudinal time, systematic and time-series operation of the test cases is realized by adopting a mode of configuring the task points for each target in the coordinate axis according to time-series requirements, so that the system configuration capability of FPGA software simulation task scheduling is improved, and the batch processing capability of the test cases is improved.
Description
Technical Field
The invention belongs to the technical field of FPGA software simulation testing, and particularly relates to a method for realizing FPGA software simulation task scheduling by applying a time axis configuration mode.
Background
At present, when carrying out simulation test of FPGA software, a tester writes a test instruction document firstly, and the test instruction document comprises all test cases of the FPGA software to be tested. Each test case describes a test purpose, test input data, test steps, and an expected test result. The test case description is shown in fig. 1.
And (3) FPGA software simulation test, which needs to convert the test cases into a language which can be recognized by an FPGA simulation execution tool so as to load the test cases into the simulation execution tool to execute simulation. At present, the test case is realized in a code editing environment by manually editing codes, which consumes a lot of manpower and time. The finalized testband file is encoded line by line as shown in fig. 2.
The implementation mode of the line-by-line coding of the test cases is difficult to embody the corresponding relation between all the test cases and the test codes, and is difficult to effectively control the execution of a single test case or a plurality of test cases. The realization of the time sequence of the test case cannot be clearly displayed, the test progress and quality are influenced, the batch execution of the FPGA simulation test is difficult to realize, and the problems are brought to the development of the FPGA simulation test technology and the improvement of the character quality level.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is as follows: the invention aims to provide a method for automatically generating test excitation, which solves the contradiction of high labor cost and complex debugging at present and is suitable for simulation test of FPGA software.
(II) technical scheme
In order to solve the technical problem, the invention provides a method for realizing FPGA software simulation task scheduling by applying a time axis configuration mode, which comprises the following specific steps:
step 1: analyzing the system architecture of the FPGA to be tested and peripheral interface devices thereof to form a two-dimensional coordinate axis result with two-dimensional coordinate axis operation of the devices;
step 2: on the basis of the two-dimensional coordinate axis result obtained in the step 1, the task point module is used for further configuring the task points according to the requirements of the test cases to obtain a task point configuration result;
and step 3: on the basis of establishing a task point configuration result on a time axis of each device, further setting task points, configuring each task point according to the requirements of a test case, determining key data according to the requirements of a test object, an associated object, test excitation, time sequence and response described in the test case, configuring the related contents of the test case to the task points in a coordinate axis, describing the name of the test case through the characteristics of the task points, and obtaining a task point setting data result;
and 4, step 4: on the basis of setting data results by setting task points of the test cases, further performing task point configuration of all the test cases, wherein each task point can correspond to a test case description and start control to form a task point sequence result and a test case sequence result;
and 5: on the basis of the task point sequence result and the test case sequence result, test case selection in simulation execution is further carried out, a single test case can be selected, a plurality of or all test cases can be selected according to needs, a hardware description language code file capable of supporting a three-party simulation tool to execute simulation is formed according to different selected test cases, and batch test case generation simulation engineering file results are obtained.
In the step 1, in the two-dimensional coordinate axis result, the abscissa is the tested FPGA and its peripheral interface device, and the ordinate is the corresponding time schedule.
In step 2, the task point is set as concurrent scheduling, and a task point configuration result 2 is obtained by executing a task point configuration operation.
In step 2, the task point is set to be scheduled in time sequence, and a task point configuration result 2 is obtained by executing a task point configuration operation.
In step 3, the key data includes the trigger time of the task point.
In step 3, the key data includes a trigger condition of the task point.
In step 3, the key data includes test input data.
(III) advantageous effects
The invention realizes the FPGA software test case in a task scheduling mode, and configures the task scheduling in a task point mode. The task points are arranged on a coordinate axis, the coordinate axis is a two-dimensional coordinate axis consisting of a transverse device and longitudinal time, systematic and time-series operation of the test cases is realized by adopting a mode of configuring the task points for each target in the coordinate axis according to time-series requirements, so that the system configuration capability of FPGA software simulation task scheduling is improved, and the batch processing capability of the test cases is improved.
By implementing the technical scheme, the problem that a large number of test codes and test cases are difficult to effectively correspond due to the fact that the test codes are edited line by line when the test cases in the existing FPGA simulation test description document are implemented is solved. By setting the task points, each task point can correspond to a test case, and the corresponding relation between task scheduling and all test cases can be well reflected, so that the task points can better cover the test cases in the test description document.
The invention better solves the problem of graphic interface display of systematicness and time sequence of the FPGA test case sequence. And setting a task point for each device on the simulation system model according to the time sequence requirement of the device through a coordinate axis, wherein the setting of the task point can be comprehensively corresponding to and covered with the test case, so that the FPGA test case can be systematically displayed in a task scheduling interface.
The invention better solves the problem of effectively controlling the execution of a single test case or a plurality of test cases. The test case combination selection in the simulation process can be realized through a user interface selection mode, the simulation execution of a single test case, a plurality of test cases and batch test cases is realized, and a better method is provided for realizing the automatic simulation of the FPGA.
Drawings
FIG. 1 is a schematic diagram illustrating FPGA software test cases.
FIG. 2 is a diagram of a hardware description language for manually editing code line by line to implement test cases.
FIG. 3 is a schematic diagram of two-dimensional coordinate axis results of a test case of the FPGA to be tested and the peripheral interface device thereof.
FIG. 4 is a diagram of time-axis configuration scheduling task point efforts.
FIG. 5 is a diagram illustrating the code effort of setting a scheduling task point.
Fig. 6 is a schematic diagram of a task point corresponding to a test case result.
FIG. 7 is a diagram of task point sequence results.
FIG. 8 is a diagram illustrating test case sequence results.
FIG. 9 is a schematic diagram of a batch test case generation simulation engineering document result.
FIG. 10 is a task point diagram.
FIG. 11 is a schematic diagram of task point attribute input.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
In order to solve the technical problem, the invention provides a method for realizing FPGA software simulation task scheduling by applying a time axis configuration mode, which comprises the following specific steps:
step 1: analyzing the system architecture of the FPGA to be tested and peripheral interface devices thereof to form two-dimensional coordinate axis results with two-dimensional coordinate axis operation of the devices, as shown in FIG. 3;
step 2: on the basis of the two-dimensional coordinate axis result obtained in the step 1, the task point module is used for further configuring the task points according to the requirements of the test cases to obtain a task point configuration result, as shown in fig. 4;
and step 3: on the basis of establishing a task point configuration result on a time axis of each device, further setting task points, configuring each task point according to the requirements of a test case, determining key data including trigger time, trigger conditions and test input data of the task point according to the test object, associated object, test excitation, time sequence and response requirements described in the test case, configuring the relevant contents of the test case to the task points in a coordinate axis, describing the name of the test case through the characteristics of the task points, and obtaining a task point setting data result as shown in fig. 5 and 6;
and 4, step 4: on the basis of setting data results by setting task points of the test cases, further performing task point configuration of all the test cases, wherein each task point can correspond to a description and starting control of one test case to form a task point sequence result and a test case sequence result, as shown in fig. 7 and 8;
and 5: on the basis of the task point sequence result and the test case sequence result, test case selection in simulation execution is further performed, a single test case can be selected, a plurality of or all test cases can be selected according to needs, a hardware description language code file capable of supporting a three-party simulation tool to execute simulation is formed according to different selected test cases, and a batch test case generation simulation engineering file result is obtained, as shown in fig. 9.
In the step 1, in the two-dimensional coordinate axis result, the abscissa is the tested FPGA and its peripheral interface device, and the ordinate is the corresponding time schedule.
In step 2, the task point may be set to be concurrently scheduled, and a task point configuration result 2 is obtained by performing a task point configuration operation.
In step 2, the task point may be set to be scheduled in time sequence, and a task point configuration result 2 is obtained by executing a task point configuration operation.
In step 3, the key data includes the trigger time of the task point.
In step 3, the key data includes a trigger condition of the task point.
In step 3, the key data includes test input data.
Example 1
In the embodiment, the specific scheme is as follows:
1) the method is applied to a certain simulation supporting platform of the FPGA. In the simulation platform, the FPGA and the peripheral system architecture thereof are analyzed, and the tested FPGA and the peripheral interface device thereof are determined.
2) And analyzing the test case, and determining the input and output objects of the relevant data of the test case, the characteristics of the output data and the characteristics of the time sequence relation of the test case.
3) And establishing a coordinate axis, wherein the abscissa of the coordinate axis is the FPGA to be tested and the peripheral interface device thereof, and the ordinate of the coordinate axis is time. Each device on the abscissa corresponds to a longitudinal axis.
4) And setting the time sequence and the task point of the data of the time shaft where the FPGA to be tested and the peripheral interface device are positioned according to the requirements of parallel time sequence and serial time sequence. As shown in fig. 10.
5) The task points are set according to the requirements of the test cases, and have a better corresponding relationship with the test cases, as shown in fig. 11.
6) And automatically generating FPGA software simulation execution codes according to the configuration of all task points of the coordinate axis.
In summary, the invention relates to a design method for realizing test case loading by FPGA software in a task point configuration mode. The method solves the problems that the existing method realizes the test cases line by manually editing codes, lacks the grasp of test tasks and time sequences from the system angle and is difficult to control and execute the test cases in batches. The invention is suitable for FPGA software simulation test, and realizes the test case as the test requirement of batch task scheduling according to the system time sequence requirement.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (4)
1. A method for realizing FPGA software simulation task scheduling by applying a time axis configuration mode is characterized by comprising the following specific steps:
step 1: analyzing the system architecture of the FPGA to be tested and peripheral interface devices thereof to form a two-dimensional coordinate axis result with two-dimensional coordinate axis operation of the FPGA to be tested and the peripheral interface devices thereof;
step 2: on the basis of the two-dimensional coordinate axis result obtained in the step 1, the task point module is used for further configuring the task points according to the requirements of the test cases to obtain a task point configuration result;
and step 3: on the basis of establishing a task point configuration result on a time axis of each device, further setting task points, configuring each task point according to the requirements of a test case, determining key data aiming at the test object, the associated object, the test excitation and time sequence and the response requirements described in the test case, configuring the test object, the associated object, the test excitation and time sequence and the response requirements in the test case to the task points in a coordinate axis, describing the name of the test case through the characteristics of the task points, and obtaining a task point setting data result;
in the step 3, the key data comprises the triggering time of the task point, the triggering condition of the task point and the test input data;
and 4, step 4: on the basis of setting data results by setting task points of the test cases, further performing task point configuration of all the test cases, wherein each task point can correspond to a test case description and start control to form a task point sequence result and a test case sequence result;
and 5: on the basis of the task point sequence result and the test case sequence result, test case selection in simulation execution is further carried out, a single test case can be selected, a plurality of or all test cases can be selected according to needs, a hardware description language code file capable of supporting a three-party simulation tool to execute simulation is formed according to different selected test cases, and batch test case generation simulation engineering file results are obtained.
2. The method for realizing FPGA software simulation task scheduling by applying the time axis configuration mode as claimed in claim 1, wherein in the step 1, in the two-dimensional coordinate axis result, the abscissa is the FPGA to be tested and the peripheral interface device thereof, and the ordinate is the corresponding time scheduling.
3. The method for realizing task scheduling of FPGA software simulation by applying a timeline configuration mode as claimed in claim 1, wherein in step 2, the task points are set to be concurrently scheduled, and a task point configuration result 2 is obtained by executing a task point configuration operation.
4. The method for realizing task scheduling of FPGA software simulation by applying a timeline configuration mode as claimed in claim 1, wherein in step 2, the task points are set to be time sequence scheduling, and a task point configuration result 2 is obtained by executing task point configuration operation.
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| CN105159827A (en) * | 2015-08-21 | 2015-12-16 | 北京航空航天大学 | Reliability accelerated testing method for GUI software |
| CN106991044A (en) * | 2017-03-22 | 2017-07-28 | 记忆科技(深圳)有限公司 | A kind of test case scheduling and distribution method suitable for distributed test system |
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