CN108141282B

CN108141282B - clock performance monitoring system, method and device

Info

Publication number: CN108141282B
Application number: CN201580083949.5A
Authority: CN
Inventors: 万文通
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2015-10-26
Filing date: 2015-10-26
Publication date: 2019-12-13
Anticipated expiration: 2035-10-26
Also published as: WO2017070826A1; CN108141282A

Abstract

A clock performance monitoring system, method and device, can upgrade the value of the optical dispersion compensation signal C and the value of the tracking coefficient A, A 'of polarization state according to a path of output signal of the loop filter (24), thus not only can monitor the influence of optical dispersion through the change of C value, but also can track the polarization state through the change of A, A' value, and because the phase part of C value compensation can compensate the change of phase caused by the frequency domain offset of the laser, the influence of the frequency offset of the laser on the phase is processed at the same time of optical dispersion compensation, thereby achieving the effect of monitoring the performance influence of PMD dispersion, optical dispersion and the central frequency inconsistency of the transceiver laser on the clock recovery module, solving the problem of poor monitoring effect existing in the existing clock performance monitoring mode, and improving the comprehensiveness and accuracy of monitoring, thereby improving the performance of the system.

Description

Clock performance monitoring system, method and device

Technical Field

The invention relates to the technical field of clock recovery, in particular to a system, a method and a device for monitoring clock performance.

Background

In a coherent optical communication system, after photoelectric conversion is performed on a clock receiving end, algorithm processing of a digital domain is required to be performed, wherein the speed of the algorithm processing is required to be consistent with the speed of data transmission at all times, so that all transmitted data can be processed timely, that is, clock synchronization can be ensured.

in particular, in coherent optical communication systems, clock synchronization is typically achieved by a clock recovery module. The position of the clock recovery module in the coherent optical communication system can be as shown in fig. 1. As shown in fig. 1, after the dispersion estimation and compensation module completes the elimination of the partial optical dispersion damage of the x1 and y1 signals, the dispersion estimation and compensation module outputs x2 and y2 signals to the clock recovery module; the clock recovery module performs clock compensation processing on the x2 and y2 signals, outputs x3 and y3 signals to the depolarization module, performs depolarization processing on the x3 and y3 signals by the depolarization module, and outputs x4 and y4 signals to other digital processing units; and the clock recovery module can also output an error signal for representing the ADC sampling phase deviation to the loop filter, and the loop filter generates a corresponding control signal according to the error signal to control the voltage-controlled oscillator so as to adjust the sampling phase and the frequency of the ADC, thereby completing the synchronization of the receiving system.

that is, the clock recovery module may receive the corresponding photoelectrically converted electrical signal, process the received electrical signal, and obtain an estimated value of sampling phase deviation output by the ADC, and the estimated value may be fed back to the ADC, so that the sampling phase of the ADC is exactly at the optimal decision point of the signal symbol. Only such a signal with the correct sampling phase adjustment can be optimally received by the receiving system. Therefore, the clock recovery module is an integral part of the communication system, and the performance of the clock recovery module directly affects the performance of the system. Therefore, in the clock recovery module, it is often necessary to provide a corresponding monitoring device, such as a signal characteristic parameter modifier, to monitor the clock performance.

Specifically, for the existing clock recovery module with the corresponding clock performance monitoring function, the monitoring device included in the clock recovery module, that is, the signal characteristic parameter modifier, may be specifically configured to feed back two polarization state tracking coefficients a, a 'for compensating a polarization state tracking error to the signal adjuster, so that the signal adjuster may perform a polarization state tracking operation on the received signal according to the two polarization state tracking coefficients a, a'; and according to the signal from the phase discriminator (specifically, the real part of a sampling clock error signal obtained by the phase discriminator performing deviation detection on the signal input by the signal adjuster), two more suitable polarization state tracking coefficients A and A 'are searched through a set algorithm to correct the signal, namely, the polarization state tracking coefficients A and A' are updated, so that the modulus of a complex signal output by the phase discriminator or the real part of the complex signal is always kept the maximum, at the moment, the signal characteristic parameter modifier can consider that the current signal characteristic parameter is more suitable, and the signal characteristic can not be updated.

As can be seen from the above, currently, the whole clock recovery module monitors the clock performance by the modulus of the complex signal output by the phase detector or the real part of the complex signal, and when monitoring the clock performance by the modulus of the complex signal output by the phase detector or the real part of the complex signal, only the Polarization Mode tracking coefficient a, a' for compensating the Polarization state tracking error is considered, so that only the PMD (Polarization Mode Dispersion) characteristic of the monitored signal can be used, that is, only the Polarization state tracking can be maintained, and the monitoring effect is not good.

Disclosure of Invention

Embodiments of the present invention provide a system, a method, and a device for monitoring clock performance, which can simultaneously monitor PMD dispersion, optical dispersion, and the effect of non-uniform center frequency of a transceiver laser on the performance of a clock recovery module, so as to solve the problem of poor monitoring effect in the existing clock performance monitoring manner.

in a first aspect, a clock performance monitoring system is provided, which includes a signal clock compensator, a signal adjuster, a phase discriminator, a loop filter, an interpolation controller, and a clock performance monitoring apparatus, wherein:

The clock performance monitoring device is used for feeding back an optical dispersion compensation signal for compensating residual optical dispersion to the signal clock compensator and feeding back two polarization state tracking coefficients for compensating a polarization state tracking error to the signal adjuster; receiving a signal fed back by the loop filter, and updating the two polarization state tracking coefficients and the optical dispersion compensation signal according to the signal fed back by the loop filter, so that the signal fed back by the loop filter is a fixed value within a set time when the values of the two polarization state tracking coefficients and the optical dispersion compensation signal are changed;

the signal clock compensator is used for carrying out phase compensation on two paths of received signals from the dispersion estimation and compensation module connected with the clock performance monitoring system according to an optical dispersion compensation signal fed back by the clock performance monitoring device and a phase compensation value fed back by the interpolation controller, and outputting the two paths of compensated signals to the signal regulator and the depolarization module connected with the clock performance monitoring system;

The signal adjuster is used for carrying out polarization state tracking on the received signal according to two polarization state tracking coefficients fed back by the clock performance monitoring device to obtain a path of positive frequency spectrum signal and a path of negative frequency spectrum signal, and outputting the positive frequency spectrum signal and the negative frequency spectrum signal to the phase discriminator;

the phase discriminator is used for detecting the sampling clock deviation of the received signal to obtain a sampling clock error signal and outputting the imaginary part of the sampling clock error signal to the loop filter and the analog-digital converter;

The loop filter is used for filtering the signal from the phase discriminator, outputting one path of signal obtained after filtering to the interpolation controller, and outputting the other path of signal obtained after filtering to the clock performance monitoring device;

And the interpolation controller is used for feeding back the phase compensation value to the signal clock compensator and updating the phase compensation value fed back to the signal clock compensator according to the signal from the loop filter.

With reference to the first aspect, in a first possible implementation manner of the first aspect, the clock performance monitoring apparatus is specifically configured to derive each polarization tracking coefficient according to a signal fed back by a loop filter, calculate a change direction of each polarization tracking coefficient, and update a corresponding polarization tracking coefficient according to a set first step length according to the change direction of each polarization tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and the number of the first and second groups,

and scanning the value of the optical dispersion compensation signal according to the signal fed back by the loop filter and the value range of the set optical dispersion compensation signal and the set second step length, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

with reference to one possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, a value range of the optical dispersion compensation signal is [0, 1], where 0 represents that no movement is required, and 1 represents that a sample interval is moved forward.

with reference to the first aspect, in a third possible implementation manner of the first aspect, the signal clock compensator is specifically configured to perform fourier transform on each of the two received signals to obtain a corresponding frequency domain signal, and perform shunting of positive and negative frequency information on the frequency domain signal to obtain a positive spectrum sub-signal and a negative spectrum sub-signal corresponding to the path of signal; according to the optical dispersion compensation signal fed back by the clock performance monitoring device and the phase compensation value fed back by the interpolation controller, performing phase shift processing on the frequency domain of the positive frequency spectrum sub-signal corresponding to the path of signal, and according to the phase compensation value fed back by the interpolation controller, performing phase shift processing on the frequency domain of the negative frequency spectrum sub-signal corresponding to the path of signal; and carrying out spectrum combination on the positive spectrum sub-signal after the phase shift processing and the negative spectrum sub-signal after the phase shift processing corresponding to the path of signal to obtain a compensated signal corresponding to the path of signal.

With reference to the first aspect, in a fourth possible implementation manner of the first aspect, the signal conditioner is specifically configured to, for a first signal of the two received signals, multiply a positive spectrum sub-signal and a negative spectrum sub-signal corresponding to the first signal by a first tracking coefficient of two polarization state tracking coefficients fed back by the clock performance monitoring device, to obtain a first corrected positive spectrum sub-signal and a first negative spectrum sub-signal; aiming at a second path of signals in the two paths of received signals, correspondingly multiplying a positive frequency spectrum sub-signal and a negative frequency spectrum sub-signal corresponding to the second path of signals by a second tracking coefficient in two polarization state tracking coefficients fed back by the clock performance monitoring device to obtain a second corrected positive frequency spectrum sub-signal and a second corrected negative frequency spectrum sub-signal; and correspondingly adding the first positive frequency spectrum sub-signal and the second positive frequency spectrum sub-signal to obtain a path of positive frequency spectrum signal, and correspondingly adding the first negative frequency spectrum sub-signal and the second negative frequency spectrum sub-signal to obtain a path of negative frequency spectrum signal.

With reference to the first aspect, in a fifth possible implementation manner of the first aspect, the loop filter is specifically configured to divide a received signal into two identical paths of signals, where one path of signal is multiplied by a set scaling factor, the other path of signal is multiplied by a set integral factor, and the signal multiplied by the set integral factor is added to a value output by the delay unit and then divided into two paths of sub-signals, one path of sub-signal is added to the signal multiplied by the set scaling factor and then output to the interpolation controller as a first path of output signal, and the other path of sub-signal is fed back to the clock performance monitoring device as a second path of output signal.

With reference to the first aspect, in a sixth possible implementation manner of the first aspect, the interpolation controller is specifically configured to limit the phase compensation value fed back to the signal clock compensator within a range shifted by one sample interval time according to a signal from the loop filter.

With reference to the sixth possible implementation manner of the first aspect, in a seventh possible implementation manner of the first aspect, a value range of the phase compensation value is [0, 1], where 0 denotes that no movement is required, and 1 denotes that one sampling point interval is moved forward.

in a second aspect, a clock performance monitoring method is provided, including:

The clock performance monitoring device receives a signal fed back by the loop filter; and are

updating an optical dispersion compensation signal which is fed back to a signal clock compensator by the clock performance monitoring device and is used for compensating residual optical dispersion and two polarization state tracking coefficients which are fed back to a signal adjuster by the clock performance monitoring device and are used for compensating a polarization state tracking error according to a signal fed back by a loop filter, so that when the values of the two polarization state tracking coefficients and the optical dispersion compensation signal are changed, a signal fed back by the loop filter is a fixed value within a set time;

feeding back an optical dispersion compensation signal when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal clock compensator, so that the signal clock compensator performs phase compensation on the two paths of received signals from the dispersion estimation and compensation module according to the optical dispersion compensation signal fed back by the clock performance monitoring device and outputs the two paths of compensated signals to the signal regulator; and feeding back the two polarization state tracking coefficients when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal adjuster, so that the signal adjuster performs polarization state tracking on the received signal from the signal clock compensator according to the two polarization state tracking coefficients fed back by the clock performance monitoring device.

With reference to the second aspect, in a first possible implementation manner of the second aspect, the updating, according to a signal fed back by a loop filter, an optical dispersion compensation signal for compensating residual optical dispersion, which is fed back by the clock performance monitoring device to a signal clock compensator, and two polarization state tracking coefficients, which are fed back by the clock performance monitoring device to a signal adjuster and are used for compensating a polarization state tracking error, includes:

Respectively deriving each polarization state tracking coefficient according to a signal fed back by the loop filter, calculating the change direction of each polarization state tracking coefficient, and updating the corresponding polarization state tracking coefficient according to a set first step length according to the change direction of each polarization state tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

with reference to the first possible implementation manner of the second aspect, in a second possible implementation manner of the second aspect, a value range of the optical dispersion compensation signal is [0, 1], where 0 represents that no movement is required, and 1 represents that a sample interval is moved forward.

In a third aspect, a clock performance monitoring apparatus is provided, including:

The receiving module is used for receiving a signal fed back by the loop filter;

The processing module is used for updating an optical dispersion compensation signal which is fed back to the signal clock compensator and used for compensating residual optical dispersion and two polarization state tracking coefficients which are fed back to the signal adjuster and used for compensating a polarization state tracking error according to a signal fed back by the loop filter, so that when the values of the two polarization state tracking coefficients and the optical dispersion compensation signal are changed, the signal fed back by the loop filter is a fixed value within a set time;

the transmitting module is used for feeding back the optical dispersion compensation signal when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal clock compensator so that the signal clock compensator performs phase compensation on the two paths of received signals from the dispersion estimation and compensation module according to the optical dispersion compensation signal fed back by the clock performance monitoring device and outputs the two paths of compensated signals to the signal regulator; and feeding back the two polarization state tracking coefficients when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal adjuster, so that the signal adjuster performs polarization state tracking on the received signal from the signal clock compensator according to the two polarization state tracking coefficients fed back by the clock performance monitoring device.

With reference to the third aspect, in a first possible implementation manner of the third aspect, the processing module is specifically configured to derive each polarization tracking coefficient according to a signal fed back by the loop filter, calculate a change direction of each polarization tracking coefficient, and update a corresponding polarization tracking coefficient according to a set first step length according to the change direction of each polarization tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

With reference to the first possible implementation manner of the third aspect, in a second possible implementation manner of the third aspect, a value range of the optical dispersion compensation signal is [0, 1], where 0 represents that no movement is required, and 1 represents that a sample interval is moved forward.

in a fourth aspect, there is provided a clock performance monitoring apparatus comprising:

a receiver for receiving a signal fed back by the loop filter;

the processor is used for updating an optical dispersion compensation signal which is fed back to the signal clock compensator and used for compensating residual optical dispersion and two polarization state tracking coefficients which are fed back to the signal adjuster and used for compensating a polarization state tracking error according to a signal fed back by the loop filter, so that when the values of the two polarization state tracking coefficients and the optical dispersion compensation signal are changed, the signal fed back by the loop filter is a fixed value within a set time;

The transmitter is used for feeding back the optical dispersion compensation signal when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal clock compensator so that the signal clock compensator performs phase compensation on the two paths of received signals from the dispersion estimation and compensation module according to the optical dispersion compensation signal fed back by the clock performance monitoring device and outputs the two paths of compensated signals to the signal adjuster; and feeding back the two polarization state tracking coefficients when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal adjuster, so that the signal adjuster performs polarization state tracking on the received signal from the signal clock compensator according to the two polarization state tracking coefficients fed back by the clock performance monitoring device.

With reference to the fourth aspect, in a first possible implementation manner of the fourth aspect, the processor is specifically configured to derive each polarization tracking coefficient according to a signal fed back by the loop filter, calculate a change direction of each polarization tracking coefficient, and update the corresponding polarization tracking coefficient according to a set first step length according to the change direction of each polarization tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

With reference to the first possible implementation manner of the fourth aspect, in a second possible implementation manner of the fourth aspect, a value range of the optical dispersion compensation signal is [0, 1], where 0 represents that no movement is required, and 1 represents that a sample interval is moved forward.

According to the system, the method and the device provided in the first to fourth aspects, the value of the optical dispersion compensation signal C for compensating residual optical dispersion and the value of the polarization tracking coefficient A, A ' for compensating the tracking error of the polarization state can be updated according to one output signal of the loop filter, so that when the three parameters, i.e., the optical dispersion compensation signal C and the values of the two polarization tracking coefficients A, A ' change, the signal fed back by the loop filter is a fixed value within a set time, and thus, not only the influence of optical dispersion can be monitored through the change of the value of C, but also the polarization state can be tracked through the change of the value of A, A '. And because the phase part compensated by the C value can also compensate the phase change caused by the frequency domain offset of the laser, the influence of the frequency offset of the laser on the phase is also processed while the optical dispersion compensation is processed, so that the effect of simultaneously monitoring the PMD dispersion, the optical dispersion and the influence of the central frequency inconsistency of the transceiving laser on the performance of the clock recovery module is achieved, the problem of poor monitoring effect in the existing clock performance monitoring mode is solved, the monitoring comprehensiveness and accuracy are improved, and the system performance is further improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of a clock recovery module in a coherent optical communication system;

FIG. 2 is a schematic structural diagram of a clock recovery module with a clock performance monitoring function;

Fig. 3 is a schematic structural diagram of a clock performance monitoring system according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a possible structure of the signal clock compensator according to the embodiment of the present invention;

Fig. 5 is a schematic diagram of a possible structure of the signal conditioner according to the embodiment of the invention;

Fig. 6 is a schematic diagram illustrating a possible structure of a loop filter according to an embodiment of the present invention;

Fig. 7 is a schematic flow chart illustrating a clock performance monitoring method according to an embodiment of the present invention;

fig. 8 is a schematic structural diagram of a clock performance monitoring apparatus according to an embodiment of the present invention;

fig. 9 is a schematic structural diagram of another clock performance monitoring apparatus according to an embodiment of the present invention.

Detailed Description

specifically, as shown in fig. 2, it is a schematic structural diagram of a clock recovery module with a corresponding clock performance monitoring function. As can be seen from fig. 2, the clock recovery module may include a signal clock compensator 11, a signal adjuster 12, a phase detector 13, a loop filter 14, an interpolation controller 15, and a signal characteristic parameter modifier 16, where:

the signal clock compensator 11 is configured to receive X, Y two signals (for example, two input signals from a dispersion estimation and compensation module) input from the outside, perform phase compensation on the two signals by using a time domain interpolation method according to a phase compensation value B (at an initial stage, the value is a set initial value, for example, 0) fed back by the interpolation controller 15, and output X, Y two compensated signals to the signal adjuster 12 and a next unit (for example, a depolarization module) connected to a clock recovery module in the system; the signal adjuster 12 may be configured to perform polarization state tracking operation on the received signal according to 2 polarization state tracking coefficients a and a' (in an initial stage, the two values are respectively a set initial value, such as a ═ 1 and a ═ 0, and the like) for compensating the polarization state tracking error, which are fed back by the signal characteristic parameter modifier 16, to obtain a path of positive spectrum signal and a path of negative spectrum signal, and output the path of positive spectrum signal and the path of negative spectrum signal to the phase discriminator 13; the phase detector 13 may be configured to detect a sampling clock offset of the received signal to obtain a sampling clock error signal, output an imaginary part of the error signal to the loop filter 14 and the ADC, and output a real part of the error signal to the signal characteristic parameter modifier 16; the loop filter 14 may be configured to perform filtering processing on the signal from the phase detector 13 to filter out a high-frequency portion of the input signal, and output the filtered signal to the interpolation controller 15; the interpolation controller 15 is operable to update the phase compensation value B used when the signal clock compensator 11 performs phase compensation, based on the signal from the loop filter 14; the signal characteristic parameter modifier 16 may be configured to find two suitable tracking coefficients a and a 'of the polarization state by a setting algorithm according to the signal from the phase detector 13 to modify the signal, that is, update the tracking coefficients a and a' of the polarization state, so that a modulus of the complex signal output by the phase detector 13 or a real part of the complex signal is always kept maximum, and at this time, the signal characteristic parameter modifier 16 may consider that the current signal characteristic parameter is suitable, and the signal characteristic may not be updated.

that is, the whole clock recovery module monitors the clock performance by the modulus of the complex signal output by the phase detector or the real part of the complex signal, and when the clock performance is monitored by the modulus of the complex signal output by the phase detector or the real part of the complex signal, only the polarization tracking coefficient a, a' for compensating the polarization tracking error is considered, so that the PMD characteristic of the signal can only be monitored, that is, only the tracking of the polarization can be maintained, and the monitoring effect is not good.

the embodiment of the invention provides a clock performance monitoring system, a clock performance monitoring method and a clock performance monitoring device, wherein the value of a light dispersion compensation signal C for compensating residual light dispersion and the value of a polarization state tracking coefficient A, A ' for compensating a polarization state tracking error can be updated according to one output signal of a loop filter, so that when the values of the three parameters, namely the light dispersion compensation signal C and the two polarization state tracking coefficients A, A ' change, a signal fed back by the loop filter is a fixed value within a set time, the influence of the light dispersion can be monitored through the change of the value of the C, and the polarization state can be tracked through the change of the value of A, A '. And because the phase part compensated by the C value can also compensate the phase change caused by the frequency domain offset of the laser, the influence of the frequency offset of the laser on the phase is also processed while the optical dispersion compensation is processed, so that the effect of simultaneously monitoring the PMD dispersion, the optical dispersion and the influence of the central frequency inconsistency of the transceiving laser on the performance of the clock recovery module is achieved, the problem of poor monitoring effect in the existing clock performance monitoring mode is solved, the monitoring comprehensiveness and accuracy are improved, and the system performance is further improved.

In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The first embodiment is as follows:

The first embodiment of the present invention provides a clock performance monitoring system, which may be applied to a coherent optical communication system or a non-coherent optical communication system, for example, a system with an ADC sampling and clock recovery unit, such as a mobile network, a microwave network, a metropolitan area network, and the like, and is not described in detail herein. Specifically, as shown in fig. 3, which is a schematic structural diagram of the clock performance monitoring system according to the first embodiment of the present invention, the clock performance monitoring system may include a signal clock compensator 21, a signal adjuster 22, a phase detector 23, a loop filter 24, an interpolation controller 25, and a clock performance monitoring device 26, where:

the clock performance monitoring device 26 is configured to feed back an optical dispersion compensation signal (which may be denoted as C, and the value of C may be a set value, such as 0, etc., in the initial stage) for compensating residual optical dispersion to the signal clock compensator 21, and feed back two polarization state tracking coefficients (which may be denoted as A, A ', respectively, and the value of A, A' in the initial stage may be a set value, such as a ═ 1, a ═ 0, etc., for compensating the polarization state tracking error to the signal adjuster 22; receiving the signal fed back by the loop filter 24, and updating the two polarization state tracking coefficients and the optical dispersion compensation signal according to the signal fed back by the loop filter 24, so that when the values of the two polarization state tracking coefficients and the optical dispersion compensation signal change, the signal fed back by the loop filter 24 is a fixed value within a set time;

The signal clock compensator 21 is configured to perform phase compensation on two received signals (such as an X-path signal and a Y-path signal) from a dispersion estimation and compensation module connected to the clock performance monitoring system according to an optical dispersion compensation signal fed back by the clock performance monitoring device 26 and a phase compensation value fed back by the interpolation controller 25, and output the two compensated signals to the signal adjuster 22 and a depolarization module connected to the clock performance monitoring system;

the signal adjuster 22 is configured to perform polarization state tracking on the received signal according to two polarization state tracking coefficients fed back by the clock performance monitoring device 26, obtain a path of positive frequency spectrum signal and a path of negative frequency spectrum signal, and output the signals to the phase discriminator 23;

The phase detector 23 may be configured to detect a sampling clock offset of a received signal, obtain a sampling clock error signal, and output an imaginary part of the sampling clock error signal to the loop filter 24 and an analog-to-digital converter (i.e., ADC);

the loop filter 24 may be configured to filter a signal from the phase detector 23, output one path of the filtered signal to the interpolation controller 25, and output the other path of the filtered signal to the clock performance monitoring device 26;

The interpolation controller 25 is configured to feed back the phase compensation value to the signal clock compensator 21, and update the phase compensation value fed back to the signal clock compensator 21 according to the signal from the loop filter 24.

as can be seen from the above, in the clock performance monitoring system according to the present invention, the clock performance monitoring device 26 is no longer connected to an output terminal of the phase detector 23, but is connected to an output terminal of the loop filter 24; furthermore, the clock performance monitoring device 26 may be connected to an input terminal of the signal regulator 22, so as to feed back two polarization state tracking coefficients for compensating the polarization state tracking error, and may also be connected to an input terminal of the signal clock compensator 21, so as to feed back an optical dispersion compensation signal for compensating the residual optical dispersion, so as to update the value of the optical dispersion compensation signal C for compensating the residual optical dispersion and the value of the polarization state tracking coefficient A, A' for compensating the polarization state tracking error according to a path of output signal of the loop filter 24, so that when the three parameters, i.e. the values of the two polarization state tracking coefficients and the optical dispersion compensation signal, change, the signal fed back by the loop filter 24 is a fixed value within a set time, and thus not only the influence of the optical dispersion can be monitored through the change of the value of the C, the polarization state can also be tracked by changes in the value of A, A'. And because the phase part compensated by the C value can also compensate the phase change caused by the frequency domain offset of the laser, the influence of the frequency offset of the laser on the phase is also processed while the optical dispersion compensation is processed, so that the effect of simultaneously monitoring the PMD dispersion, the optical dispersion and the influence of the central frequency inconsistency of the transceiving laser on the performance of the clock recovery module is achieved, the problem of poor monitoring effect in the existing clock performance monitoring mode is solved, the monitoring comprehensiveness and accuracy are improved, and the system performance is further improved.

The functions and specific embodiments of the modules in the system will be further described according to the trend of the signal flow in the system:

As can be seen from fig. 3, the X, Y signals inputted from the outside are firstly inputted to the signal clock compensator 21, and the signal clock compensator 21 compensates the optical dispersion compensation signal C fed back by the clock performance monitor 26 and the phase compensation value B fed back by the interpolation controller 25 (specifically, at the initial stage, the initial values of B, C two parameters, such as 0, etc.) are used for compensation.

specifically, as shown in fig. 4, which is a schematic diagram of a possible structure of the signal clock compensator 21 according to the embodiment of the present invention, it can be known from fig. 4 that:

the signal clock compensator 21 is specifically configured to perform fourier transform on each of the two received signals (e.g., an X-path signal and a Y-path signal) to obtain a corresponding frequency domain signal, and perform a branch of positive and negative frequency information on the frequency domain signal to obtain a positive spectrum sub-signal and a negative spectrum sub-signal corresponding to the path of signal; according to the optical dispersion compensation signal C fed back by the clock performance monitoring device 26 and the phase compensation value B fed back by the interpolation controller 25, performing phase shift processing on the frequency domain on the positive frequency spectrum sub-signal corresponding to the path of signal, and according to the phase compensation value B fed back by the interpolation controller 25, performing phase shift processing on the frequency domain on the negative frequency spectrum sub-signal corresponding to the path of signal; and carrying out spectrum combination on the positive spectrum sub-signal after the phase shift processing and the negative spectrum sub-signal after the phase shift processing corresponding to the path of signal to obtain a compensated signal corresponding to the path of signal.

That is, the signal clock compensator 21 can implement phase compensation of the signal by directly performing corresponding phase shift on the frequency domain, thereby greatly improving the efficiency of phase compensation.

further, as can be seen from fig. 4, the signal clock compensator 21 is specifically configured to perform phase shift processing on the positive spectrum sub-signals corresponding to each path of signals in the frequency domain by multiplying the positive spectrum sub-signals corresponding to each path of signals by a first function; and performing phase shift processing on the negative spectrum sub-signals corresponding to each path of signals in a frequency domain by multiplying the negative spectrum sub-signals corresponding to each path of signals by a second function, which is not described herein again.

Wherein the first function may be expressed as Exp (-j x 2pi f (B + C)); the second function may be expressed as Exp (-j × 2pi × f × B); where Exp denotes a natural logarithm, pi is a circumferential ratio, j is an imaginary number, f is a signal frequency axis numerical array, B is a phase compensation value fed back by the interpolation controller 25, and C is an optical dispersion compensation signal fed back by the clock performance monitoring device 26.

Further, it should be noted that, the signal clock compensator 21 may perform phase compensation on the received signal in a frequency domain compensation manner, and may also perform phase compensation on the received signal in a time domain interpolation manner as described in the prior art, where a specific compensation manner is similar to that in the prior art, and is not described herein again.

However, when the time domain interpolation is used for phase compensation, the signal clock compensator 21 needs to be composed of a large number of multipliers (far more than 4 multipliers involved in fig. 4), so that the device structure is complex, and a large amount of multiplier resources are wasted, and therefore, in the embodiment of the present invention, in order to avoid the above problem, the signal clock compensator 21 may preferably use a frequency domain compensation method to perform phase compensation on the received signal, so as to achieve the effects of saving a large number of multiplier resources and reducing system power consumption.

further, as shown in fig. 3, the signal compensated by the signal clock compensator 21 enters the signal adjuster 22 for the polarization state tracking operation.

specifically, as shown in fig. 5, it is a schematic diagram of a possible structure of the signal adjuster 22 according to the embodiment of the present invention. As can be seen from fig. 5:

The signal adjuster 22 is specifically configured to, for a first signal (e.g., an X-path signal) in the two received signals (e.g., the X-path signal and the Y-path signal), multiply a positive spectrum sub-signal and a negative spectrum sub-signal corresponding to the first signal by a first tracking coefficient (e.g., a) in two polarization state tracking coefficients fed back by the clock performance monitoring device 26, to obtain a first corrected positive spectrum sub-signal and a first negative spectrum sub-signal; for a second signal (e.g., a Y signal) of the two received signals, a positive spectrum sub-signal and a negative spectrum sub-signal corresponding to the second signal are correspondingly multiplied by a second tracking coefficient (e.g., a') of the two polarization state tracking coefficients fed back by the clock performance monitoring device 26 to obtain a second corrected positive spectrum sub-signal and a second negative spectrum sub-signal; and correspondingly adding the first positive frequency spectrum sub-signal and the second positive frequency spectrum sub-signal to obtain a path of positive frequency spectrum signal, and correspondingly adding the first negative frequency spectrum sub-signal and the second negative frequency spectrum sub-signal to obtain a path of negative frequency spectrum signal.

For each of the two signals (e.g., the X-signal and the Y-signal) received by the signal adjuster 22, the positive spectrum sub-signal and the negative spectrum sub-signal corresponding to the signal can be obtained according to the fourier transform process of the signal clock compensator 21. Of course, the signal adjuster 22 itself may also have a corresponding fourier transform function, etc. to perform fourier transform on each of the two received signals (e.g., the X-path signal and the Y-path signal) to obtain a corresponding frequency-domain signal, and perform shunting of positive and negative frequency information on the frequency-domain signal to obtain a positive-spectrum sub-signal and a negative-spectrum sub-signal corresponding to the signals, which is not described herein again.

as can be seen from the above, the signal adjuster 22 is mainly used to perform the polarization tracking operation on the received signal from the signal clock compensator 21 by using 2 tracking coefficients a, a', so as to modify a certain characteristic of the signal, such as modifying the phase of the signal to achieve the purpose of rotating the polarization state.

further, as shown in fig. 3, the signal passing through the signal adjuster 22 will enter the phase detector 23 for phase detection processing. The phase detector 23 may be an existing Godard phase detector, and may be mainly used to detect a sampling clock offset of a signal.

For example, assume that a continuous analog signal is input, sampled by an analog-to-digital sampler, with a sampling interval of once every 1 second. However, the sampling interval of the analog-digital sampler is not 1 second but 1.0001 second due to the problem of the device itself, so that the analog input signal is sampled at the sampling interval of 1.0001 second and then output to the phase detector 23, the phase detector 23 calculates the signal phase difference between the 1.0001 second interval and the 1 second interval, and according to the phase difference, other controls can be added to adjust the 1.0001 second interval back to the correct 1 second interval for sampling.

Further, it should be noted that the imaginary part of the signal output by the phase detector 23 is the phase detection signal, and as can be seen from fig. 3, the phase detection signal is respectively sent to the path for controlling the ADC clock and the interpolation control path. In addition, as can be seen from fig. 3, the phase detection signal usually needs to be filtered by a loop filter 24 before being sent to the interpolation control path.

specifically, the loop filter 24 may be a proportional-integral filter, and is mainly used for performing a filtering process on the received signal to filter out a high-frequency portion of the signal, so as to adjust a frequency-domain bandwidth of the system.

Alternatively, as shown in fig. 6, it is a schematic diagram of a possible structure of the loop filter 24 according to the embodiment of the present invention. As can be seen from fig. 6:

The loop filter 24 may be specifically configured to divide the received signal into two identical signals, where one signal is multiplied by a set scaling factor (e.g., kp shown in fig. 6), the other signal is multiplied by a set integral factor (e.g., ki shown in fig. 6), the signal multiplied by the set integral factor is added to a value output by a delay (specifically, the delay may generally delay for one sampling period) and then divided into two sub-signals, one sub-signal is added to the signal multiplied by the set scaling factor and then output to the interpolation controller 25 as a first output signal (i.e., signal output 1 in fig. 6), and the other sub-signal is fed back to the clock performance monitoring device 26 as a second output signal (i.e., signal output 2 in fig. 6).

As can be seen from the above, in the embodiment of the present invention, a signal (i.e., the signal output 2) may be specifically led out from the integration path of the loop filter 24 as an input of the clock performance monitoring device 26, and details thereof are not repeated herein.

Further, as shown in fig. 3, the first signal (i.e. signal output 1) output by the loop filter 24 enters the interpolation controller 25, so that the interpolation controller 25 updates the phase compensation value B accordingly according to the signal from the loop filter 24.

Specifically, the interpolation controller 25 is similar to the interpolation controller described in the prior art, and is mainly used to implement an ideal integrator function. For example, it is particularly useful to limit the phase compensation value B used when the signal clock compensator 21 performs phase compensation to a range shifted by one sample interval time, that is, to a range [0, 1] in accordance with the signal from the loop filter, where 0 indicates that no shift is required and 1 indicates that one sample interval is shifted forward.

that is, the B value output by the interpolation controller 25 needs to be limited, when the output B value is greater than one sampling point, a part greater than one sampling point interval needs to be taken, and the whole sampling signal data is moved forward by one sampling point interval, so that each output is guaranteed to be between 0 and 1.

Further, as can be seen from fig. 3, the second signal (i.e., signal output 2) output by the loop filter 24 enters the clock performance monitoring device 26, so that the clock performance monitoring device 26 updates the polarization tracking coefficient (i.e., A, A') and the optical dispersion compensation signal (i.e., C) accordingly according to the signal from the loop filter 24.

Optionally, the clock performance monitoring device 26 is specifically configured to separately derive each polarization tracking coefficient (i.e., A, A') according to a signal fed back by the loop filter 24, calculate a change direction of each polarization tracking coefficient, and update the corresponding polarization tracking coefficient according to a set first step length according to the change direction of each polarization tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and the number of the first and second groups,

Scanning the value of the optical dispersion compensation signal (i.e., C) according to the signal fed back by the loop filter 24, the set value range of the optical dispersion compensation signal and the set second step length, determining whether the signal fed back by the loop filter 24 is a fixed value (the fixed value can be flexibly set according to the actual situation) within a set time (the set time can be flexibly set according to the actual situation), if the signal is a fixed value, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter 24 is a fixed value within the set time as the optical dispersion compensation signal to be fed back to the signal clock compensator 21 (if the signal is not a fixed value, restarting the scanning).

That is, when the input signal changes within a set smaller range, the C value may be considered as not needing to change, the C value at this time is an optimal value, and the influence of the corresponding optical dispersion and the frequency offset of the transceiver laser on the clock is minimal, or the current value of C may be considered approximately to compensate the residual incomplete optical dispersion value of the dispersion estimation and compensation module, the influence of the frequency offset of the transceiver laser on the clock, and the like.

The set first step length can be flexibly set according to the actual situation; moreover, the value of the set first step directly affects the speed of tracking the polarization state, and therefore, the rotation of the polarization state of the whole system can be considered comprehensively. In addition, the set second step length can also be flexibly set according to the actual situation; moreover, it is usually determined according to a derivative obtained by the clock performance monitoring device 26 deriving the current C value according to a signal fed back by the loop filter 24 (where, similar to the foregoing description, the derivative obtained by deriving is a regular change direction that is increased, and a negative change direction that is decreased), which is not described herein again.

further, it should be noted that the value range of the optical dispersion compensation signal (i.e. C) may be [0, 1], where 0 represents that no movement is required, 1 represents that one sample interval is moved forward, and 0.5 represents that half sample interval is moved forward; that is, C can be expressed as a degree of shifting by one sampling interval, which is not described herein.

Further, it should be noted that, as can be seen from the above description related to the clock performance monitoring apparatus 26, the clock performance monitoring apparatus 26 can have two functions: one is a parameter memory function for storing A, A' and the value of C; the other is a parameter scanning and judging function, that is, after the A, A' and C parameters are changed, it is judged whether the signal fed back by the loop filter 24 is a fixed value within a set time, if so, the scanning of the C value is stopped, and if not, the scanning is started again; additionally, A, A' may be kept constantly updated in real time to track the polarization state.

In addition, in order to make the clock performance monitoring device 26 perform well, the corresponding relationship between the input signals and A, A 'and C may be established in advance, and the input signal pair A, A' and C may be considered to be continuously differentiated. Thus, when receiving the signal fed back by the loop filter 24, the corresponding derivative can be calculated according to the values of A, A ', C and the input signal, and the change direction or change amount of the value of A, A', C can be determined according to the sign of the derivative, which is not described herein again.

it can be known from the technical solution in the first embodiment of the present invention that, according to one output signal of the loop filter, the value of the optical dispersion compensation signal C for compensating residual optical dispersion and the value of the polarization tracking coefficient A, A ' for compensating the tracking error of the polarization state can be updated, so that when the values of the three parameters, i.e., the optical dispersion compensation signal C and the two polarization tracking coefficients A, A ' change, the signal fed back by the loop filter is a fixed value within a set time, and thus not only the influence of optical dispersion can be monitored through the change of the value of C, but also the polarization state can be tracked through the change of the value of A, A '. And because the phase part compensated by the C value can also compensate the phase change caused by the frequency domain offset of the laser, the influence of the frequency offset of the laser on the phase is also processed while the optical dispersion compensation is processed, so that the effect of simultaneously monitoring the PMD dispersion, the optical dispersion and the influence of the central frequency inconsistency of the transceiving laser on the performance of the clock recovery module is achieved, the problem of poor monitoring effect in the existing clock performance monitoring mode is solved, the monitoring comprehensiveness and accuracy are improved, and the system performance is further improved.

In addition, in the first technical solution of the embodiment of the present invention, the signal clock compensator preferably performs phase compensation on the received signal in a frequency domain compensation manner, so that compared with the existing phase compensation manner using time domain interpolation, a large amount of multiplier resources can be saved, and the system power consumption can be reduced.

Furthermore, in the technical solution of the first embodiment of the present invention, the performance of the clock is not judged based on the amplitude of the complex result calculated by the clock error function or the real part of the complex result, so that the problem that the optical communication system cannot stably operate in the optical communication system with the strongly compressed spectrum does not exist.

Example two:

based on the same inventive concept as the first embodiment of the present invention, a second embodiment of the present invention provides a clock performance monitoring method, as shown in fig. 7, which is a schematic flow chart of the clock performance monitoring method in the second embodiment of the present invention, and the method may include the following steps:

Step 701: the clock performance monitoring device receives a signal fed back by the loop filter.

As can be known from the description of the first embodiment, the signal fed back to the clock performance monitoring device (i.e., the signal characteristic parameter modifier) by the loop filter is a path of signal obtained by filtering the signal from the phase detector. For example, it may be a signal derived from an integration path of the loop filter, which is not described herein.

Step 702: and updating an optical dispersion compensation signal which is fed back to the signal clock compensator by the clock performance monitoring device and is used for compensating residual optical dispersion and two polarization state tracking coefficients which are fed back to the signal adjuster by the clock performance monitoring device and are used for compensating a polarization state tracking error according to a signal fed back by the loop filter, so that when the values of the two polarization state tracking coefficients and the optical dispersion compensation signal are changed, the signal fed back by the loop filter is a fixed value within a set time.

Optionally, updating an optical dispersion compensation signal for compensating residual optical dispersion fed back to the signal clock compensator and two polarization state tracking coefficients for compensating polarization state tracking error fed back to the signal adjuster according to the signal fed back by the loop filter includes:

Respectively deriving each polarization state tracking coefficient according to a signal fed back by the loop filter, calculating the change direction of each polarization state tracking coefficient, and updating the corresponding polarization state tracking coefficient according to a set first step length according to the change direction of each polarization state tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal needing to be fed back to the signal clock compensator (if not, restarting scanning).

the set first step length can be flexibly set according to the actual situation; moreover, the value of the set first step directly affects the speed of tracking the polarization state, and therefore, the rotation of the polarization state of the whole system can be considered comprehensively. In addition, the set second step length can also be flexibly set according to the actual situation; moreover, it is usually determined according to a derivative obtained by the clock performance monitoring device deriving the current C value according to a signal fed back by the loop filter (where, similar to the foregoing description, the derivative obtained by deriving is that the change direction is increased when the change direction is regular, and is decreased when the change direction is negative), which is not described herein again.

Further, it should be noted that, as can be seen from the above description related to the clock performance monitoring apparatus, the clock performance monitoring apparatus can have two functions: one is a parameter memory function for storing A, A' and the value of C; the other is a parameter scanning and judging function, namely, after A, A' and C are changed, judging whether a signal fed back by the loop filter is a fixed value within a set time, if so, stopping scanning the C value, and if not, starting scanning again; additionally, A, A' may be kept constantly updated in real time to track the polarization state.

in addition, in order to enable the clock performance monitoring device to be implemented well, the corresponding relationship between the input signals and A, A 'and C can be established in advance, and the input signal pair A, A' and C can be considered to be continuously differentiated. Thus, when the signal fed back by the loop filter is received, the corresponding derivative can be calculated according to A, A ', C and the value of the input signal, and the change direction or the change amount of the value A, A', C can be determined according to the sign of the derivative, which is not described herein again.

Step 703: feeding back an optical dispersion compensation signal when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal clock compensator, so that the signal clock compensator performs phase compensation on the two paths of received signals from the dispersion estimation and compensation module according to the optical dispersion compensation signal fed back by the clock performance monitoring device and outputs the two paths of compensated signals to the signal regulator; and feeding back the two polarization state tracking coefficients when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal adjuster, so that the signal adjuster performs polarization state tracking on the received signal from the signal clock compensator according to the two polarization state tracking coefficients fed back by the clock performance monitoring device.

That is to say, in the solution of the embodiment of the present invention, the value of the optical dispersion compensation signal C for compensating the residual optical dispersion and the value of the polarization tracking coefficient A, A ' for compensating the polarization state tracking error may be updated according to one output signal of the loop filter, so that when the values of the three parameters, i.e., the optical dispersion compensation signal C and the two polarization tracking coefficients A, A ' change, the signal fed back by the loop filter is a fixed value within a set time, and thus not only the influence of the optical dispersion can be monitored through the change of the C value, but also the polarization state can be tracked through the change of the A, A ' value. And because the phase part compensated by the C value can also compensate the phase change caused by the frequency domain offset of the laser, the influence of the frequency offset of the laser on the phase is also processed while the optical dispersion compensation is processed, so that the effect of simultaneously monitoring the PMD dispersion, the optical dispersion and the influence of the central frequency inconsistency of the transceiving laser on the performance of the clock recovery module is achieved, the problem of poor monitoring effect in the existing clock performance monitoring mode is solved, the monitoring comprehensiveness and accuracy are improved, and the system performance is further improved.

Example three:

Based on the same inventive concept as that of the first embodiment and the second embodiment of the present invention, a third embodiment of the present invention provides a clock performance monitoring apparatus, and specific implementation of the clock performance monitoring apparatus may refer to the related description in the second method embodiment or the first system embodiment, and repeated details are not repeated. Specifically, as shown in fig. 8, the clock performance monitoring apparatus may mainly include:

A receiving module 81, configured to receive a signal fed back by the loop filter;

The processing module 82 is configured to update, according to a signal fed back by the loop filter, an optical dispersion compensation signal fed back to the signal clock compensator for compensating residual optical dispersion and two polarization state tracking coefficients fed back to the signal adjuster for compensating a polarization state tracking error, so that when values of the two polarization state tracking coefficients and the optical dispersion compensation signal change, the signal fed back by the loop filter is a fixed value within a set time;

The sending module 83 is configured to feed back, to the signal clock compensator, an optical dispersion compensation signal that is used when the signal fed back by the loop filter is determined to be a fixed value within a set time, so that the signal clock compensator performs phase compensation on the two received signals from the dispersion estimation and compensation module according to the optical dispersion compensation signal fed back by the clock performance monitoring device, and outputs the two compensated signals to the signal adjuster; and feeding back the two polarization state tracking coefficients when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal adjuster, so that the signal adjuster performs polarization state tracking on the received signal from the signal clock compensator according to the two polarization state tracking coefficients fed back by the clock performance monitoring device.

optionally, the processing module 82 may be specifically configured to separately derive each polarization tracking coefficient according to a signal fed back by the loop filter, calculate a change direction of each polarization tracking coefficient, and update the corresponding polarization tracking coefficient according to a set first step length according to the change direction of each polarization tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

Wherein, the value range of the optical dispersion compensation signal is [0, 1], where 0 represents no need to move, and 1 represents moving forward by one sampling point interval.

Further, based on the same inventive concept as the first and second embodiments of the present invention, the third embodiment of the present invention further provides another clock performance monitoring apparatus, where the another clock performance monitoring apparatus is a corresponding clock performance monitoring entity device, and specific implementation thereof may refer to the related description in the second method embodiment or the first system embodiment, and repeated details are not repeated. Specifically, as shown in fig. 9, the clock performance monitoring apparatus may mainly include a receiver 91, a processor 92, a transmitter 93, and the like, wherein:

the receiver 91, configured to receive a signal fed back by a loop filter;

the processor 92 is configured to update, according to a signal fed back by the loop filter, an optical dispersion compensation signal fed back to the signal clock compensator for compensating residual optical dispersion and two polarization state tracking coefficients fed back to the signal adjuster for compensating a polarization state tracking error, so that when values of the two polarization state tracking coefficients and the optical dispersion compensation signal change, the signal fed back by the loop filter is a fixed value within a set time;

the transmitter 93 may be configured to feed back, to the signal clock compensator, an optical dispersion compensation signal that is used to determine that a signal fed back by the loop filter is a fixed value within a set time, so that the signal clock compensator performs phase compensation on the two received signals from the dispersion estimation and compensation module according to the optical dispersion compensation signal fed back by the clock performance monitoring device, and outputs the two compensated signals to the signal adjuster; and feeding back the two polarization state tracking coefficients when the signal fed back by the loop filter is determined to be a fixed value within a set time to the signal adjuster, so that the signal adjuster performs polarization state tracking on the received signal from the signal clock compensator according to the two polarization state tracking coefficients fed back by the clock performance monitoring device.

optionally, the processor 92 may be specifically configured to separately derive each polarization tracking coefficient according to a signal fed back by the loop filter, calculate a change direction of each polarization tracking coefficient, and update the corresponding polarization tracking coefficient according to a set first step length according to the change direction of each polarization tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

In addition, it should be noted that the processor 92 may be a device having a corresponding data Processing capability, such as a CPU (Central Processing Unit), an MCU (micro controller Unit), a DSP (digital signal Processing), or a combination thereof, the receiver 91 may be a corresponding signal input interface, and the transmitter may be a corresponding signal output interface, which are not described herein again.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus (device), or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (devices) and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

these computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

while preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims

1. A clock performance monitoring system, comprising a signal clock compensator, a signal adjuster, a phase discriminator, a loop filter, an interpolation controller, and a clock performance monitoring device, wherein:

The phase discriminator is used for detecting the sampling clock deviation of the received signal to obtain a sampling clock error signal, and outputting the imaginary part of the sampling clock error signal to a loop filter and an analog-digital converter (ADC), wherein the ADC is connected with the dispersion estimation and compensation module;

2. the system of claim 1,

the clock performance monitoring device is specifically used for respectively deriving the tracking coefficients of each polarization state according to a signal fed back by the loop filter, calculating the change direction of the tracking coefficients of each polarization state, and updating the corresponding tracking coefficients of the polarization state according to a set first step length according to the change direction of the tracking coefficients of each polarization state; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

3. The system of claim 2,

The value range of the optical dispersion compensation signal is [0, 1], where 0 represents no need to move and 1 represents moving forward by one sample interval.

4. The system of claim 1,

The signal clock compensator is specifically configured to perform fourier transform on each of two paths of signals received from a dispersion estimation and compensation module connected to the clock performance monitoring system to obtain a corresponding frequency domain signal, and perform branching of positive and negative frequency information on the frequency domain signal to obtain a positive spectrum sub-signal and a negative spectrum sub-signal corresponding to the path of signals; according to the optical dispersion compensation signal fed back by the clock performance monitoring device and the phase compensation value fed back by the interpolation controller, performing phase shift processing on the frequency domain of the positive frequency spectrum sub-signal corresponding to the path of signal, and according to the phase compensation value fed back by the interpolation controller, performing phase shift processing on the frequency domain of the negative frequency spectrum sub-signal corresponding to the path of signal; and carrying out spectrum combination on the positive spectrum sub-signal after the phase shift processing and the negative spectrum sub-signal after the phase shift processing corresponding to the path of signal to obtain a compensated signal corresponding to the path of signal.

5. The system of claim 1,

the signal adjuster is specifically configured to, for a first signal of the two received signals, multiply a positive spectrum sub-signal and a negative spectrum sub-signal corresponding to the first signal by a first tracking coefficient of two polarization state tracking coefficients fed back by the clock performance monitoring device, to obtain a first corrected positive spectrum sub-signal and a first negative spectrum sub-signal; aiming at a second path of signals in the two paths of received signals, correspondingly multiplying a positive frequency spectrum sub-signal and a negative frequency spectrum sub-signal corresponding to the second path of signals by a second tracking coefficient in two polarization state tracking coefficients fed back by the clock performance monitoring device to obtain a second corrected positive frequency spectrum sub-signal and a second corrected negative frequency spectrum sub-signal; and correspondingly adding the first positive frequency spectrum sub-signal and the second positive frequency spectrum sub-signal to obtain a path of positive frequency spectrum signal, and correspondingly adding the first negative frequency spectrum sub-signal and the second negative frequency spectrum sub-signal to obtain a path of negative frequency spectrum signal.

6. The system of claim 1,

the loop filter is specifically configured to divide a received signal into two identical paths of signals, where one path of signal is multiplied by a set proportionality coefficient, the other path of signal is multiplied by a set integral coefficient, and the signal multiplied by the set integral coefficient is added to a value output by a delay unit and then divided into two paths of sub-signals, one path of sub-signal is added to the signal multiplied by the set proportional coefficient and then output to an interpolation controller as a first path of output signal, and the other path of sub-signal is fed back to a clock performance monitoring device as a second path of output signal, where an input signal of the delay unit is the second path of output signal.

7. the system of claim 1,

The interpolation controller is specifically configured to limit the phase compensation value fed back to the signal clock compensator within a range shifted by one sample interval time according to the signal from the loop filter.

8. The system of claim 7,

The value range of the phase compensation value is [0, 1], wherein 0 represents that no movement is needed, and 1 represents that the movement is forwards by one sampling point interval.

9. A method for monitoring clock performance, comprising:

10. The method of claim 9, wherein updating the optical dispersion compensation signal fed back from the clock performance monitoring device to the signal clock compensator for compensating residual optical dispersion and the two polarization state tracking coefficients fed back from the clock performance monitoring device to the signal adjuster for compensating polarization state tracking error according to the signal fed back from the loop filter comprises:

11. the method of claim 10, wherein the optical dispersion compensation signal has a value in the range of [0, 1], wherein 0 indicates no motion is required and 1 indicates a forward motion by one sample interval.

12. a clock performance monitoring apparatus, comprising:

13. the apparatus of claim 12,

the processing module is specifically configured to derive each polarization tracking coefficient according to a signal fed back by the loop filter, calculate a change direction of each polarization tracking coefficient, and update the corresponding polarization tracking coefficient according to a set first step length according to the change direction of each polarization tracking coefficient; wherein, the derivative obtained by derivation changes in the direction of increase when the derivative is regular, and changes in the direction of decrease when the derivative is negative; and scanning the value of the optical dispersion compensation signal according to the value range of the set optical dispersion compensation signal and the set second step length according to the signal fed back by the loop filter, judging whether the signal fed back by the loop filter is a fixed value within the set time, if so, stopping scanning the optical dispersion compensation signal, and taking the optical dispersion compensation signal when the signal fed back by the loop filter is the fixed value within the set time as the optical dispersion compensation signal required to be fed back to the signal clock compensator.

14. The apparatus of claim 13 wherein the optical dispersion compensation signal has a value in the range of [0, 1], wherein 0 indicates no motion is required and 1 indicates a forward motion by one sample interval.