CN108133893A - High-frequency triode and preparation method thereof - Google Patents
High-frequency triode and preparation method thereof Download PDFInfo
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- CN108133893A CN108133893A CN201711423785.3A CN201711423785A CN108133893A CN 108133893 A CN108133893 A CN 108133893A CN 201711423785 A CN201711423785 A CN 201711423785A CN 108133893 A CN108133893 A CN 108133893A
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- 238000002360 preparation method Methods 0.000 title abstract description 6
- 229920005591 polysilicon Polymers 0.000 claims abstract description 88
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 87
- 230000000873 masking effect Effects 0.000 claims abstract description 59
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims abstract description 55
- 230000003647 oxidation Effects 0.000 claims abstract description 55
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 55
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 38
- 238000004519 manufacturing process Methods 0.000 claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 30
- 238000000407 epitaxy Methods 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000001259 photo etching Methods 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims description 22
- 238000002347 injection Methods 0.000 claims description 11
- 239000007924 injection Substances 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 9
- 239000007789 gas Substances 0.000 claims description 9
- 230000000717 retained effect Effects 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- 238000004151 rapid thermal annealing Methods 0.000 claims description 6
- 239000000126 substance Substances 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 6
- 230000000903 blocking effect Effects 0.000 claims description 5
- 238000001312 dry etching Methods 0.000 claims description 5
- 238000002513 implantation Methods 0.000 claims description 5
- 239000000243 solution Substances 0.000 claims description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 238000005245 sintering Methods 0.000 claims description 3
- 239000013078 crystal Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- 238000009792 diffusion process Methods 0.000 claims 1
- 230000003321 amplification Effects 0.000 description 6
- 238000003199 nucleic acid amplification method Methods 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 229910003978 SiClx Inorganic materials 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000001737 promoting effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
- H01L29/66295—Silicon vertical transistors with main current going through the whole silicon substrate, e.g. power bipolar transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7325—Vertical transistors having an emitter-base junction leaving at a main surface and a base-collector junction leaving at a peripheral surface of the body, e.g. mesa planar transistor
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Cold Cathode And The Manufacture (AREA)
Abstract
The present invention relates to a kind of high-frequency triodes and preparation method thereof.The high-frequency triode that the production method obtains includes N-type substrate, N-type epitaxy layer, field oxide, the oxidation masking layer being connected between the field oxide, p-type base area below the oxidation masking layer, p-type high-doped zone, the n-type region formed positioned at p-type base region surface, the silicon nitride spacer formed on the oxidation masking layer, polysilicon between the silicon nitride spacer, it is formed on the silicon nitride spacer, TEOS layers on the oxidation masking layer and on the field oxide, contact hole through described TEOS layers and the oxidation masking layer and the corresponding p-type high-doped zone, front metal and back metal.The photoetching number of the production method is less, and cost of manufacture is relatively low.
Description
【Technical field】
The present invention relates to semiconductor fabrication process technical fields, particularly, are related to a kind of high-frequency triode and its making side
Method.
【Background technology】
The feature that high-frequency triode is different from common triode be mainly its transistor feature size is small, breakdown potential is forced down,
Characteristic frequency is high, and manufacture craft difficulty is big.It is typically employed in the high frequencies such as VHF, UHF, CATV, wireless remote control, radio-frequency module
On wideband low noise amplifier, these use occasions are used in greatly under low-voltage, small-signal, low current, low noise conditions.
In practical chip manufacturing, the making of an ultra shallow emitter region and base area is the key that its technique.Traditional handicraft makes
When the device, it is frequently encountered the problems such as fluctuation of device current amplification coefficient is big, and characteristic frequency reduces, and device noise is big.This
Influence of the characteristic size of outer emitter to device frequency is also very big, and emitter actual linewidth is smaller, and frequency is higher.
The technological process of conventional highfrequency triode has carried out active area opening, p-type high-doped zone, emitter, polysilicon, has connect
Contact hole, front metal at least six photoetching processes, processing step is longer, and chip manufacturing cost is higher, and since emitter is opened
There is certain damage to the silicon of base region surface during mouth etching, so as to which the fluctuation of device amplification coefficient, device is caused to be made an uproar
Sound such as becomes larger at some problems.Further, since the photoetching process limit, the typical line width of emitter can only accomplish 0.5um or so, frequency
It cannot further be promoted.
【Invention content】
More than in view of, the present invention provides a kind of high-frequency triode at least solving said one technical problem and its making side
Method.
A kind of production method of high-frequency triode, includes the following steps：
N-type substrate is provided, N-type epitaxy layer is formed in the N-type substrate, field oxygen is formed at the N-type epitaxy layer both ends
Change layer, oxidation masking layer is formed in the N-type epitaxy layer between the field oxide, to the N-type below the oxidation masking layer
Epitaxial layer carries out p-type injection so as to form p-type base area；
The first polysilicon is formed on the field oxide and oxidation masking layer, first polysilicon is performed etching,
Remove the first polysilicon of part on the field oxide and oxidation masking layer, the part of the oxidation masking layer intermediate region the
One polysilicon is retained；
Silicon nitride layer is formed on first polysilicon, the field oxide and the oxidation masking layer, to the nitrogen
SiClx layer carries out back carving the partial nitridation silicon layer removed on the field oxide and the oxidation masking layer, first polysilicon
The partial nitridation silicon layer of both sides is retained to form the silicon nitride spacer positioned at the first polysilicon both sides；
By the use of first polysilicon and the silicon nitride spacer as blocking, to the p-type below the oxidation masking layer
Base area carries out p-type injection, so as to form p-type heavily doped layer at p-type base area both ends；
It is formed on first polysilicon, the silicon nitride spacer, the field oxide and the oxidation masking layer
TEOS layers, described TEOS layers using chemical machinery flattening technique is planarized, removed at the top of first polysilicon
TEOS layers；
Dry etching is carried out to first polysilicon, first polysilicon is removed, so as to be formed positioned at the nitridation
Opening between silicon side wall；
Oxidation masking layer below the opening is removed using wet etching；
The second polysilicon is formed in said opening and on TEOS layers described, using described in the removal of chemical machinery flattening technique
The second polysilicon on TEOS layers, the second polysilicon in the opening are retained；
N-type injection and rapid thermal annealing are carried out to second polysilicon so that the N-type ion in second polysilicon
The surface of the p-type base area is diffused to, so as to form the n-type region as emitter junction in the p-type base region surface；
Photoetching and etching are carried out to described TEOS layers, it is highly doped so as to be formed through described TEOS layers and correspond to the p-type
The contact hole in area；
Form front metal on TEOS layers described, to the front metal carry out photoetching with etching so as to formed base stage and
Emitter, the base stage are set on the TEOS layers and connect the p-type high-doped zone, the transmitting by the contact hole
Pole is set on the TEOS layers of second polysilicon and neighbouring second polysilicon；
Back metal is formed on surface of the N-type substrate far from the N-type epitaxy layer.
In one embodiment, the depth of the p-type base area is 0.1um, and the oxidation masking layer is outside the N-type
Prolong layer surface to grow, for the thickness of the oxidation masking layer in the range of 200 angstroms to 500 angstroms, growth temperature is Celsius 800
It spends in the range of 1000 degrees Celsius.
In one embodiment, the thickness of first polysilicon is in the range of 3000 angstroms to 8000 angstroms, the guarantor
The width of the first polysilicon stayed is in the range of 0.3um to 0.6um, and the thickness of second polysilicon is at 3000 angstroms to 6000
In the range of angstrom.
In one embodiment, the thickness of the silicon nitride layer is in the range of 3000 angstroms to 8000 angstroms, the reservation
Silicon nitride spacer width in the range of 0.3um-0.6um.
In one embodiment, before the TEOS layers at the top of first polysilicon are removed, thickness TEOS layers described
Degree is more than the thickness of first polysilicon, and in the range of 5000 angstroms to 10000 angstroms.
In one embodiment, the gas used in the step of carrying out dry etching to first polysilicon is Cl base
Gas or Br base gases；The liquid used in the step of wet etching is used to remove the oxidation masking layer below the opening is body
Product ratio is 1：10 or 1：50 hydrofluoric acid solution.
In one embodiment, the element of the N-type injection is As, and Implantation Energy, between 120kev, is noted in 30kev
Enter dosage in the range of every square centimeter 5 16 powers of 15 powers to every square centimeter 2, the temperature of the rapid thermal annealing
In the range of 950 degrees Celsius to 1100 degrees Celsius, annealing time is in the range of 20 seconds to 60 seconds.
In one embodiment, the thickness of the front metal is in the range of 3000 angstroms to 3um, the front metal
Material include Ti, TiN or Al.
In one embodiment, the production method is additionally included in the sintering of the process annealing before the back metal is formed
The step of step and thinning back side.
A kind of high-frequency triode, the N-type epitaxy layer formed including N-type substrate, in the N-type substrate, in the N-type
Epitaxial layer both ends form field oxide, the oxidation masking layer being connected between the field oxide, under the oxidation masking layer
The p-type base area of the N-type epitaxy layer surface formation of side, the p-type height through the p-type base area formed in the p-type base region surface
N-type region, the shape on the oxidation masking layer that doped region, the p-type base region surface between the p-type high-doped zone are formed
Into silicon nitride spacer, between the silicon nitride spacer and the opening of the corresponding n-type region, in the opening
Polysilicon, be formed on the silicon nitride spacer, the TEOS layers on the oxidation masking layer and on the field oxide, through institute
It states the contact hole of TEOS layers and the oxidation masking layer and the corresponding p-type high-doped zone, formed just on the TEOS layers
Face metal and the back metal formed on surface of the N-type substrate far from the N-type epitaxy layer, wherein, the front metal
Including base stage and emitter, the base stage is set on the TEOS layers and to connect the p-type by the contact hole highly doped
Area, the emitter are set on the TEOS layers of the polysilicon and the neighbouring polysilicon.
Compared to the prior art, in high-frequency triode of the present invention and preparation method thereof, by the number for reducing photoetching so that
Device manufacture cost is greatly reduced.Further, by setting the silicon nitride spacer and oxidation masking layer and using wet method
Corrosion technology will not cause to damage so that the amplification coefficient of the high-frequency triode is more steady to emitter region, base area and other film layers
Fixed, the work noise of device is lower.In addition, blocking by the silicon nitride spacer and the first polysilicon so that present invention system
Autoregistration may be used as method and inject the scheme of p-type high-doped zone of being formed, the size of high-frequency triode can be reduced significantly,
While promoting high-frequency triode integrated level, additionally it is possible to effectively promote the characteristic frequency of high-frequency element.
【Description of the drawings】
To describe the technical solutions in the embodiments of the present invention more clearly, used in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, for ability
For the those of ordinary skill of domain, without creative efforts, it can also be obtained according to these attached drawings other attached
Figure.
Fig. 1 is the flow chart of the production method of high-frequency triode of the present invention.
Fig. 2-Figure 18 is the structure diagram of each step of the production method of high-frequency triode shown in Fig. 1.
【Specific embodiment】
The technical solution in the embodiment of the present invention will be clearly and completely described below, it is clear that described implementation
Example is only the part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, this field is common
All other embodiment that technical staff is obtained without making creative work belongs to the model that the present invention protects
It encloses.
The invention belongs to semiconductor integrated circuit manufacturing fields, specially make a kind of polysilicon emitter high-frequency triode
Device by optimizing manufacturing process flow, improves device current amplification coefficient stability, promotes device characteristic frequency, reduce device
Part work noise, and reduce the manufacture cost of device.
The main feature of high-frequency triode described in the invention is exactly：Base area is extremely shallow, and emitter thereon employs more
Crystal silicon emitter technique, emitter junction are more shallow.Base area is drawn by the P+ in outside, and collector is drawn by N+ substrates and back metal
Go out.The current amplification factor of device is mainly determined by the effective base area thickness and concentration of emitter junction bottom.The frequency of device is main
It is determined by factors such as emitter junction width, device size, junction depths.The pressure resistance of device is mainly determined by the concentration and thickness of extension NEPI
It is fixed.High-frequency triode of the present invention and preparation method thereof is described in detail below in conjunction with attached drawing.
- Figure 18 is please referred to Fig.1, Fig. 1 is the flow chart of the production method of high-frequency triode of the present invention, and Fig. 2-Figure 18 is Fig. 1
The structure diagram of each step of the production method of shown high-frequency triode.The production method of the high-frequency triode includes following
Step.
Step S1 referring to Fig. 2, providing N-type substrate, forms N-type epitaxy layer, outside the N-type in the N-type substrate
Prolong layer both ends and form field oxide, oxidation masking layer is formed in the N-type epitaxy layer between the field oxide, to the masking
N-type epitaxy layer below oxide layer carries out p-type and injects so as to form p-type base area.Wherein, the oxidation masking layer is in the N
Type epi-layer surface is grown, and the thickness of the oxidation masking layer is in the range of 200 angstroms to 500 angstroms, and growth temperature is 800
Degree Celsius in the range of 1000 degrees Celsius.The depth of the p-type base area is 0.1um.
Step S2 please refers to Fig. 3 and Fig. 4, and the first polysilicon is formed on the field oxide and oxidation masking layer, to institute
It states the first polysilicon to perform etching, removes the field oxide and the first polysilicon of part on oxidation masking layer, the masking
The first polysilicon of part of oxide layer intermediate region is retained.Wherein, the thickness of first polysilicon is at 3000 angstroms to 8000
In the range of angstrom, the width of the first polysilicon of the reservation is in the range of 0.3um to 0.6um.
Step S3 please refers to Fig. 5 and Fig. 6, on first polysilicon, the field oxide and the oxidation masking layer
Silicon nitride layer is formed, the silicon nitride layer is carried out back to carve the part nitrogen removed on the field oxide and the oxidation masking layer
SiClx layer, the partial nitridation silicon layer of the first polysilicon both sides are retained to be formed positioned at the first polysilicon both sides
Silicon nitride spacer.The thickness of the silicon nitride layer in the range of 3000 angstroms to 8000 angstroms, the silicon nitride spacer of the reservation
Width is in the range of 0.3um-0.6um.
Step S4 referring to Fig. 7, by the use of first polysilicon and the silicon nitride spacer as blocking, is covered to described
It covers the p-type base area below oxide layer and carries out p-type injection, so as to form p-type heavily doped layer at p-type base area both ends.
Step S5 please refers to Fig. 8 and Fig. 9, first polysilicon, the silicon nitride spacer, the field oxide and
TEOS (ethyl orthosilicate) layer is formed on the oxidation masking layer, chemical machinery flattening technique (CMP) is used to described TEOS layers
It is planarized, removes the TEOS layers at the top of first polysilicon.Removing the TEOS layers at the top of first polysilicon
Before, thickness TEOS layers described is more than the thickness of first polysilicon, and thickness TEOS layers described is at 5000 angstroms to 10000 angstroms
In the range of.
Step S6 referring to Fig. 10, carrying out dry etching to first polysilicon, removes first polysilicon, from
And form the opening between the silicon nitride spacer.Specifically, the step of dry etching being carried out to first polysilicon
The middle gas used is Cl bases gas or Br base gas；The step of the oxidation masking layer below the opening is removed using wet etching
The liquid used in rapid is volume ratio 1：10 or 1：50 hydrofluoric acid solution.
Step S7, please refers to Fig.1 1, and the oxidation masking layer below the opening is removed using wet etching.
Step S8 please refers to Fig.1 2 and Figure 13, forms the second polysilicon in said opening and on TEOS layers described, uses
Chemical machinery flattening technique removes the second polysilicon on the TEOS layers, and the second polysilicon in the opening is retained.Institute
The thickness of the second polysilicon is stated in the range of 3000 angstroms to 6000 angstroms.
Step S9, please refers to Fig.1 4, and N-type injection and rapid thermal annealing are carried out to second polysilicon so that described the
N-type ion in two polysilicons diffuses to the surface of the p-type base area, so as to be formed in the p-type base region surface as transmitting
The n-type region of knot.The element of the N-type injection is As, and Implantation Energy in 30kev between 120kev, often put down by implantation dosage
In the range of square centimetre 5 of 15 powers to every square centimeter 2 16 powers, the temperature of the rapid thermal annealing is at 950 degrees Celsius
To in the range of 1100 degrees Celsius, annealing time is in the range of 20 seconds to 60 seconds.
Step S10, please refers to Fig.1 5, photoetching and etching is carried out to described TEOS layers, so as to be formed through TEOS layers described
And the contact hole of the corresponding p-type high-doped zone.
Step S11 please refers to Fig.1 6 and Figure 17, and front metal is formed on TEOS layers described, to the front metal into
With etching so as to form base stage and emitter, the base stage is set on the TEOS layers and is connected by the contact hole for row photoetching
The p-type high-doped zone is connect, the emitter is set to the TEOS layers of second polysilicon and neighbouring second polysilicon
On.For the thickness of the front metal in the range of 3000 angstroms to 3um, the material of the front metal includes Ti, TiN or Al.
Step S12, please refers to Fig.1 8, and back metal is formed on surface of the N-type substrate far from the N-type epitaxy layer.
Further, the production method is additionally included in the process annealing sintering step before the back metal is formed and thinning back side
The step of.
As shown in figure 18, the high-frequency triode that above-mentioned production method obtains includes N-type substrate, the shape in the N-type substrate
Into N-type epitaxy layer, at the N-type epitaxy layer both ends form field oxide, the masking oxygen that is connected between the field oxide
Change layer, the p-type base area that the N-type epitaxy layer surface below the oxidation masking layer is formed, in p-type base region surface formation
The N-type region that p-type base region surface through the p-type high-doped zone of the p-type base area, between the p-type high-doped zone is formed
Domain, the silicon nitride spacer formed on the oxidation masking layer, between the silicon nitride spacer and the corresponding n-type region
Opening, the polysilicon in the opening, be formed on the silicon nitride spacer, on the oxidation masking layer and field
TEOS layers in oxide layer, through described TEOS layers and the oxidation masking layer and the contact hole of the corresponding p-type high-doped zone,
The front metal formed on the TEOS layers and the back side formed on surface of the N-type substrate far from the N-type epitaxy layer
Metal, wherein, the front metal includes base stage and emitter, and the base stage is set on the TEOS layers and is connect by described
Contact hole connects the p-type high-doped zone, and the emitter is set on the TEOS layers of the polysilicon and the neighbouring polysilicon.
Compared to the prior art, in high-frequency triode of the present invention and preparation method thereof, by the number for reducing photoetching so that
Device manufacture cost is greatly reduced.Further, by setting the silicon nitride spacer and oxidation masking layer and using wet method
Corrosion technology will not cause to damage so that the amplification coefficient of the high-frequency triode is more steady to emitter region, base area and other film layers
Fixed, the work noise of device is lower.In addition, blocking by the silicon nitride spacer and the first polysilicon so that present invention system
Autoregistration may be used as method and inject the scheme of p-type high-doped zone of being formed, the size of high-frequency triode can be reduced significantly,
While promoting high-frequency triode integrated level, additionally it is possible to effectively promote the characteristic frequency of high-frequency element.
Above-described is only embodiments of the present invention, it should be noted here that for those of ordinary skill in the art
For, without departing from the concept of the premise of the invention, improvement can also be made, but these belong to the protection model of the present invention
It encloses.
Claims (10)
1. a kind of production method of high-frequency triode, which is characterized in that the production method includes the following steps：
N-type substrate is provided, N-type epitaxy layer is formed in the N-type substrate, field oxide is formed at the N-type epitaxy layer both ends,
Oxidation masking layer is formed in N-type epitaxy layer between the field oxide, to the N-type epitaxy layer below the oxidation masking layer
P-type injection is carried out so as to form p-type base area；
The first polysilicon is formed on the field oxide and oxidation masking layer, first polysilicon is performed etching, is removed
The field oxide and the first polysilicon of part on oxidation masking layer, the part more than first of the oxidation masking layer intermediate region
Crystal silicon is retained；
Silicon nitride layer is formed on first polysilicon, the field oxide and the oxidation masking layer, to the silicon nitride
Layer carries out back carving the partial nitridation silicon layer removed on the field oxide and the oxidation masking layer, the first polysilicon both sides
Partial nitridation silicon layer be retained to form the silicon nitride spacer positioned at the first polysilicon both sides；
By the use of first polysilicon and the silicon nitride spacer as blocking, to the p-type base area below the oxidation masking layer
P-type injection is carried out, so as to form p-type heavily doped layer at p-type base area both ends；
TEOS layers are formed on first polysilicon, the silicon nitride spacer, the field oxide and the oxidation masking layer,
Described TEOS layers using chemical machinery flattening technique is planarized, removes the TEOS layers at the top of first polysilicon；
Dry etching is carried out to first polysilicon, first polysilicon is removed, so as to be formed positioned at the silicon nitride side
Opening between wall；
Oxidation masking layer below the opening is removed using wet etching；
The second polysilicon is formed in said opening and on TEOS layers described, the TEOS is removed using chemical machinery flattening technique
The second polysilicon on layer, the second polysilicon in the opening are retained；
N-type injection and rapid thermal annealing are carried out to second polysilicon so that the N-type ion diffusion in second polysilicon
To the surface of the p-type base area, so as to form the n-type region as emitter junction in the p-type base region surface；
Photoetching and etching are carried out to described TEOS layers, so as to be formed through described TEOS layers and correspond to the p-type high-doped zone
Contact hole；
Front metal is formed on TEOS layers described, photoetching is carried out to the front metal with etching so as to form base stage and transmitting
Pole, the base stage are set on the TEOS layers and connect the p-type high-doped zone by the contact hole, and the emitter is set
It is placed on the TEOS layers of second polysilicon and neighbouring second polysilicon；
Back metal is formed on surface of the N-type substrate far from the N-type epitaxy layer.
2. the production method of high-frequency triode as described in claim 1, it is characterised in that：The depth of the p-type base area is
0.1um, the oxidation masking layer are grown on the N-type epitaxy layer surface, and the thickness of the oxidation masking layer is at 200 angstroms
To in the range of 500 angstroms, growth temperature is in the range of 800 degrees Celsius to 1000 degrees Celsius.
3. the production method of high-frequency triode as described in claim 1, it is characterised in that：The thickness of first polysilicon exists
In the range of 3000 angstroms to 8000 angstroms, the width of the first polysilicon of the reservation is described in the range of 0.3um to 0.6um
The thickness of second polysilicon is in the range of 3000 angstroms to 6000 angstroms.
4. the production method of high-frequency triode as described in claim 1, it is characterised in that：The thickness of the silicon nitride layer exists
In the range of 3000 angstroms to 8000 angstroms, the width of the silicon nitride spacer of the reservation is in the range of 0.3um-0.6um.
5. the production method of high-frequency triode as described in claim 1, it is characterised in that：Removing the first polysilicon top
Before the TEOS layers in portion, thickness TEOS layers described is more than the thickness of first polysilicon, and at 5000 angstroms to 10000 angstroms
In the range of.
6. the production method of high-frequency triode as described in claim 1, it is characterised in that：First polysilicon is done
The gas used in the step of method etches is Cl bases gas or Br base gas；Covering below the opening is removed using wet etching
The liquid used in the step of covering oxide layer is volume ratio 1：10 or 1：50 hydrofluoric acid solution.
7. the production method of high-frequency triode as described in claim 1, it is characterised in that：The element of the N-type injection is As,
Implantation Energy is in 30kev between 120kev, and implantation dosage is at 16 times of 15 powers to every square centimeter 2 of every square centimeter 5
In the range of side, the temperature of the rapid thermal annealing is in the range of 950 degrees Celsius to 1100 degrees Celsius, and annealing time was at 20 seconds
To in the range of 60 seconds.
8. the production method of high-frequency triode as described in claim 1, it is characterised in that：The thickness of the front metal exists
3000 angstroms in the range of 3um, the material of the front metal includes Ti, TiN or Al.
9. the production method of high-frequency triode as described in claim 1, it is characterised in that：The production method is additionally included in institute
The step of stating process annealing sintering step and thinning back side before back metal is formed.
10. a kind of high-frequency triode, which is characterized in that the high-frequency triode includes N-type substrate, the shape in the N-type substrate
Into N-type epitaxy layer, at the N-type epitaxy layer both ends form field oxide, the masking oxygen that is connected between the field oxide
Change layer, the p-type base area that the N-type epitaxy layer surface below the oxidation masking layer is formed, in p-type base region surface formation
The N-type region that p-type base region surface through the p-type high-doped zone of the p-type base area, between the p-type high-doped zone is formed
Domain, the silicon nitride spacer formed on the oxidation masking layer, between the silicon nitride spacer and the corresponding n-type region
Opening, the polysilicon in the opening, be formed on the silicon nitride spacer, on the oxidation masking layer and field
TEOS layers in oxide layer, through described TEOS layers and the oxidation masking layer and the contact hole of the corresponding p-type high-doped zone,
The front metal formed on the TEOS layers and the back side formed on surface of the N-type substrate far from the N-type epitaxy layer
Metal, wherein, the front metal includes base stage and emitter, and the base stage is set on the TEOS layers and is connect by described
Contact hole connects the p-type high-doped zone, and the emitter is set on the TEOS layers of the polysilicon and the neighbouring polysilicon.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114335233A (en) * | 2021-12-29 | 2022-04-12 | 苏州半导体总厂有限公司 | Photosensitive triode and preparation method thereof |
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| EP0346535A1 (en) * | 1987-02-27 | 1989-12-20 | BRITISH TELECOMMUNICATIONS public limited company | Self-aligned bipolar fabrication process |
| CN1953147A (en) * | 2005-10-19 | 2007-04-25 | 上海镭芯微电子有限公司 | Manufacturing method of high frequency transistor with self-aligned dense boron base |
| CN102637597A (en) * | 2011-02-10 | 2012-08-15 | 上海宏力半导体制造有限公司 | Vertical PNP (precision navigation processor) preparation method |
| CN104637811A (en) * | 2013-11-14 | 2015-05-20 | 北大方正集团有限公司 | Transistor and transistor manufacturing method |
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| EP0346535A1 (en) * | 1987-02-27 | 1989-12-20 | BRITISH TELECOMMUNICATIONS public limited company | Self-aligned bipolar fabrication process |
| CN1953147A (en) * | 2005-10-19 | 2007-04-25 | 上海镭芯微电子有限公司 | Manufacturing method of high frequency transistor with self-aligned dense boron base |
| CN102637597A (en) * | 2011-02-10 | 2012-08-15 | 上海宏力半导体制造有限公司 | Vertical PNP (precision navigation processor) preparation method |
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| CN114335233A (en) * | 2021-12-29 | 2022-04-12 | 苏州半导体总厂有限公司 | Photosensitive triode and preparation method thereof |
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