CN108133888B - Deep silicon etching method - Google Patents

Deep silicon etching method Download PDF

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CN108133888B
CN108133888B CN201611091420.0A CN201611091420A CN108133888B CN 108133888 B CN108133888 B CN 108133888B CN 201611091420 A CN201611091420 A CN 201611091420A CN 108133888 B CN108133888 B CN 108133888B
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etching
deposition
gas
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deep silicon
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CN108133888A (en
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万宇
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Beijing Naura Microelectronics Equipment Co Ltd
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Beijing Naura Microelectronics Equipment Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • H01L21/30655Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process

Abstract

The invention discloses a deep silicon etching method which comprises an etching step and a deposition step, wherein the etching step and the deposition step are alternately circulated until the etching reaches a preset depth, and in the deposition step, deposition gas and first auxiliary gas consisting of carbon elements and hydrogen elements are introduced for deposition. By the deep silicon etching method, the line width loss of the top of the etched pattern can be reduced.

Description

Deep silicon etching method
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a deep silicon etching method.
Background
With the increasing widespread application of MEMS (Micro-Electro-Mechanical Systems) in the fields of automobiles and consumer electronics and the broad prospect of Through Silicon Via (TSV) etching technology in the future packaging field, the dry plasma deep Silicon etching process gradually becomes one of the mainstream processes in the MEMS processing field and the TSV technology.
The main differences of the deep silicon etching process with respect to the general silicon etching process are: firstly, the etching depth of the deep silicon etching process is generally dozens of microns or even hundreds of microns, which is far greater than the etching depth of the general silicon etching process, which is less than 1 micron; secondly, in order to etch a silicon wafer with a thickness of more than tens of microns, the deep silicon etching process needs a faster etching rate, a higher selectivity and a larger aspect ratio.
The deep silicon etching process generally includes several types, such as a deep hole etching process, a deep trench etching process, a column etching process, and the like, according to the etching morphology. The deep silicon etch process may be a Bosch process, as shown in fig. 1, in which the entire etch process is an alternating cycle of deposition steps 101 and etch steps 102 until the desired etch depth is reached. Wherein, a deposition step 101; the process gas used for the deposition step 101 is typically C4F8(carbon tetrafluoride), C4F8Decomposed into ionic CF in plasma statex +Basic, CFx -Radicals and F-radicals, in which CFx +Radical and CFx -The radicals react with the silicon surface to form nCF2The polymer passivation film is represented by the following reaction formulae (1) and (2).
C4F8+e-→CFx ++CFx -+F-+e- (1)
CFx -→nCF2 (2)
The process gas used in the etching step 102 is typically SF6(Sulfur hexafluoride) from SF6Gas ionization to generate F radical and SxFyPlasma, first, F radicals and nCF2The reaction etches away the passive film and generates volatile gas CF2In this process, althoughHowever, the F radical participates in the reaction and plays a certain role, but actually, S plays a main rolexFyAnd (4) bombardment of the passive film by the plasma. Then etching Si substrate, wherein the etching of Si substrate is mainly to generate SiF by the reaction of F free radical and SixBelonging to chemical etching, while SxFyThe ions have physical bombardment effect on Si, and S is compared with F radical etchingxFyThe physical bombardment of ions contributes little to the Si etching, so in this process, F radicals play a major role, as shown in the following equations (3), (4), (5).
SF6+e-→SxFy ++SxFy -+F-+e- (3)
nCF2 ++F-→CFx -→CF2↑ (4)
Si+F-→SiFx (5)
The following problems were found during the above-described pillar etching process: as the etching depth is gradually increased, the discharge rate of the generated etching by-products, which react with S participating in the reaction, is gradually decreasedxFyThe probability of the ions colliding with the F radicals is greatly increased, which results in a decrease in the free path of the ions participating in the reaction, and therefore, the ions have a reduced energy, and it becomes increasingly difficult for the ions to etch deep into the bottommost portion to participate in the reaction, so that, for the ions mainly having S, the probability of collision with the F radicals is greatly increasedxFyIon bombardment dominated deposition generated nCF2During the etching of the polymer passivation film, the deeper the etching depth is, the less the density and the smaller the energy of the ions reaching the bottom of the column are, so the bombardment effect is significantly reduced, resulting in that the residual passivation film is difficult to remove in time, and is accumulated continuously in the subsequent deposition process, and finally after multiple deposition and etching alternate cycles, a similar micro-mask (micro-mask) is formed, and even silicon grass is formed in severe cases, as shown in fig. 2a and 2 b. Meanwhile, as the etching depth is continuously increased, the concentration of F radicals in the bottom of the column, which mainly etch the Si substrate, is gradually reduced, which results in the gradual reduction of the overall etching rate of the silicon columnLow.
In order to solve the silicon grass phenomenon in the etching process, the following two methods are adopted at present: first, a higher upper rf power and lower rf power are used. With the deepening of the etching depth, the air pressure is gradually reduced, so that the particles obtain a larger free path and have larger energy to etch a passivation film generated by deposition, the adverse effect on the ion energy caused by the gradual deepening of the etching depth is weakened to a certain extent, the problem of the silicon grass can be effectively solved, but the radio frequency power is limited by hardware such as a power source and the like, and a certain use upper limit exists.
Second, after a deposition/etch cycle is completed, a "bottom smoothing" step is introduced before the next cycle begins. Under a lower process pressure, F-containing gas with a certain flow is introduced into the process chamber to etch the deposited passivation film, so that the phenomenon of silicon grass caused by the residual passivation film is avoided.
However, although the above two methods can solve the occurrence of the silicon grass phenomenon, the etching effect is added at the bottom of the etched pattern, which brings other technical problems: as shown in fig. 3, when the bottom silicon wafer is etched, the top of the etched pattern is subjected to stronger energy of the horizontal plasma bombardment than the bottom of the etched pattern, so that the shape of the etched pattern is in a regular trapezoid, and the diameter size of the top of the etched pattern is seriously damaged, that is, the line width loss is serious.
Disclosure of Invention
The invention provides a deep silicon etching method which can reduce the line width loss of the top of an etched pattern.
In order to achieve the above object, an embodiment of the present invention provides a deep silicon etching method, which includes an etching step and a deposition step, where the etching step and the deposition step are alternately cycled until etching reaches a predetermined depth, and in the deposition step, deposition gas and first auxiliary gas composed of carbon element and hydrogen element are introduced for deposition.
Preferably, between the depositing step and the etching step of each cycle, further comprising: a transition step; and in the transition step, introducing etching gas and second auxiliary gas for etching, wherein the second auxiliary gas contains carbon element and fluorine element.
Preferably, the atomic number ratio of the carbon element to the fluorine element in the second auxiliary gas is less than 0.5.
Preferably, the first auxiliary gas is C2H4
Preferably, the second auxiliary gas is CHF3
Preferably, the process pressure of the deposition step, the etching step and the transition step is gradually reduced within a certain range along with the increase of the etching depth.
Preferably, the process pressure has an initial value ranging from 50mT to 200mT and an end value ranging from 10mT to 30mT in the deposition step, the etching step, and the transition step.
Preferably, the process pressure has an initial value ranging from 50mT to 80mT and an end value ranging from 10mT to 20mT in the deposition step, the etching step, and the transition step.
Preferably, the process parameters of the deposition step include: the deposition gas is C4F8,C4F8The gas flow range of (C) is 100sccm to 200sccm2H4The range of the gas flow of (2) is 50sccm to 100 sccm; the range of excitation power is 1000W-2000W; bias power is 0W; the process time is 2 s-3 s.
Preferably, the process parameters of the transition step include: the etching gas is SF6,SF6The gas flow rate of (1) is in the range of 100sccm to 200sccm, CHF3The range of the gas flow of (2) is 50sccm to 100 sccm; the range of excitation power is 1000W-2000W; the bias power is in the range of 30W-50W; the process time is 1 s-2 s.
The beneficial effects of the invention include:
according to the deep silicon etching process provided by the invention, as the first auxiliary gas consisting of carbon element and hydrogen element is introduced in the deposition step, carbon particles and hydrocarbon particles are generated after the first auxiliary gas is ionized, and fluorine base cannot be generated, the content ratio of the carbon element and the fluorine element in a unit volume is greatly improved, the generation efficiency of the passivation film on the side wall of the etched pattern can be effectively improved, so that the passivation film generated on the side wall of the top of the etched pattern can resist the transverse bombardment of ions, and the line width loss of the top of the etched pattern can be reduced; and because the carbon particles need to react with the F radicals and the silicon surface after the ionization of the deposition gas to generate a passivation film, namely the F radicals after the ionization of the deposition gas need to be consumed, the concentration of the F radicals can be effectively reduced, the influence of the F radicals on the passivation film on the side wall at the top of the etched pattern is reduced, and the line width loss at the top of the etched pattern is further reduced.
Drawings
FIG. 1 is a flow diagram of a typical Bosch process;
FIG. 2a is a scanning electron microscope image of a first etched pattern after processing by the etching process shown in FIG. 1;
FIG. 2b is an electron microscope scan of a second etch pattern after processing using the etching process of FIG. 1;
FIG. 3 is a scanning electron microscope image of an etching pattern after a conventional etching process is performed;
FIG. 4 is a flowchart of a deep silicon etching method according to embodiment 1 of the present invention;
FIG. 5 is a flowchart of a deep silicon etching method according to embodiment 2 of the present invention;
fig. 6 is an electron microscope scanning image of an etching pattern after the etching process provided in embodiment 2 of the present invention is performed.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the deep silicon etching method provided by the embodiments of the present invention is described in detail below with reference to the accompanying drawings.
Example 1
Fig. 4 is a flowchart of a deep silicon etching method according to embodiment 1 of the present invention, which includes an etching step 102 and a deposition step 101, where the etching step 102 and the deposition step 101 are alternately cycled until a predetermined depth is reached, and in the deposition step 101, a deposition gas and a first auxiliary gas composed of carbon and hydrogen are introduced for deposition.
Because the first auxiliary gas consisting of carbon element and hydrogen element is introduced in the deposition step 101, carbon particles and carbon hydrogen particles are generated after the first auxiliary gas is ionized, and fluorine radicals cannot be generated, the content ratio of the carbon element and the fluorine element in a unit volume is greatly improved, the generation efficiency of the passivation film on the side wall of the etched pattern can be effectively improved, and therefore the passivation film generated on the side wall of the top of the etched pattern can resist the transverse bombardment of ions, and the line width loss of the top of the etched pattern can be reduced; and because the carbon particles need to react with the F radicals and the silicon surface after the ionization of the deposition gas to generate a passivation film, namely the F radicals after the ionization of the deposition gas need to be consumed, the concentration of the F radicals can be effectively reduced, the influence of the F radicals on the passivation film on the side wall at the top of the etched pattern can be reduced, and the line width loss at the top of the etched pattern is further reduced.
In this embodiment, preferably, the process pressure of the etching step 102 and the deposition step 101 is gradually reduced within a certain range along with the increase of the etching depth, and since the process pressure of the etching step 102 and the deposition step 101 is gradually reduced within a certain range along with the increase of the etching depth, the particles obtain a larger free path, and have larger energy to bombard the polymer generated by deposition, which weakens the adverse effect on the ion energy caused by the gradual deepening of the etching depth to a certain extent, and can effectively solve the problem of silicon grass without affecting the selection ratio.
In summary, the deep silicon etching process provided by the embodiment of the invention reduces the line width loss at the top of the silicon pillar on the basis of ensuring that no silicon grass is present at the bottom of the silicon pillar, can obtain a relatively vertical and smooth etching morphology at the bottom, and does not affect the selectivity.
It should be noted here that, in the present embodiment, the present invention does not limit the first auxiliary gas as long as the gas is composed of carbon element and hydrogen element.
It should be further noted that, in the present invention, the process pressure in the etching step 102 and the deposition step 101 is gradually reduced within a certain range along with the increase of the etching depth to avoid the silicon grass phenomenon, but the present invention is not limited thereto, and in practical applications, other process methods may also be adopted to avoid the silicon grass phenomenon, so that the line width loss at the top of the silicon pillar may be reduced on the basis of ensuring that no silicon grass is present at the bottom of the silicon pillar, and a relatively vertical and smooth etching morphology at the bottom may be obtained.
Example 2
Fig. 5 is a flowchart of a deep silicon etching method according to embodiment 2 of the present invention, and referring to fig. 5, the deep silicon etching method according to the embodiment of the present invention is similar to the deep silicon etching method according to embodiment 1, and similarly includes a deposition step 101 and an etching step 102, since the deposition step 101 and the etching step 102 are described in detail in embodiment 1, detailed description thereof is omitted here.
Only the differences of the present embodiment from embodiment 1 described above will be described below. Specifically, in this embodiment, between the deposition step 101 and the etching step 102 in each cycle, the method further includes: and a transition step 103, introducing etching gas and second auxiliary gas for etching, wherein the second auxiliary gas contains carbon element and fluorine element.
In the etching process, the thickness of the passivation film deposited on the side wall of the etched pattern may be unevenly distributed, and the region with the relatively thin thickness of the passivation film is likely to be etched away transversely (i.e. the silicon surface of the region is exposed), so that in this case, the second auxiliary gas containing carbon element and fluorine element can react with the exposed silicon surface in time to generate the passivation film after being ionized, and the silicon side wall of the etched pattern is protected in time, so as to obtain the relatively vertical etching morphology.
It is noted here that the transition step 103 must be added between the deposition step 101 and the etching step 102, because the transition step 103 presupposes that a considerable passivation film has already been accumulated on the sidewalls of the etched pattern in the deposition step 101, and only then the transition step 103 can achieve both etching of the passivation film and formation of the passivation film on the exposed silicon surface for protection, because only after a certain amount of passivation film has accumulated on the sidewalls of the etched pattern, the transition step can react with the laterally etched silicon surface exposed points in time by means of the second auxiliary gas to form the passivation film, thereby forming a protection layer with a uniform thickness with the passivation film formed in the deposition step. On the contrary, if the transition step 103 is disposed after the etching step, the protection effect is not achieved because the passivation film on the sidewall of the etched pattern is very weak after the etching step, the exposed area of silicon is large, and the second auxiliary gas in the transition step 103 has no time to react with the silicon surface with a large area, and the sidewall of the etched pattern is etched by the etching gas.
Preferably, since fluorine radicals play a major role in etching silicon, to avoid the influence on the silicon etching rate, the ratio of the number of atoms of carbon element to that of fluorine element is less than 0.5 (i.e., C is less than the deposition gas)4F8The atomic number ratio of the carbon element to the fluorine element) can avoid the influence on the content of fluorine radicals when the second auxiliary gas reacts with the silicon surface to generate a passivation film, thereby influencing the etching rate.
In addition, it is preferable that the process pressure in the transition step 103 is gradually reduced within a certain range as the etching depth increases, so that, in the case that the process pressures in the deposition step 101, the transition step 103 and the etching step 102 are all gradually reduced within a certain range as the etching depth increases, the occurrence of the silicon grass phenomenon can be avoided to the greatest extent based on the same working principle as in the above embodiment 1.
In this embodiment, preferably, the first auxiliary gas is C2H4. However, the invention is not limited thereto, and in practical application, the first auxiliary gas may be CH4、CH3CH3、C2H2One of (A) or (B) and C2H4Mixed gas of a plurality of the above.
Preferably, the second auxiliary gas is CHF3. However, the invention is not limited thereto, and in practical application, the second auxiliary gas may be CF4(ii) a Alternatively, the second auxiliary gas is CHF3And CF4The mixed gas.
Preferably, the initial value of the process pressure ranges from 50mT to 200mT and the end value ranges from 10mT to 30mT in the deposition step 101, the etching step 102 and the transition step 103, so that the adjustable range of the aperture ratio per unit area of the applicable column etching process is large.
It is further preferable that the initial value of the process pressure is in the range of 50mT to 80mT and the end value is in the range of 10mT to 20mT in the deposition step 101, the etching step 102 and the transition step 103, so that the method can be applied to a column etching process having a small opening ratio per unit area.
Specifically, the process parameters of the deposition step 101 include: the deposition gas is C4F8,C4F8The gas flow range of (C) is 100sccm to 200sccm2H4The range of the gas flow of (2) is 50sccm to 100 sccm; the range of excitation power is 1000W-2000W; bias power is 0W; the process time is 2 s-3 s.
The process parameters of the transition step 103 include: the etching gas is SF6,SF6The gas flow rate of (1) is in the range of 100sccm to 200sccm, CHF3The range of the gas flow of (2) is 50sccm to 100 sccm; the range of excitation power is 1000W-2000W; the bias power is in the range of 30W-50W; the process time is 1 s-2 s.
The implementation below proves the deep silicon etching process provided by the embodiment of the present invention. Specifically, the process parameters of the deposition step 101 include: the process pressure is gradually reduced from 60mT to 15 mT; the excitation power is 1200W; bias power of 0W, C4F8The gas flow of (2) is 200 sccm; c2H4The gas flow of (2) is 50 sccm; the process temperature is 20 ℃; the process time was 2 s.
The process parameters of the transition step 103 include: the process pressure is gradually reduced from 60mT to 15 mT; the excitation power is 1500W; the bias power is 30W; SF6The gas flow of (2) is 100 sccm; CHF3The gas flow of (2) is 100 sccm; the process temperature is 20 ℃; the process time was 1 s.
The process parameters of the etching step 102 include: the process pressure is gradually reduced from 60mT to 15 mT; the excitation power is 1500W; the bias power is 30W; SF6The gas flow of (2) is 200 sccm; worker's toolThe process temperature is 20 ℃; the process time was 2.5 s.
The deposition step 101, the transition step 103 and the etching step 102 are repeated 200 times.
Fig. 6 is a scanning electron microscope image of the etched pattern after the etching process is performed, and referring to fig. 6, it can be seen that: the etched pattern is a silicon column, and the side wall of the silicon column is vertical and smooth in appearance, so that the line width loss of the top of the silicon column is effectively reduced, and silicon grass is not arranged at the bottom of the silicon column.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.

Claims (7)

1. A deep silicon etching method comprises an etching step and a deposition step, wherein the etching step and the deposition step are alternately circulated until etching reaches a preset depth, and the deep silicon etching method is characterized in that deposition gas and first auxiliary gas consisting of carbon element and hydrogen element are introduced to carry out deposition in the deposition step, and the deposition gas is C4F8(ii) a And the number of the first and second electrodes,
after the depositing step and before the etching step, the method further comprises: a transition step;
in the transition step, introducing etching gas and second auxiliary gas for etching, wherein the second auxiliary gas contains carbon element and fluorine element;
the process parameters of the transition step comprise: the etching gas is SF6The second auxiliary gas is CHF3,SF6The gas flow rate of (1) is in the range of 100sccm to 200sccm, CHF3The flow rate of (3) is in the range of 50sccm to 100 sccm.
2. The deep silicon etching method according to claim 1, wherein the first auxiliary gas is C2H4
3. The method of claim 1, wherein the process pressure of the depositing step, the etching step and the transition step is gradually reduced within a certain range with the increase of the etching depth.
4. The method of claim 3, wherein the initial value of the process pressure ranges from 50mT to 200mT and the end value ranges from 10mT to 30mT during the depositing step, the etching step, and the transitioning step.
5. The method of claim 4, wherein the initial value of the process pressure ranges from 50mT to 80mT and the end value ranges from 10mT to 20mT during the depositing step, the etching step, and the transitioning step.
6. The deep silicon etching method according to claim 2, wherein the process parameters of the depositing step include: c4F8The gas flow range of (C) is 100sccm to 200sccm2H4The range of the gas flow of (2) is 50sccm to 100 sccm; the range of excitation power is 1000W-2000W; bias power is 0W; the process time is 2 s-3 s.
7. The deep silicon etching method according to claim 1, wherein the process parameters of the transition step include: the range of excitation power is 1000W-2000W; the bias power is in the range of 30W-50W; the process time is 1 s-2 s.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104253017A (en) * 2013-06-27 2014-12-31 北京北方微电子基地设备工艺研究中心有限责任公司 Substrate etching method
CN105679700A (en) * 2014-11-21 2016-06-15 北京北方微电子基地设备工艺研究中心有限责任公司 Silicon deep hole etching method

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US7074723B2 (en) * 2002-08-02 2006-07-11 Applied Materials, Inc. Method of plasma etching a deeply recessed feature in a substrate using a plasma source gas modulated etchant system
CN101958244A (en) * 2009-07-21 2011-01-26 中微半导体设备(上海)有限公司 Deep reactive ion etching method and gas flow control device thereof
CN103745945B (en) * 2013-11-15 2017-02-15 中微半导体设备(上海)有限公司 Deep silicon through hole etching apparatus and deep silicon through hole etching method

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CN104253017A (en) * 2013-06-27 2014-12-31 北京北方微电子基地设备工艺研究中心有限责任公司 Substrate etching method
CN105679700A (en) * 2014-11-21 2016-06-15 北京北方微电子基地设备工艺研究中心有限责任公司 Silicon deep hole etching method

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