CN108110115A - A kind of light-emitting diode chip for backlight unit and preparation method thereof - Google Patents
A kind of light-emitting diode chip for backlight unit and preparation method thereof Download PDFInfo
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- CN108110115A CN108110115A CN201710985571.9A CN201710985571A CN108110115A CN 108110115 A CN108110115 A CN 108110115A CN 201710985571 A CN201710985571 A CN 201710985571A CN 108110115 A CN108110115 A CN 108110115A
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- 238000004519 manufacturing process Methods 0.000 claims description 15
- 238000000926 separation method Methods 0.000 claims description 15
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 abstract description 50
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- 229920002120 photoresistant polymer Polymers 0.000 description 25
- 239000000463 material Substances 0.000 description 18
- 238000000034 method Methods 0.000 description 12
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- 239000007772 electrode material Substances 0.000 description 7
- 229910002601 GaN Inorganic materials 0.000 description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 5
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- 238000002955 isolation Methods 0.000 description 3
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- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- Power Engineering (AREA)
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Abstract
The invention discloses a kind of light-emitting diode chip for backlight unit and preparation method thereof, belong to technical field of semiconductors.Chip includes epitaxial wafer and electrode; electrode includes adhesion layer, protective layer, the second wiring layers and the first wiring layers; adhesion layer, protective layer, the second wiring layers and the first wiring layers are sequentially laminated on epitaxial wafer; first wiring layers are Al films; second wiring layers include multiple first sublayers and multiple second sublayers; multiple first sublayers and multiple second sublayers are alternately laminated on the protection layer, and each first sublayer is Ni films, and each second sublayer is Al films.One aspect of the present invention increases the thickness of Al films in entire wiring layers by the second sublayer, the voltage of chip is reduced, Al films are on the other hand separated by the first sublayer, Al film layers is avoided to be spread since thickness is too big to surrounding, improve the appearance of chip, avoid that chip is caused to leak electricity.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of light-emitting diode chip for backlight unit and preparation method thereof.
Background technology
Light emitting diode (English：Light Emitting Diode, referred to as：LED it is) that one kind can change into electric energy
The semiconductor diode of luminous energy has the characteristics that small, brightness is high and energy consumption is small, is widely used in display screen and instruction
On lamp.
Chip is the core component of LED, and chip includes epitaxial wafer and electrode, and electrode is arranged on epitaxial wafer.Existing electricity
Pole includes Cr film layers, Ti film layers and Al film layers, and Cr film layers, Ti film layers and Al film layers are sequentially laminated on epitaxial wafer.Wherein, Cr films
Layer is used to electrode being adhered to epitaxial wafer, and Ti film layers are protected for being coated on outside Cr film layers, and Al film layers are used for and bonding wire
It is implemented in combination with routing.
In the implementation of the present invention, inventor has found that the prior art has at least the following problems：
If increasing the thickness of Al film layers, such as the thickness of Al film layers increases to 3 μm from 2 μm, then the voltage of chip can under
0.03V~0.05V drops.Simultaneously because the material of Al is relatively soft, and when the thickness of Al film layers increases to 3 μm, the bottom of Al film layers
It can be squeezed larger and be spread to surrounding, cause the bad order of chip, in some instances it may even be possible to cause the p-type electricity of packed LED chip
Pole and N-type electrode connect together, and (electrode being arranged on epitaxial wafer includes P-type electrode and N-type electrode, the p-type of packed LED chip
Electrode and N-type electrode are arranged on the same side of chip), chip is caused to leak electricity.Therefore the thickness of Al film layers is usual in electrode at present
What can be set is relatively thin, and the voltage for causing chip is higher.
The content of the invention
Cause the voltage of chip higher due to the thinner thickness of the Al film layers of routing in electrode to solve the prior art
The problem of, an embodiment of the present invention provides a kind of light-emitting diode chip for backlight unit and preparation method thereof.The technical solution is as follows：
On the one hand, an embodiment of the present invention provides a kind of light-emitting diode chip for backlight unit, the light-emitting diode chip for backlight unit includes outer
Prolong piece and electrode, the electrode includes adhesion layer, protective layer and the first wiring layers, the adhesion layer, the protective layer and described
First wiring layers are sequentially laminated on the epitaxial wafer, and first wiring layers are Al films, and the light-emitting diode chip for backlight unit also wraps
The second wiring layers are included, second wiring layers are arranged between the protective layer and first wiring layers, second routing
Layer includes multiple first sublayers and multiple second sublayers, and the multiple first sublayer and the multiple second sublayer are alternately laminated in
On the protective layer, each first sublayer is Ni films, and each second sublayer is Al films.
Optionally, the thickness of second wiring layers is 1 μm~3 μm.
Optionally, the quantity of first sublayer is identical with the quantity of second sublayer, the quantity of second sublayer
For 3~5.
Optionally, the thickness of first sublayer is 30nm~500nm.
Optionally, the thickness of second sublayer is 30nm~500nm.
Optionally, the electrode further includes reflector layer, the reflector layer be arranged on the adhesion layer and the protective layer it
Between.
Optionally, the electrode further includes stress equilibrium layer, and the stress equilibrium layer is arranged on the protective layer and described
Between second wiring layers.
Optionally, the electrode further includes separation layer, and the separation layer is arranged on the stress equilibrium layer and described second
Between wiring layers.
On the other hand, an embodiment of the present invention provides a kind of production method of light-emitting diode chip for backlight unit, the production methods
Including：
One epitaxial wafer is provided；
Electrode is formed on the epitaxial wafer；
Wherein, the electrode includes adhesion layer, protective layer, the first wiring layers and the second wiring layers, the adhesion layer, described
Protective layer, second wiring layers and first wiring layers are sequentially laminated on the epitaxial wafer, and first wiring layers are
Al films, second wiring layers include multiple first sublayers and multiple second sublayers, the multiple first sublayer and the multiple
Second sublayer is alternately laminated on the protective layer, and each first sublayer is Ni films, and each second sublayer is Al films.
Optionally, it is described to form electrode on the epitaxial wafer, including：
The epitaxial wafer is put into magnetron sputtering chamber, the magnetron sputtering chamber is vacuumized；
Nitrogen is passed through to the magnetron sputtering intracavitary；
In a nitrogen atmosphere, different targets is sputtered successively, electrode is formed on the epitaxial wafer.
The advantageous effect that technical solution provided in an embodiment of the present invention is brought is：
By adding the second wiring layers between protective layer and original first wiring layers, the second wiring layers include multiple the
One sublayer and multiple second sublayers, the second sublayer are Al films, can increase the thickness of Al films in entire wiring layers, reduce chip
Voltage.Multiple second sublayers and multiple first sublayers are alternately laminated simultaneously, and the first sublayer is Ni films, can play partition Al films
Effect avoids Al film layers from being spread since thickness is too big to surrounding；And the material of Ni films is harder, and Ni is intermembranous every being inserted in Al
In film, it is also beneficial to maintain the form of Al film entirety, improves the appearance of chip, avoid that chip is caused to leak electricity.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is a kind of structure diagram for light-emitting diode chip for backlight unit that the embodiment of the present invention one provides；
Fig. 2 is the structure diagram for the second wiring layers that the embodiment of the present invention one provides；
Fig. 3 is the schematic diagram for the homonymy electrode chip that the embodiment of the present invention one provides；
Fig. 4 is a kind of flow chart of the production method of light-emitting diode chip for backlight unit provided by Embodiment 2 of the present invention；
Fig. 5 a- Fig. 5 e are the structure diagrams of production method manufacturing process chips provided by Embodiment 2 of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
An embodiment of the present invention provides a kind of light-emitting diode chip for backlight unit, Fig. 1 is the structural representation of light-emitting diode chip for backlight unit, is joined
See Fig. 1, which includes epitaxial wafer 10 and electrode 20, and electrode 20 includes adhesion layer 21, protective layer 22 and first
Wiring layers 23, adhesion layer 21,22 and first wiring layers 23 of protective layer are sequentially laminated on epitaxial wafer 10.
In the present embodiment, the first wiring layers 23 are Al films.As shown in Figure 1, the light-emitting diode chip for backlight unit further includes second
Wiring layers 24, the second wiring layers 24 are arranged between 22 and first wiring layers 23 of protective layer.Fig. 2 is that the structure of the second wiring layers is shown
It is intended to, referring to Fig. 2, the second wiring layers 24 include multiple first sublayer 24a and multiple second sublayer 24b, multiple first sublayer 24a
It is alternately laminated in multiple second sublayer 24b on protective layer 22, each first sublayer 24a is Ni films, and each second sublayer 24b is
Al films.
During specific implementation, the first sublayer, the second sublayer, the first sublayer, the second son can be stacked gradually on the protection layer
Layer ..., it so cycles, forms the second wiring layers；The second sublayer, the first sublayer, can also be stacked gradually on the protection layer
Two sublayers, the first sublayer ..., so cycle, formed the second wiring layers.
It should be noted that in electrode 20, adhesion layer 21 is used to electrode 20 being adhered to epitaxial wafer 10；Protective layer 22
For being coated on outside adhesion layer 21, adhesion layer 21 is protected；First wiring layers 23 and the second wiring layers 24 are used for and bonding wire
With reference to realization routing.Wherein, routing (English：Wire Bonding), pressure welding, binding, bonding, wire bond are also referred to as, refers to use
Wire (such as gold thread, aluminum steel) using hot pressing or the ultrasonic energy, is completed solid-state circuit internal mutual in microelectronic component and is connected
The connection of line refers specifically to the connection between chip and circuit or lead frame here.
The embodiment of the present invention between protective layer and original first wiring layers by adding the second wiring layers, the second routing
Layer includes multiple first sublayers and multiple second sublayers, and the second sublayer is Al films, can increase the thickness of Al films in entire wiring layers
Degree reduces the voltage of chip.Multiple second sublayers and multiple first sublayers are alternately laminated simultaneously, and the first sublayer is Ni films, can be with
Play the role of separating Al films, Al film layers is avoided to be spread since thickness is too big to surrounding；And the material of Ni films is harder, Ni
It is intermembranous every being inserted in Al films, be also beneficial to maintain Al film entirety form, improve the appearance of chip, avoid that chip is caused to leak
Electricity.
Optionally, the thickness of the second wiring layers 24 can be 1 μm~3 μm.If the thickness of the second wiring layers 24 is less than 1 μm,
The then variation unobvious of possible chip voltage, are unable to reach the effect for reducing chip voltage；If the thickness of the second wiring layers 24 is big
In 3 μm, then possible increased Al films are too thick, have been unable to control the diffusion of Al films, have influenced the appearance of chip；But also material can be caused
The waste of material increases production cost.Preferably, the thickness of the second wiring layers 24 can be 2 μm.
Optionally, the quantity of the first sublayer 24a is identical with the quantity of the second sublayer 24b, and the quantity of the second sublayer 24b can be with
For 3~5；If the quantity of the second sublayer 24b is less than 3, the variation unobvious of possible chip voltage are unable to reach reduction
The effect of chip voltage；If the quantity of the second sublayer 24b is more than 5, possible increased Al films are too thick, have been unable to control Al films
Diffusion, influence the appearance of chip.Preferably, the quantity of the second sublayer 24b can be 5.
Optionally, the thickness of the first sublayer 24a can be 30nm~500nm.If the thickness of the first sublayer 24a is less than
30nm may then be unable to control the diffusion of Al films, influence the appearance of chip；If the thickness of the first sublayer 24a is more than 500nm,
The waste of material may be caused, increases production cost.Preferably, the thickness of the first sublayer 24a can be 300nm.
Optionally, the thickness of the second sublayer 24b can be 30nm~500nm.If the thickness of the second sublayer 24b is less than
30nm then possibly can not effectively reduce the voltage of chip；If the thickness of the second sublayer 24b is more than 500nm, Al films may be caused
Diffusion influences the appearance of chip.Preferably, the thickness of the second sublayer 24b can be 300nm.
Optionally, the thickness of the first wiring layers 23 can be 1 μm~3 μm.If the thickness of the first wiring layers 23 is less than 1 μm,
Then since thickness is too thin the voltage of chip may be caused higher；It, may be due to if the thickness of the first wiring layers 23 is more than 3 μm
Thickness is too thick, and Al films is caused to be spread due to being squeezed larger to surrounding, the bad order of chip or even chip are caused to leak
Electricity.Preferably, the thickness of the first wiring layers 23 can be 2 μm.
Specifically, adhesion layer 21 can be Cr films, Ni films or Ti films.The adhesion strength of Cr films, Ni films and Ti films is all preferable,
Electrode can be fixed on epitaxial wafer；Wherein, the adhesion strength of Cr films is optimal, is most common adhesion layer, and cost of implementation is low.
Optionally, the thickness of adhesion layer 21 can be 1nm~5nm.It, may be by if the thickness of adhesion layer 21 is less than 1nm
Too thin in thickness, adhesion strength is limited, and electrode can not be fixed on epitaxial wafer；It, may if the thickness of adhesion layer 21 is more than 5nm
Since thickness is too thick, protective layer can not effectively protect adhesion layer, and adhesion layer reacts with air to be caused under adhesion strength
Electrode, can not also be fixed on epitaxial wafer by drop；But also excessive light may be absorbed, the light extraction efficiency of chip is reduced, is made
Into the waste of material, increase production cost.Preferably, the thickness of adhesion layer 21 can be 3nm.
Specifically, protective layer 22 can be Ti films, Ni films or Cr films.In practical applications, protective layer is adopted with adhesion layer
With the different film of material, itself is avoided to react with air and influences adhesion layer；Wherein, Ti films are least easily with air or having
Evil solution reacts, and can realize effective protection to adhesion layer.
Optionally, the thickness of protective layer 22 can be 5nm~500nm.It, may if the thickness of protective layer 22 is less than 2nm
Since thickness is too thin, adhesion layer can not be effectively protected；If the thickness of protective layer 22 is more than 500nm, the wave of material may be caused
Take, increase production cost.Preferably, the thickness of protective layer 22 can be 80nm.
Optionally, as shown in Figure 1, electrode 20 can also include reflector layer 25, reflector layer 25 is arranged on adhesion layer 21 and protects
Between sheath 22.By setting reflector layer on adhesion layer, the light of directive electrode can be reflected back as far as possible, avoid light
Line is absorbed by the electrode, and improves the light extraction efficiency of chip.
Specifically, reflector layer 25 can be Al films.The reflectivity of Al is very high, can realize the reflection of most of light.
Preferably, the thickness of reflector layer 25 can be 50nm~150nm.If the thickness of reflector layer 25 is less than 50nm, can
Can be too thin due to thickness, it can not effectively realize the reflection of light；If the thickness of reflector layer 25 is more than 150nm, may hinder to protect
Protection of the sheath to adhesion layer, causes electrode that can not be fixed on epitaxial wafer, it is also possible to cause the waste of material, increase is produced into
This.It is highly preferred that the thickness of reflector layer 25 can be 150nm.
Optionally, as shown in Figure 1, electrode 20 can also include stress equilibrium layer 26, stress equilibrium layer 26 is arranged on protection
Between 22 and second wiring layers 24 of layer.By setting stress equilibrium layer among electrode, can balance between multiple metal films
Stress match, ensure the quality of electrode entirety, improve the reliability of electrode.
Specifically, stress equilibrium layer 26 can be Ni films.
Preferably, the thickness of stress equilibrium layer 26 can be 150nm~800nm.If the thickness of stress equilibrium layer 26 is less than
150nm then may can not effectively play the effect of equilibrium stress since thickness is too thin；If the thickness of stress equilibrium layer 26 is more than
800nm then easily causes abnormal appearance since its easy agglomeration generates the electrode stain of big.It is highly preferred that stress equilibrium layer
26 thickness can be 150nm.
Further, as shown in Figure 1, electrode 20 can also include separation layer 27, separation layer 27 is arranged on stress equilibrium layer
26 and second between wiring layers 24.By setting separation layer 27 between 26 and second wiring layers 24 of stress equilibrium layer, on the one hand
The agglomeration of Ni films can be inhibited, on the other hand Al films and Ni films can also be isolated, prevent Al films in reunion
Island growth is carried out in Ni metallic particles.
Optionally, separation layer 27 can be Ti films or Cr films.By using the Ti films different from Al films and Ni films, thus
Realize the isolation of Al films and Ni films；Wherein, the property of Ti films is more stable, can effectively play the effect of isolation.
Preferably, the thickness of separation layer 27 can be 5nm~500nm.It, may if the thickness of separation layer 27 is less than 5nm
It can not inhibit the agglomeration of Ni films and isolation Al films since thickness is too thin；If the thickness of separation layer 27 is more than 500nm, can
The waste of material can be caused, increases production cost.It is highly preferred that the thickness of separation layer 27 can be 120nm.
In practical applications, in two layers be successively stacked in electrode, be stacked afterwards one layer except covering formerly be stacked one
On the upper surface of layer, can also it cover on one layer of side being formerly stacked, so as to which be first stacked one layer of entirety all be coated,
Realize effective protection to being first stacked one layer.As shown in Figure 1, adhesion layer 21 is layered at first on the upper surface of epitaxial wafer 10,
The reflector layer 25 being stacked after adhesion layer 21 is covered on the upper surface and side of adhesion layer 21, is stacked after reflector layer 25
Protective layer 22 is covered on the upper surface and side of reflector layer 25, and the stress equilibrium layer 26 being stacked after protective layer 22 is covered in
On the upper surface and side of protective layer 22, the separation layer 27 being stacked after stress equilibrium layer 26 is covered in stress equilibrium layer 26
On upper surface and side, the second wiring layers 24 being stacked after separation layer 27 are covered in the upper surface and side of separation layer 27
On, the first wiring layers 23 being stacked after the second wiring layers 24 are covered on the upper surface and side of the second wiring layers 24, from
And realize the protection layer by layer of electrode interior.
The relative position between evaporated device and epitaxial wafer specifically can be adjusted during electrode is formed, in realization
State covered effect.For example, keep the position of evaporated device constant, during each layer of electrode is formed, by epitaxial wafer edge to steam
Coating apparatus moves for the circular arc line in the center of circle, makes the different zones deposition of electrode material of the upper surface of evaporated device alignment epitaxial wafer,
And electrode material beginning and end be all inclined deposition on the upper surface of epitaxial wafer, so as to be formed between side and bottom surface
Angle be acute angle layer, one layer be stacked afterwards, which can be laid with, to be formerly stacked on one layer of side, realize it is above-mentioned after be stacked one
Layer is by be first stacked one layer of integral coating.
Preferably, the angle between side and bottom surface can be 70 °~80 °.
It should be noted that above-mentioned upper surface and side states for the disposing ways of Fig. 1 chips, it is specific
It says, upper surface refers to the surface for being located at top in Fig. 1, and lower surface refers to the surface for being located at bottom in Fig. 1, and side refers to except upper table
Surface beyond face and lower surface.That is, if by the chip upside down in Fig. 1, above-mentioned upper surface is reformed into the bottom of positioned at
The surface in portion.
In the concrete realization, as shown in Figure 1, electrode 20 will not be usually arranged in the whole region of epitaxial wafer 10, in order to
The region that electrode 20 is not provided with to epitaxial wafer 10 is protected, generally can epitaxial wafer 10 be not provided with electrode 20 region,
And the side of electrode 20 sets passivation layer 30.Specifically, passivation layer 30 can be silicon dioxide layer.
In practical applications, epitaxial wafer mainly includes n type semiconductor layer, luminescent layer and p type semiconductor layer, N-type semiconductor
The hole that the electronics and p type semiconductor layer that layer provides provide injects luminescent layer under the driving of electric current and carries out recombination luminescence.Therefore,
N type semiconductor layer and p type semiconductor layer can all set electrode, and the electrode being arranged on n type semiconductor layer is known as N-type electrode, if
The electrode put on p type semiconductor layer is known as P-type electrode.The structure of N-type electrode and P-type electrode can as, can also differ
Sample.Electrode in the present invention can be N-type electrode, or P-type electrode.
Further, N-type electrode and P-type electrode can be separately positioned on the both sides of epitaxial wafer, and the chip formed at this time can
To be known as heteropleural electrode chip；N-type electrode and P-type electrode can also be arranged on the same side of epitaxial wafer, the chip formed at this time
It is properly termed as homonymy electrode chip.Further, since the hole that p type semiconductor layer provides is not easily moveable, and P-type electrode is usually all
It is arranged on the subregion of p type semiconductor layer, in order to make the current expansion that P-type electrode is injected to the entire of p type semiconductor layer
On region, layer of transparent conductive film can be generally set on p type semiconductor layer, to extend electric current.
By taking homonymy electrode chip as an example, Fig. 3 is the structure diagram of homonymy electrode chip, and referring to Fig. 3, chip includes extension
Piece 10, N-type electrode 20a, P-type electrode 20b, transparent conductive film 40 and passivation layer 30.Wherein, epitaxial wafer includes substrate 11, N-type
Semiconductor layer 12, luminescent layer 13 and p type semiconductor layer 14, n type semiconductor layer 12, luminescent layer 13 and p type semiconductor layer 14 are successively
It is stacked on the substrate 11, p type semiconductor layer 14 is equipped with the groove 50 for extending to n type semiconductor layer 12, and N-type electrode 20a is set
On n type semiconductor layer 12 in groove 50.Transparent conductive film 40 is arranged on p type semiconductor layer 14, and P-type electrode 20b is set
It puts on transparent conductive film 40.Passivation layer 30 is arranged on other in addition to N-type electrode 20a and P-type electrode 20b regions
On region.At least one structure in N-type electrode 20a and P-type electrode 20b is identical with the structure of electrode 20.
Specifically, substrate 11 can be Sapphire Substrate, and n type semiconductor layer 12 can be n type gallium nitride layer, and p-type is partly led
Body layer 14 can be p-type gallium nitride layer；Luminescent layer 13 can include multiple Quantum Well and multiple quantum and build, multiple Quantum Well and more
A quantum builds alternately laminated setting, and Quantum Well is indium gallium nitrogen layer, and quantum is built for gallium nitride layer；The material of transparent conductive film 40 can
With using tin indium oxide (English：Indium Tin Oxides, referred to as：ITO), the ZnO transparent conductive glass of aluminium doping
(AZO), the ZnO transparent conductive glass (GZO) of gallium doping, indium gallium zinc oxide (English：Indium Gallium Zinc
Oxide, referred to as：IGZO), one kind in ZnO.
Further, lost between Sapphire Substrate and gallium nitride material there are larger lattice mismatch in order to alleviate lattice
Match somebody with somebody, generally can buffer layer be set between substrate 11 and n type semiconductor layer 12.Specifically, buffer layer can be aln layer,
It can be gallium nitride layer.
Embodiment two
An embodiment of the present invention provides a kind of production methods of light-emitting diode chip for backlight unit, are provided suitable for making embodiment one
Light-emitting diode chip for backlight unit.Fig. 4 is the flow chart of production method, and referring to Fig. 4, which includes：
Step 201：One epitaxial wafer is provided.
In the present embodiment, epitaxial wafer includes substrate, n type semiconductor layer, luminescent layer and p type semiconductor layer.
Specifically, which can include：
Using metallo-organic compound chemical gaseous phase deposition technology (English：Metal Organic Chemical Vapor
Deposition, referred to as：MOCVD n type semiconductor layer, luminescent layer, p type semiconductor layer) are grown successively on substrate.
Fig. 5 a are the structure diagram of chip after step 201 performs.Wherein, 11 be substrate, and 12 be n type semiconductor layer,
13 be luminescent layer, and 14 be p type semiconductor layer.As shown in Figure 5 a, n type semiconductor layer 12, luminescent layer 13, p type semiconductor layer 14 according to
It is secondary to be layered on substrate 11.
Or by taking homonymy electrode chip as an example, after step 201, groove can be formed, specific forming process can include：
The first step forms the photoresist of the first figure using photoetching technique on p type semiconductor layer；
Under the protection of the photoresist of the first figure, dry etching is carried out to p type semiconductor layer and luminescent layer for second step,
Form the groove that n type semiconductor layer is extended to from p type semiconductor layer；
3rd step removes the photoresist of the first figure.
Wherein, the photoresist of the first figure is covered in the region in addition to groove position on p type semiconductor layer, so as to
Dry etching does not have the p type semiconductor layer of photoresist covering and luminescent layer to form groove.
Fig. 5 b are the structure diagram of chips after groove is formed, wherein, 50 be groove.As shown in Figure 5 b, groove 50
N type semiconductor layer 12 is extended to from p type semiconductor layer 14.
In practical applications, when forming the photoresist of certain figure, one layer of photoresist can be first laid with, then in mask plate
Block it is lower photoresist is exposed, finally by after exposure photoresist impregnate in developer solution, part photoresist is dissolved in aobvious
In shadow liquid, the photoresist of required figure is left.
Further, which can also include transparent conductive film, and specific forming process can include：
The first step is laid with transparent conductive material on the n type semiconductor layer in p type semiconductor layer and groove；
Second step forms the photoresist of second graph using photoetching technique on the transparent conductive material of laying；
Under the protection of the photoresist of second graph, wet etching, shape are carried out to the transparent conductive material of laying for 3rd step
Into transparent conductive film；
4th step removes the photoresist of second graph.
Wherein, the photoresist of second graph is covered on p type semiconductor layer the position where transparent conductive film, to go
Except the transparent conductive material in other regions, the transparent conductive film of shape needed for formation.
Fig. 5 c are the structure diagram of chip after transparent conductive film is formed.Wherein, 40 be transparent conductive film.Such as figure
Shown in 5c, transparent conductive film 40 is arranged on p type semiconductor layer 14.
Step 202：Electrode is formed in extension on piece.
In the present embodiment, electrode includes adhesion layer, protective layer, the first wiring layers and the second wiring layers, adhesion layer, protection
Layer, the second wiring layers and the first wiring layers are sequentially laminated on epitaxial wafer；First wiring layers are Al films, and the second wiring layers include more
A first sublayer and multiple second sublayers, multiple first sublayers and multiple second sublayers are alternately laminated on the protection layer, Ge Ge
One sublayer is Ni films, and each second sublayer is Al films.
Specifically, which can include：
Epitaxial wafer is put into magnetron sputtering chamber, magnetron sputtering chamber is vacuumized；
Nitrogen is passed through to magnetron sputtering intracavitary；
In a nitrogen atmosphere, different targets is sputtered successively, electrode is formed in extension on piece.
Exemplified by forming the second wiring layers, first Ni targets can be sputtered, form first Ni film on the protection layer；Again
Al targets are sputtered, first Al film is formed on first Ni film；Then Ni targets are sputtered again, in first Al film
Second Ni film ... ... of upper formation, is so cycled, and forms the second wiring layers.
It is readily apparent that, the forming process of other each layers is similar with the above process in electrode.For example, first to forming adhesion layer
Target (such as Cr targets) is sputtered, and adhesion layer is formed on epitaxial layer；The target (such as Ti films) for forming protective layer is splashed again
It penetrates, protective layer is formed on adhesion layer.
During specific implementation, since electrode is arranged on the subregion of epitaxial wafer, and material meeting when being sputtered to target
It is deposited in the whole region of epitaxial wafer, therefore is also needed in electrode formation process graphically, include being arranged on electrode below
Exemplified by the P-type electrode and N-type electrode of homonymy electrode chip, the forming process of electrode is illustrated.Specifically, the formation of electrode
Journey can include：
The first step forms the 3rd figure using photoetching technique on the n type semiconductor layer in transparent conductive film and groove
Photoresist；
Second step is laid with electrode material on the photoresist, transparent conductive film and n type semiconductor layer of the 3rd figure；
3rd step removes the photoresist of the 3rd figure, and the electrode material on transparent conductive film forms P-type electrode, N-type half
Electrode material in conductor layer forms N-type electrode.
Wherein, the process for being laid with electrode material is above-mentioned to carry out sputtering to different targets successively and form the mistake of electrode
Journey.The photoresist of 3rd figure is covered on the region in addition to P-type electrode and N-type electrode position, so as in the 3rd figure
Shape photoresist removal after, the point electrode material of the photoresist uncovered area of the 3rd figure is left, formed P-type electrode and
N-type electrode.
Fig. 5 d are the structure diagram of chip after electrode is formed, wherein, 20a is N-type electrode, and 20b is P-type electrode.Such as
Shown in Fig. 5 d, N-type electrode 20a is arranged on n type semiconductor layer 12, and P-type electrode 20b is arranged on p type semiconductor layer 14.
Further, which can also include passivation layer, and specific forming process can include：
The first step is laid with passivation material on the n type semiconductor layer in transparency conducting layer, P-type electrode, N-type electrode and groove
Material；
Second step forms the photoresist of the 4th figure using photoetching technique on the passivating material of laying；
3rd step under the protection of the photoresist of the 4th figure, carries out wet etching to the passivating material of laying, is formed blunt
Change layer；
4th step removes the photoresist of the 4th figure.
Wherein, the photoresist of the 4th figure is covered in the position where P-type electrode and N-type electrode, to remove P-type electrode
With the passivation layer in N-type electrode, expose P-type electrode and N-type electrode carries out routing.
Fig. 5 e are the structure diagram of chip after passivation layer formation, wherein, 30 be passivation layer.As depicted in fig. 5e, it is passivated
Layer 30 is arranged on other regions in addition to the region where N-type electrode 20a and P-type electrode 20b.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all the present invention spirit and
Within principle, any modifications, equivalent replacements and improvements are made should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of light-emitting diode chip for backlight unit, the light-emitting diode chip for backlight unit includes epitaxial wafer and electrode, and the electrode includes adherency
Layer, protective layer and the first wiring layers, the adhesion layer, the protective layer and first wiring layers are sequentially laminated on the extension
On piece, first wiring layers are Al films, which is characterized in that the light-emitting diode chip for backlight unit further includes the second wiring layers, described
Second wiring layers are arranged between the protective layer and first wiring layers, and second wiring layers include multiple first sublayers
With multiple second sublayers, the multiple first sublayer and the multiple second sublayer are alternately laminated on the protective layer, each
First sublayer is Ni films, and each second sublayer is Al films.
2. light-emitting diode chip for backlight unit according to claim 1, which is characterized in that the thickness of second wiring layers is 1 μm
~3 μm.
3. light-emitting diode chip for backlight unit according to claim 1 or 2, which is characterized in that the quantity of first sublayer and institute
State that the quantity of the second sublayer is identical, the quantity of second sublayer is 3~5.
4. light-emitting diode chip for backlight unit according to claim 1 or 2, which is characterized in that the thickness of first sublayer is
30nm~500nm.
5. light-emitting diode chip for backlight unit according to claim 1 or 2, which is characterized in that the thickness of second sublayer is
30nm~500nm.
6. light-emitting diode chip for backlight unit according to claim 1 or 2, which is characterized in that the electrode further includes reflector layer, institute
Reflector layer is stated to be arranged between the adhesion layer and the protective layer.
7. light-emitting diode chip for backlight unit according to claim 1 or 2, which is characterized in that the electrode further includes stress equilibrium
Layer, the stress equilibrium layer are arranged between the protective layer and second wiring layers.
8. light-emitting diode chip for backlight unit according to claim 7, which is characterized in that the electrode further includes separation layer, described
Separation layer is arranged between the stress equilibrium layer and second wiring layers.
9. a kind of production method of light-emitting diode chip for backlight unit, which is characterized in that the production method includes：
One epitaxial wafer is provided；
Electrode is formed on the epitaxial wafer；
Wherein, the electrode includes adhesion layer, protective layer, the first wiring layers and the second wiring layers, the adhesion layer, the protection
Layer, second wiring layers and first wiring layers are sequentially laminated on the epitaxial wafer, and first wiring layers are Al films,
Second wiring layers include multiple first sublayers and multiple second sublayers, the multiple first sublayer and the multiple second son
Layer is alternately laminated on the protective layer, and each first sublayer is Ni films, and each second sublayer is Al films.
10. production method according to claim 9, which is characterized in that described that electrode, bag are formed on the epitaxial wafer
It includes：
The epitaxial wafer is put into magnetron sputtering chamber, the magnetron sputtering chamber is vacuumized；
Nitrogen is passed through to the magnetron sputtering intracavitary；
In a nitrogen atmosphere, different targets is sputtered successively, electrode is formed on the epitaxial wafer.
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