CN108109668A - A kind of test method of magnetic memory, device, storage medium and electronic device - Google Patents
A kind of test method of magnetic memory, device, storage medium and electronic device Download PDFInfo
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- CN108109668A CN108109668A CN201711215952.5A CN201711215952A CN108109668A CN 108109668 A CN108109668 A CN 108109668A CN 201711215952 A CN201711215952 A CN 201711215952A CN 108109668 A CN108109668 A CN 108109668A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
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- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
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Abstract
The present invention provides a kind of test method of magnetic memory, device, storage medium and electronic device, this method to include:All magnetic memories are applied with the first excitation simultaneously, and performs the write operation that data are write in all magnetic memories, wherein, the excitation value of first excitation is more than predetermined threshold, and each magnetic memory is placed in a certain equal state;After the write operation is completed, all magnetic memories are applied with the second excitation simultaneously, wherein, the excitation value of second excitation is less than the predetermined threshold;After second excitation is applied with, the data mode in each magnetic memory is read respectively;Data mode in each magnetic memory of reading determines the reading disturbance of magnetic memory.By the present invention, solving the problems, such as the test of magnetic memory present in correlation technique, time-consuming, and then reduces the effect of magnetic memory testing time.
Description
Technical field
The present invention relates to magnetic memory measuring technology, in particular to a kind of test method of magnetic memory, device,
Storage medium and electronic device.
Background technology
Based on the magnetic memory of magnetic tunnel magnetic resistance (Tunneling Magneto-Resistance, abbreviation TMR) effect,
Such as magnetic tunnel junction (Magnetic Tunneling Junction, abbreviation MTJ) device is by two layers of magnetosphere and between magnetism
Dielectric layer composition among layer.First magnetosphere (fixed bed) magnetization orientation is fixed, the second magnetosphere (free layer) magnetization orientation
It can be changed by magnetic field or electric current, and then two layers of magnetosphere is made to be in parallel or anti-parallel state, corresponding high-resistance state and low resistance
State can be used for storing information.
The memory for changing MTJ states using electric current is magnetic RAM (ST-Magnetic Random Access
Memory, abbreviation ST-MRAM), this is a kind of novel memory devices of great potential.The memory is except with circuit design letter
Single, read or write speed is fast, outside can be erasable infinitely the advantages that, compared with legacy memory such as dynamic random access memory
The sharpest edges of (Dynamic random access memory, abbreviation DRAM) are non-volatile (power-off data are not lost).
Fig. 1 is MRAM data view, and the magnetic direction of free layer (magnetic recording layer) can be by outfield (H) or write current (I)
Manipulation.When the free layer direction of magnetization is parallel or antiparallel with fixed bed, corresponding data 0 or 1 can be distinguished.The data of MRAM
Retention time is the product performance index of a necessary Accurate Determining.Data retention over time is needed through device MTJ and chip
It tests to determine.
In terms of MTJ device test, probability can be write by MTJ and is overturn generally with the dependence or magnetic of write current density
The methods of magnetic field dependence relation of rate, calculates that conventional method can only test individual devices every time, when obtaining statistics very
It takes., it is necessary to which about 200 resistance of retest become with magnetic field exemplified by overturning probability with external magnetic field magnitude relationship using magnetic field
Change curve, every curve takes about 3 seconds, i.e. the 1 device detection time is about 10 minutes.
Coordinate MTJ arrays and address decoder in chip testing, can rapidly write information one by one and then pass through introducing
External environment changes to accelerate loss of data and test, and common method has temperature accelerated method and Field Acceleration.Temperature
Accelerated method needs to toast print at different temperature, when calculating that the data of product retain by the conservation degree of test data
Between.The disadvantages of this method is to need to assume stable factor with temperature dependence, and there are unknowable errors.Field Acceleration will
It is tested under different external magnetic fields, calculates thermal stability.This method shortcoming is needed external magnetic field test equipment.
The problem of time-consuming for the test method of magnetic memory present in correlation technique not yet proposes effective at present
Solution.
The content of the invention
An embodiment of the present invention provides a kind of test method of magnetic memory, device, storage medium and electronic device, so that
Solving the problems, such as the test method of magnetic memory in correlation technique less, time-consuming.
According to one embodiment of present invention, a kind of test method of magnetic memory is provided, including:To all magnetic storages
Device applies the first excitation simultaneously, and performs the write operation that data are write in all magnetic memories, wherein, first excitation
Excitation value is more than predetermined threshold, and each magnetic memory is placed in a certain equal state;After the write operation is completed, to all
Magnetic memory applies the second excitation simultaneously, wherein, the excitation value of second excitation is less than the predetermined threshold;Being applied with
After stating the second excitation, the data mode in each magnetic memory is read respectively;According to the number in each magnetic memory of reading
The reading for determining magnetic memory according to state disturbs.
Optionally, the data mode in each magnetic memory of reading determines that the reading disturbance of magnetic memory includes:Root
The quantity of the changed magnetic memory of state is determined according to the data mode in each magnetic memory of reading;Utilize the state
The ratio of the quantity of changed magnetic memory and the quantity of all magnetic memories determines that the reading of magnetic memory disturbs.
Optionally, after the reading disturbance of magnetic memory is determined, the method further includes:By being fitted the magnetic memory
Reading disturbance and the described second excitation, determine the thermostabilization factor of magnetic memory.
Optionally, after the data mode in reading each magnetic memory respectively, the method further includes:It repeats
It is described to apply the first excitation, apply the second excitation and read the operation of the data mode in each magnetic memory;According to repetition
Data mode in each magnetic memory read determines the reading disturbance of predetermined magnetic memory.
Optionally, the data mode in each magnetic memory for repeating to read determines predetermined in all magnetic memories
The reading disturbance of magnetic memory includes:The total degree of the data mode in the predetermined magnetic memory, Yi Jigen are read in definite repetition
Determine what the state of the predetermined magnetic memory changed according to the data mode in the predetermined magnetic memory for repeating to read
Number;The number to be changed using the state of the predetermined magnetic memory is read with the repetition in the predetermined magnetic memory
Data mode total degree ratio determine the predetermined magnetic memory reading disturbance.
Optionally, after the reading disturbance of the predetermined magnetic memory is determined, the method further includes:By described in fitting
The reading disturbance and the described second excitation of predetermined magnetic memory determine the thermostabilization factor of the predetermined magnetic memory.
According to another embodiment of the invention, a kind of test device of magnetic memory is provided, including:First processing mould
Block for all magnetic memories to be applied with the first excitation, and performs the write operation that data are write in all magnetic memories,
In, the excitation value of first excitation is more than predetermined threshold;Second processing module is right for after the write operation is completed
All magnetic memories apply the second excitation, wherein, the excitation value of second excitation is less than the predetermined threshold;Read module,
For after second excitation is applied with, reading the data mode in each magnetic memory respectively;Determining module, for root
The reading for determining magnetic memory according to the data mode in each magnetic memory of reading disturbs.
Optionally, the determining module includes:First determination unit, for the number in each magnetic memory according to reading
The quantity of the changed magnetic memory of state is determined according to state;Second determination unit, for being changed using the state
The ratio of quantity of quantity and all magnetic memories of magnetic memory determine that the reading of magnetic memory disturbs.
According to another embodiment of the invention, a kind of test device of magnetic memory is provided, including:A kind of magnetic storage
The test device of device, which is characterized in that including:Intersect dot-matrix array, test electrod-array, switching group, wherein, the crosspoint
A burst of row include bit line BL groups and source line SL groups, wherein, the BL groups include the BL of two or more, the SL groups include two with
On SL, be all connected with that there are one magnetic memories between every SL in every BL and the SL groups in the BL groups;The survey
Trying electrod-array includes more than two first electrodes, each first electrode and the every BL intersected in dot-matrix array or
Every SL of person is connected one by one;The switching group includes first switch, second switch, third switch array and the 4th switch arrays,
Wherein, described first switch one end is connected to the test instrumentation for being tested each magnetic memory, and the other end is provided with two
A above one-to-one tie points of each BL with the BL groups;Described second switch one end is connected to the test instrumentation,
The other end is provided with more than two one-to-one tie points of each SL with the SL groups;3rd switch arrays include two
One-to-one 3rd switches of each BL in a above and BL groups, and each 3rd switch one end is connected to the tester
Table, the other end are connected to the BL;4th switch arrays include more than two each SL with the SL groups and correspond
The 4th switch, and it is each 4th switch one end be connected to the test instrumentation, the other end is connected to the SL.
Optionally, the magnetic memory is divided into a n1 row, the magnetic memory array of n2 row, and the BL groups include
BL quantity for the n1, the quantity for the SL that the SL groups include is the n2, wherein:Every BL goes respectively and often
The top electrode of each magnetic memory in magnetic memory is connected, every SL respectively with each magnetic memory in each column magnetic memory
Hearth electrode be connected.
Optionally, described device further includes transistor group and wordline WL groups, and the WL groups include n2 WL, the test electricity
N2 second electrode is further included in the array of pole, each second electrode is connected one by one with every WL in the WL groups respectively,
The 5th switch and the 6th switch arrays are further included in the switching group, described 5th switch one end is connected to the test instrumentation,
The other end is provided with n2 and the one-to-one tie points of n2 WL, and the 6th switch arrays include more than two and institute
One-to-one 6th switches of n2 articles of WL are stated, and each 6th switch one end is connected to the test instrumentation, the other end is connected to institute
WL is stated, wherein, each transistor in the transistor group corresponds respectively with each magnetic memory to be set, and each transistor includes
Three pins, wherein, the first pin and the second pin are respectively used to connection magnetic memory and corresponding SL, and three-prong connects with WL
It connects, every WL connects a row magnetic memory respectively.
Optionally, the test instrumentation is used for:When the switching group is in the first connection status, to all magnetic to be tested
Memory applies the first excitation, wherein, the excitation value of first excitation is more than predetermined threshold;First connection status is described the
One switch connects one to one with each BL in the BL groups, and the second switch is corresponded with each SL in the SL groups to be connected
It connects, all BL in the BL groups are in same current potential, and all SL in the SL groups are in same current potential, the intersection dot matrix
All magnetic memories in array are in the conduction state;After first excitation is applied with, to be tested deposited to all
Reservoir applies the second excitation, wherein, the excitation value of second excitation is less than the predetermined threshold;Swash being applied with described second
After encouraging, the switching group is switched to the second connection status, reads the data mode in each magnetic memory respectively, wherein,
Second connection status is that each 3rd switch in the 3rd switch arrays is corresponded with each BL in the BL groups
It connects, each 4th switch in the 4th switch arrays connects one to one with each SL in the SL groups, passes through control
The conducting state respectively switched in 3rd switch arrays and the 4th switch arrays controls the intersection dot-matrix array
In each magnetic memory conducting state.
Optionally, the test instrumentation is used for:When the switching group is in three connection status, to all magnetic to be tested
Memory applies the first excitation, wherein, the excitation value of first excitation is more than predetermined threshold, and the 3rd connection status is the 3rd
Connection status, the first switch connect one to one with each BL in the BL groups, in the second switch and the SL groups
Each SL connect one to one, it is described 5th switch connect one to one with each WL in the WL groups, the institute in the BL groups
There are BL, all SL in the SL groups and all WL in the WL groups to connect one to one, in the intersection dot-matrix array
All magnetic memories are in the conduction state;After first excitation is applied with, all memories to be tested are applied
Second excitation, wherein, the excitation value of second excitation is less than the predetermined threshold;After second excitation is applied with,
And when the switching group is in four connection status, the data mode in each magnetic memory is read respectively, wherein, described
Four connection status are that each 3rd switch in the 3rd switch arrays connects one to one with each BL in the BL groups,
Each 4th switch in 4th switch arrays connects one to one with each SL in the SL groups, the 6th switch arrays
Each 6th switch in row connects one to one with each WL in the WL groups, by controlling the 3rd switch arrays, institute
The conducting state respectively switched in the 4th switch arrays and the 6th switch arrays is stated to control the intersection dot-matrix array
In each magnetic memory conducting state.
According to still another embodiment of the invention, a kind of storage medium is additionally provided, the storage medium includes storage
Program, wherein, described program performs method described in any one of the above embodiments when running.
According to still another embodiment of the invention, a kind of electronic device is additionally provided, including memory, processor and storage
On the memory and the computer program that can run on the processor, which is characterized in that the processor passes through institute
It states computer program and performs method described in any one of the above embodiments.
By the present invention, change its state data memory due to applying excitation to magnetic memory simultaneously, then read respectively
The data of magnetic memory change state, it can be achieved that excitation and timesharing are read while all magnetic memories.Due to single magnetic storage
Actuation duration needed for device is much larger than read access time, and can solving the problems, such as the test method of magnetic storage in correlation technique, time-consuming,
Achieve the effect that reduce the magnetic storage testing time.
Description of the drawings
Attached drawing described herein is used for providing a further understanding of the present invention, forms the part of the application, this hair
Bright schematic description and description does not constitute improper limitations of the present invention for explaining the present invention.In the accompanying drawings:
Fig. 1 is MRAM data view according to embodiments of the present invention;
Fig. 2 is the MTJ magnetic aligning schematic diagrames of early stage according to embodiments of the present invention;
Fig. 3 is the flow chart of the test method of the magnetic memory of alternative embodiment according to the present invention;
Fig. 4 is the ln (P) of alternative embodiment according to the present invention and writes voltage (Vread/Vc) it is linear relationship schematic diagram;
Fig. 5 is the structure diagram of the test device of the first magnetic memory of alternative embodiment according to the present invention;
Fig. 6 is the structure diagram of the test device of second of magnetic memory of alternative embodiment according to the present invention;
Fig. 7 is the magnetic memory test method flow chart of alternative embodiment according to the present invention;
Fig. 8 is the structure diagram of the test device of the third magnetic memory of alternative embodiment according to the present invention.
Specific embodiment
The magnetic memory of early stage, such as MTJ magnetic alignings are (as shown in Figure 2) in pellicular front, non-volatile each by shape
The item opposite sex introduces.MTJ of bit member depends on for ellipse or rectangle, the data retention over time converted between parallel state and anti-parallel state
Demagnetization energy difference of the free layer along plane inner short-side direction and plane during long side direction, i.e. free layer is orientated along A or B in Fig. 2
Between potential barrier.The corresponding memory cell size of this design is larger.Therefore highdensity MRAM is needed using perpendicular magnetization material,
Such as MgO | CFB | Ta systems.Wherein, coating is metal.Conversion between vertical magnetism tunnel knot P-MTJ binary states, it is necessary to gram
It takes a potential barrier and vertically magnetizes magnetized energy difference (the picture left above in Fig. 2) in knead dough for free layer.Based on hot activation
The holding time that theory can calculate data is:τ=τ0 exp(ΔT), wherein τ0=1/f0, depending on material characteristics frequency.Cause
And data retention time is determined by thermostabilization factor Δ (thermal stability), i.e., foregoing binary states (0 or 1, correspond to respectively
Flat shape state and anti-parallel state) between energy barrier and thermal activation energy between ratio:Δ=Eb/kBT.Wherein, T is temperature, kBFor
Boltzmann constant.Wherein Eb=HkMsV/2 is proportional to equivalent anisotropy field Hk, saturation magnetization MsWith magnetic recording layer body
Product V=t*S.By testing unprocessed thin magnetic film, M can be obtainedsAnd HKEstimation, however after material is processed into device, it is special
There may be bigger differences for property parameter and film.Such as HKIt is directly related with material demagnetizing factor, and demagnetizing factor is by geometry
What shape determined, at the nanoscale, the corresponding H of different MTJKThis has bigger difference.Therefore, data retention over time needs
It tests to determine by device MTJ.
On the other hand, chip must reduce reading disturbance (such as reading one day, disturbance probability P < 10 as far as possible-6), therefore, really
It is fixed to read disturbance and need to test for a long time under small voltage, single magnetic memory device (such as single MTJ) or chip-scale test be by
A device or storage unit carry out read operation, are all extremely consumed when obtaining statistic unit information (big metering device or bit result)
When.
The present invention is set by designing a set of magnetic storage test device and corresponding magnetic storage test method by switch matrix
Meter can simultaneously turn on all magnetic memory devices (such as MTJ) state in which in a matrix to be measured.Since the actuation duration is long
(minute is longer), and it is very fast (10ns magnitudes) to test magnetic memory state.It this method solve in conventional test methodologies and meet
The problem of data retention over time and reading disturbance probabilistic testing arrived takes.Compared to conventional method, advantage of the invention is that:(1)
Measurement is fast:In this way, all individual devices thermal agitations and the thermostabilization factor in an array can be obtained, can also obtain
The statistical information of thermal agitation and the thermostabilization factor in an array.Compared to the device array and band that each MTJ has independent test electrode
The chip of address decoder, testing efficiency significantly improve.With array size N, (for example, usually N can between 100 to 10000, because
The reading state time is much smaller than the actuation duration, and corresponding improved efficiency is 10 to 103Times).(2) additional instrument is not required and sets
It is standby, it can obtain relevant parameter using standard semiconductor electric parameter detecting equipment.(3) this method is in different temperatures, different magnetic
It is still applicable in off field.
Come that the present invention will be described in detail below with reference to attached drawing and in conjunction with the embodiments.It should be noted that do not conflicting
In the case of, the feature in embodiment and embodiment in the application can be mutually combined.
It should be noted that term " first " in description and claims of this specification and above-mentioned attached drawing, "
Two " etc. be the object for distinguishing similar, without being used to describe specific order or precedence.
Key in the embodiment of the present invention be for the test method of magnetic memory in correlation technique time-consuming the problem of, carry
The test device of the magnetic memory gone out can reduce the effect of magnetic memory testing time.With reference to embodiment to the present invention
It illustrates:
A kind of test method of magnetic memory is provided in embodiments of the present invention, and Fig. 3 is according to embodiments of the present invention
The flow chart of the test method of magnetic memory, as shown in figure 3, this method comprises the following steps:
Step S302 applies all magnetic memories the first excitation, and performs and data are write in all magnetic memories
Write operation, wherein, the excitation value of first excitation is more than predetermined threshold;
Step S304 after the write operation is completed, applies all magnetic memories the second excitation, wherein, described the
The excitation value of two excitations is less than the predetermined threshold;
Step S306 after second excitation is applied with, reads the data mode in each magnetic memory respectively;
Step S308, the data mode in each magnetic memory of reading determine the reading disturbance of magnetic memory.
By above-described embodiment, change its state data memory due to applying excitation to magnetic memory simultaneously, then distinguish
The data for reading magnetic memory change state, it can be achieved that excitation and timesharing are read while all magnetic memories.Due to single magnetic
Actuation duration needed for memory is much larger than read access time, and can solving the test method of magnetic storage in correlation technique, time-consuming asks
Topic achievees the effect that reduce the magnetic storage testing time.
In one alternate embodiment, the data mode in each magnetic memory of reading determines the reading of magnetic memory
Disturbance includes:Data mode in each magnetic memory of reading determines the quantity of the changed magnetic memory of state;
Magnetic memory is determined using the ratio of the quantity of the quantity and all magnetic memories of the changed magnetic memory of the state
Read disturbance.In the present embodiment, single is tested, magnetic memory quantity/magnetic memory of the reading disturbance P=state changes of array
Sum.
In one alternate embodiment, after the reading disturbance of magnetic memory is determined, the method further includes:Pass through fitting
The reading disturbance and the described second excitation of the magnetic memory determine the thermostabilization factor of magnetic memory.In the present embodiment, due to
The electric current write-in of STT-MRAM has stochastic behaviour, and applying small voltage (or electric current) when reading data also has certain probability meeting
Change data state, this phenomenon are known as reading disturbance by operation, according to thermal agitation is theoretical and STT effects, read disturbance probability (P) and
Voltage value VreadFor read voltage and duration treadIt is related:
Wherein VcFor critical voltage, t can be seen that reading disturbance for the corresponding pulse width of read voltage from dependence formula
It is directly related to foregoing thermostabilization factor Δ.
In disturbance test is read:P < < 1
Ln (1-P)=- t/ { τ0exp(Δ(1-V/Vc))}
P=t/ { τ0exp(Δ(1-V/Vc))}
Ln (P)=ln (t/ τ0)-Δ(1-V/Vc) (3)
When being actuated to voltage or electric current, P is exactly to read disturbance with read voltage or the relation of read current.In formula (3), ln
(P) and voltage (V/V is writec) for linear relationship (as shown in figure 4, wherein Vread/VcCorresponding to V/Vc), scale factor is Δ.Logarithm
The thermostabilization factor Δ of single MTJ (=fitting line slope) or the thermostabilization factor of array can be obtained according to linear fit is carried out
Assembly average.By ln (P) and (V/Vc) carry out linear fit, thermostabilization factor Δ=fitting line slope.Data retention over time
For:τ=τ0Exp (Δ) wherein τ0~1ns is the material characteristics time.
In one alternate embodiment, after the data mode in reading each magnetic memory respectively, the above method is also
Including:First excitation of application is repeated, applies second and encourages and read the data mode in each magnetic memory
Operation;Data mode in each magnetic memory for repeating to read determines that the reading of predetermined magnetic memory disturbs.
In one alternate embodiment, the data mode in each magnetic memory for repeating to read determines that all magnetic are deposited
The reading disturbance of predetermined magnetic memory in reservoir includes:The total of the data mode in the predetermined magnetic memory is read in definite repetition
Number and the data mode in the predetermined magnetic memory for repeating to read determine the state of the predetermined magnetic memory
The number to change;The number to be changed using the state of the predetermined magnetic memory reads described predetermined with the repetition
The ratio of the total degree of data mode in magnetic memory determines the reading disturbance of the predetermined magnetic memory.In the present embodiment,
It tests being repeated several times, reading disturbance P=state changes number/retest number of single magnetic memory.
In one alternate embodiment, after the reading disturbance of the predetermined magnetic memory is determined, the above method further includes:
Disturbed by the reading for being fitted the predetermined magnetic memory and the described second excitation, determine the thermostabilization of the predetermined magnetic memory because
Son.
A kind of test device of magnetic memory is additionally provided in embodiments of the present invention, which is used to implement the above method
Step in embodiment and preferred embodiment had carried out repeating no more for explanation.As used below, term " mould
Block " can realize the combination of the software and/or hardware of predetermined function.Although the described device of following embodiment is preferably with soft
Part is realized, but the realization of the combination of hardware or software and hardware is also what may and be contemplated.
Fig. 5 is the structure diagram of the test device of the first magnetic memory according to embodiments of the present invention, should if Fig. 5 shows
Device includes following module:
First processing module 52 for all magnetic memories to be applied with the first excitation, and is performed in all magnetic memories
The write operation of data is write, wherein, the excitation value of first excitation is more than predetermined threshold;Second processing module 54, is connected to
Above-mentioned first processing module 52, for after the write operation is completed, all magnetic memories to be applied with the second excitation, wherein,
The excitation value of second excitation is less than the predetermined threshold;Read module 56 is connected to above-mentioned Second processing module 54, is used for
After second excitation is applied with, the data mode in each magnetic memory is read respectively;Determining module 58, is connected to
Read module 56 is stated, the reading disturbance of magnetic memory is determined for the data mode in each magnetic memory according to reading.
In one alternate embodiment, above-mentioned determining module 58 includes:First determination unit, for according to each of reading
Data mode in magnetic memory determines the quantity of the changed magnetic memory of state;Second determination unit, for utilizing
The ratio for stating the quantity of the changed magnetic memory of state and the quantity of all magnetic memories determines that the reading of magnetic memory disturbs.
In one alternate embodiment, after the reading disturbance of magnetic memory is determined, the method further includes:Pass through fitting
The reading disturbance and the described second excitation of the magnetic memory determine the thermostabilization factor of magnetic memory.
In one alternate embodiment, after the data mode in reading each magnetic memory respectively, the method is also
Including:First excitation of application is repeated, applies second and encourages and read the data mode in each magnetic memory
Operation;Data mode in each magnetic memory for repeating to read determines that the reading of predetermined magnetic memory disturbs.
In one alternate embodiment, the data mode in each magnetic memory for repeating to read determines that all magnetic are deposited
The reading disturbance of predetermined magnetic memory in reservoir includes:The total of the data mode in the predetermined magnetic memory is read in definite repetition
Number and the data mode in the predetermined magnetic memory for repeating to read determine the state of the predetermined magnetic memory
The number to change;The number to be changed using the state of the predetermined magnetic memory reads described predetermined with the repetition
The ratio of the total degree of data mode in magnetic memory determines the reading disturbance of the predetermined magnetic memory.
In one alternate embodiment, after the reading disturbance of the predetermined magnetic memory is determined, the method further includes:
Disturbed by the reading for being fitted the predetermined magnetic memory and the described second excitation, determine the thermostabilization of the predetermined magnetic memory because
Son.
The test device of second of magnetic memory is additionally provided in embodiments of the present invention, referring to Fig. 6, is implemented for the present invention
A kind of test device schematic diagram for magnetic memory that example provides, the device can include intersecting dot-matrix array (in corresponding diagram 6
101) electrod-array (102 in corresponding diagram 6), switching group (103 and 104 in corresponding diagram 6), are tested, wherein, the intersection dot matrix
Array includes the bit line BL groups (BL in corresponding diagram 61,BL2BLN) and the source line SL groups (SL in corresponding diagram 61,SL2SLN), wherein,
The BL groups include the BL of two or more, and the SL groups include the SL of two or more, every BL and the SL in the BL groups
Magnetic memory (MTJ in corresponding diagram 6) there are one being all connected between every SL in group;Test electrod-array (the corresponding diagram 6
In TE1,TE2TE2N) include more than two first electrodes, each first electrode with it is described intersect it is every in dot-matrix array
BL or every SL is connected one by one;It is (corresponding that the switching group includes first switch (the switch B in corresponding diagram 6), second switch
Switch D in Fig. 6), the 3rd switch arrays (the switch A in corresponding diagram 61,A2AN) and the 4th switch arrays (opening in corresponding diagram 6
Close C1,C2CN), wherein, described first switch one end is connected to the test instrumentation for being tested each magnetic memory, another
End is provided with more than two one-to-one tie points of each BL with the BL groups;Described second switch one end is connected to described
Test instrumentation, the other end are provided with more than two one-to-one tie points of each SL with the SL groups;3rd switch
Array includes one-to-one 3rd switches of each BL in the more than two and BL groups, and each 3rd switch one end is connected to institute
Test instrumentation is stated, the other end is connected to the BL;4th switch arrays include more than two each SL with the SL groups
One-to-one 4th switch, and each 4th switch one end is connected to the test instrumentation, the other end is connected to the SL.At this
In embodiment, magnetic memory (such as MTJ) is by free magnetic layer, insulating layer, magnetic fixed bed composition.The fixed bed direction of magnetization is consolidated
It is fixed, and free layer can be manipulated there are two types of different orientation by voltage or electric current;Two direction of magnetizations of free layer correspond to two layers of magnetic respectively
Change direction parallel (data 0) or antiparallel (data 1).Every bit line BL is connected respectively with 1 row's MTJ top electrodes;Every 1 source line SL
It is connected respectively with 1 row MTJ hearth electrodes.Thus MTJ arrays (101) are formed.It therefore, can be unique by 1 bit line and 1 source line
The MTJ device for choosing intersection.Every bit line or source line are connected to 1 test electrode (102).Wherein, testing electrode can
To be compatible standard electric parameter detecting (WAT), test electrode can be ranked a row by Fig. 6, it is possibility to have any other row
Put mode.Realize that test electrode and switch matrix (103) connect by probe.Bit line BL1 to BLN is by switching A1 to AN and opening
It closes matrix 104 to connect, can also be connected together by B, then be connected with switch matrix 104.Source line SL1 to SLN is by switching C1 extremely
CN and switch matrix 104 connect, and can also be connected together by D, then are connected with switch matrix 104.Switch matrix 104 realizes test
The interconnection of instrument and array, so as to apply voltage signal or read each MTJ states.Switch matrix 103 and 104 can be single
Switch matrix realizes the function of two matrixes.103 and 104 functions are desirably integrated into together, are replaced by an individual module.
In one alternate embodiment, above-mentioned magnetic memory is divided into a n1 row, the magnetic memory array of n2 row, institute
The quantity for the BL that BL groups include is stated as the n1, the quantity for the SL that the SL groups include is the n2, wherein:It is every described
Top electrodes of the BL respectively with each magnetic memory in often row magnetic memory is connected, every SL respectively in each column magnetic memory
The hearth electrode of each magnetic memory be connected.
In one alternate embodiment, when the switching group is in the first connection status, all magnetic memories are applied
First excitation, wherein, the excitation value of first excitation is more than predetermined threshold so that all magnetic memory cells are in a certain
Equal state.First connection status is that the first switch connects one to one with each BL in the BL groups, and described second opens
Pass connects one to one with each SL in the SL groups, and all BL in the BL groups and all SL mono- in the SL groups are a pair of
It should connect, all magnetic memories in the intersection dot-matrix array are in the conduction state;It is being applied with first excitation
Afterwards, all magnetic memories are applied with the second excitation, wherein, the excitation value of second excitation is less than the predetermined threshold, should
Excitation has the state that certain probability changes single storage unit;After second excitation is applied with, and in the switching group
During in the second connection status, the data mode in each magnetic memory is read respectively, wherein, second connection status is institute
Each 3rd switch stated in the 3rd switch arrays connects one to one with each BL in the BL groups, the 4th switch arrays
In each 4th switch connect one to one with each SL in the SL groups, by controlling the 3rd switch arrays and described
The conducting state respectively switched in 4th switch arrays controls leading for each magnetic memory in the intersection dot-matrix array
Logical state.By controlling the switch connected state control in first switch, second switch, third switch array and the 4th switch arrays
The connected state of magnetic memory in crosspoint array processed, and then magnetic memory is tested.In the present embodiment, cubicle switchboard
Battle array 103 is in B and D positions so that the active line of all bit lines and institute connects together respectively.It is led respectively using switch matrix 2 (104)
Lead to all MTJ (BL, SL) electrodes up and down.Write (initialization) all MTJ array status.Under current read voltage value, to specify
Time span applies voltage drive to all MTJ, can be one or many excitations.Switch matrix 1 selected as A1 ... AN, C1 ...
CN.Turn on single MTJ one by one using switch matrix 2, read all MTJ states, when in switch matrix 103 A1 to AN, C1 to CN,
When T1 to TN is turned on, single MTJ can be chosen respectively by switch matrix 104, such as:Conducting A1, C1, T1 then uniquely choose Fig. 6
The magnetic memory device in the upper left corner.The step of to its different read voltage value or repeating following (2)-(5) by testing time
Operation.It obtains array or single MTJ reads variation relation of the disturbance with the condition of reading.(read voltage, time span, cumulative time length
Deng) according to correlation model progress data analysis.Utilize the thermal agitation theoretical calculation thermostabilization factor and data hold time.It ties below
Unify a specific embodiment to illustrate the present invention, be illustrated in figure 7 the magnetic memory test method flow chart of the present invention, below
Illustrate the testing procedure of magnetic memory in the present embodiment with reference to the flow chart:(1) test initialization can generate test and excitation item
Part list.Such as driving voltage, pulse width repeats to apply the lists (S701 in corresponding diagram 7) such as number.(2) switch matrix 1 selects
For B, D.All above and below MTJ (BL, SL) electrode (S702 in corresponding diagram 7) is respectively turned on using switch matrix 2.(3) write-in is (initial
Change) all MTJ array status (S703 in corresponding diagram 7).(4) under the conditions of current reading excitation, it is (right that excitation is applied to all MTJ
Answer S704 in Fig. 7).(5) 1 selected as A1 ... AN, C1 ... CN of switch matrix.Single MTJ is turned on one by one using switch matrix 2, is read
Take all MTJ states.Turn-on sequence is arbitrary (S705 in corresponding diagram 7).(6) according to condition list, with different excitation conditions into
The step of row (2)-(5), operates (S706 in corresponding diagram 7).(7) obtain and read disturbance (the MTJ ratios of state change) with excitation condition
Variation relation.(driving voltage, time span, cumulative time length etc.) carries out data analysis according to correlation model.Including but
It is not limited only to utilize the thermal agitation theoretical calculation thermostabilization factor and data hold time.It can also utilize other theoretical into line number
According to analysis (S707 in corresponding diagram 7).
The test device of the third magnetic memory is additionally provided in embodiments of the present invention, referring to Fig. 8, is implemented for the present invention
The test device schematic diagram for another magnetic memory that example provides, the device can include intersecting dot-matrix array (in corresponding diagram 8
101) electrod-array (102 in corresponding diagram 8), switching group (103 and 104 in corresponding diagram 8), are tested, wherein, the intersection dot matrix
Array includes the bit line BL groups (BL in corresponding diagram 81,BL2BLN) and the source line SL groups (SL in corresponding diagram 81,SL2SLN), wherein,
The BL groups include the BL of two or more, and the SL groups include the SL of two or more, every BL and the SL in the BL groups
Magnetic memory (MTJ in corresponding diagram 8) there are one being all connected between every SL in group;The test electrod-array includes two
More than first electrode, each first electrode are connected one by one with the every BL intersected in dot-matrix array or every SL;
The switching group includes first switch (the switch B in corresponding diagram 8), second switch (the switch D in corresponding diagram 8), the 3rd switch
Array (the switch A in corresponding diagram 81,A2AN) and the 4th switch arrays (the switch C in corresponding diagram 81,C2CN), wherein, described
One switch one end is connected to test instrumentation for being tested each magnetic memory, the other end be provided with it is more than two with it is described
The one-to-one tie points of each BL in BL groups;Described second switch one end is connected to the test instrumentation, and the other end is provided with
More than two one-to-one tie points of each SL with the SL groups;3rd switch arrays include it is more than two with it is described
One-to-one 3rd switches of each BL in BL groups, and each 3rd switch one end is connected to the test instrumentation, other end connection
To the BL;4th switch arrays include one-to-one 4th switches of each SL in the more than two and SL groups, and
Each 4th switch one end is connected to the test instrumentation, and the other end is connected to the SL.
In one alternate embodiment, above-mentioned magnetic memory is divided into a n1 row, the magnetic memory array of n2 row, institute
The quantity for the BL that BL groups include is stated as the n1, the quantity for the SL that the SL groups include is the n2, wherein:It is every described
Top electrodes of the BL respectively with each magnetic memory in often row magnetic memory is connected, every SL respectively in each column magnetic memory
The hearth electrode of each magnetic memory be connected.
In one alternate embodiment, above device further includes transistor group and wordline WL groups (WL in corresponding diagram 81,
WL2WLN), the WL groups include n2 WL, and n2 second electrode is further included in the test electrod-array, each second electricity
Pole is connected one by one with every WL in the WL groups respectively, and the 5th switch (switching U in corresponding diagram 8) is further included in the switching group
With the 6th switch arrays (the switch T in corresponding diagram 81,T2TN), described 5th switch one end is connected to the test instrumentation, another
End is provided with n2 and the one-to-one tie points of n2 WL, and the 6th switch arrays include the more than two and n2
One-to-one 6th switch of article WL, and each 6th switch one end is connected to the test instrumentation, the other end is connected to the WL,
Wherein:
Each transistor in the transistor group corresponds respectively with each magnetic memory to be set, and each transistor includes three
A pin, wherein, the first pin (drain electrode) and the second pin (source electrode) are respectively used to connection magnetic memory and corresponding SL, and the 3rd
Pin (grid) is connected with WL, and every WL connects a row magnetic memory respectively.
In one alternate embodiment, when the switching group is in three connection status, all magnetic memories are applied
First excitation, wherein, the excitation value of first excitation is more than predetermined threshold, and the 3rd connection status is the first switch and institute
Each BL stated in BL groups connects one to one, and the second switch connects one to one with each SL in the SL groups, and described
Five switch connect one to one with each WL in the WL groups, all BL in the BL groups, all SL in the SL groups and
All WL in the WL groups connect one to one, and all magnetic memories intersected in dot-matrix array are on shape
State;After first excitation is applied with, all magnetic memories are applied with the second excitation, wherein, second excitation swashs
Value is encouraged less than the predetermined threshold;After second excitation is applied with, and the 4th connection status is in the switching group
When, the data mode in each magnetic memory is read respectively, wherein, the 4th connection status is the 3rd switch arrays
In it is each 3rd switch connect one to one with each BL in the BL groups, each 4th in the 4th switch arrays opens
Pass connects one to one with each SL in the SL groups, in each 6th switch and the WL groups in the 6th switch arrays
Each WL connect one to one, by controlling the 3rd switch arrays, the 4th switch arrays and the 6th switch arrays
The conducting state respectively switched in row controls the conducting state of each magnetic memory in the intersection dot-matrix array.
In the present embodiment, when B, D, U are turned in switch matrix 103, can super work be carried out to all MTJ by switch matrix 104 simultaneously
With application voltage.When A1 is turned on to AN, C1 to CN, T1 to TN in switch matrix 103, can respectively be selected by switch matrix 104
In single MTJ.Such as:Conducting A1, C1, T1 then uniquely choose the MTJ device in the upper left corner.
It should be noted that above-mentioned modules can be realized by software or hardware, for the latter, Ke Yitong
In the following manner realization is crossed, but not limited to this:Above-mentioned module is respectively positioned in same processor;Alternatively, above-mentioned modules are with arbitrary
The form of combination is located in different processors respectively.
The embodiment of the present invention additionally provides a kind of storage medium, which includes the program of storage, wherein, it is above-mentioned
Program performs method described in any one of the above embodiments when running.
Optionally, in the present embodiment, above-mentioned storage medium can include but is not limited to:USB flash disk, read-only memory (Read-
Only Memory, referred to as ROM), it is random access memory (Random Access Memory, referred to as RAM), mobile hard
The various media that can store program code such as disk, magnetic disc or CD.
The embodiment of the present invention additionally provides a kind of electronic device, including memory, processor and is stored in the storage
On device and the computer program that can run on the processor, which is characterized in that the processor passes through the computer journey
Sequence performs method described in any one of the above embodiments.
Obviously, those skilled in the art should be understood that each module of the above-mentioned present invention or each step can be with general
Computing device realize that they can concentrate on single computing device or be distributed in multiple computing devices and be formed
Network on, optionally, they can be realized with the program code that computing device can perform, it is thus possible to which they are stored
Performed in the storage device by computing device, and in some cases, can be performed with the order being different from herein shown in
The step of going out or describing they are either fabricated to each integrated circuit modules respectively or by multiple modules in them or
Step is fabricated to single integrated circuit module to realize.It to be combined in this way, the present invention is not limited to any specific hardware and softwares.
The foregoing is only a preferred embodiment of the present invention, is not intended to limit the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All any modifications within the principle of the present invention, made, etc.
With replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (15)
1. a kind of test method of magnetic memory, which is characterized in that including:
All magnetic memories are applied with the first excitation simultaneously, and performs the write operation that data are write in all magnetic memories,
In, the excitation value of first excitation is more than predetermined threshold, and each magnetic memory is placed in a certain equal state;
After the write operation is completed, all magnetic memories are applied with the second excitation simultaneously, wherein, second excitation swashs
Value is encouraged less than the predetermined threshold;
After second excitation is applied with, the data mode in each magnetic memory is read respectively;
Data mode in each magnetic memory of reading determines the reading disturbance of magnetic memory.
2. according to the method described in claim 1, it is characterized in that, the data mode in each magnetic memory of reading is true
Determining the reading disturbance of magnetic memory includes:
Data mode in each magnetic memory of reading determines the quantity of the changed magnetic memory of state;
Magnetic storage is determined using the ratio of the quantity of the quantity and all magnetic memories of the changed magnetic memory of the state
The reading disturbance of device.
3. according to the method described in claim 2, it is characterized in that, determine magnetic memory reading disturbance after, the method
It further includes:
It is disturbed by the reading for being fitted the magnetic memory and described second encourages, determine the thermostabilization factor of magnetic memory.
4. according to the method described in claim 1, it is characterized in that, data mode in each magnetic memory is read respectively it
Afterwards, the method further includes:
First excitation of application is repeated, applies second and encourages and read the data mode in each magnetic memory
Operation;
Data mode in each magnetic memory for repeating to read determines that the reading of predetermined magnetic memory disturbs.
5. according to the method described in claim 4, it is characterized in that, according to the data shape in each magnetic memory for repeating reading
State determines that the reading disturbance of the predetermined magnetic memory in all magnetic memories includes:
Definite repetition is read the total degree of the data mode in the predetermined magnetic memory and is read according to repetition described pre-
Determine the data mode in magnetic memory and determine the number that the state of the predetermined magnetic memory changes;
The number to be changed using the state of the predetermined magnetic memory is read with the repetition in the predetermined magnetic memory
Data mode total degree ratio determine the predetermined magnetic memory reading disturbance.
6. according to the method described in claim 5, it is characterized in that, determine the predetermined magnetic memory reading disturbance after,
The method further includes:
It is disturbed by the reading for being fitted the predetermined magnetic memory and described second encourages, determine that the heat of the predetermined magnetic memory is steady
Determine the factor.
7. a kind of test device of magnetic memory, which is characterized in that including:
First processing module for all magnetic memories to be applied with the first excitation, and performs and writes number in all magnetic memories
According to write operation, wherein, it is described first excitation excitation value be more than predetermined threshold;
Second processing module, for after the write operation is completed, all magnetic memories to be applied with the second excitation, wherein, institute
The excitation value for stating the second excitation is less than the predetermined threshold;
Read module, for after second excitation is applied with, reading the data mode in each magnetic memory respectively;
Determining module determines the reading disturbance of magnetic memory for the data mode in each magnetic memory according to reading.
8. device according to claim 7, which is characterized in that the determining module includes:
First determination unit determines that the changed magnetic of state is deposited for the data mode in each magnetic memory according to reading
The quantity of reservoir;
Second determination unit, for utilizing the quantity of the changed magnetic memory of the state and the quantity of all magnetic memories
Ratio determine magnetic memory reading disturbance.
9. a kind of test device of magnetic memory, which is characterized in that including:Intersect dot-matrix array, test electrod-array, switch
Group, wherein,
The intersection dot-matrix array includes bit line BL groups and source line SL groups, wherein, the BL groups include the BL of two or more, described
SL groups include the SL of two or more, are all connected with that there are one magnetic between every SL in every BL and the SL groups in the BL groups
Memory;
The test electrod-array includes more than two first electrodes, and each first electrode is intersected with described in dot-matrix array
Every BL or every SL connect one by one;
The switching group includes first switch, second switch, third switch array and the 4th switch arrays, wherein, described first
Switch one end is connected to the test instrumentation for being tested each magnetic memory, and the other end is provided with the more than two and BL
The one-to-one tie points of each BL in group;Described second switch one end is connected to the test instrumentation, and the other end is provided with two
A above one-to-one tie points of each SL with the SL groups;3rd switch arrays include the more than two and BL
One-to-one 3rd switches of each BL in group, and each 3rd switch one end is connected to the test instrumentation, the other end is connected to
The BL;4th switch arrays include one-to-one 4th switches of each SL in the more than two and SL groups, and each
4th switch one end is connected to the test instrumentation, and the other end is connected to the SL.
10. the test device of magnetic memory according to claim 9, which is characterized in that the magnetic memory is divided into
One n1 row, the magnetic memory array of n2 row, the quantity for the BL that the BL groups include is the n1, what the SL groups included
The quantity of SL is the n2, wherein:
Top electrodes of the every BL respectively with each magnetic memory in often row magnetic memory is connected, and every SL is respectively and often
The hearth electrode of each magnetic memory in row magnetic memory is connected.
11. the test device of magnetic memory according to claim 10, which is characterized in that described device further includes transistor group
With wordline WL groups, the WL groups include n2 WL, n2 second electrode are further included in the test electrod-array, and each described the
Two electrodes are connected one by one with every WL in the WL groups respectively, and the 5th switch and the 6th switch arrays are further included in the switching group
Row, described 5th switch one end are connected to the test instrumentation, and it is a one-to-one with the n2 WL that the other end is provided with n2
Tie point, the 6th switch arrays include more than two the 6th switches one-to-one with the n2 articles of WL, and each 6th opens
It closing one end and is connected to the test instrumentation, the other end is connected to the WL, wherein,
Each transistor in the transistor group corresponds respectively with each magnetic memory to be set, and each transistor includes three pipes
Foot, wherein, the first pin and the second pin are respectively used to connection magnetic memory and corresponding SL, three-prong are connected with WL, often
WL connects a row magnetic memory respectively.
12. the test device of magnetic memory according to claim 10, which is characterized in that the test instrumentation is used for:
When the switching group is in the first connection status, all magnetic memories are applied with the first excitation, wherein, described first swashs
The excitation value encouraged is more than predetermined threshold;First connection status corresponds for the first switch with each BL in the BL groups to be connected
It connecing, the second switch connects one to one with each SL in the SL groups, and all BL in the BL groups are in same current potential,
All SL in the SL groups are in same current potential, and all magnetic memories intersected in dot-matrix array are on shape
State;
After first excitation is applied with, all magnetic memories are applied with the second excitation, wherein, second excitation swashs
Value is encouraged less than the predetermined threshold;
After second excitation is applied with, the switching group is switched to the second connection status, each magnetic is read respectively and deposits
Data mode in reservoir, wherein, second connection status is each 3rd switch in the 3rd switch arrays and institute
Each BL stated in BL groups connects one to one, each 4th switch in the 4th switch arrays and each SL in the SL groups
Connect one to one, by control the conducting state respectively switched in the 3rd switch arrays and the 4th switch arrays come
Control the conducting state of each magnetic memory in the intersection dot-matrix array.
13. the test device of magnetic memory according to claim 11, which is characterized in that the test instrumentation is used for:
When the switching group is in three connection status, all magnetic memories are applied with the first excitation, wherein, described first swashs
The excitation value encouraged is more than predetermined threshold, and the 3rd connection status is the 3rd connection status, in the first switch and the BL groups
Each BL connects one to one, and the second switch connects one to one with each SL in the SL groups, the 5th switch and institute
Each WL stated in WL groups connects one to one, in all BL in the BL groups, all SL in the SL groups and the WL groups
All WL connect one to one, it is described intersect dot-matrix array in all magnetic memories it is in the conduction state;
After first excitation is applied with, all magnetic memories are applied with the second excitation, wherein, second excitation swashs
Value is encouraged less than the predetermined threshold;
After second excitation is applied with, and when the switching group is in four connection status, each magnetic is read respectively
Data mode in memory, wherein, the 4th connection status is, each 3rd switch in the 3rd switch arrays with
Each BL in the BL groups connects one to one, in the 4th switch arrays it is each 4th switch with it is each in the SL groups
SL connects one to one, and each 6th switch in the 6th switch arrays is corresponded with each WL in the WL groups to be connected
Connect, by control in the 3rd switch arrays, the 4th switch arrays and the 6th switch arrays respectively switch lead
Logical state come come control it is described intersection dot-matrix array in each magnetic memory conducting state.
14. a kind of storage medium, which is characterized in that the storage medium includes the program of storage, wherein, when described program is run
Method any one of perform claim requirement 1 to 6.
15. a kind of electronic device, including memory, processor and it is stored on the memory and can transports on the processor
Capable computer program, which is characterized in that the processor performs the claims 1 to 6 by the computer program
Method described in one.
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112230112A (en) * | 2019-06-28 | 2021-01-15 | 中电海康集团有限公司 | Test structure and test method |
CN112259151A (en) * | 2019-07-22 | 2021-01-22 | 中电海康集团有限公司 | Test circuit for MRAM array |
CN112259153A (en) * | 2019-07-22 | 2021-01-22 | 中电海康集团有限公司 | Test circuit for MRAM array |
WO2021036446A1 (en) * | 2019-08-30 | 2021-03-04 | 浙江驰拓科技有限公司 | Test structure and test method |
CN112444764A (en) * | 2019-08-30 | 2021-03-05 | 中电海康集团有限公司 | Test method of turning voltage |
CN112444765A (en) * | 2019-08-30 | 2021-03-05 | 中电海康集团有限公司 | Test method of turning voltage |
CN112712846A (en) * | 2019-10-25 | 2021-04-27 | 浙江驰拓科技有限公司 | Magnetic memory test method and system |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102027549A (en) * | 2008-05-15 | 2011-04-20 | 高通股份有限公司 | Testing a memory device having field effect transistors subject to threshold voltage shifts caused by bias temperature instability |
CN103390432A (en) * | 2012-05-08 | 2013-11-13 | 三星电子株式会社 | Architecture, system and method for testing resistive type memory |
US20140056052A1 (en) * | 2012-08-23 | 2014-02-27 | Jung-Hyuk Lee | Resistive memory device performing selective refresh and method of refreshing resistive memory device |
CN104094353A (en) * | 2012-02-07 | 2014-10-08 | 高通股份有限公司 | Multi-free layer MTJ and multi-terminal read circuit with concurrent and differential sensing |
CN106782670A (en) * | 2016-11-24 | 2017-05-31 | 华中科技大学 | A kind of method of testing of MRAM environmental suitabilities |
-
2017
- 2017-11-28 CN CN201711215952.5A patent/CN108109668B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102027549A (en) * | 2008-05-15 | 2011-04-20 | 高通股份有限公司 | Testing a memory device having field effect transistors subject to threshold voltage shifts caused by bias temperature instability |
CN104094353A (en) * | 2012-02-07 | 2014-10-08 | 高通股份有限公司 | Multi-free layer MTJ and multi-terminal read circuit with concurrent and differential sensing |
CN103390432A (en) * | 2012-05-08 | 2013-11-13 | 三星电子株式会社 | Architecture, system and method for testing resistive type memory |
US20140056052A1 (en) * | 2012-08-23 | 2014-02-27 | Jung-Hyuk Lee | Resistive memory device performing selective refresh and method of refreshing resistive memory device |
CN106782670A (en) * | 2016-11-24 | 2017-05-31 | 华中科技大学 | A kind of method of testing of MRAM environmental suitabilities |
Non-Patent Citations (1)
Title |
---|
赵巍胜等: "STT-MRAM存储器的研究进展", 《中国科学》 * |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112230112A (en) * | 2019-06-28 | 2021-01-15 | 中电海康集团有限公司 | Test structure and test method |
CN112259151B (en) * | 2019-07-22 | 2022-06-24 | 中电海康集团有限公司 | Test circuit for MRAM array |
CN112259151A (en) * | 2019-07-22 | 2021-01-22 | 中电海康集团有限公司 | Test circuit for MRAM array |
CN112259153A (en) * | 2019-07-22 | 2021-01-22 | 中电海康集团有限公司 | Test circuit for MRAM array |
CN112259153B (en) * | 2019-07-22 | 2022-06-24 | 中电海康集团有限公司 | Test circuit for MRAM array |
WO2021036446A1 (en) * | 2019-08-30 | 2021-03-04 | 浙江驰拓科技有限公司 | Test structure and test method |
CN112444765A (en) * | 2019-08-30 | 2021-03-05 | 中电海康集团有限公司 | Test method of turning voltage |
CN112444764A (en) * | 2019-08-30 | 2021-03-05 | 中电海康集团有限公司 | Test method of turning voltage |
CN112712846A (en) * | 2019-10-25 | 2021-04-27 | 浙江驰拓科技有限公司 | Magnetic memory test method and system |
CN112712846B (en) * | 2019-10-25 | 2023-05-23 | 浙江驰拓科技有限公司 | Magnetic memory testing method and system |
CN113948145A (en) * | 2020-07-17 | 2022-01-18 | 长鑫存储技术有限公司 | Method and system for testing packaged chip, computer device and storage medium |
WO2022012147A1 (en) * | 2020-07-17 | 2022-01-20 | 长鑫存储技术有限公司 | Packaged chip test method and system, computer device, and storage medium |
US11862269B2 (en) | 2020-07-17 | 2024-01-02 | Changxin Memory Technologies, Inc. | Testing method for packaged chip, testing system for packaged chip, computer device and storage medium |
CN113948145B (en) * | 2020-07-17 | 2024-05-14 | 长鑫存储技术有限公司 | Method, system, computer device and storage medium for testing packaged chip |
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