CN108108848A - The training method of ratio of defects prediction model, apparatus and system - Google Patents
The training method of ratio of defects prediction model, apparatus and system Download PDFInfo
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Abstract
The application provides a kind of method of the defects of being used to train the first semiconductor chip process units in semiconductor chip production process rate prediction model, including：One or more most suitable Prediction Parameters are selected from the parameter set for the sample data that the history semiconductor chip sample data of the first semiconductor chip process units is concentrated using Logic Regression Models；And using it is selected go out one or more be most suitable for the parameter value of Prediction Parameters and train ratio of defects prediction model, the rate the defects of semiconductor chip that the ratio of defects prediction model is produced for one or more the second semiconductor chip process units for predicting positioned at the first semiconductor chip process units downstream.Using this method, rate prediction model the defects of for being used at the first semiconductor chip process units can be trained, it is possible thereby to when realizing that rate is more than predetermined threshold predict the defects of, defect maintenance processing is carried out to the first semiconductor chip process units in time.
Description
Technical field
The application is usually directed to semiconductor chip packaging field, more particularly, to for semiconductor chip to be trained to produce
The defects of the first semiconductor chip process units in the process rate prediction model method and device and for improving semiconductor
The defects of chip rate method and system.
Background technology
Semiconductor chip packaging technique usually requires to complete by a series of production procedures.Specifically, crystalline substance is being received
After circle, crystal column surface pad pasting, wafer reverse side grinding, wafer rear polishing, wafer are carried out in the front end of chip package factory first
Back side pad pasting, crystal column surface striping, wafer-baking, wafer cut, checked after cutting after cleaning, wafer cutting, ultraviolet light irradiates,
It is checked after wafer bonding, elargol curing, wire bonding, wire bonding；Then plastic packaging, modeling are carried out in the rear end of chip package factory
It is honored as a queen baking after curing, positive print, back of the body print, rib cutting, plating, plating, Trim Molding, whole survey, pin inspection, final visual inspection, finally
The processes such as quality control, baking dry, pack, shipment inspection, storage are packaged and test to chip, and final shipment is to visitor
Family.
In general, above-mentioned operation is completed using production line.Semiconductor core there are many being set on generation assembly line
Piece process units, each semiconductor chip process units correspond to one or more packaging technologies.In production, each semiconductor core
Piece process units obtains pending semiconductor core flake products and to being obtained from the semiconductor chip process units of trip disposed thereon
The semiconductor core flake products taken are handled, then by treated semiconductor core flake products are transmitted to partly leading downstream
Body chip production device is further processed.
In production, if since a kind of semiconductor chip process units breaks down and causes produced semiconductor core
There is defect in flake products, and this defective semiconductor core flake products of band can be sent to another semiconductor core downstream
Piece process units is handled, and defect inspection is being carried out in the inspection of chip package factory rear end and test step
It looks into.This means the detection for the problem in a kind of above-mentioned semiconductor chip process units be not it is real-time, by
It is carried out continuously in the production of pipeline system, so as to cause to generate substantial amounts of faulty goods, so that semiconductor chip
Yields substantially reduces.In addition, in actual production, the semiconductor chip process units for checking and testing all is only to work as
The semiconductor chip of pre-treatment carries out defect inspection, so as to judge whether semiconductor chip is qualified, can't be lacked what is found
The semiconductor chip process units that notice is fallen into trip disposed thereon carries out device maintenance in real time, so as to cause semiconductor core
Piece yields is improved.
The content of the invention
In view of the above problems, this application provides a kind of for training the first semiconductor in semiconductor chip production process
The defects of chip production device rate prediction model method and device and the defects of for improving semiconductor chip rate method
And system.It, can the history semiconductor chip sample based on the first semiconductor chip process units using this method, apparatus and system
Notebook data collection predicts mould come rate prediction model the defects of training the first semiconductor chip process units using the ratio of defects
Type, one or more second semiconductor chip process units of the prediction positioned at the first semiconductor chip process units downstream are produced
Semiconductor chip the defects of rate whether be more than predetermined threshold, to first when then rate is more than predetermined threshold predict the defects of
Semiconductor chip process units carries out defect maintenance processing, so as to improve semiconductor chip yields.
According to the one side of the application, provide a kind of for training the first half in semiconductor chip production process to lead
The defects of body chip production device rate prediction model method, including：Using Logic Regression Models come from first semiconductor
One or more are selected in the parameter set for the sample data that the history semiconductor chip sample data of chip production device is concentrated
It is most suitable for Prediction Parameters；And one gone out selected by the sample data concentrated using the history semiconductor chip sample data
Kind or the parameter values of a variety of most suitable Prediction Parameters train the ratio of defects prediction model, the ratio of defects prediction model is used for
One or more second semiconductor chip process units of the prediction positioned at the first semiconductor chip process units downstream is given birth to
The defects of semiconductor chip of output rate.
Preferably, in an example of above-mentioned aspect, the first semiconductor chip process units can be semiconductor
Chip attachment device, one or more of second semiconductor chip process units are curable epoxide devices and described partly lead
The defects of body chip, rate was protrusion of surface ratio of defects.
Preferably, in an example of above-mentioned aspect, using what the history semiconductor chip sample data was concentrated
The one or more gone out selected by sample data are most suitable for the parameter value of Prediction Parameters to train the ratio of defects prediction model
Before, the history semiconductor chip sample data set based on the first semiconductor chip process units trains the ratio of defects pre-
Surveying model can also include：Data prediction is carried out to the sample data that the history semiconductor chip sample data is concentrated；With
And it is most suitable for using the one or more gone out selected by the sample data of history semiconductor chip sample data concentration pre-
The parameter value of parameter is surveyed to train the ratio of defects prediction model that can include：It is partly led using the history after data prediction
The one or more gone out selected by the sample data that body chip sample data is concentrated are most suitable for the parameter value of Prediction Parameters to instruct
Practice the ratio of defects prediction model.
Preferably, in an example of above-mentioned aspect, using Logic Regression Models come from the parameter set of sample data
Selecting one or more most suitable Prediction Parameters can include：Using L1 regularizations Logic Regression Models and L2 regularization logics
The combination of regression model is most suitable for Prediction Parameters to select one or more from the parameter set of sample data.
Preferably, in an example of above-mentioned aspect, using what the history semiconductor chip sample data was concentrated
The one or more gone out selected by sample data are most suitable for the parameter value of Prediction Parameters to train the ratio of defects prediction model
Before, the history semiconductor chip sample data set based on the first semiconductor chip process units trains the ratio of defects pre-
Surveying model can also include：Randomization is carried out to the sample data that the history semiconductor chip sample data is concentrated, with
And it is most suitable for using the one or more gone out selected by the sample data of history semiconductor chip sample data concentration pre-
The parameter value of parameter is surveyed to train the ratio of defects prediction model that can include：It is partly led using the history after randomization
The one or more gone out selected by the sample data that body chip sample data is concentrated are most suitable for the parameter value of Prediction Parameters to instruct
Practice the ratio of defects prediction model.
Preferably, in an example of above-mentioned aspect, to the sample of history semiconductor chip sample data concentration
Data, which carry out data prediction, to be included：The bad sample data concentrated to the history semiconductor chip sample data carried out
Sampling processing, to expand the bad sample data in the history semiconductor chip data set.
Preferably, in an example of above-mentioned aspect, to the sample of history semiconductor chip sample data concentration
Data, which carry out randomization, to be included：The sample data that the history semiconductor chip sample data is concentrated is carried out again
It shuffles；Sample data after reshuffling is separated into multiple subclass；And select predetermined ratio from each subclass
Sample data composition test sample collection, and by remaining sample data form training sample set.
According to another aspect, a kind of method for the defects of improving semiconductor chip rate is provided, including：Utilize defect
Rate prediction model come predict positioned at the first semiconductor chip process units downstream the second semiconductor chip of one or more production
The defects of semiconductor chip that device is produced rate whether be more than predetermined threshold, wherein, the ratio of defects prediction model be as
The upper method training；And rate is more than the predetermined threshold predict produced semiconductor chip the defects of
When, defect maintenance processing is carried out to the first semiconductor chip process units.
It is a kind of for the first semiconductor chip in semiconductor chip production process to be trained to give birth to according on the other hand, providing
The device of the defects of producing device rate prediction model, including：Prediction Parameters selecting unit, for using Logic Regression Models come from institute
It states and is selected in the parameter set of the sample data of the history semiconductor chip sample data concentration of the first semiconductor chip process units
Go out one or more most suitable Prediction Parameters；And training unit, for using the history semiconductor chip sample data set
In sample data it is selected go out one or more be most suitable for the parameter value of Prediction Parameters the ratio of defects to be trained to predict
Model, the ratio of defects prediction model are located at the one or more in the first semiconductor chip process units downstream for predicting
The defects of semiconductor chip that second semiconductor chip process units is produced rate.
Preferably, in an example of above-mentioned aspect, the first semiconductor chip process units can be semiconductor
Chip attachment device, one or more of second semiconductor chip process units are curable epoxide devices and described partly lead
The defects of body chip, rate was protrusion of surface ratio of defects.
Preferably, in an example of above-mentioned aspect, the device can also include：Data pre-processing unit is used
It is most suitable in the one or more gone out selected by the sample data that the history semiconductor chip sample data is used to concentrate
The parameter value of Prediction Parameters is concentrated the history semiconductor chip sample data come before training the ratio of defects prediction model
Sample data carry out data prediction；And the training unit is configured as：Use the history after data prediction
The one or more gone out selected by semiconductor chip sample data set are most suitable for the parameter value of Prediction Parameters to train described lack
The rate of falling into prediction model.
Preferably, in an example of above-mentioned aspect, the Prediction Parameters selecting unit is configured as：Using L1 canonicals
Change the combination of Logic Regression Models and L2 regularization Logic Regression Models selected from the parameter set of sample data it is a kind of or
A variety of most suitable Prediction Parameters.
Preferably, in an example of above-mentioned aspect, described device can also include：Randomization unit, is used for
It is most suitable in the one or more gone out selected by the sample data that the history semiconductor chip sample data is used to concentrate pre-
The parameter value of parameter is surveyed before training the ratio of defects prediction model, to be concentrated to the history semiconductor chip sample data
Sample data carries out randomization and the training unit is configured as：Use the history after randomization half
The one or more gone out selected by conductor chip sample data set are most suitable for the parameter value of Prediction Parameters to train the defect
Rate prediction model.
Preferably, in an example of above-mentioned aspect, the data pre-processing unit is configured as：To the history half
The bad sample data that conductor chip sample data is concentrated carries out over-sampling processing, in the history semiconductor chip data set
Bad sample data expanded.
Preferably, in an example of above-mentioned aspect, the randomization unit can include：Board module is reshuffled,
Sample data for being concentrated to the history semiconductor chip sample data carries out reshuffling board；Separation module, for that will reshuffle
The sample data of bridge queen is separated into multiple subclass；And selecting module, for selecting predetermined ratio from each subclass
Sample data composition test sample collection, and by remaining sample data form training sample set.
According to another aspect, a kind of system for the defects of improving semiconductor chip rate is provided, including：Prediction dress
It puts, for predicting the one or more second positioned at the first semiconductor chip process units downstream using ratio of defects prediction model
The defects of semiconductor chip that semiconductor chip process units is produced rate whether be more than predetermined threshold, wherein, the defect
Rate prediction model is method training as described above；And defect processing device, for predicting partly leading of being produced
The defects of body chip rate be more than the predetermined threshold when, to the first semiconductor chip process units carry out defect maintenance at
Reason.
Preferably, in an example of above-mentioned aspect, the system can also include：It is as described above to be used for training half
The defects of the first semiconductor chip process units in conductor chip production process rate prediction model device.
According to the another aspect of the application, a kind of computing device is provided, including：One or more processors, memory,
The memory store instruction, when described instruction is performed by one or more of processors so that one or more of
Processor, which performs, is used to train as described above lacking for the first semiconductor chip process units in semiconductor chip production process
The method of the rate of falling into prediction model.
According to the another aspect of the application, a kind of non-transitory machinable medium is provided, is stored with executable
Instruction, described instruction cause the machine performs to be used to train in semiconductor chip production process as described above upon being performed
The first semiconductor chip process units the defects of rate prediction model method.
Description of the drawings
By referring to following attached drawing, further understanding for nature and advantages in the present disclosure can be realized.
In attached drawing, similar assembly or feature can have identical reference numeral.
Fig. 1 is shown according to the application for training the first semiconductor chip in semiconductor chip production process to produce
The defects of device rate prediction model method flow chart；
Fig. 2 is showing for the parameter in the parameter set shown according to the sample data that defect is protruded for surface of the application
The form of example；
Fig. 3 is shown to be used to select from the parameter set of sample data using Logic Regression Models according to the application
The flow chart of the process of the most suitable Prediction Parameters of one or more；
Fig. 4 is the parameters in the parameter set shown according to the sample data that defect is protruded for surface of the application
The form of penalty values under L1 regularizations Logic Regression Models and L2 regularization Logic Regression Models；
Fig. 5 show according to the application be used for history semiconductor chip sample data concentrate sample data carry out with
The flow chart of the method for machineization processing；
Fig. 6 is shown to be used to carry out the sample data that history semiconductor chip sample data is concentrated according to the application
The flow chart of the method for sampling processing；
Fig. 7 shows to train the defects of the first semiconductor chip process units in semiconductor chip production process rate
The block diagram of the device of prediction model；
Fig. 8 shows an exemplary block diagram of the randomization unit according to the application；
Fig. 9 shows the flow chart of the method for rate the defects of being used to improve semiconductor chip according to the application；
Figure 10 shows the block diagram of the system of rate the defects of improving semiconductor chip according to the application；With
Figure 11 shows to train the defects of the first semiconductor chip process units in semiconductor chip production process
The block diagram of the computing device of rate prediction model.
Specific embodiment
Theme described herein is discussed referring now to example embodiment.It should be understood that discuss these embodiments only
It is in order to enable those skilled in the art better understood when so as to fulfill theme described herein, is not to claim
Protection domain, applicability or the exemplary limitation illustrated in book.Protection domain in the present disclosure can not departed from
In the case of, the function of element and arrangement discussed is changed.Each example can be as needed, omit, substitute or
Add various processes or component.For example, described method can be performed according to described order different, with
And each step can be added, omits or combine.In addition, the described feature of some opposite examples is in other examples
It can be combined.
As used in this article, term " comprising " and its modification represent open term, are meant that " including but not limited to ".
Term "based" represents " being based at least partially on ".Term " one embodiment " and " embodiment " expression " at least one implementation
Example ".Term " another embodiment " expression " at least one other embodiment ".Term " first ", " second " etc. may refer to not
With or identical object.It can include other definition below, it is either specific or implicit.It is unless bright in context
It really indicates, otherwise the definition of a term is consistent throughout the specification.
Presently in connection with attached drawing come describe the application for check the method for leakproofness when product is sealed to carrier band,
The embodiment of apparatus and system.
Fig. 1 is shown according to the application for training the first semiconductor chip in semiconductor chip production process to produce
The defects of device rate prediction model method flow chart.
As shown in Figure 1, first, in S120, using Logic Regression Models come from the first semiconductor chip process units
The parameter set of sample data concentrated of history semiconductor chip sample data in select and one or more be most suitable for prediction ginseng
Number.For example, in one example, the first semiconductor chip process units can be surface mounting of semiconductor chips device, described
The defects of second semiconductor chip process units can be curable epoxide device etc. and semiconductor chip rate is that surface is dashed forward
Play ratio of defects.In other examples, the first semiconductor chip process units can be on semiconductor chip packaging assembly line
Other devices or module.Here, history semiconductor chip sample data is handled by another semiconductor chip process units
The historical sample data of semiconductor chip afterwards, the historical sample data include the parameter set being made of many kinds of parameters.Fig. 2 is shown
The exemplary form of parameter in the parameter set of the sample data that defect is protruded for surface of the application.In addition, it goes through
Also include in history sample data and be used to indicate the defects of semiconductor chip is with the presence or absence of defect indication information.
In the example of the application, Logic Regression Models can include L0 regularizations Logic Regression Models, L1 canonicals
Change Logic Regression Models, L2 regularization Logic Regression Models etc..Preferably, in one example, returned according to the logic of the application
Model is returned to include the combination of L1 regularizations Logic Regression Models and L2 regularization Logic Regression Models.Fig. 3 is shown according to this Shen
Being used for please selects one or more most suitable Prediction Parameters using Logic Regression Models from the parameter set of sample data
Process flow chart.
As shown in Figure 3, in S121, calculated using L1 regularizations Logic Regression Models in the parameter set of sample data
The L1 penalty values of parameters.Then, in S123, the parameter set of sample data is calculated using L2 regularizations Logic Regression Models
In parameters L2 penalty values.Fig. 4 is the ginseng for showing the sample data that defect is protruded for surface according to the application
The form of penalty values of the parameters under L1 regularizations Logic Regression Models and L2 regularization Logic Regression Models in manifold.
After the L1 penalty values of parameters and L2 penalty values are calculated as above, punished in S125, the L1 for calculating parameters
The weighted average of the absolute value of point penalty and L2 penalty values.Here, the weighted value of the L1 penalty values of each parameter and L2 penalty values
It can preset.For example, weighted value can be set to 0.5.Then, in S127, based on the parameters calculated
The weighted average of penalty values determines selected one or more most suitable Prediction Parameters.It for example, can be to being calculated
Weighted average is compared with predetermined reference value, when weighted average is more than predetermined reference value, it is believed that the parameter is most suitable
Close Prediction Parameters.It alternatively, can be using the maximum weighted average value that is calculated as a reference value, by its weighted average and the base
Parameter of the difference of quasi- value within predetermined percentage is determined as being most suitable for Prediction Parameters.Alternatively, it can be added according to what is calculated
The parameter to sort in preceding specific bit is determined as being most suitable for Prediction Parameters by weight average value to be ranked up.It is listed according in Fig. 4
The L1 penalty values of the parameters for protrusion of surface defect and L2 penalty values, calculate its weighted average and flat based on weighting
Average carrys out from 20 kinds of parameters to select 7 kinds of parameters, and as most suitable Prediction Parameters, 7 kinds of parameters are：Expansion
Height、Placement offset Y、HeatingTime_2、MeltingFroce_3、Heatingspeed_3、
ForceVariance_4 and MeltingSpeed_250_3.
It will be clear that shown in Fig. 3 being only to be used for according to the application using Logic Regression Models come from sample
An example of one or more most suitable Prediction Parameters is selected in the parameter set of notebook data.How Logic Regression Models are used
Prediction Parameters are most suitable for select one or more from the parameter set of sample data, other suitable modes can also be used
It realizes, for example in S125, can be carried out based on other functional relations come the L1 penalty values to parameters and L2 penalty values
Combined treatment.
After one or more most suitable Prediction Parameters are as above selected, in S140, usage history semiconductor chip sample
Sample data in data set it is selected go out the parameter values of one or more parameters train the first semiconductor chip to produce
The defects of device rate prediction model, the ratio of defects prediction model for predict be located at the first semiconductor chip process units
The defects of semiconductor chip that one or more the second semiconductor chip process units in downstream is produced rate.Preferably, exist
It, can also be to the sample of history semiconductor chip sample data concentration before training ratio of defects prediction model in one example
Data carry out randomization, and the sample data that history semiconductor chip sample data is concentrated is separated into test set and training
Collection.Then, one gone out selected by the sample data concentrated using the history semiconductor chip sample data after randomization
The parameter value of kind or many kinds of parameters is come rate prediction model the defects of training the first semiconductor chip process units, for example, will be random
The training set obtained after change processing utilizes the survey obtained after randomization for being trained to ratio of defects prediction model
The defects of examination collection is come to after training rate prediction model is tested to optimize.
Fig. 5 show according to the application be used for history semiconductor chip sample data concentrate sample data carry out with
One exemplary flow chart of the method for machineization processing.
As shown in figure 5, in S131, the sample data concentrated to history semiconductor chip sample data carries out reshuffling board.It is logical
It crosses and sample data is carried out to reshuffle board, original order of the sample data of sample data concentration, such as sample data can be upset
Generation time order, equipment order, operator order, material order etc. so that reshuffling the sample data of bridge queen more
With statistical property.
Then, in S133, the sample data for reshuffling bridge queen is separated into multiple subclass.For example, it can will reshuffle bridge queen
Sample data be evenly distributed in predetermined number subclass.Then, in S135, predetermined ratio is selected from each subclass
The sample data composition test set of (for example, 20%), and remaining sample data is formed into training set.
Moreover it is preferred that in another example of the application, using Logic Regression Models come from first semiconductor
One or more are selected in the parameter set for the sample data that the history semiconductor chip sample data of chip production device is concentrated
Be most suitable for Prediction Parameters before, the method can also include to history semiconductor chip sample data concentrate sample data into
Line number Data preprocess.Then, in S140, the sample concentrated using the history semiconductor chip sample data after data prediction
The one or more gone out selected by notebook data are most suitable for the parameter value of Prediction Parameters to train the ratio of defects prediction model.
Here, data prediction can include carrying out data to the sample data that history semiconductor chip sample data is concentrated
Cleaning, to remove noisy sample data.How to remove noise data to be well known in the art, no longer describe herein.This
Outside, data prediction can also include carrying out at over-sampling the bad sample data that history semiconductor chip sample data is concentrated
Reason, is expanded with the bad sample data concentrated to history semiconductor chip sample data.
Fig. 6 is shown to be used to carry out the sample data that history semiconductor chip sample data is concentrated according to the application
The flow chart of the method for sampling processing.As shown in fig. 6, in S111, the parameter value of the parameters of sample data is returned
One change is handled.For example, place is normalized using formula (number of individuals strong point-cell mean)/(group maximum-group minimum value)
Reason.Then, in S115, using SMOTE, (Synthetic Minority Oversampling Technique synthesize minority class
Oversampling technique) algorithm come to sample data concentrate bad sample data carry out over-sampling, with to the history semiconductor chip
The bad sample data that sample data is concentrated is expanded.It preferably, can be using SMOTE algorithms come by the number of bad sample data
It extends to equal with the number of good sample data.For instance, it is preferred that in one example, it can be by K in SMOTE algorithms
Closest samples selection is 5 closest samples, and the sample instance created is adjacent positioned at selected example
The new samples example of the midpoint of sample instance, i.e. step-length is arranged to 0.5.SMOTE algorithms are well known in the present art,
It no longer describes herein.
Fig. 7 shows to train the defects of the first semiconductor chip process units in semiconductor chip production process rate
The block diagram of the device 700 (hereinafter referred to as training device 700) of prediction model.As shown in figure 8, training device 700 wraps
Include Prediction Parameters selecting unit 720 and training unit 740.
Prediction Parameters selecting unit 720 is used for using Logic Regression Models come going through from the first semiconductor chip process units
One or more most suitable Prediction Parameters are selected in the parameter set for the sample data that history semiconductor chip sample data is concentrated.It is excellent
Selection of land, in one example, Prediction Parameters selecting unit 720 are configured as：Using L1 regularizations Logic Regression Models and L2 just
Then change the combination of Logic Regression Models to select one or more most suitable Prediction Parameters from the parameter set of sample data.Instruction
The one or more gone out selected by the sample data that white silk unit 740 is concentrated for usage history semiconductor chip sample data are most
The parameter value of Prediction Parameters is suitble to train ratio of defects prediction model, the ratio of defects prediction model is located at described for predicting
The semiconductor core that one or more the second semiconductor chip process units in semiconductor chip production device downstream is produced
The defects of piece rate.
Moreover it is preferred that in one example, training device 700 can also include randomization unit 730, be used for
It is most suitable in the one or more gone out selected by the sample data that the history semiconductor chip sample data is used to concentrate pre-
The sample for surveying the parameter value of parameter before training the ratio of defects prediction model, to concentrate history semiconductor chip sample data
Data carry out randomization.Then, training unit 740 uses the history semiconductor chip sample number after randomization
The parameter value of Prediction Parameters is most suitable for according to the one or more gone out selected by collection to train the ratio of defects prediction model.
Fig. 8 shows an exemplary block diagram of the randomization unit 730 according to the application.As shown in figure 8, with
Machine processing unit 730 can include reshuffling board module 731, separation module 733 and selecting module 735.Board module 731 is reshuffled to use
It carries out reshuffling board in the sample data for concentrating history semiconductor chip sample data.Separation module 733 is used to that bridge queen will to be reshuffled
Sample data be separated into multiple subclass.Selecting module 735 is used to select the sample of predetermined ratio from each subclass
Data form test sample collection, and remaining sample data is formed training sample set.
Moreover it is preferred that training device 700 can also include data pre-processing unit 710, for partly being led in usage history
The one or more gone out selected by the sample data that body chip sample data is concentrated are most suitable for the parameter value of Prediction Parameters to instruct
Before practicing ratio of defects prediction model, data prediction is carried out to the sample data that history semiconductor chip sample data is concentrated.So
Afterwards, training unit 740 uses the one kind gone out selected by the history semiconductor chip sample data set after data prediction
Or the parameter values of a variety of most suitable Prediction Parameters trains ratio of defects prediction model.
In one example, the sample that data pre-processing unit 710 can concentrate history semiconductor chip sample data
Data carry out data cleansing, to remove noisy sample data.In addition, in another example, data pre-processing unit 710 is also
Over-sampling processing can be carried out to the bad sample data that history semiconductor chip sample data is concentrated, with to history semiconductor chip
The bad sample data that sample data is concentrated is expanded.
It is to be understood that data pre-processing unit 710, Prediction Parameters selecting unit 720, randomization unit 730,
Training unit 740, reshuffle board module 731, separation module 733 and selecting module 735 can be configured to carry out it is above-mentioned with reference to Fig. 1
Operation or function to 6 descriptions.
It is to be understood that be illustrative for rather than referring to figs. 1 to the module and corresponding function of 8 descriptions for limiting,
Concrete function can be realized in different modules or in individual module.
Fig. 9 shows the flow chart of the method for rate the defects of being used to improve semiconductor chip according to the application.Such as Fig. 9 institutes
Show, in S910, the one or more positioned at the first semiconductor chip process units downstream is predicted using ratio of defects prediction model
The defects of semiconductor chip that second semiconductor chip process units is produced rate whether be more than predetermined threshold, wherein, it is described
Ratio of defects prediction model is method training as described above.For example, can using ratio of defects prediction model come predict this second
Whether there is in the semiconductor core tile handled in semiconductor chip process units is more than that predetermined threshold (for example, 10) has
The semiconductor chip of defect.If it is present think that ratio of defects is more than predetermined threshold.Otherwise, it is not considered as to be more than predetermined threshold.This
In, the predetermined threshold is drawn based on the sample data of the first semiconductor chip process units.Then, in S920,
When the defects of predicting produced semiconductor chip rate is more than the predetermined threshold, to the first semiconductor chip process units
Carry out defect maintenance processing.For example, the first semiconductor chip process units is started the cleaning processing.
Using the method shown in Fig. 9, the production can be located at by being predicted in the first semiconductor chip process units
The defects of semiconductor chip that one or more the second semiconductor chip process units in device downstream is produced rate whether be more than
Predetermined threshold, and when rate is more than predetermined threshold predicted the defects of, the first semiconductor chip process units is carried out in time
Defect maintenance is handled, so that defect will not occur again in the semiconductor chip that first process units then produces, so as to carry
High semiconductor chip yields.
Preferably, the method shown in Fig. 9 can also include to positioned at the one of the first semiconductor chip process units downstream
A or multiple second semiconductor chip process units notify semiconductor chip existing defects, it is possible thereby to so that the one or more
Second semiconductor chip process units abandons the semiconductor chip.
Figure 10 shows the block diagram of the system 1000 of rate the defects of improving semiconductor chip according to the application.Such as Figure 10
Shown, system 1000 includes prediction meanss 1010 and defect processing device 1020.Prediction meanss 1010 are used for pre- using ratio of defects
Model is surveyed to predict one or more the second semiconductor chip process units positioned at the first semiconductor chip process units downstream
The defects of semiconductor chip produced rate whether be more than predetermined threshold, wherein, the ratio of defects prediction model is by as above
What the training device 700 was trained.Defect processing device 1020 is used to predict lacking for produced semiconductor chip
When the rate of falling into is more than the predetermined threshold, defect maintenance processing is carried out to the first semiconductor chip process units.Preferably, at one
In example, system 1000 can also include training device 700 as described above.
Above with reference to Fig. 1 to Fig. 8, to training the first half in semiconductor chip production process to lead according to the application
The defects of body chip production device, the embodiment of method and device of rate prediction model was described.Training cartridge recited above
It puts and hardware realization may be employed, can also be realized using the combination of software or hardware and software.
In this application, training device 700 can utilize computing device to realize.Figure 11 shows the implementation according to the application
The block diagram of the computing device 1100 for being used to implement training device 700 of example.According to one embodiment, computing device 1100 can be with
Including one or more processors 1102, processor 1102 is performed in computer readable storage medium (that is, memory 1104)
Storage or one or more computer-readable instructions (that is, the above-mentioned element realized in a software form) of coding.
In one embodiment, computer executable instructions are stored in memory 1104, cause one when implemented
Or multiple processors 1102：Using Logic Regression Models come from the history semiconductor core of the first semiconductor chip process units
One or more most suitable Prediction Parameters are selected in the parameter set for the sample data that piece sample data is concentrated；And described in use
The one or more gone out selected by the sample data that history semiconductor chip sample data is concentrated are most suitable for the ginseng of Prediction Parameters
Numerical value trains the ratio of defects prediction model, and the ratio of defects prediction model is located at first semiconductor chip for predicting
The defects of semiconductor chip that one or more the second semiconductor chip process units in process units downstream is produced rate.
It should be understood that the computer executable instructions stored in memory 1104 cause one or more places when implemented
It manages in each embodiment of the progress the application of device 1102 above in association with Fig. 1-8 various operations described and function.
According to one embodiment, a kind of program product of such as non-transitory machine readable media is provided.It is described non-temporary
When property machine readable media can have instruction (that is, the above-mentioned element realized in a software form), which, which works as, is executable by a machine
When so that machine is performed in each embodiment of the application above in association with Fig. 1-8 various operations described and function.
The specific embodiment illustrated above in conjunction with attached drawing describes exemplary embodiment, it is not intended that can realize
Or fall into all embodiments of the protection domain of claims." exemplary " meaning of term used in entire this specification
Taste " being used as example, example or illustration ", is not meant to than other embodiments " preferably " or " having advantage ".For offer pair
The purpose of the understanding of described technology, specific embodiment include detail.However, it is possible in these no details
In the case of implement these technologies.In some instances, it is public in order to avoid the concept to described embodiment causes indigestion
The construction and device known is shown in block diagram form.
Foregoing description in the present disclosure is provided so that any those of ordinary skill in this field can realize or make
Use present disclosure.To those skilled in the art, the various modifications carried out to present disclosure are apparent
, also, can also be in the case where not departing from protection domain in the present disclosure, it should by generic principles defined herein
For other modifications.Therefore, present disclosure is not limited to examples described herein and design, but disclosed herein with meeting
Principle and novel features widest scope it is consistent.
Claims (19)
1. a kind of the defects of being used to train the first semiconductor chip process units in semiconductor chip production process rate prediction mould
The method of type, including：
Using Logic Regression Models come from the history semiconductor chip sample data set of the first semiconductor chip process units
In sample data parameter set in select one or more most suitable Prediction Parameters；And
The one or more gone out selected by the sample data concentrated using the history semiconductor chip sample data are most suitable for
The parameter value of Prediction Parameters trains the ratio of defects prediction model, and the ratio of defects prediction model is located at described for predicting
The semiconductor core that one or more the second semiconductor chip process units in semiconductor chip production device downstream is produced
The defects of piece rate.
2. the method for claim 1, wherein the first semiconductor chip process units is surface mounting of semiconductor chips dress
It puts, one or more of second semiconductor chip process units are lacking for curable epoxide device and the semiconductor chip
Sunken rate is protrusion of surface ratio of defects.
3. method as claimed in claim 1 or 2, wherein, in the sample that the history semiconductor chip sample data is used to concentrate
Notebook data it is selected go out one or more be most suitable for the parameter value of Prediction Parameters train the ratio of defects prediction model it
Before, the history semiconductor chip sample data set based on the first semiconductor chip process units trains the ratio of defects prediction
Model further includes：
Data prediction is carried out to the sample data that the history semiconductor chip sample data is concentrated；And
The one or more gone out selected by the sample data concentrated using the history semiconductor chip sample data are most suitable for
The parameter value of Prediction Parameters trains the ratio of defects prediction model to include：
One gone out selected by the sample data concentrated using the history semiconductor chip sample data after data prediction
Kind or the parameter values of a variety of most suitable Prediction Parameters train the ratio of defects prediction model.
4. it is the method for claim 1, wherein selected using Logic Regression Models from the parameter set of sample data
The most suitable Prediction Parameters of one or more include：
Using the combination of L1 regularizations Logic Regression Models and L2 regularization Logic Regression Models come from the parameter set of sample data
In select one or more most suitable Prediction Parameters.
5. the method for claim 1, wherein in the sample number that the history semiconductor chip sample data is used to concentrate
The one or more gone out selected by are most suitable for the parameter value of Prediction Parameters come before training the ratio of defects prediction model, base
The ratio of defects prediction model is trained in the history semiconductor chip sample data set of the first semiconductor chip process units
It further includes：
To the history semiconductor chip sample data concentrate sample data carry out randomization and
The one or more gone out selected by the sample data concentrated using the history semiconductor chip sample data are most suitable for
The parameter value of Prediction Parameters trains the ratio of defects prediction model to include：
One gone out selected by the sample data concentrated using the history semiconductor chip sample data after randomization
Kind or the parameter values of a variety of most suitable Prediction Parameters train the ratio of defects prediction model.
6. method as claimed in claim 3, wherein, to the sample data that the history semiconductor chip sample data is concentrated into
Line number Data preprocess includes：
Over-sampling processing is carried out to the bad sample data that the history semiconductor chip sample data is concentrated, with to the history half
Bad sample data in conductor chip data set is expanded.
7. method as claimed in claim 5, wherein, to the sample data that the history semiconductor chip sample data is concentrated into
Row randomization includes：
The sample data concentrated to the history semiconductor chip sample data carries out reshuffling board；
The sample data for reshuffling bridge queen is separated into multiple subclass；And
The sample data composition test sample collection of predetermined ratio is selected from each subclass, and by remaining sample data
Form training sample set.
8. a kind of method for the defects of improving semiconductor chip rate, including：
One or more the second half positioned at the first semiconductor chip process units downstream are predicted using ratio of defects prediction model
The defects of semiconductor chip that conductor chip process units is produced rate whether be more than predetermined threshold, wherein, the ratio of defects
Prediction model is the method as described in any in claim 1 to 7 is trained；And
When rate is more than the predetermined threshold predict produced semiconductor chip the defects of, to first semiconductor core
Piece process units carries out defect maintenance processing.
9. a kind of the defects of being used to train the first semiconductor chip process units in semiconductor chip production process rate prediction mould
The device of type, including：
Prediction Parameters selecting unit, for using Logic Regression Models come from the history of the first semiconductor chip process units
One or more most suitable Prediction Parameters are selected in the parameter set for the sample data that semiconductor chip sample data is concentrated；And
Training unit, for the one kind gone out selected by the sample data concentrated using the history semiconductor chip sample data
Or the parameter value of a variety of most suitable Prediction Parameters trains the ratio of defects prediction model, the ratio of defects prediction model is for pre-
One or more second semiconductor chip process units of the location in the first semiconductor chip process units downstream is produced
The defects of semiconductor chip gone out rate.
10. device as claimed in claim 9, wherein, the first semiconductor chip process units is surface mounting of semiconductor chips
Device, one or more of second semiconductor chip process units are curable epoxide device and the semiconductor chip
Ratio of defects is protrusion of surface ratio of defects.
11. the device as described in claim 9 or 10, further includes：
Data pre-processing unit, for selected by the sample data that the history semiconductor chip sample data is used to concentrate
The one or more gone out are most suitable for the parameter value of Prediction Parameters come before training the ratio of defects prediction model, to the history half
The sample data that conductor chip sample data is concentrated carries out data prediction；And
The training unit is configured as：Using selected by the history semiconductor chip sample data set after data prediction
The parameter value that the one or more selected are most suitable for Prediction Parameters trains the ratio of defects prediction model.
12. device as claimed in claim 9, wherein, the Prediction Parameters selecting unit is configured as：
Using the combination of L1 regularizations Logic Regression Models and L2 regularization Logic Regression Models come from the parameter set of sample data
In select one or more most suitable Prediction Parameters.
13. device as claimed in claim 9, further includes：
Randomization unit, for selected by the sample data that the history semiconductor chip sample data is used to concentrate
The one or more gone out are most suitable for the parameter value of Prediction Parameters come before training the ratio of defects prediction model, to the history half
Conductor chip sample data concentrate sample data carry out randomization and
The training unit is configured as：Using selected by the history semiconductor chip sample data set after randomization
The parameter value that the one or more selected are most suitable for Prediction Parameters trains the ratio of defects prediction model.
14. device as claimed in claim 11, wherein, the data pre-processing unit is configured as：
Over-sampling processing is carried out to the bad sample data that the history semiconductor chip sample data is concentrated, with to the history half
Bad sample data in conductor chip data set is expanded.
15. device as claimed in claim 13, wherein, the randomization unit includes：
Board module is reshuffled, the sample data for being concentrated to the history semiconductor chip sample data carries out reshuffling board；
Separation module, for the sample data for reshuffling bridge queen to be separated into multiple subclass；And
Selecting module, for selecting the sample data of predetermined ratio composition test sample collection from each subclass, and will
Remaining sample data forms training sample set.
16. a kind of system for the defects of improving semiconductor chip rate, including：
Prediction meanss, for predicting one positioned at the first semiconductor chip process units downstream using ratio of defects prediction model
Or multiple second semiconductor chip process units produced semiconductor chip the defects of rate whether be more than predetermined threshold,
In, the ratio of defects prediction model is the method as described in any in claim 1 to 7 is trained；And
Defect processing device, for when rate is more than the predetermined threshold predict produced semiconductor chip the defects of,
Defect maintenance processing is carried out to the first semiconductor chip process units.
17. system as claimed in claim 16, further includes：
Device as described in any in claim 9 to 15.
18. a kind of computing device, including：
One or more processors,
Memory, the memory store instruction, when described instruction is performed by one or more of processors so that described
One or more processors perform the method as described in any in claim 1 to 7.
19. a kind of non-transitory machinable medium, is stored with executable instruction, described instruction causes upon being performed
The machine performs the method as described in any in claim 1 to 7.
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