CN108107309A - Integrated circuit test system - Google Patents

Integrated circuit test system Download PDF

Info

Publication number
CN108107309A
CN108107309A CN201810139253.5A CN201810139253A CN108107309A CN 108107309 A CN108107309 A CN 108107309A CN 201810139253 A CN201810139253 A CN 201810139253A CN 108107309 A CN108107309 A CN 108107309A
Authority
CN
China
Prior art keywords
integrated circuit
detection module
module
test system
measured
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810139253.5A
Other languages
Chinese (zh)
Inventor
祁俊华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Wafer Level CSP Co Ltd
Original Assignee
China Wafer Level CSP Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Wafer Level CSP Co Ltd filed Critical China Wafer Level CSP Co Ltd
Priority to CN201810139253.5A priority Critical patent/CN108107309A/en
Publication of CN108107309A publication Critical patent/CN108107309A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

This application discloses a kind of integrated circuit test system, including:Multiple detection modules with different detection functions, each detection module are connected respectively with integrated circuit and data processing module to be measured;Data processing module, including PC machine and algorithm computing module, algorithm computing module is used to be calculated according to the input signal that detection module provides, and result of calculation is uploaded to PC machine, wherein:The algorithm computing module is integrated with the detection module.The present invention will be directly integrated in perform the hardware (algorithm computing module) of data algorithm processing on the circuit board of detection module, by the processing that image algorithm is done directly in detection terminal, that so does reduces the transmission of data, reduces the testing time.

Description

Integrated circuit test system
Technical field
This application involves a kind of test system, more particularly to a kind of integrated circuit test system.
Background technology
With reference to shown in Fig. 1, in the prior art, the test system of cmos image sensor integrated circuit, including realizing PC machine 101, test machine 102 and cmos image sensor 103 to be measured, the test machine that image algorithm is handled include discrete setting Multiple detection modules:Image capture module and detection of electrical leakage, open/short detection module etc., further include to realize not With the switch selection circuit 104 of detection module switching.
In the test machine, due to completing cmos image using separate module mode or by general I/O port Then image data is uploaded to the processing of PC progress image algorithms by data acquisition function.Its there are the problem of include at least:Figure As the transmission capacity of data is larger, the testing time is long.
The content of the invention
It is an object of the invention to provide a kind of integrated circuit test system, to overcome deficiency of the prior art.
To achieve the above object, the present invention provides following technical solution:
The embodiment of the present application discloses a kind of integrated circuit test system, including:
Multiple detection modules with different detection functions, each detection module respectively with integrated circuit to be measured with And data processing module connection;
Data processing module, including PC machine and algorithm computing module, algorithm computing module is used to be provided according to detection module Input signal calculated, and result of calculation is uploaded to PC machine, wherein:
The algorithm computing module is integrated with the detection module.
Preferably, in above-mentioned integrated circuit test system, the multiple detection module is integrated on same circuit board.
Preferably, in above-mentioned integrated circuit test system, the multiple detection module and integrated circuit to be measured it Between be provided with switch selection circuit, the switch selection circuit selectivity is connected or disconnected with the detection module.
Preferably, in above-mentioned integrated circuit test system, a control panel is further included, wherein:
The control panel optionally controls the one or more detection modules of execution.
Preferably, in above-mentioned integrated circuit test system, the integrated circuit to be measured is cmos image sensor.
Preferably, in above-mentioned integrated circuit test system, further include:
Light source provides input signal to integrated circuit to be measured.
Preferably, in above-mentioned integrated circuit test system, an at least detection module be imaging sensor, image sensing Device will collect image data from cmos image sensor and be uploaded to algorithm computing module.
Preferably, in above-mentioned integrated circuit test system, algorithm computing module calculates image data, at least Including following one kind:
A, the input that the output signal of the cmos image sensor to be measured detected according to detection module is provided with light source Signal compares calculated distortion degree;
B, detect that the output signal of cmos image sensor to be measured calculates picture noise according to detection module;
C, the output signal meter sensitivity of cmos image sensor to be measured is detected according to detection module;
D, detect that the output signal of cmos image sensor to be measured calculates dynamic range according to detection module;
E, detect that the output signal of cmos image sensor to be measured calculates response speed according to detection module;
F, cmos image sensor to be measured is detected according to detection module outputs signal to few judgement dead pixel points of images, dirt Point, bad row, bad row, image color cast.
Preferably, in above-mentioned integrated circuit test system, connect between the algorithm computing module and PC machine by USB Mouth or PCIe interface communication.
Preferably, in above-mentioned integrated circuit test system, an at least detection module is detection of electrical leakage module.
Preferably, in above-mentioned integrated circuit test system, an at least detection module is open/short detection module.
Compared with prior art, the advantage of the invention is that:The present invention directly by perform data algorithm processing it is hard Part (algorithm computing module) is integrated on the circuit board of detection module, by the place that image algorithm is done directly in detection terminal Reason, that so does reduces the transmission of data, reduces the testing time.
Description of the drawings
It in order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, below will be to embodiment or existing There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this Some embodiments described in application, for those of ordinary skill in the art, without creative efforts, It can also be obtained according to these attached drawings other attached drawings.
Fig. 1 show the principle schematic of the test system of cmos image sensor integrated circuit in the prior art;
Fig. 2 show the principle schematic of integrated circuit test system in the specific embodiment of the invention;
Fig. 3 show the principle schematic of the test system with control panel in the specific embodiment of the invention.
Specific embodiment
By that the present invention should will be more fully appreciated together with the detailed description below that institute's accompanying drawings are read.Herein The middle specific embodiment for disclosing the present invention;However, it should be understood that revealed embodiment only has the exemplary of the present invention, the present invention It can embody in a variety of manners.Therefore, specific function details disclosed herein is not interpreted as limiting, but only It is construed to the basis of claims and is construed to teach those skilled in the art in fact any appropriate detailed Representative basis using the present invention in different ways in embodiment.
With reference to shown in Fig. 2, the present embodiment provides a kind of integrated circuit test system, including PC machine 201, test machine 202, with And integrated circuit 203 to be measured.
Test machine 202 includes multiple detection modules with different detection functions, and each detection module is respectively with treating Integrated circuit and the data processing module connection of survey.
Algorithm computing module is further included, based on algorithm computing module is carried out by the input signal provided according to detection module It calculates, and result of calculation is uploaded to PC machine.
As the improvement of this case, algorithm computing module is integrated with the detection module.
Algorithm computing module can include microprocessor (MCU), which can include central processing unit (Central Processing Unit, CPU), read-only memory module (read-only memory, ROM), random storage module (random Access memory, RAM), timing module, digital-to-analogue conversion module (A/D converter) and plural input/output Port.Certainly, the integrated circuit that algorithm computing module can also take other form, such as:Application-specific IC (Application Specific Integrated Circuit, ASIC) or field programmable gate arrays (Field Programmable Gate Array, FPGA) etc..In the present embodiment, algorithm computing module is preferably FPGA.
In this case, directly detection module will be integrated in perform the hardware (algorithm computing module) of data algorithm processing On circuit board, by being done directly the processing of image algorithm in detection terminal, that so does reduces the transmission of data, reduces Testing time.
In one embodiment, multiple detection modules are integrated on same circuit board.
In one embodiment, algorithm computing module is integrated on the same circuit board.
With reference to shown in Fig. 3, in one embodiment, switch choosing is provided between multiple detection modules and integrated circuit to be measured Circuit 204 is selected, the switch selection circuit selectivity is connected or disconnected with the detection module.
Switching selective circuit includes multiple conductive paths, for detection module and cmos image sensor to be measured it Between establish the conductive path of electrical connection, common, the quantity of conductive path and the quantity of detection module match, each conductive logical The both ends on road are connected between a detection module and cmos image sensor to be detected respectively.
Switch employed in conductive path, the various switches that can be known in the art.Such as ordinary skill people Known to member, switch can include triode, silicon-controlled, relay switch or metal oxide semiconductor field effect tube Common switch shapes such as (Metallic Oxide Semiconductor Field Effect transistor, MOSFET) Formula.
Further combined with shown in Fig. 3, system further includes a control panel 300, wherein:The control panel is optionally controlled System performs one or more detection modules.
General universal integrated circuit test system is wanted since pursuit is adapted to various integrated circuit Common Testings It seeks or can realize the demand of chip property test, be required for carrying out very details to the testing process of each chip Specialty programming with realize it is desired test needs.
This case is for this universal integrated circuit test system, carries out further modularized design and standardization is set Meter, that is to say, that independent modular testing circuit design is carried out according to the various test events of integrated circuit, and using standardization Test method.So so that testing the operation of system can very simplify, it is no longer necessary to which professional programming personnel grasps Make, can be achieved with the chip testing for meeting IC chip test requirement.
Specifically, multiple modules for disparity items test are integrated in same test device, such as:
Project A test modules;
Project B test modules;
Project C test modules;
Project D test modules;
Project E test modules;
Sundry item test module.
Wherein, project A test modules can be open/short (O/S) detection module, and project B can be electric leakage (leakage) detection module, project C can be image detection module, can be only when testing cmos image sensor Only project A, B, C are made choice, and sundry item is not selected.Sundry item test module can set electric current according to application The modules such as detection.
In a preferred embodiment, the integrated circuit to be measured is cmos image sensor.It should be noted that integrated electricity Road can also be other semiconductor devices.
In order to realize the detection of cmos image sensor, system further includes a light source, and the light source is to integrated circuit to be measured Input signal is provided.
In one embodiment, an at least detection module is imaging sensor, and imaging sensor will be from cmos image sensor It collects image data and is uploaded to algorithm computing module.
In this case, by imaging sensor at least testing image of the cmos image sensor under different illumination conditions Performance.
In the technical solution for being cmos image sensor in integrated circuit to be measured, to algorithm computing module to image data It is calculated, including at least following one kind:
A, the input that the output signal of the cmos image sensor to be measured detected according to detection module is provided with light source Signal compares calculated distortion degree;
B, detect that the output signal of cmos image sensor to be measured calculates picture noise according to detection module;
C, the output signal meter sensitivity of cmos image sensor to be measured is detected according to detection module;
D, detect that the output signal of cmos image sensor to be measured calculates dynamic range according to detection module;
E, detect that the output signal of cmos image sensor to be measured calculates response speed according to detection module;
F, cmos image sensor to be measured is detected according to detection module outputs signal to few judgement dead pixel points of images, dirt Point, bad row, bad row, image color cast.
In one embodiment, algorithm computing module reads the light spot image of imaging sensor acquisition in real time, and to acquisition Light spot image handled, obtain NU values, NU values with setting threshold value compared with, when NU values less than set threshold value when, Cmos image sensor to be measured is pieces O.K., and when NU values are more than the threshold value of setting, cmos image sensor to be measured is defect ware. NU values are for characterizing the nonlinearity of imaging sensor.
In a preferred embodiment, communicated between the algorithm computing module and PC machine by PCIe interface.In other realities It applies in example, USB interface etc. can also be used to be communicated.
PCIe (PCI-Express, peripheral component interconnect express) is a kind of high speed Serial computer expansion bus standard belongs to the point-to-point binary channels high bandwidth transmission of high speed serialization, and the equipment distribution connected is only Bandwidth chahnel is enjoyed, does not share bus bandwidth, mainly supports active power management, error reporting, end-to-end reliability transmission, heat The functions such as plug and service quality (QOS).In the technical solution, PC machine is based on PCIe interface can rapidly gathering algorithm meter Calculate the image data of module output.
In one embodiment, an at least detection module is detection of electrical leakage module.
In the technical solution, detection of electrical leakage module is testing the drain conditions of cmos image sensor.
In one embodiment, an at least detection module is open/short detection module.
In the present embodiment, the power supply powered for each detection module, switch selection circuit, algorithm computing module is further included.
In the technical solution, open/short detection module to test the Pin feet of cmos image sensor to be measured with electricity Between the Pin feet of source open short-circuit conditions, Pin feet and ground Pin open between short-circuit conditions and power supply Pin and ground Pin open it is short Road situation.
In conclusion the present invention directly will be integrated in inspection to perform the hardware (algorithm computing module) of data algorithm processing It surveys on the circuit board of module, by being done directly the processing of image algorithm in detection terminal, that so does reduces the biography of data It passs, reduces the testing time.
Each aspect of the present invention, embodiment, feature and example should be regarded as in all respects to be illustrative and be not intended to limit The system present invention, the scope of the present invention are only defined by tbe claims.Without departing substantially from the spirit and scope of the present invention advocated In the case of, it will be apparent to those skilled in the art that other embodiments, modification and use.
The use of title and chapters and sections is not intended to limit the present invention in this application;Each chapters and sections can be applied to the present invention Any aspect, embodiment or feature.
In this application, by element or component be known as being contained in and/or selected from described element or the component list it Place, it should be appreciated that the element or component can by described any one of element or component and may be selected from by described element or The group of the two in component or both composition described above.Furthermore, it is to be understood that in the spirit and scope without departing substantially from teachings of this disclosure In the case of, the element and/or feature of composition described herein, equipment or method can combine in various ways regardless of this It is clearly stated in text or implies explanation.
Unless otherwise specific statement, otherwise term " include (include, includes, including) ", " have The use of (have, has or having) " is it is generally understood that be open and without limitation.
Unless otherwise specific statement, otherwise the use of odd number herein includes plural (and vice versa).In addition, on unless It clearly provides additionally below, otherwise singulative " one (a, an) " and " (the) " include plural form.In addition, in art The use of language " about " part before magnitude, unless otherwise specific statement, otherwise teachings of this disclosure further includes particular magnitude in itself.
It is to be understood that the order of each step or the order of execution specific action are not particularly significant, as long as teachings of this disclosure is protected It holds operable.In addition, two or more steps or action can be carried out at the same time.
It is to be understood that each figure and explanation of the present invention are simplified to illustrate with being clearly understood that related member to the present invention Part, and eliminate other elements for clarity purpose.However, those skilled in the art will realize that these and other is first Part can be desirable.However, since this class component is it is well known that and since it does not promote to the present invention's in this technology It is best understood from, therefore the discussion to this class component is not provided herein.It will be appreciated that each figure is in order at diagram illustrating property purpose and is in Now and not as structural pattern.Institute's omissions of detail and modification or alternate embodiment are in the range of those skilled in the art.
It can be appreciated that in certain aspects of the present disclosure, single component can be replaced by multiple components and can be replaced by single component Multiple components are changed to provide an element or structure or perform one or several given function.It will not be operated with reality except substituting herein Beyond trampling in place of the particular embodiment of the present invention, this replacement is considered as within the scope of the invention.
Although describing the present invention with reference to an illustrative embodiment, those skilled in the art will appreciate that, it is not carrying on the back Various other changes can be made in the case of from spirit and scope of the present invention, is omitted and/or is added and substantial equivalents can be used Substitute the element of the embodiment.In addition, many modifications can be made in the case of without departing substantially from the scope of the present invention so that specific Situation or material adapt to teachings of the present invention.Therefore, it is not to restrict the invention to perform the institute of the present invention herein Specific embodiment is disclosed, and being intended to makes the present invention will be comprising all implementations fallen within the scope of the appended claims Example.In addition, except non-specific statement, otherwise any use of first, second grade of term does not indicate that any order or importance, but An element and another element are distinguished using term first, second etc..

Claims (11)

1. a kind of integrated circuit test system, which is characterized in that including:
Multiple detection modules with different detection functions, each detection module respectively with integrated circuit and number to be measured It is connected according to processing module;
Data processing module, including PC machine and algorithm computing module, algorithm computing module is used to be provided according to detection module defeated Enter signal to be calculated, and result of calculation is uploaded to PC machine, wherein:
The algorithm computing module is integrated with the detection module.
2. integrated circuit test system according to claim 1, which is characterized in that the multiple detection module is integrated in together On one circuit board.
3. integrated circuit test system according to claim 1, which is characterized in that the multiple detection module with it is to be measured Switch selection circuit is provided between integrated circuit, the switch selection circuit selectivity connects on-off with the detection module It opens.
4. integrated circuit test system according to claim 3, which is characterized in that a control panel is further included, wherein:
The control panel optionally controls the one or more detection modules of execution.
5. the integrated circuit test system according to claim 1 or 3, which is characterized in that the integrated circuit to be measured is Cmos image sensor.
6. integrated circuit test system according to claim 5, which is characterized in that further include:
Light source provides input signal to integrated circuit to be measured.
7. integrated circuit test system according to claim 6, which is characterized in that an at least detection module is image sensing Device, imaging sensor will collect image data from cmos image sensor and be uploaded to algorithm computing module.
8. integrated circuit test system according to claim 7, which is characterized in that algorithm computing module to image data into Row calculates, including at least following one kind:
A, the input signal that the output signal of the cmos image sensor to be measured detected according to detection module is provided with light source The calculated distortion that compares degree;
B, detect that the output signal of cmos image sensor to be measured calculates picture noise according to detection module;
C, the output signal meter sensitivity of cmos image sensor to be measured is detected according to detection module;
D, detect that the output signal of cmos image sensor to be measured calculates dynamic range according to detection module;
E, detect that the output signal of cmos image sensor to be measured calculates response speed according to detection module;
F, detected according to detection module cmos image sensor to be measured output signal to it is few judgement dead pixel points of images, stain, Bad row, bad row, image color cast.
9. integrated circuit test system according to claim 1, which is characterized in that the algorithm computing module and PC machine it Between pass through USB interface or PCIe interface and communicate.
10. integrated circuit test system according to claim 1, which is characterized in that an at least detection module is examined for electric leakage Survey module.
11. integrated circuit test system according to claim 1, which is characterized in that an at least detection module for open circuit/it is short Road detection module.
CN201810139253.5A 2018-02-11 2018-02-11 Integrated circuit test system Pending CN108107309A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810139253.5A CN108107309A (en) 2018-02-11 2018-02-11 Integrated circuit test system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810139253.5A CN108107309A (en) 2018-02-11 2018-02-11 Integrated circuit test system

Publications (1)

Publication Number Publication Date
CN108107309A true CN108107309A (en) 2018-06-01

Family

ID=62205532

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810139253.5A Pending CN108107309A (en) 2018-02-11 2018-02-11 Integrated circuit test system

Country Status (1)

Country Link
CN (1) CN108107309A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109444725A (en) * 2019-01-11 2019-03-08 西安君信电子科技有限责任公司 A kind of the multifunctional testing plate and test method of integrated circuit test device
WO2020199283A1 (en) * 2019-03-29 2020-10-08 上海华岭集成电路技术股份有限公司 Circular defect testing method for optical chip of integrated circuit
GB2590048A (en) * 2019-03-29 2021-06-23 Sino Ic Tech Co Ltd Circular defect testing method for optical chip of integrated circuit
CN114690025A (en) * 2022-05-31 2022-07-01 浙江瑞测科技有限公司 Multi-station parallel testing method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101360255A (en) * 2007-07-30 2009-02-04 比亚迪股份有限公司 Test system for imaging performance of CMOS image sensor
CN103558543A (en) * 2013-11-20 2014-02-05 太仓思比科微电子技术有限公司 Mass production testing method of CIS chip
CN104579490A (en) * 2014-12-12 2015-04-29 武汉电信器件有限公司 Highly integrated OLT optical module
CN105424324A (en) * 2015-12-17 2016-03-23 哈尔滨工业大学 Device for nonlinear parameter real-time testing of CMOS image sensor
CN106841989A (en) * 2017-02-13 2017-06-13 张家港市欧微自动化研发有限公司 A kind of cmos sensor method of testing

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101360255A (en) * 2007-07-30 2009-02-04 比亚迪股份有限公司 Test system for imaging performance of CMOS image sensor
CN103558543A (en) * 2013-11-20 2014-02-05 太仓思比科微电子技术有限公司 Mass production testing method of CIS chip
CN104579490A (en) * 2014-12-12 2015-04-29 武汉电信器件有限公司 Highly integrated OLT optical module
CN105424324A (en) * 2015-12-17 2016-03-23 哈尔滨工业大学 Device for nonlinear parameter real-time testing of CMOS image sensor
CN106841989A (en) * 2017-02-13 2017-06-13 张家港市欧微自动化研发有限公司 A kind of cmos sensor method of testing

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109444725A (en) * 2019-01-11 2019-03-08 西安君信电子科技有限责任公司 A kind of the multifunctional testing plate and test method of integrated circuit test device
WO2020199283A1 (en) * 2019-03-29 2020-10-08 上海华岭集成电路技术股份有限公司 Circular defect testing method for optical chip of integrated circuit
GB2590048A (en) * 2019-03-29 2021-06-23 Sino Ic Tech Co Ltd Circular defect testing method for optical chip of integrated circuit
GB2590048B (en) * 2019-03-29 2023-08-30 Sino Ic Tech Co Ltd Halo test method for an optical chip in an integrated circuit
CN114690025A (en) * 2022-05-31 2022-07-01 浙江瑞测科技有限公司 Multi-station parallel testing method
CN114690025B (en) * 2022-05-31 2022-10-11 浙江瑞测科技有限公司 Multi-station parallel test method

Similar Documents

Publication Publication Date Title
CN108107309A (en) Integrated circuit test system
TWI389553B (en) Methods and devices for image signal processing
KR101421588B1 (en) A deterioration diagnosing method for a distributing board, motor control panel, and cabinet panel based on temperature area variations of the IR image for 2 Dimensional thermopile array
CN102840918A (en) Method for managing and analyzing infrared spectrogram of electric transmission and transformation equipment
CN105606133A (en) Resistive sensor array test circuit based on two-wire system voltage feedback
KR20090128814A (en) Port selector, device test system and method using the same
CN207798988U (en) Integrated circuit test system
US8550706B2 (en) Temperature measuring device
CN106199373A (en) Electronic equipment intelligent failure diagnosis method and device
KR100335354B1 (en) Communication element and communication apparatus using the same
CN104459426A (en) Cable detection system
CN110426613A (en) Method and device for judging overheating fault inside GIS device
CN211264169U (en) Automatic testing device for logic control unit
US10498113B2 (en) Methods and devices for automatic communication addressing of load center breakers
US20100013492A1 (en) Storage battery inspecting system
CN111464809B (en) Data stability testing circuit and testing method for image acquisition card
US7272760B2 (en) Curve tracing device and method
KR101806929B1 (en) Break Out Box for Multiple Signal Lines Connection
CN214011337U (en) Relay detection and control circuit
CN112881888B (en) Testing device and method for VGA interface protection circuit of server display card
KR20100120909A (en) Soldering inspection system
CN205786795U (en) Electrostatic testing apparatus and television set
JP2012028786A (en) Method for determining resistance between integrated circuit and contacting device of integrated circuit and corresponding contacting device of printed circuit board
CN107567697A (en) Bus network terminator
TW201710694A (en) Testing device of address configuration signal of DIMM slot and testing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination