CN207798988U - Integrated circuit test system - Google Patents
Integrated circuit test system Download PDFInfo
- Publication number
- CN207798988U CN207798988U CN201820241152.4U CN201820241152U CN207798988U CN 207798988 U CN207798988 U CN 207798988U CN 201820241152 U CN201820241152 U CN 201820241152U CN 207798988 U CN207798988 U CN 207798988U
- Authority
- CN
- China
- Prior art keywords
- integrated circuit
- module
- test system
- detection module
- detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
This application discloses a kind of integrated circuit test systems, including：Multiple detection modules with different detection functions, each detection module are connect with integrated circuit and data processing module to be measured respectively；Data processing module, including PC machine and algorithm computing module, the input signal that algorithm computing module is used to be provided according to detection module is calculated, and result of calculation is uploaded to PC machine, wherein：The algorithm computing module is integrated with the detection module.The utility model will directly be integrated in the hardware (algorithm computing module) for executing data algorithm processing on the circuit board of detection module, by the processing for being done directly image algorithm in detection terminal, what is done so reduces the transmission of data, reduces the testing time.
Description
Technical field
This application involves a kind of test systems, more particularly to a kind of integrated circuit test system.
Background technology
In conjunction with shown in Fig. 1, in the prior art, the test system of cmos image sensor integrated circuit, including to realize
PC machine 101, test machine 102 and the cmos image sensor 103 to be measured of image algorithm processing, test machine includes discrete setting
Multiple detection modules：Image capture module and detection of electrical leakage, open/short detection module etc., further include realizing not
With the switch selection circuit 104 of detection module switching.
In the test machine, cmos image is completed due to using separate module mode, or by general I/O port
Then image data is uploaded to the processing that PC carries out image algorithm by data acquisition function.Its there are the problem of include at least：Figure
As the transmission capacity of data is larger, the testing time is long.
Utility model content
The purpose of this utility model is to provide a kind of integrated circuit test systems, to overcome deficiency in the prior art.
To achieve the above object, the utility model provides the following technical solutions：
The embodiment of the present application discloses a kind of integrated circuit test system, including：
Multiple detection modules with different detection functions, each detection module respectively with integrated circuit to be measured with
And data processing module connection；
Data processing module, including PC machine and algorithm computing module, algorithm computing module according to detection module for providing
Input signal calculated, and result of calculation is uploaded to PC machine, wherein：
The algorithm computing module is integrated with the detection module.
Preferably, in above-mentioned integrated circuit test system, the multiple detection module is integrated on same circuit board.
Preferably, in above-mentioned integrated circuit test system, the multiple detection module and integrated circuit to be measured it
Between be provided with switch selection circuit, the switch selection circuit selectivity is connected to or disconnects with the detection module.
Preferably, further include a control panel in above-mentioned integrated circuit test system, wherein：
The control panel optionally controls the one or more detection modules of execution.
Preferably, in above-mentioned integrated circuit test system, the integrated circuit to be measured is cmos image sensor.
Preferably, in above-mentioned integrated circuit test system, further include：
Light source provides input signal to integrated circuit to be measured.
Preferably, in above-mentioned integrated circuit test system, an at least detection module is imaging sensor, image sensing
Device will collect image data from cmos image sensor and be uploaded to algorithm computing module.
Preferably, it in above-mentioned integrated circuit test system, is connect by USB between the algorithm computing module and PC machine
Mouth or PCIe interface communication.
Preferably, in above-mentioned integrated circuit test system, an at least detection module is detection of electrical leakage module.
Preferably, in above-mentioned integrated circuit test system, an at least detection module is open/short detection module.
Compared with prior art, the utility model has the advantage of：The utility model directly will be executing data algorithm
The hardware (algorithm computing module) of processing is integrated on the circuit board of detection module, is calculated by being done directly image in detection terminal
The processing of method, what is done so reduces the transmission of data, reduces the testing time.
Description of the drawings
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments described in application, for those of ordinary skill in the art, without creative efforts,
Other drawings may also be obtained based on these drawings.
Fig. 1 show the principle schematic of the test system of cmos image sensor integrated circuit in the prior art；
Fig. 2 show the principle schematic of integrated circuit test system in the utility model specific embodiment；
Fig. 3 show the principle schematic of the test system with control panel in the utility model specific embodiment.
Specific implementation mode
The utility model will be more fully appreciated by the detailed description below that should be read together with institute's accompanying drawings.
The specific embodiment of the utility model disclosed herein；However, it should be understood that revealed embodiment is only had the showing of the utility model
Plasticity, the utility model can embody in a variety of manners.Therefore, specific function details disclosed herein should not be construed as having
Restrictive, but be interpreted only as the basis of claims and be construed to for teaching those skilled in the art in the fact
The representative basis of the utility model is used in upper any appropriate specific embodiment in different ways.
In conjunction with shown in Fig. 2, the present embodiment provides a kind of integrated circuit test system, including PC machine 201, test machine 202, with
And integrated circuit 203 to be measured.
Test machine 202 includes the multiple detection modules for having different detection functions, each detection module respectively with wait for
The integrated circuit and data processing module of survey connect.
Further include algorithm computing module, based on input signal of the algorithm computing module by being provided according to detection module carries out
It calculates, and result of calculation is uploaded to PC machine.
As the improvement of this case, algorithm computing module is integrated with the detection module.
Algorithm computing module may include microprocessor (MCU), which may include central processing unit (Central
Processing Unit, CPU), read-only memory module (read-only memory, ROM), random storage module (random
Access memory, RAM), timing module, digital-to-analogue conversion module (A/D converter) and plural input/output
Port.Certainly, the integrated circuit that algorithm computing module can also take other form, such as：Application-specific IC
(Application Specific Integrated Circuit, ASIC) or field programmable gate arrays (Field
Programmable Gate Array, FPGA) etc..In the present embodiment, algorithm computing module is preferably FPGA.
In this case, directly it will be integrated in detection module to the hardware (algorithm computing module) for executing data algorithm processing
On circuit board, by being done directly the processing of image algorithm in detection terminal, what is done so reduces the transmission of data, reduces
Testing time.
In one embodiment, multiple detection modules are integrated on same circuit board.
In one embodiment, algorithm computing module is integrated on the same circuit board.
In conjunction with shown in Fig. 3, in one embodiment, switch choosing is provided between multiple detection modules and integrated circuit to be measured
Circuit 204 is selected, the switch selection circuit selectivity is connected to or disconnects with the detection module.
It includes multiple conductive paths to switch selective circuit, for detection module and cmos image sensor to be measured it
Between establish the conductive path of electrical connection, common, the quantity of conductive path and the quantity of detection module match, each conductive logical
The both ends on road connect between a detection module and cmos image sensor to be detected respectively.
Switch employed in conductive path, the various switches that can be known in the art.Such as ordinary skill people
Known to member, switch may include triode, silicon-controlled, relay switch or metal oxide semiconductor field effect tube
Common switch shapes such as (Metallic Oxide Semiconductor Field Effect transistor, MOSFET)
Formula.
Shown in Fig. 3, system further includes a control panel 300, wherein：The control panel is optionally controlled
System executes one or more detection modules.
General universal integrated circuit test system is wanted since pursuit is adapted to various integrated circuit Common Testings
It asks, or can realize the demand of chip property test, be required for carrying out very details to the testing process of each chip
Profession programming to realize desired test needs.
This case is to be directed to this universal integrated circuit test system, carries out further modularized design and standardization is set
Meter, that is to say, that carry out independent modular testing circuit design according to the various test events of integrated circuit, and using standardization
Test method.In this way so that testing the operation of system can very simplify, it is no longer necessary to which professional programming personnel grasps
Make, can be achieved with the chip testing for meeting IC chip test requirement.
Specifically, multiple modules for disparity items test are integrated in same test device, such as：
Project A test modules；
Project B test modules；
Project C test modules；
Project D test modules；
Project E test modules；
Sundry item test module.
Wherein, project A test modules can be open/short (O/S) detection module, and project B can be electric leakage
(leakage) detection module, project C can be that image detection module can be only when testing cmos image sensor
Only project A, B, C are selected, and sundry item is not selected.Electric current can be arranged according to application in sundry item test module
The modules such as detection.
In a preferred embodiment, the integrated circuit to be measured is cmos image sensor.It should be noted that integrated electricity
Road can also be other semiconductor devices.
In order to realize the detection of cmos image sensor, system further includes a light source, and the light source is to integrated circuit to be measured
Input signal is provided.
In one embodiment, an at least detection module is imaging sensor, and imaging sensor will be from cmos image sensor
It collects image data and is uploaded to algorithm computing module.
In this case, by imaging sensor at least testing image of the cmos image sensor under different illumination conditions
Performance.
In the technical solution that integrated circuit to be measured is cmos image sensor, to algorithm computing module to image data
It is calculated, includes at least following one kind：
A, the input that the output signal of the cmos image sensor to be measured detected according to detection module is provided with light source
Signal compares calculated distortion degree；
B, detect that the output signal of cmos image sensor to be measured calculates picture noise according to detection module；
C, the output signal meter sensitivity of cmos image sensor to be measured is detected according to detection module；
D, detect that the output signal of cmos image sensor to be measured calculates dynamic range according to detection module；
E, detect that the output signal of cmos image sensor to be measured calculates response speed according to detection module；
F, detect that the output signal of cmos image sensor to be measured at least judges dead pixel points of images, dirt according to detection module
Point, bad row, bad row, image color cast.
In one embodiment, algorithm computing module reads the light spot image of imaging sensor acquisition in real time, and to acquisition
Light spot image handled, obtain NU values, NU values are compared with the threshold value of setting, when NU values are less than the threshold value of setting,
Cmos image sensor to be measured is pieces O.K., and when NU values are more than the threshold value of setting, cmos image sensor to be measured is defect ware.
NU values are used to characterize the nonlinearity of imaging sensor.
In a preferred embodiment, it is communicated by PCIe interface between the algorithm computing module and PC machine.In other realities
It applies in example, USB interface etc. can also be used to be communicated.
PCIe (PCI-Express, peripheral component interconnect express) is a kind of high speed
Serial computer expansion bus standard belongs to the point-to-point binary channels high bandwidth transmission of high speed serialization, and the equipment distribution connected is only
Bandwidth chahnel is enjoyed, bus bandwidth is not shared, mainly supports active power management, error reporting, end-to-end reliability transmission, heat
The functions such as plug and service quality (QOS).In the technical solution, PC machine is based on PCIe interface can rapidly gathering algorithm meter
Calculate the image data of module output.
In one embodiment, an at least detection module is detection of electrical leakage module.
In the technical solution, detection of electrical leakage module is testing the drain conditions of cmos image sensor.
In one embodiment, an at least detection module is open/short detection module.
Further include the power supply powered for each detection module, switch selection circuit, algorithm computing module in the present embodiment.
In the technical solution, open/short detection module is testing the Pin feet of cmos image sensor to be measured and electricity
Between the Pin feet of source open short-circuit conditions, Pin feet and ground Pin open between short-circuit conditions and power supply Pin and ground Pin open it is short
Road situation.
In conclusion the utility model will directly integrate to the hardware (algorithm computing module) for executing data algorithm processing
On the circuit board of detection module, by being done directly the processing of image algorithm in detection terminal, what is done so reduces data
Transmission, reduce the testing time.
The various aspects, embodiment, feature and example of the utility model, which should be regarded as, to be illustrative in all respects and does not beat
Limitation the utility model is calculated, the scope of the utility model is only defined by tbe claims.New without departing substantially from this practicality advocated
In the case of the spirit and scope of type, it will be apparent to those skilled in the art that other embodiments, modification and use.
The use of title and chapters and sections is not intended to limit the utility model in this application；Each chapters and sections can be applied to this
Any aspect, embodiment or the feature of utility model.
In this application, by element or component be known as being contained in and/or selected from described element or the component list it
Place, it should be appreciated that the element or component can by described any one of element or component and can be selected from by described element or
The group of the two in component or both composition described above.Furthermore, it is to be understood that in the spirit and model that are taught without departing substantially from the utility model
In the case of enclosing, the element and/or feature of composition described herein, equipment or method can combine and nothing in various ways
By clearly stating herein or implicit explanation.
Unless otherwise specific statement, otherwise term " include (include, includes, including) ", " have
The use of (have, has or having) " is it is generally understood that be open and without limitation.
Unless otherwise specific statement, otherwise the use of odd number herein includes plural (and vice versa).In addition, on unless
It clearly provides additionally below, otherwise singulative " one (a, an) " and " (the) " include plural form.In addition, in art
The use of language " about " place before magnitude, unless otherwise specific statement, otherwise the utility model teaching further includes particular magnitude
Itself.
It should be understood that the order of each step or the order of execution specific action are not particularly significant, as long as the utility model is taught
Show and keeps operable.In addition, two or more steps or action can be carried out at the same time.
It should be understood that each figure and explanation of the utility model are simplified with explanation and being clearly understood that the utility model
The element of pass, and eliminate other elements for clarity purpose.However, those skilled in the art will realize that these and
Other elements can be desirable.However, due to this class component be this technology in it is well known that and due to its do not promote to this
Utility model is best understood from, therefore the discussion to this class component is not provided herein.It will be appreciated that each figure is for diagram illustrating
Property purpose and present and not as structural pattern.Institute's omissions of detail and modification or alternate embodiment are in those skilled in the art
In the range of.
It can be appreciated that in the particular aspects of the utility model, single component can be replaced by multiple components and can be by single group
Part replaces multiple components to provide an element or structure or execute one or several given function.It will not be operated in addition to substituting herein
Other than in place of specific embodiment to put into practice the utility model, this replacement is considered as in the scope of the utility model.
Although describing the utility model with reference to an illustrative embodiment, those skilled in the art will appreciate that,
Without departing substantially from the utility model spirit and scope in the case of can make and various other change, omit and/or addition and can use real
Matter equivalent substitutes the element of the embodiment.In addition, many can be made without departing substantially from the scope of the utility model
Modification is so that particular condition or material adapt to the teaching of the utility model.Therefore, it is not intended to limit the utility model herein
In the disclosed specific embodiment for executing the utility model, and being intended to makes the utility model that will include to belong to appended power
All embodiments in the range of sharp claim.In addition, removing non-specific statement, otherwise any use of term first, second etc.
It does not indicate that any order or importance, but an element and another element is distinguished using term first, second etc..
Claims (10)
1. a kind of integrated circuit test system, which is characterized in that including：
Multiple detection modules with different detection functions, each detection module respectively with integrated circuit and number to be measured
It is connected according to processing module；
Data processing module, including PC machine and algorithm computing module, algorithm computing module are defeated for being provided according to detection module
Enter signal to be calculated, and result of calculation is uploaded to PC machine, wherein：
The algorithm computing module is integrated with the detection module.
2. integrated circuit test system according to claim 1, which is characterized in that the multiple detection module is integrated in together
On one circuit board.
3. integrated circuit test system according to claim 1, which is characterized in that the multiple detection module with it is to be measured
Switch selection circuit is provided between integrated circuit, the switch selection circuit selectivity connects on-off with the detection module
It opens.
4. integrated circuit test system according to claim 3, which is characterized in that further include a control panel, wherein：
The control panel optionally controls the one or more detection modules of execution.
5. integrated circuit test system according to claim 1 or 3, which is characterized in that the integrated circuit to be measured is
Cmos image sensor.
6. integrated circuit test system according to claim 5, which is characterized in that further include：
Light source provides input signal to integrated circuit to be measured.
7. integrated circuit test system according to claim 6, which is characterized in that an at least detection module is image sensing
Device, imaging sensor will collect image data from cmos image sensor and be uploaded to algorithm computing module.
8. integrated circuit test system according to claim 1, which is characterized in that the algorithm computing module and PC machine it
Between pass through USB interface or PCIe interface communication.
9. integrated circuit test system according to claim 1, which is characterized in that an at least detection module is detection of electrical leakage
Module.
10. integrated circuit test system according to claim 1, which is characterized in that an at least detection module be open circuit/it is short
Road detection module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820241152.4U CN207798988U (en) | 2018-02-11 | 2018-02-11 | Integrated circuit test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820241152.4U CN207798988U (en) | 2018-02-11 | 2018-02-11 | Integrated circuit test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207798988U true CN207798988U (en) | 2018-08-31 |
Family
ID=63276414
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820241152.4U Active CN207798988U (en) | 2018-02-11 | 2018-02-11 | Integrated circuit test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207798988U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110531252A (en) * | 2019-09-18 | 2019-12-03 | 四川豪威尔信息科技有限公司 | Management system when a kind of integrated circuit test device machine |
-
2018
- 2018-02-11 CN CN201820241152.4U patent/CN207798988U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110531252A (en) * | 2019-09-18 | 2019-12-03 | 四川豪威尔信息科技有限公司 | Management system when a kind of integrated circuit test device machine |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108107309A (en) | Integrated circuit test system | |
| CN106951370B (en) | Evaluation method and device for virtual reality equipment program running delay | |
| CN102840918A (en) | Method for managing and analyzing infrared spectrogram of electric transmission and transformation equipment | |
| CN103616560A (en) | Automatic power consumption parameter testing device and method applied to avionics device | |
| CN108322737B (en) | Method and device for measuring camera shooting frame rate | |
| CN207798988U (en) | Integrated circuit test system | |
| CN108804298B (en) | Device for testing response time of SCADA system | |
| CN205067616U (en) | General test platform | |
| CN105374029A (en) | Segmenting method and system of transformer substation equipment infrared image interest areas | |
| JP2001235501A (en) | Inspection device and sensor | |
| CN203012047U (en) | Avionics device function test system | |
| CN203070014U (en) | Control circuit based on multi-path acquisition single-path conversion of current sensors | |
| CN106199373A (en) | Electronic equipment intelligent failure diagnosis method and device | |
| CN206039476U (en) | Infrared LED and infrared touch frame | |
| CN107290649B (en) | Television board card testing device | |
| CN105182131A (en) | General test platform and test method | |
| CN201170771Y (en) | Image-rebuilding device for optical chromatography detection | |
| CN207516439U (en) | Alternating current acquisition module and detection device | |
| CN110677635B (en) | Data parameter field setting system | |
| CN212343955U (en) | Data stability test circuit of image acquisition card | |
| CN110470982A (en) | A kind of relay efficient detection system | |
| CN212211227U (en) | D-PHY image-fetching adapter | |
| CN105608873A (en) | Electricity marketing data acquisition device | |
| CN102435891B (en) | Automatic test device of vehicle central electric junction box | |
| CN104867201A (en) | Mobile terminal equipment for operation and maintenance |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |