CN108092627A - D class power amplifier systems - Google Patents
D class power amplifier systems Download PDFInfo
- Publication number
- CN108092627A CN108092627A CN201611047379.7A CN201611047379A CN108092627A CN 108092627 A CN108092627 A CN 108092627A CN 201611047379 A CN201611047379 A CN 201611047379A CN 108092627 A CN108092627 A CN 108092627A
- Authority
- CN
- China
- Prior art keywords
- tube
- power amplifier
- capacitance
- input signal
- down tube
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/181—Low frequency amplifiers, e.g. audio preamplifiers
- H03F3/183—Low frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R3/00—Circuits for transducers, loudspeakers or microphones
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/03—Indexing scheme relating to amplifiers the amplifier being designed for audio applications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/351—Pulse width modulation being used in an amplifying circuit
Abstract
The present invention relates to a kind of D classes power amplifier systems, the pull-down circuit of high-impedance state is placed in including D classes power amplifier, loudspeaker, sectional pressure element group and one, the output terminal connection loudspeaker of D class power amplifier systems, the sectional pressure element group connects the loudspeaker other end, down tube preferentially starts in the case that logic module is double N pipes for D classes power amplifier, and a boostrap circuit is connected to the upper tube gate input also by the down tube priority logic starting module.When the upper tube of D class power amplifiers is P pipes, down tube is N pipes, no boostrap circuit and down tube priority logic starting module.Upper tube, down tube and the lower trombone slide are turned off under original state, it realizes that loudspeaker both ends no-voltage is poor with the high-impedance state state of the D class power amplifiers and the sectional pressure element group of the loudspeaker other end, there is stable DC to put down, normal power amplifier is then carried out again, and start puff sound is eliminated with this.Puff sound completely eliminates when can realize start using the present invention of the structure, and without waiting for long available machine time.
Description
Technical field
The present invention relates to the field of audio processing, in particular to a kind of D classes of audio frequency power amplifier field more particularly to D class power amplifiers
Power amplifier system.
Background technology
The audio frequency power amplifier of the single supply power supply under Single-end output pattern is operated in, the dc point of output is usually in
Level point that is to say 1/2 supply voltage.Since circuit initially exports DC level as low level, and during dc point is
Level point, (start recovers from holding state) output DC level is increased to the mistake of mid point level by low level during startup
Cheng Ruguo is uncontrolled or control is improper, often causes apparent puff sound.In order to eliminate the puff that DC voltage transition is brought
Sound, it is necessary to which a slowly varying DC potential lifting mode is set.
For D class power amplifiers, output signal is PWM wave, and Static output is the square-wave signal of 50% duty cycle, corresponding
DC level be mid point level.If being not added with rationally control only to export by above-mentioned 50% duty cycle square wave, above-mentioned DC level lift
Lifting speed can be fast so as to cause puff sound.
High-impedance state is added in a series of 50% duty cycle square wave by the prior art, is realized to DC level lifting speed
The control of degree so as to avoid puff sound, but can not avoid starting up speed slack-off.For some to the response time require should
With the technical approach just seems that fish can not get both with bear's paw.
United States Patent (USP) US7279965B2, to the solution of the problem approximately as：Believe in patent structure comprising PWM
Number and VALID reset signals, when VALID signals are low level output be high-impedance state, be high level when then according to pwm signal
High and low to export high and low level accordingly, circuit connection diagram refers to Fig. 1, and it is proposed for different PWM wave signals
Different VALID signals to adapt to different working conditions, refer to Fig. 2 and Fig. 3, the output letter in described Fig. 2 and Fig. 3
The PWM wave of 50% duty cycle number is equivalent to, i.e., is charged according to 1/2 times of supply voltage to the derided capacitors, when in height
During resistance state, which, which does not charge, does not also discharge, and main function is the speed for slowing down charging.Due to the burst length of beginning is short,
The high-impedance state time is long, so that charging rate is slow, DC voltage rises is slow, burst length below is long, the high-impedance state time is short straight
It is completely consistent with the PWM waveform of input to output state.In this way, the time that DC level is established is greatly increased
As long as sequence design is reasonable, can just the rise time be caused to avoid audiorange so as to avoid the generation of puff sound.
But the shortcomings that such method, is it is also obvious that be exactly that must increase the high-impedance state of long period to evade charging rate mistake
The problem of fast, except increasing additional algorithm expense, also results in that starting up speed is slack-off, because to wait gradual charging
How journey is had become can also accelerate the speed of start while eliminating puff sound with simpler mode and current is badly in need of what is solved
Problem.
The content of the invention
In order to overcome above-mentioned the problems of the prior art, the present invention, which proposes one kind, can either accelerate starting up speed, simultaneously
Start puff sound and energy saving and cost D classes power amplifier system can be efficiently eliminated again.
The D class power amplifiers system of the present invention has such as lower structure：
The D class power amplifier systems, including D classes power amplifier, loudspeaker and sectional pressure element group, are mainly characterized by, the D classes
Power amplifier includes a Single-end output end, and the Single-end output end of the D class power amplifiers connects the first end of the loudspeaker, the loudspeaker
The second end connection sectional pressure element group, it is in high resistant that the Single-end output end of the D class power amplifiers, which is also associated with an initial output,
The pull-down circuit of state.
It is preferred that the sectional pressure element group includes first resistor, second resistance, the first capacitance and the second capacitance, it is described
First resistor and second resistance resistance value it is equal, first capacitance and the capacitance of the second capacitance it is equal and described
The first end of one resistance, the first end of second resistance, the first end of the first end of the first capacitance and the second capacitance with the loudspeaker
Second end be connected, the second end ground connection of the second end of first capacitance and first resistor, second capacitance
Second termination high level of second end and second resistance.
It is preferred that the pull-down circuit is made of lower trombone slide, pull down resistor and RESET switch, the source of the lower trombone slide
Pole is connected by the pull down resistor with the output terminal of the D class power amplifiers, drop-down tube grid connection RESET switches, under this
The grounded drain of trombone slide, and the lower trombone slide is closed.
It is preferred that Single-end output end includes a upper tube and a down tube, the top tube and down tube are N pipes, and described
The grid of upper tube and the grid of down tube are connected to a down tube and preferentially start logic module.
More preferably, the D class power amplifier systems further include a boostrap circuit, and the boostrap circuit is by a diode
The anode of diode in series and described connects a GVDD power supplys with a capacitance, and the cathode connection of the diode is described
Down tube preferentially starts logic module, and one end of the capacitance also preferentially starts logic module with the down tube and is connected, and the electricity
The other end of appearance is connected with the Single-end output end of the D class power amplifiers, and the GVDD power supplys preferentially start for the down tube patrols
Collect the driving power of module.
It is made of it is particularly preferred that the down tube preferentially starts logic module a rising edge d type flip flop and two transmission gates,
The CP ends of the rising edge d type flip flop connect tube grid input signal, and D ends and Rd ends are all connected with the GVDD electricity
Source, described two transmission gates are made of the first transmission gate and the second transmission gate, and the IN sections of first transmission gate and
The IN ends of second transmission gate connect tube grid input signal and the lower tube grid input signal on one respectively, and described first
The anode and capacitance of the diode of the transmission gate connection boostrap circuit, the second transmission gate connection GVDD power supplys, and
Output terminal of the Enable Pin of two transmission gates with the rising edge d type flip flop is connected, and described first passes
The output terminal of defeated door is connected with the grid of the upper tube, the output terminal of second transmission gate and the grid of the down tube
Pole is connected.
It is still further preferred that the PWM letters that it is 50% that the upper tube grid input signal and lower tube grid input signal, which are duty cycle,
Number, and the upper tube grid input signal and lower tube grid input signal opposite in phase, the lower tube grid input signal
It is preferably high level.
It is preferred that the upper tube, down tube are respectively P pipes and N pipes.
It is particularly preferred that the gate input of the top tube and down tube inputs tube grid input signal and a down tube on one respectively
Grid input signal, the upper tube grid input signal and lower tube grid input signal are the pwm signal that duty cycle is 50%.
Using the D class power amplifier systems of this kind of structure, since its bleeder circuit is using capacitance and electric resistance partial pressure, and originate
The high-impedance state that the output terminal of state D class power amplifiers is kept, the load of the D class power amplifiers is in stable DC offset voltage
In, it eliminates the common DC level from pull-down state to stabilized supply voltage and establishes process, and preferentially exported using down tube
The mode of high level is charged to the boostrap circuit of upper tube connection, drives the grid of upper tube, makes system worked well.
The present invention, which has, compared with the more simple method of the prior art, is also not required to the top tube and down tube input to D class power amplifiers
The logical sequence of signal carries out complex control, and overhead is small, and due to without dragging opening for slow system with prolonged high-impedance state
Dynamic time, timeliness are also ensured.The effect of present invention elimination puff sound is from principle it is clear that without in the prior art
Load both ends level from low to high gradual establishes process, thus completely no puff sound load is disturbed.
Description of the drawings
Fig. 1 is a kind of circuit connection diagram of D classes power amplifier system of the prior art.
Fig. 2 is the D classes power amplifier electricity in a kind of a kind of specific embodiment A of D classes power amplifier system of the prior art
The control of road system and output signal timing diagram.
Fig. 3 is the D class power amplifier controls in a kind of a kind of specific embodiment B of D classes power amplifier system of the prior art
System exports signal timing diagram with upper tube.
Fig. 4 is the D class power amplifier systems of the invention circuit connection diagram in double N pipes.
Fig. 5 is that the down tube of the D class power amplifier systems of the present invention preferentially starts the exemplary block diagram of logic.
Fig. 6 is method figure of the D class power amplifier systems of the present invention in double N pipes.
Fig. 7 be the present invention up and down tube grid of the D class power amplifier systems in double N pipes input PWM wave signal and first,
The enable signal of second transmission gate and the logic timing figure for exporting signal.
Fig. 8 is circuit connection diagram of the D class power amplifier systems of the present invention in NP pipes.
Fig. 9 is method figure of the D class power amplifier systems of the present invention in NP pipes.
Specific embodiment
The present invention will be described in order to better illustrate, enumerate below some embodiments to carry out the present invention it is further
Explanation.
The D class power amplifier systems, including D classes power amplifier, loudspeaker and sectional pressure element group, wherein, the D class power amplifiers include
One Single-end output end, the first end of the loudspeaker described in the Single-end output end connection of the D class power amplifiers, the second end of the loudspeaker connect
The sectional pressure element group is connect, it is the drop-down in high-impedance state that the Single-end output end of the D class power amplifiers, which is also associated with an initial output,
Circuit.
The sectional pressure element group includes first resistor, second resistance, the first capacitance and the second capacitance, the described first electricity
Resistance is equal with the resistance value of second resistance, first capacitance and the equal and described first resistor of the capacitance of the second capacitance
The second end of first end, the first end of second resistance, the first end of the first end of the first capacitance and the second capacitance with the loudspeaker
Be connected, the second end ground connection of the second end of first capacitance and first resistor, the second end of second capacitance and
Second termination high level of second resistance.
The pull-down circuit is made of lower trombone slide, pull down resistor and RESET switch, and the source electrode of the lower trombone slide passes through institute
The pull down resistor stated is connected with the output terminal of the D class power amplifiers, drop-down tube grid connection RESET switches, the leakage of the lower trombone slide
Pole is grounded, and the lower trombone slide is closed.
Referring to Fig. 4, in a kind of preferably embodiment, Single-end output end includes a upper tube and a down tube, and described is upper
Pipe and down tube are N pipes, and the grid of the upper tube and the grid of down tube are connected to a down tube and preferentially start logic module.
In this particular embodiment, the D class power amplifier systems further include a boostrap circuit, the boostrap circuit
One GVDD power supplys are connected by the anode of a diode and a capacitance diode in series and described, in holding state or
Power on original state, the RESET in the pull-down circuit is high level so that output terminal pulls down, and a power supply GVDD passes through two
Pole pipe charges to upper tube grid driving power BST.GVDD controls the unlatching of down tube, and BST is higher by due to booting compared with output terminal
One voltage close to GVDD, such top tube and down tube equally can be normally-open.If lack drop-down step, under described
Puller circuit is in high-impedance state output, and the gate drive power BST of upper tube does not charge, and driving voltage deficiency, upper tube cannot be normal
It opens.Logic module is preferentially started by a down tube, the down tube for making the cathode connection of the diode of the boostrap circuit described
Preferential to start logic module, one end of the capacitance also preferentially starts logic module with the down tube and is connected, and the capacitance
The other end is connected with the Single-end output end of the D class power amplifiers, and the GVDD power supplys preferentially start logic mould for the down tube
The driving power of block.
Referring to Fig. 5, the down tube preferentially starts logic module by a rising edge d type flip flop and two transmission gate institute structures
Into the CP ends of the rising edge d type flip flop connect tube grid input signal, and D ends and Rd ends are all connected with described
GVDD power supplys, described two transmission gates are made of the first transmission gate and the second transmission gate, and first transmission gate
Tube grid input signal in IN ends connection one, the lower tube grid input signal described in the IN ends of second transmission gate are described
The first transmission gate connection boostrap circuit diode anode and capacitance, the second transmission gate connection GVDD electricity
Source, and output terminal of the Enable Pin of described two transmission gates with the rising edge d type flip flop is connected, and described
The output terminal of one transmission gate is connected with the grid of the upper tube, the output terminal of second transmission gate and the down tube
Grid be connected.
Referring to Fig. 7, the upper tube grid input signal and lower tube grid input signal are the PWM that duty cycle is 50%
Signal, and the upper tube grid input signal and lower tube grid input signal opposite in phase, lower tube grid input letter
Number it is preferably high level.
Referring to Fig. 6, the system of D class power amplifiers Single-end output start effect optimization is realized based on system above, it is worked
Journey comprises the following steps：
(1) system electrification described in, the upper tube, down tube and pull-down circuit are in closed state, the D class work(
The output terminal output high-impedance state put, the stable DC at the loudspeaker both ends is put down to be influenced from the D classes power amplifier, the loudspeaker
Both ends are established stable DC by the sectional pressure element and are put down；
(2) the input signal input of the system down tube preferentially starts logic module, and the down tube is to described
Upper tube gate drive power charges；
(3) down tube described in preferentially starts the logic mould control upper tube and opens, and system enters normal communication work shape
State.
The input signal is divided into tube grid input signal and lower tube grid input signal, and the upper tube grid
Input signal and lower tube grid input signal are the pwm signal that duty cycle is 50%, and the upper tube grid input signal with
Lower tube grid input signal opposite in phase, the lower tube grid input signal is preferably high level.
In a kind of specific embodiment, the upper tube grid input signal preferentially exports low level, under described
Tube grid input signal preferentially exports high level, and upper tube grid input signal and lower tube grid input signal are phase relation with accounting for
The PWM wave that sky ratio and actual circuit are adapted.
The step (2) is specially：
The input signal input down tube preferentially starts logic module, and the lower tube grid input signal is excellent
First input high level, the rising edge d type flip flop CP ends input lower tube grid input signal from 0 to high level process, give
Described one rising edge signal of rising edge d type flip flop, the height of the current D ends input of storage of the rising edge d type flip flop
Level GVDD, to first transmission gate and the second transmission gate input high level enable signal, since down tube and upper tube input
PWM wave opposite in phase, the grid input low level of the upper tube described at this time, which is not turned on, the lower tube grid
Input high level charges to the upper tube gate drive power, makes the level lifting of the upper tube gate drive power.
The step (3) is specially：
The CP terminations of the rising edge d type flip flop receive the rising that the input signal changes to high level generation by 0
Edge, the Q ends of the rising edge d type flip flop are high electric to the Enable Pin of first transmission gate and the Enable Pin input of the second transmission gate
Flat enable signal, first, second transmission gate conducting, the upper tube gate input voltage and upper tube gate drive power
The BST inputs upper tube grid, the upper tube is normally-open, and the upper tube grid voltage and the upper tube grid drive
The grid of the dynamic power supply BST drivings upper tube, upper tube normal work, the system worked well.
Referring to Fig. 8, in a kind of preferred embodiment, the upper tube, down tube are respectively P pipes and N pipes, and described is upper
Pipe and the gate input of down tube input on one tube grid input signal and once tube grid input signal respectively, and described upper
Tube grid input signal and lower tube grid input signal are the pwm signal that duty cycle is 50%.
In a kind of specific embodiment, the upper tube grid input signal and lower tube grid input signal are phase
The relation PWM wave adaptable with the needs of duty cycle and actual circuit.
Referring to Fig. 9, the system of D class power amplifiers Single-end output start effect optimization is realized based on system above, it is worked
Journey comprises the following steps：
(1) system electrification described in, the upper tube, down tube and pull-down circuit are in closed state, the D class work(
Output high-impedance state is put, the loudspeaker both ends are put down by the vertical stable DC of sectional pressure element establishment；；
(2) the input signal input of the system top tube and down tube, the system enter normal communication working condition.
The present invention includes following two methods according to the concrete condition of D class power amplifier top tube and down tube：
First, for upper tube using bootstrap approach driving, upper down tube be N pipes D class power amplifiers, after system electrification, loudspeaker
Other end of DC potential is just had built up in mid point level.Circuit complete initialize after, the D class power amplifiers
Output terminal keeps high-impedance state output, i.e., upper tube, down tube are in off state, and lower trombone slide is also in off state, such direct current biasing
It remains on external reference midpoint potential.For structure of the upper tube using bootstrap power supply driving, output terminal is in initial shape
If not drop-down, can cause to drive the bootstrap power supply of upper tube that cannot charge under state.This is solved the problems, such as, as long as ensureing initial shape
State is switched to before working condition, and down tube is specified to export low level first, is charged to the bootstrap power supply of upper tube, upper tube raster data model
Power supply does not interfere with the working condition of down tube in place, as long as completing the charging of bootstrap power supply in the low level stage.
Referring to Fig. 4, loudspeaker right end R1=R2, C1=C2 after the power is turned on, therefore its DC level is 1/2PVDD (power electricity
Source), upper tube, the down tube of loudspeaker left end are in off state, the closing of lower trombone slide makes pull-down circuit be in high-impedance state, the D classes
Power amplifier output terminal keeps high-impedance state, and loudspeaker both ends do not have pressure difference.Then the grid end of upper down tube starts to receive pwm signal to start work
Make, first down tube is controlled to open (preferentially starting logic realization by down tube), then grid driving power, that is, bootstrap power supply of upper tube starts
It charges.Whole system comes into alternate current operation state at this time, and DC potential no longer changes, because without there is apparent puff sound.
Referring to Fig. 7, the principle that down tube preferentially starts logic is after circuit start, lower tube grid input signal head
First export 50% duty cycle pwm signal, and preferentially export high level, at this time upper tube grid input signal for phase with it is described
Lower tube grid input signal it is opposite, duty cycle be also 50% PWM wave, it is low level first to export.Specific implementation is,
Rising edge detection is carried out to the down tube grid driving pwm signal of script, the transmission gate enable signal of upper and lower tube grid connection is set to height
Level reaches, and what is inputted first due to down tube is high level, and upper tube input low level first, the upper tube is not turned on, described
Down tube charges to upper tube driving power；After the overturning of upper tube grid input signal is high level, the driving power
Charging complete.This ensure that down tube is opened prior to upper tube, prevent upper tube from but driving electricity without sufficiently large upper tube after opening
Upper tube is driven to work normally in source.
And when D classes power amplifier is P pipes, the efferent duct structure that down tube is N pipes using upper tube, then this method flow then please
Refering to Fig. 8 and Fig. 9, after system electrification, the peripheral condition that 1/2 supply voltage is had been built up using the loudspeaker other end is initialized,
Keep the output (rather than common pull-down pattern) of high-impedance state so that the DC state at loudspeaker both ends is consistent, then opens output
Just it is avoided that puff sound.At this time without the concern for bootstrap power supply charging problems, thus method flow under these conditions is managed with double N
Shi Shangguan is different using the D classes power amplifier of bootstrap power supply driving.
The D class power amplifiers of the present invention further include the digital power amplifier of the I2S inputs using D classes power amplifier as power stage.
Using the D class power amplifier systems of this kind of structure, since its bleeder circuit is using capacitance and electric resistance partial pressure, and originate
The high-impedance state that the output terminal of state D class power amplifiers is kept, the load of the D class power amplifiers is in stable DC offset voltage
In, it eliminates the common DC level from pull-down state to stabilized supply voltage and establishes process, and preferentially exported using down tube
The mode of high level is charged to the boostrap circuit of upper tube connection, drives the grid of upper tube, makes system worked well.
The present invention, which has, compared with the more simple method of the prior art, is also not required to the top tube and down tube input to D class power amplifiers
The logical sequence of signal carries out complex control, and overhead is small, and due to without dragging opening for slow system with prolonged high-impedance state
Dynamic time, timeliness are also ensured.The effect of present invention elimination puff sound is from principle it is clear that without in the prior art
Load both ends level from low to high gradual establishes process, thus completely no puff sound load is disturbed.
In this description, the present invention is described with reference to its specific embodiment.But it is clear that it can still make
Various modifications and alterations are without departing from the spirit and scope of the present invention.Therefore, specification and drawings should be considered as illustrative
And not restrictive.
Claims (9)
- A kind of 1. D classes power amplifier system, including D classes power amplifier, loudspeaker and sectional pressure element group, which is characterized in that the D class work( It puts including a Single-end output end, the first end of the Single-end output ends of the D class power amplifiers connection loudspeaker, the of the loudspeaker The two ends connection sectional pressure element group, it is in high-impedance state that the Single-end output end of the D class power amplifiers, which is also associated with an initial output, Pull-down circuit.
- 2. D classes power amplifier system according to claim 1, which is characterized in that the sectional pressure element group includes first The resistance value of resistance, second resistance, the first capacitance and the second capacitance, the first resistor and second resistance is equal, and described The first end of the equal and described first resistor of the capacitance of one capacitance and the second capacitance, the first end of second resistance, the first capacitance First end and the first end of the second capacitance be connected with the second end of the loudspeaker, and the second end of first capacitance and The second end of the first resistor is grounded, the second end of second capacitance and the second termination of the second resistance High level.
- 3. D classes power amplifier system according to claim 1, which is characterized in that the pull-down circuit by lower trombone slide, under Pull-up resistor and RESET switches are formed, the output terminal phase that the source electrode of the lower trombone slide passes through the pull down resistor and the D class power amplifiers Connection, drop-down tube grid connection RESET switches, the grounded drain of the lower trombone slide, and the lower trombone slide is closed.
- 4. D classes power amplifier system according to claim 1, which is characterized in that the Single-end output end is included on one Pipe and a down tube, the top tube and down tube are N pipes, and the grid of the upper tube and the grid of down tube are connected to Pipe is preferential to start logic module..
- 5. D classes power amplifier system according to claim 4, which is characterized in that the D class power amplifier systems are also wrapped A boostrap circuit is included, the boostrap circuit is connected by the anode of a diode and a capacitance diode in series and described Connect a GVDD power supplys, the down tube that the cathode connection of the diode is described preferentially starts logic module, one end of the capacitance also with institute The down tube stated preferentially starts logic module and is connected, and the other end of the capacitance is connected with the Single-end output end of the D class power amplifiers, The GVDD power supplys preferentially start the driving power of logic module for the down tube.
- 6. D classes power amplifier system according to claim 5, which is characterized in that the down tube preferentially starts logic mould Block is made of a rising edge d type flip flop and two transmission gates, and the CP ends of the rising edge d type flip flop connect tube grid Input signal, D ends and Rd ends are all connected with the GVDD power supplys, and described two transmission gates are passed by the first transmission gate and second Defeated door is formed, and tube grid input signal in the IN ends connection one of first transmission gate, second transmission gate The IN ends connection lower tube grid input signal, the diode of first transmission gate connection boostrap circuit is just Pole and capacitance, the second transmission gate connection GVDD power supplys, and the Enable Pin of described two transmission gates with it is described upper It rises and is connected along the output terminal of d type flip flop, and the output terminal of first transmission gate is connected with the grid of the upper tube, The output terminal of second transmission gate is connected with the grid of the down tube.
- 7. D classes power amplifier system according to claim 6, which is characterized in that the upper tube grid input signal and Lower tube grid input signal is the pwm signal that duty cycle is 50%, and the upper tube grid input signal and lower tube grid are defeated Enter signal phase on the contrary, the lower tube grid input signal is preferably high level.
- 8. D classes power amplifier system according to claim 1, which is characterized in that the upper tube is managed for P, under described It manages and is managed for N.
- 9. D classes power amplifier system according to claim 8, which is characterized in that the gate input of the upper tube is defeated Enter on one the gate input of tube grid input signal and down tube tube grid input signal once, the upper tube grid Input signal and lower tube grid input signal are the pwm signal that duty cycle is 50%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611047379.7A CN108092627B (en) | 2016-11-23 | 2016-11-23 | Class D power amplifier circuit system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611047379.7A CN108092627B (en) | 2016-11-23 | 2016-11-23 | Class D power amplifier circuit system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108092627A true CN108092627A (en) | 2018-05-29 |
| CN108092627B CN108092627B (en) | 2021-05-18 |
Family
ID=62171153
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611047379.7A Active CN108092627B (en) | 2016-11-23 | 2016-11-23 | Class D power amplifier circuit system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108092627B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102983825A (en) * | 2012-11-16 | 2013-03-20 | 上海贝岭股份有限公司 | Category D amplifier chip |
| US20140002144A1 (en) * | 2009-12-17 | 2014-01-02 | Elpida Memory, Inc. | Semiconductor device with buffer and replica circuits |
| CN203435137U (en) * | 2013-09-18 | 2014-02-12 | 上海贝岭股份有限公司 | Circuit for eliminating shutdown POP sound of audio power amplifier |
| CN103702048A (en) * | 2013-12-27 | 2014-04-02 | 乐视致新电子科技（天津）有限公司 | Method and system for eliminating television noise |
| CN204810526U (en) * | 2015-06-30 | 2015-11-25 | 无锡华润矽科微电子有限公司 | 2. 1 digital sound system of sound channel based on switching power supply and D class power amplifier |
-
2016
- 2016-11-23 CN CN201611047379.7A patent/CN108092627B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140002144A1 (en) * | 2009-12-17 | 2014-01-02 | Elpida Memory, Inc. | Semiconductor device with buffer and replica circuits |
| CN102983825A (en) * | 2012-11-16 | 2013-03-20 | 上海贝岭股份有限公司 | Category D amplifier chip |
| CN203435137U (en) * | 2013-09-18 | 2014-02-12 | 上海贝岭股份有限公司 | Circuit for eliminating shutdown POP sound of audio power amplifier |
| CN103702048A (en) * | 2013-12-27 | 2014-04-02 | 乐视致新电子科技（天津）有限公司 | Method and system for eliminating television noise |
| CN204810526U (en) * | 2015-06-30 | 2015-11-25 | 无锡华润矽科微电子有限公司 | 2. 1 digital sound system of sound channel based on switching power supply and D class power amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108092627B (en) | 2021-05-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104409057B (en) | A kind of scan drive circuit | |
| CN104464628B (en) | Shifting register unit, driving method of shifting register unit, grid drive circuit and display device | |
| CN107464521A (en) | Shift register cell, gate driving circuit and driving method, display device | |
| CN106023936B (en) | Scan drive circuit and flat display apparatus with the circuit | |
| CN106652876A (en) | Shift register unit, driving method, gate drive circuit and display device | |
| CN105427793A (en) | Voltage control circuit and method, grid driving circuit, and display apparatus | |
| CN108492789A (en) | A kind of gate driver on array unit, circuit and liquid crystal display panel | |
| CN105048791A (en) | Power tube control system and external power tube driving circuit for switching power supply | |
| CN106098002B (en) | Scan drive circuit and flat display apparatus with the circuit | |
| CN102497145A (en) | H-bridge driving circuit | |
| CN106448594A (en) | Gate drive circuit with high reliability | |
| CN106251820B (en) | Gate driving circuit for in-cell touching display screen | |
| CN105761758A (en) | Shifting register unit, driving method, grid driving circuit and display device | |
| CN105513530A (en) | Shift register and control method thereof | |
| CN105048790A (en) | Power tube control system and drive circuit for driving external power tube | |
| CN102647177A (en) | High-voltage side gate driving circuit capable of resisting common-mode noise interference | |
| CN106505839A (en) | A kind of IGBT device drive circuit and method for reducing closing loss | |
| CN106098016A (en) | Scan drive circuit and there is the flat display apparatus of this circuit | |
| CN106023941A (en) | Level transfer circuit, driving method thereof, grid drive circuit and display device | |
| CN107507591A (en) | A kind of scan drive circuit and liquid crystal display | |
| CN102508014B (en) | Power line carrier communication zero-crossing detection system and method thereof | |
| CN108092627A (en) | D class power amplifier systems | |
| CN105185289B (en) | Gate driving circuit, display panel closedown method, display panel and display device | |
| CN109586574A (en) | A kind of three-level buck circuit and its control method | |
| CN109859701A (en) | Shift registor and gate driving circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 214135 -6, Linghu Avenue, Wuxi Taihu international science and Technology Park, Wuxi, Jiangsu, China, 180 Applicant after: China Resources micro integrated circuit (Wuxi) Co., Ltd Address before: No.180-22, Linghu Avenue, Taihu International Science and Technology Park, Wuxi City, Jiangsu Province, 214000 Applicant before: WUXI CHINA RESOURCES SEMICO Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |