CN108089108B - Method and device for evaluating electrostatic discharge protection device and computer readable storage medium - Google Patents
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Abstract
The embodiment of the invention provides an electrostatic discharge protection device evaluation method, an electrostatic discharge protection device evaluation device and a computer-readable storage medium, and is applied to the technical field of electronics. The method is suitable for an ESD protection device with a grounded-gate N-channel field effect transistor structure, and comprises the following steps: determining self-heating thermal resistance of the ESD protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device; evaluating thermal stability of the ESD protection device according to the self-heating thermal resistance. The problem of prior art electrothermal effect to ESD protection device and protected core circuit influence greatly, harm the normal work of chip is solved.
Description
[ technical field ] A method for producing a semiconductor device
The present invention relates to the field of electronic technologies, and in particular, to a method and an apparatus for evaluating an electrostatic discharge protection device, and a computer-readable storage medium.
[ background of the invention ]
As electrostatic Discharge (ESD) protection devices are widely used in various analog integrated circuits, radio frequency integrated circuits and mixed signal integrated circuit chips, their own thermal stability becomes especially critical. Although the ESD protection device possesses good electrical characteristics, it causes a sharp increase in the lattice temperature of the ESD protection device itself when it discharges a transient high voltage, large current electrostatic pulse by means of a single device or a combination of devices. The ESD protection device generates heat in a short time and a limited space to generate certain heat, which causes the electrical parameters of the protected core circuit to drift, reduces the rated safe working range of the core circuit, causes the functional failure of the protected core circuit, and generates irreversible heat dissipation. This mechanism of device temperature rise caused by the ESD protection device dissipating power is referred to as the protection device electrothermal effect. The electrothermal effect has great influence on the ESD protection device and the protected core circuit, and the normal work of the chip is damaged.
[ summary of the invention ]
In view of this, embodiments of the present invention provide an ESD protection device evaluation method, an ESD protection device evaluation apparatus, and a computer-readable storage medium, so as to solve the problem that the normal operation of a chip is damaged due to a large influence of an electrothermal effect on an ESD protection device and a protected core circuit in the prior art.
In one aspect, an embodiment of the invention provides an ESD protection device evaluation method. The method is suitable for an ESD protection device with a grounded-gate N-channel field effect transistor structure, and comprises the following steps:
determining self-heating thermal resistance of the ESD protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device;
evaluating thermal stability of the ESD protection device according to the self-heating thermal resistance.
The above-mentioned aspect further provides an implementation manner, further including:
and the active area of the ESD protection device is equivalent to a parallelepiped, and the thermal conductivity, the bulk density and the heat dissipation surface area are determined according to the parallelepiped.
The above aspects and any possible implementations further provide an implementation where determining the self-thermal resistance of the ESD protection device based on the thermal conductivity, the bulk density, the heat dissipation surface area, and the ambient temperature of the ESD protection device comprises:
and determining the self-heating resistance of the ESD protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device by combining the law of conservation of energy.
The above aspects, and any possible implementations, further provide an implementation,
the evaluating the thermal stability of the ESD protection device according to the self-heating thermal resistance comprises:
the smaller the magnitude of the self-heating resistance variation with dissipated power, the higher the thermal stability of the ESD protection device.
The above aspects, and any possible implementations, further provide an implementation,
the determining the self-heating resistance of the ESD protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device comprises:
wherein R isthM is the mass of the ESD protection device,
m＝ρV0
ρ is the bulk density, V0Equal to the heat dissipation surface area multiplied by the ESD protectionThe thickness of the device is such that,
in order to obtain a heat flux,
α is the thermal conductivity of the ESD protection device, cpFor heat capacity, β is the coefficient and t is the time.
The above aspects, and any possible implementations, further provide an implementation,
the thickness of the ESD protection device is a fixed constant.
On the other hand, the embodiment of the invention provides an evaluation device of an ESD protection device. The device is suitable for the ESD protection device of grid ground N channel field effect transistor structure, and the device includes:
the determining unit is used for determining the self-heating resistance of the ESD protection device according to the heat conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device;
and the evaluation unit is used for evaluating the thermal stability of the ESD protection device according to the self-heating thermal resistance.
The above aspect and any possible implementation further provide an implementation, where the determining unit is further configured to equate an active region of the ESD protection device with a parallelepiped, and determine the thermal conductivity, the bulk density, and the heat dissipation surface area according to the parallelepiped.
The above aspects and any possible implementations further provide an implementation, where the determining unit is further configured to determine the self-heating resistance of the ESD protection device according to a thermal conductivity, a bulk density, a heat dissipation surface area, and an ambient temperature of the ESD protection device, in combination with a law of conservation of energy.
In another aspect, the present application provides a computer-readable storage medium, which includes computer-readable instructions, when read and executed by a computer, cause the computer to perform the method according to any one of the foregoing aspects.
One of the above technical solutions has the following beneficial effects:
according to the embodiment of the invention, the thermal stability of the ESD protection device can be effectively evaluated based on the self-heating thermal resistance, and the ESD protection device can be optimized by combining the evaluation of the thermal stability of the ESD protection device, so that the ESD protection device can protect a circuit more effectively, and the stability of the circuit is improved.
[ description of the drawings ]
Fig. 1 is a schematic flow chart of an ESD protection device evaluation method according to an embodiment of the present invention;
FIG. 2 is an example provided by an embodiment of the present invention;
FIG. 3 is another example provided by an embodiment of the present invention;
FIG. 4 is another example provided by an embodiment of the present invention;
fig. 5 is a functional block diagram of an ESD protection device evaluation apparatus according to an embodiment of the present invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination" or "in response to a detection", depending on the context. Similarly, the phrases "if determined" or "if detected (a stated condition or event)" may be interpreted as "when determined" or "in response to a determination" or "when detected (a stated condition or event)" or "in response to a detection (a stated condition or event)", depending on the context.
It should be noted that the terms "upper", "lower", "left", "right", and the like used in the description of the embodiments of the present invention are used in the angle shown in the drawings, and should not be construed as limiting the embodiments of the present invention. In addition, in this context, it is also to be understood that when an element is referred to as being "on" or "under" another element, it can be directly formed on "or" under "the other element or be indirectly formed on" or "under" the other element through an intermediate element.
Aiming at the problem that the electrothermal effect has great influence on an ESD protection device and a protected core circuit in the prior art, the embodiment of the invention provides the following solution ideas: an evaluation mode is provided to evaluate the thermal stability of the ESD protection device so as to take corresponding measures to reduce the influence of the electrothermal effect on the ESD protection device and the protected core circuit.
Under the guidance of this idea, the present embodiment provides the following feasible embodiments.
Example one
The embodiment of the invention provides an ESD protection device evaluation method.
Specifically, referring to fig. 1, it is a schematic flow chart of an ESD protection device evaluation method according to an embodiment of the present invention, the method is applied to an ESD protection device with a grounded-gate N-channel field effect transistor structure, as shown in fig. 1, and the method includes the following steps:
and S110, determining the self-heating resistance of the ESD protection device according to the heat conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device.
According to the energy conservation principle, the self-heating resistance of the ESD protection device can be determined according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device.
When calculating the thermal conductivity, the bulk density, and the heat dissipation area of the ESD protection device, the active region of the ESD protection device may be equivalent to a parallelepiped, and the thermal conductivity, the bulk density, and the heat dissipation area of the ESD protection device are calculated according to the parallelepiped.
In one example, fig. 2 shows a schematic diagram of an ESD protection device active region 200 based on a grounded-gate N-channel field effect transistor structure (ggNMOS). With the characteristic dimension of the device entering deep submicron order, the volume of the ESD protection device is very small, and the heating range of the active region of the ESD protection device can be equivalent to a parallelepiped. As shown in fig. 2, the length, width and height (thickness) of the active region of the protection device are b, a and c, respectively. The thickness is determined by the process level and material properties of the chip manufacturer, and is generally a fixed constant, and the heat source of the active area of the ESD protection device can be further equivalent to a rectangular heat source unit. Since the size of the equivalent rectangular heat source unit is in the submicron range, the temperature inside and outside the rectangular unit can be considered to be basically kept in thermal equilibrium, and the temperature of the central position of the rectangular unit can be used for representing the temperature of the active heating area.
In normal operation, the ESD protection device is in a quiescent state at a known temperature T0. When ESD event occurs, the protection device clamps high voltage, releases large current, and generates heat inside with power of Q0While a partial area A of the outer surface of the ESD protection devicesExposure to a temperature TfIn the chip package, the TfNamely the ambient temperature, the surface heat exchange coefficient between the chip and the tube shell is α, and the volume of the object for protecting the heat conducting area of the device is V0. The internal heat generation process of the ESD protection device follows the law of conservation of energy:
the sum of the heat entering the ESD protection device and the heat generated by the ESD protection device itself is equal to the sum of the heat exiting the ESD protection device and the change in the stored heat within the ESD protection device. Namely:
Hi+Hg＝Ho+Hs
is like
Wherein，HiIs the amount of heat entering the ESD protection device, i.e., the amount of heat generated by an ESD event, which is typically the product of the body discharge model (HBM) voltage and current, and is typically a constant.
HgThe heat energy generated by the ESD protection device along with the change of time can be calculated according to the formula II.
Hg＝Q0e-βt
Formula II
Where β is the differential equation coefficient and t is time.
HoIs the heat instantaneously transferred from the ESD protection device. Can be calculated according to the formula three.
Ho＝αAs(Tj-Tf)
Formula III
Wherein, TjIs the instantaneous peak temperature inside the ESD protection device.
HsIs the rate of change of the stored heat within the ESD protection device.
Wherein m is the mass of the ESD protection device, ρ is the bulk density, and V is0Equal to the heat dissipation surface area AsMultiplied by the thickness of the ESD protection device, cpIs the heat capacity.
Substituting the formula II, the formula III and the formula IV into the formula I to obtain:
in addition, the first and second substrates are,
θ＝Tj-Tfand, the combined formula five is obtained:
wherein the content of the first and second substances,
the heat flow rate and θ are temperature differences.
When the initial conditions are: t is 0, T0＝TfThen, combining formula six to yield:
according to JEDEC Standard No.51-1, ESD protection device self-heating resistance is defined as:
substituting the parameters into the formula eight to obtain the final expression of the self-heating resistance of the ESD protection device, wherein the final expression is as follows:
in another example, when a pulse of 0.6W is inputted from the outside of the ESD protection device, the self-heating resistance of the ESD protection device can be obtained according to the formula nine, as shown in fig. 2.
And S120, evaluating the thermal stability of the ESD protection device according to the self-heating thermal resistance.
The smaller the magnitude of the self-heating resistance variation with dissipated power, the higher the thermal stability of the ESD protection device.
The threshold value of the self-heating thermal resistance can be set, whether the self-heating thermal resistance is always smaller than the threshold value under the set condition is judged, and when the self-heating thermal resistance is always smaller than the threshold value, the ESD protection device is determined to meet the requirements.
Or, a temperature threshold may be set, and it may be determined whether the change in the temperature of the ESD protection device is always smaller than the threshold under the set condition according to the self-heating thermal resistance, and when the temperature of the ESD protection device is always smaller than the threshold, it is determined that the ESD protection device meets the requirement.
When an ESD event occurs, the protection device is started immediately to clamp the injected high voltage in a safe working area, and the large current enters the chip substrate through the discharge circuit. In the process, the generated heat is limited in the active region of the device, the self-heating resistance is small, and the protection device has better thermal stability. However, when the ESD pulse excitation is attenuated gradually with time, the conductance modulation effect and the electrothermal coupling mechanism inside the protection device act, the physical properties of various material layers constituting the protection device are changed microscopically, and part of electric energy is converted into heat energy, so that the temperature of the protection device is increased rapidly, and the self-heating resistance is increased continuously until the state approaches to an irreversible thermal failure state. For example, as shown in fig. 2, when the dissipation power is 0.6W, the corresponding self-heating resistance is 79.78 ℃/W, as the dissipation power decreases rapidly with time constant, the internal electric heating effect of the protection device acts, part of the electric energy is converted into heat energy, the heat energy cannot be conducted out rapidly in a narrow active heating area, the self-heating resistance gradually increases, and when the dissipation power decreases to 0.1W, the corresponding self-heating resistance rises to 478.7 ℃/W, so that the variation curve of the self-heating resistance of the ESD protection device reflected in fig. 2 along with the dissipation power conforms to the variation relationship between the heat resistance and the power consumption in the operation principle of the ESD protection device.
In one example, the ggNMOS protection device and the FOX protection device are evaluated in comparison according to the method described above. Fig. 3 shows temperature profiles of the conventional FOX protection device and the ggNMOS protection device obtained by combining formula 9 under the same ESD pulse excitation (0.6W). It can be seen from the temperature distribution graph that, during the operation of the ESD protection device, the temperature difference between the central region of the conventional FOX protection device and the temperatures at two sides of the protection device is 120 ℃, while the temperature distribution curve of the protection device adopting the ggNMOS structure is relatively flat, and the temperature difference between the highest temperature of the central region and the temperatures at two sides of the protection device is only 90 ℃. In addition, the highest junction temperature of the ggNMOS protection device is 135 ℃, and is reduced by 41 ℃ compared with the highest junction temperature of the FOX protection device. Therefore, the observation curve shows that the temperature distribution characteristic amplitude of the ESD protection device with the ggNMOS structure is small and gradually gentle, the self-heating resistance is reduced, and the thermal stability is higher.
It should be noted that the execution subject of S110 to S120 may be an ESD protection device performance evaluation apparatus, and the apparatus may be an application located in the local terminal, or may also be a functional unit such as a plug-in or Software Development Kit (SDK) located in the application located in the local terminal, which is not particularly limited in this embodiment of the present invention.
It should be understood that the application may be an application program (native app) installed on the terminal, or may also be a web page program (webApp) of a browser on the terminal, which is not limited in this embodiment of the present invention.
The technical scheme of the embodiment of the invention has the following beneficial effects:
according to the embodiment of the invention, the thermal stability of the ESD protection device can be effectively evaluated based on the self-heating thermal resistance, and the ESD protection device can be optimized by combining the evaluation of the thermal stability of the ESD protection device, so that the ESD protection device can protect a circuit more effectively, and the stability of the circuit is improved.
Example two
Based on the ESD protection device evaluation method provided in the first embodiment, embodiments of an apparatus for implementing steps and methods in the first embodiment of the present invention are further provided.
Fig. 5 is a functional block diagram of an ESD protection device performance evaluation apparatus according to an embodiment of the present invention. As shown in fig. 5, the apparatus is adapted to an ESD protection device of a grounded-gate N-channel field effect transistor structure, and includes:
a determining unit 501, configured to determine self-heating resistance of the ESD protection device according to thermal conductivity, bulk density, heat dissipation surface area, and ambient temperature of the ESD protection device;
an evaluation unit 502, configured to evaluate thermal stability of the ESD protection device according to the self-heating resistance.
Optionally, the determining unit 501 is further configured to equate the active region of the ESD protection device to a parallelepiped, and determine the thermal conductivity, the bulk density, and the heat dissipation surface area according to the parallelepiped.
Optionally, the determining unit 501 is further configured to determine the self-heating resistance of the ESD protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the ESD protection device, in combination with the law of conservation of energy.
Optionally, the evaluating the thermal stability of the ESD protection device according to the self-heating resistance comprises: the smaller the magnitude of the self-heating resistance variation with dissipated power, the higher the thermal stability of the ESD protection device.
Since each unit in the present embodiment can execute the method shown in fig. 1, reference may be made to the related description of fig. 1 for a part of the present embodiment that is not described in detail.
The technical scheme of the embodiment of the invention has the following beneficial effects:
according to the embodiment of the invention, the thermal stability of the ESD protection device can be effectively evaluated based on the self-heating thermal resistance, and the ESD protection device can be optimized by combining the evaluation of the thermal stability of the ESD protection device, so that the ESD protection device can protect a circuit more effectively, and the stability of the circuit is improved.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions in actual implementation, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) or a Processor (Processor) to execute some steps of the methods according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (9)
1. An electrostatic discharge protection device evaluation method is suitable for an electrostatic discharge protection device with a grid-grounded N-channel field effect transistor structure, and comprises the following steps:
determining the self-heating thermal resistance of the electrostatic discharge protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the electrostatic discharge protection device;
evaluating the thermal stability of the electrostatic discharge protection device according to the self-heating thermal resistance;
the determining the self-heating resistance of the electrostatic discharge protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the electrostatic discharge protection device comprises:
wherein, R isthIs self-heating resistance, m is the quality of the electrostatic discharge protection device,
m＝ρV0
rho is the bulk density, V0Is equal to the heat dissipation surface area AsMultiplied by the thickness of the ESD protection device, the
In order to obtain a heat flux,
α is the thermal conductivity of the electrostatic discharge protection device, cpFor heat capacity, β is the coefficient and t is time.
2. The method of claim 1, further comprising:
and the active area of the electrostatic discharge protection device is equivalent to a parallelepiped, and the thermal conductivity, the bulk density and the heat dissipation surface area are determined according to the parallelepiped.
3. The method of claim 1 or 2, wherein determining the self-heating resistance of the esd protection device based on the thermal conductivity, bulk density, heat dissipation surface area, and ambient temperature of the esd protection device comprises:
and determining the self-heating thermal resistance of the electrostatic discharge protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the electrostatic discharge protection device by combining the law of conservation of energy.
4. The method of claim 1 or 2, wherein the evaluating the thermal stability of the ESD protection device based on the self-heating thermal resistance comprises:
the smaller the magnitude of the self-heating thermal resistance variation with dissipated power, the higher the thermal stability of the electrostatic discharge protection device.
5. The method of claim 1, wherein the thickness of the esd protection device is a fixed constant.
6. An electrostatic discharge protection device evaluation apparatus, adapted to an electrostatic discharge protection device of a gate-grounded N-channel field effect transistor structure, the apparatus comprising:
the determining unit is used for determining the self-heating thermal resistance of the electrostatic discharge protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area and the ambient temperature of the electrostatic discharge protection device;
the evaluation unit is used for evaluating the thermal stability of the electrostatic discharge protection device according to the self-heating thermal resistance;
the determining unit is specifically configured to determine the self-heating resistance of the electrostatic discharge protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area, and the ambient temperature of the electrostatic discharge protection device, and includes:
wherein, R isthIs self-heating resistance, m is the quality of the electrostatic discharge protection device,
m＝ρV0
rho is the bulk density, V0Is equal to the heat dissipation surface area AsMultiplied by the thickness of the ESD protection device, the
Is heat flowThe amount of the compound (A) is,
α is the thermal conductivity of the electrostatic discharge protection device, cpFor heat capacity, β is the coefficient and t is time.
7. The apparatus of claim 6, wherein the determining unit is further configured to equate an active area of the ESD protection device to a parallelepiped, and wherein the thermal conductivity, the bulk density, and the heat dissipation surface area are determined based on the parallelepiped.
8. The apparatus of claim 6 or 7, wherein the determining unit is further configured to determine the self-heating resistance of the ESD protection device according to the thermal conductivity, the bulk density, the heat dissipation surface area, and the ambient temperature of the ESD protection device in combination with the law of conservation of energy.
9. A computer readable storage medium comprising computer readable instructions which, when read and executed by a computer, cause the computer to perform the method of any one of claims 1 to 5.
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| CN106093744A (en) * | 2016-08-04 | 2016-11-09 | 中国科学院微电子研究所 | A kind of thermal resistance acquisition methods |
| CN106872898A (en) * | 2017-02-06 | 2017-06-20 | 中国第汽车股份有限公司 | Electrokinetic cell monomer interface thermal resistance method for rapidly testing |
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