CN1080796A - Phase quantization A/D conversion method and device thereof - Google Patents

Phase quantization A/D conversion method and device thereof Download PDF

Info

Publication number
CN1080796A
CN1080796A CN 93107367 CN93107367A CN1080796A CN 1080796 A CN1080796 A CN 1080796A CN 93107367 CN93107367 CN 93107367 CN 93107367 A CN93107367 A CN 93107367A CN 1080796 A CN1080796 A CN 1080796A
Authority
CN
China
Prior art keywords
phase
signal
quantization
output
binary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 93107367
Other languages
Chinese (zh)
Other versions
CN1030272C (en
Inventor
周国富
姬国良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN 93107367 priority Critical patent/CN1030272C/en
Publication of CN1080796A publication Critical patent/CN1080796A/en
Application granted granted Critical
Publication of CN1030272C publication Critical patent/CN1030272C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

The invention discloses a method and a device for phase quantization A/D conversion. The device comprises: a phase-shifting device [10 ]]Converting an input analog signal to have 2n-1 output signal of different phase; (b) and phase shifting device [10 ]]2 of output connectionn-1 voltage comparator [20 ]]By means of a phase-shifting device [10 ]]Generation of 2n-1 output signals for polarity comparison, yielding 2n-1 binary digital code; one and 2n-1 voltage comparator [20 ]]Is connected to the output of the encoder [30 ]]For comparing a voltage with a voltage comparator [20 ]]Generation of 2n-1A plurality of binary digital codes are encoded into n-bit binary digital codes. The method and the device thereof can be used in the fields of radar, communication, electronic warfare and test equipment and the like.

Description

The method and the device thereof of a kind of phase quantization A/D conversion
The present invention relates to a kind of analog signal is transformed into analog/digital (A/D) transform method and the device thereof of digital signal, particularly a kind of phase quantization A/D transform method and device thereof that analog signal is transformed into digital signal.
As everyone knows, along with digital signal processing technology rapid development, the A/D transform method and the device that analog signal are transformed into digital signal occupy more and more important position in electronic technology and electronic equipment.The method that analog signal is quantized mainly contains two kinds, i.e. amplitude quantizing and phase quantization.Amplitude quantizing, promptly traditional quantization method is that the big wisp signal quantization according to signal amplitude becomes 2 nIndividual level, wherein n is a quantization digit.And phase quantization method is a phase place according to signal semaphore is changed into 2 n(corresponding amplitude leyel number is 2 to individual phase intervals N-1+ 1).(see IEEE Journal of Solid-State Circuits at " A GaAs Phase Digitizing and Summing System for Microwave Signal Storage ", Vol.24, No.1, pp.104~117,1989) in the literary composition 3 phase quantization As/D transform method and device have been done detailed introduction, " providing the harmonic wave spurious signal level computing formula of this quantization method under different quantization digits in the parasitic signal performance evaluation of phase quantization digital radiofrequency memory (seeing " electronic letters, vol "; Vol.20; No.12; pp.26~31, the 1992) literary composition.The feature of this quantization method is for the quantification of n bit, to need 2 N-1Individual comparator produces 2 N-1+ 1 quantization level.Such as, when quantizing figure place n=3, needing 4 comparators, the quantization level number is 5.Though this quantization method has some advantages, as: compare with amplitude quantizing and to have bigger dynamic range and lower near region peak value spurious signal level, but this method also has significant disadvantages: (1) is for certain quantization digit, higher by the spurious signal level that quantizes to cause, during as n=3, the peak value spurious signal level is-16.9dB that the parasitic signal gross power is-12.5dB.(2) when the digital signal conversion after quantizing is become analog signal (D/A conversion), need be weighted processing, thus incompatible with general D/A converting means.
The object of the present invention is to provide a kind of phase quantization A/D transform method and device thereof, can avoid the shortcoming of above-mentioned prior art, when keeping great dynamic range, improved the parasitic signal performance, and compatible with existing D/A transform method and device.
The objective of the invention is by adopting following phase quantization A/D transform method and device to realize.
A kind of importing phase quantization A/D transform method that analog signal is transformed into digital signal, may further comprise the steps:
A. the input analog signal is carried out phase shift, produces phase place and be respectively:
0°,±θ i,i=1,2,…,2 n-1-1
2 n-1 output signal with out of phase, wherein, n is a quantization digit, n 〉=2.To θ iThe selection of value can be carried out according to desired performance index, and a kind of alternative better method is according to the criterion that quantizes harmonic wave parasitic signal gross power minimum in the signal of back is carried out, that is, to make θ iValue satisfy following equation:
4v/u=cos(90°-θ i)=2-i i=1,2,…,2 n-1-1
Wherein,
Figure 931073677_IMG3
n≥2
B. to produce through phase shift 2 n-1 signal carries out polarity relatively, produces 2 n-1 binary digital code.
C. will through polarity relatively produce 2 n-1 binary digital code is encoded, and forms the binary digital code of n bit.Coding method can be carried out according to the desired form of subsequent treatment, and wherein a kind of method preferably is, relatively obtain through polarity 2 n-1 binary code addition, wherein resulting n bit binary code { C N-1C N-2C N-3C 1C 0}={ 000 ... 00,000 ... 01,000 ... 10 ..., 111 ... 11 } represented signal level is: { 2 n+ 1 ,-2 n+ 3 ... ,-3 ,-1,1,3 ..., 2 n-1 }.
A kind of phase quantization A/D converting means that as stated above the input analog signal is transformed into digital signal comprises:
A. phase shifting equipment is transformed into the analog signal of input and has 2 nThe output signal of-1 out of phase.Described phase shifting equipment can be made of following parts: (1) inphase/orthogonal (I/Q) signal generator is used for the input analog signal is transformed into inphase/orthogonal (I/Q) the output signal I with differential output, Q ,-I ,-Q; (2) one have four arms, have 2 on each arm nThe resistance ring of-1 resistance, four summits of resistance ring are received the I of inphase/orthogonal (I/Q) signal generator output in proper order, Q ,-I, in four outputs of-Q, and by on the resistance ring except that Q and-Q input institute corresponding node, relative 2 nProduce 2 on-1 pair of node n-1 differential output phase shift signal.
B. be connected with the output of phase shifting equipment 2 n-1 voltage comparator, by to produce by phase shifting equipment 2 n-1 output signal is carried out polarity relatively, produces 2 n-1 binary digital code.
C. one and 2 nThe encoder that the output of-1 voltage comparator is connected is used for 2 of voltage comparator generation n-1 binary digital code is encoded into the binary digital code of n bit.
Utilize the present invention, keeping outside the advantage that conventional phase quantizes the great dynamic range that the A/D transform method had, also have following advantage: (1) is owing to adopted coding method with existing D/A transform method compatibility, make and in the time need reverting to analog signal (D/A conversion) to the digital signal that after the A/D conversion, obtains, do not need weighted, (2) for certain quantization digit, by the phase place of optimized choice phase shift signal, the harmonic wave parasitic signal performance that quantizes the back signal is improved.Table 1 has provided the inventive method and the result contrast of existing phase quantization method under different quantization digit n.As can be seen, more approaching at the quantization level number of the few 1(of quantization digit this moment) situation under, utilize the present invention can make the peak value spurious signal level be improved significantly.Method of the present invention and device thereof can be used for radar, communication, fields such as electronic warfare and testing equipment.
Table 1. the inventive method compares with the result of existing phase quantization method under different quantization digit n
The quantization digit quantization level is counted peak value spurious signal level (dB) parasitic signal gross power (dB)
①/② ①/② ①/② ①/②
3/2 5/4 -16.9/-20.1 -12.5/-13.6
4/3 9/8 -23.5/-26.7 -18.9/-20.0
5/4 17/16 -29.8/-35.8 -24.9/-26.1
Illustrate: 1. represent phase quantization A of the prior art/D transform method
2. represent phase quantization A of the present invention/D transform method
Below in conjunction with accompanying drawing embodiments of the invention are described in further detail.
Fig. 1 is a theory diagram of the present invention.
Fig. 2 is the theory diagram of one embodiment of the invention.
Fig. 3 is the oscillogram of each point embodiment illustrated in fig. 2.
Figure 2 shows that one embodiment of the present of invention when n=2.As shown in Figure 2, behind the analog signal of input process inphase/orthogonal (I/Q) signal generator 11, produce I, the differential output signal I of Q, Q ,-I,-Q, these four signal sequences are received by four arms and are formed, and have on each arm on four summits of resistance ring 12 of 2 resistance.Resistance R 1 on resistance ring 12 and the resistance of R2 satisfy: R 1=0.41R, R 2=0.59R, wherein R=R 1+ R 2The time, can be at the A of resistance ring 12 1, A 2, A 3Node obtains phase place and is respectively-34.7 °, and 0 °, three signals of+34.7 °, and by B 1, B 2, B 3What node obtained is corresponding to A 1, A 2, A 3The inversion signal of node corresponding signal, therefore, for to by A 1, A 2, A 3The signal of three nodes output carries out polarity relatively, can be by A on the resistance ring 12 1With B 1, A 2With B 2, A 3With B 3Three differential waves of three pairs of node outputs are added to the homophase/inverting input of three comparators 20 respectively, and then the output at three comparators 20 obtains representing A respectively 1, A 2, A 3The binary code I of node signal polarity 1, I 0, I 2, I 0, I 1, I 2Respectively as the A of 1 full adder 31, B input and carry input C 1Input, then by a full adder 31 carry output C 1With addition output C 0Represented binary code { C 1C 0}={ 00,01,10,11 } four level { 3 ,-1,1,3 } of expression signal.
Fig. 3 has provided the waveform and the coding method of each point embodiment illustrated in fig. 2.Wherein, the cosine signal of solid-line curve among Fig. 3 (a) 16 expression inputs, two imaginary curves 17,18 are represented two signals behind phase shift-34.7 ° and+34.7 ° respectively; Fig. 3 (b), (c), the waveform 26,27,28 in (d) is presentation graphs 3(a respectively) in the waveform of the binary code that relatively obtains through polarity of three signals 16,17,18; Fig. 3 (e), (f) waveform 36,37 in is respectively the disconnected C of carry output of a full adder 31 1With addition output C 0The binary code waveform of output also is the output result of one of the present invention shown in Figure 2 embodiment-2 phase quantization A/D converting means; Waveform table diagrammatic sketch 3(e shown in Fig. 3 (g)), (f) shown in 2 phase quantization As/D converting means output binary code { C 1C 0The level of input signal after quantizing of representative.

Claims (9)

1, a kind of importing phase quantization A/D transform method that analog signal is transformed into digital signal, may further comprise the steps:
A. the input analog signal is carried out phase shift, produces phase place and be respectively:
0 °, ± θ i, i=1,2 ..., 2 N-1-12 n-1 output signal with out of phase, wherein, n is a quantization digit, n 〉=2.
B. to produce through phase shift 2 n-1 signal carries out polarity relatively, produces 2 n-1 binary digital code.
C. will through polarity relatively produce 2 n-1 binary digital code is encoded, and forms the binary digital code of nbit.
2, phase quantization A as claimed in claim 1/D transform method is characterized in that, to θ iChoosing of value is according to the criterion that quantizes harmonic wave parasitic signal gross power minimum in the signal of back being carried out, that is, making θ iValue satisfy following equation:
4v/u=cos(90°-θ i)=2-i i=1,2,…,2 n-1-1
Wherein,
Figure 931073677_IMG2
n≥2
3, phase quantization A as claimed in claim 2/D transform method is characterized in that, when described quantization digit n=2, and the phase theta of described phase shift signal 1=34.7 °
4, phase quantization A as claimed in claim 1/D transform method is characterized in that, described coding method be through polarity relatively obtain 2 n-1 binary code addition, wherein resulting n bit binary code { C N-1C N-2C N-3C 1C 0}={ 000 ... 00,000 ... 01,000 ... 10 ..., 111 ... 11 } represented signal level is: { 2 n+ 1 ,-2 n+ 3 ... ,-3 ,-1,1,3 ..., 2 n-1 }.
5, phase quantization A as claimed in claim 4/D transform method is characterized in that, when described quantization digit n=2, described coding method is 3 binary code additions that relatively obtain through polarity, wherein resulting 2 bit binary code { C 1C 0}={ 00,01,10,11 } represented signal level is: { 3 ,-1 ,+1 ,+3 }
6, a kind ofly the input analog signal is transformed into the phase quantization A/D converting means of digital signal, comprises by the described method of claim 1:
A. a phase shifting equipment [10] is transformed into the analog signal of input and has 2 nThe output signal of-1 out of phase.
B. be connected with the output of phase shifting equipment [10] 2 n-1 voltage comparator [20], by to produce by phase shifting equipment [10] 2 n-1 output signal is carried out polarity relatively, produces 2 n-1 binary digital code.
C. one and 2 nThe encoder [30] that the output of-1 voltage comparator [20] is connected is used for 2 of voltage comparator [20] generation n-1 binary digital code is encoded into the binary digital code of n bit.
7, phase quantization A as claimed in claim 6/D converting means is characterized in that, described phase shifting equipment [10] comprising:
A. an inphase/orthogonal (I/Q) signal generator [11] is transformed into inphase/orthogonal (I/Q) the output signal I with differential output, Q ,-I ,-Q to the input analog signal.
B. one has four arms, has 2 on each arm N-1The resistance ring of individual resistance [12], four summits of resistance ring [12] are received the I of inphase/orthogonal (I/Q) signal generator [11] output in proper order, Q ,-I, in four outputs of-Q, and by resistance ring [12] go up except that Q and-Q input institute corresponding node relative 2 nProduce 2 on-1 pair of node n-1 differential output phase shift signal.
8, phase quantization A as claimed in claim 7/D converting means is characterized in that, when described quantization digit n=2,2 resistance is arranged on each arm of resistance ring [12], and its resistance is R 1=0.41R, R 2=0.59R, wherein R=R 1+ R 2
9, phase quantization A as claimed in claim 6/D converting means is characterized in that, when described quantization digit n=2, described encoder [30] is one 1 a bit full adder [31].
CN 93107367 1993-06-24 1993-06-24 Phase quantization A/D conversion method and device thereof Expired - Fee Related CN1030272C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 93107367 CN1030272C (en) 1993-06-24 1993-06-24 Phase quantization A/D conversion method and device thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 93107367 CN1030272C (en) 1993-06-24 1993-06-24 Phase quantization A/D conversion method and device thereof

Publications (2)

Publication Number Publication Date
CN1080796A true CN1080796A (en) 1994-01-12
CN1030272C CN1030272C (en) 1995-11-15

Family

ID=4986653

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 93107367 Expired - Fee Related CN1030272C (en) 1993-06-24 1993-06-24 Phase quantization A/D conversion method and device thereof

Country Status (1)

Country Link
CN (1) CN1030272C (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103178850A (en) * 2013-03-06 2013-06-26 南京国博电子有限公司 Circuit structure of 4bit phase quantization analog-to-digital converter
CN105071808A (en) * 2015-08-07 2015-11-18 中国电子科技集团公司第五十四研究所 Phase quantization analog-to-digital converter circuit with addition weight calibration

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109787648B (en) * 2019-01-29 2021-03-16 余芳 ADC harmonic level reduction system and method based on digital phase-shift synthesis

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103178850A (en) * 2013-03-06 2013-06-26 南京国博电子有限公司 Circuit structure of 4bit phase quantization analog-to-digital converter
CN105071808A (en) * 2015-08-07 2015-11-18 中国电子科技集团公司第五十四研究所 Phase quantization analog-to-digital converter circuit with addition weight calibration
CN105071808B (en) * 2015-08-07 2018-02-06 中国电子科技集团公司第五十四研究所 A kind of phase quantization analog-digital converter circuit with the calibration of addition weight

Also Published As

Publication number Publication date
CN1030272C (en) 1995-11-15

Similar Documents

Publication Publication Date Title
US5337338A (en) Pulse density modulation circuit (parallel to serial) comparing in a nonsequential bit order
JPS62285522A (en) Analog/digital converter
US4468794A (en) Digital coherent detector
CN1435010A (en) Deigital logic correction circuit for a pipeline analog to digital (A/D) converter
US5051746A (en) Interpolation circuit for use in an A/D converter
JPH01228223A (en) Parallel comparison type analog/digital converter
CN1080796A (en) Phase quantization A/D conversion method and device thereof
JPH04233359A (en) Digital demodulator for signal modulated by phase transition in plurality of statuses
KR950003287B1 (en) Method and circuit for eliminating major bit transition error at the bipolar zero point in a digital to analog converter
JPS61154246A (en) Information transmission method and encoding and decoding apparatuses used therefor
WO2007058809A2 (en) Vector quantizer based on n-dimensional spatial dichotomy
US4532495A (en) Speech digitization system
CN1348628A (en) Capacitive flash analog to digital converter
CN210780731U (en) Fast steady-state digital-to-analog conversion circuit and fast steady-state digital-to-analog conversion device
US4419657A (en) Speech digitization system
US5754130A (en) Analogue-to-digital converter using phase modulation
CN116318154B (en) Analog-to-digital conversion device and signal conversion equipment
US5113188A (en) Analog-to-digital converter utilizing devices with current versus voltage characteristics with a plurality of peaks and negative resistance regions between peaks
JP2578405B2 (en) Data transmission system
JP2847913B2 (en) Analog multiplier
CN114629761B (en) Frequency modulation signal inverse triangular frequency measurement demodulation method
JPS60146528A (en) Analog-digital converting circuit
SU1108436A1 (en) Voltage-to-probability function generator
JPS564930A (en) Bipolar analog-digital conversion system
RU2125343C1 (en) Filtering analog-to-digital converter using delta modulation

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee