CN108075666B - Flyback power supply circuit - Google Patents

Flyback power supply circuit Download PDF

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Publication number
CN108075666B
CN108075666B CN201710686178.XA CN201710686178A CN108075666B CN 108075666 B CN108075666 B CN 108075666B CN 201710686178 A CN201710686178 A CN 201710686178A CN 108075666 B CN108075666 B CN 108075666B
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China
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signal
pulse
feedback
synchronous rectification
circuit
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CN201710686178.XA
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CN108075666A (en
Inventor
杨大勇
林梓诚
曾兵
罗立狄
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Richtek Technology Corp
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Richtek Technology Corp
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop

Abstract

The invention provides a flyback power supply circuit, and also relates to a synchronous rectification switch control circuit and a power switch control circuit thereof. The flyback power supply circuit comprises a transformer, a power switch control circuit, a synchronous rectifier switch control circuit and a signal coupling circuit. The signal coupling circuit is provided with a primary side port electrically connected with the power switch control circuit and a secondary side port electrically connected with the synchronous rectification switch control circuit. In different non-overlapping time periods, the primary side port and the secondary side port respectively receive different signals generated by the power switch control circuit and the synchronous rectification switch control circuit, and the signal coupling circuit generates corresponding signals on the secondary side port and the primary side port after induction and conversion in a non-contact mode.

Description

Flyback power supply circuit
Technical Field
The present invention relates to a flyback power supply circuit, and a Synchronous Rectifier (SR) switch control circuit and a power switch control circuit thereof, and more particularly, to a flyback power supply circuit, an SR switch control circuit thereof, and a power switch control circuit thereof, which have a signal coupling circuit coupled between a primary side and a secondary side of a transformer, respectively sense and convert signals of the primary side and transmit the signals to the secondary side, and sense and convert signals of the secondary side and transmit the signals to the primary side in non-overlapping different time periods in a non-contact manner.
Background
Fig. 1 shows a prior art flyback power supply circuit 100, in which an ac voltage Vac is rectified by a rectifier circuit 101 to generate an input voltage Vin. The primary winding W1 of the transformer 102 receives an input voltage Vin. The power switch control circuit 105 generates the PWM signal by obtaining a feedback voltage signal COMP related to the output voltage Vout from the photo-coupling circuit 104 or from an auxiliary winding (not shown) and obtaining a current sense signal CS related to the current flowing through the power switch SW from the current sensing circuit 106. The PWM control circuit 105 generates a power switch control signal Spwm to control the operation of the power switch SW according to the PWM signal.
With reference to fig. 1, in order to improve the power conversion efficiency, the secondary winding W2 of the flyback power supply circuit 100 is electrically connected to the Synchronous Rectification (SR) switch circuit 108, and is controlled by the synchronous rectification control circuit 107 according to the voltage across the synchronous rectification switch circuit 108 and the synchronous signal SYNC, so that the secondary winding W2 is turned on when the primary winding W1 is turned off, so as to convert the input voltage Vin into the output voltage Vout. If the secondary winding W2 were still conducting when the primary winding W1 was conducting, a short through condition could result. However, in some operating states, such as Continuous Conduction Mode (CCM), the flyback power supply circuit 100 may not turn off the switch in the synchronous rectification switch circuit 108 when the primary winding W1 is turned on, so that the secondary winding W2 may still be turned on when the primary winding W1 is turned on, and the flyback power supply circuit 100 may have a short-circuit through condition, which may cause circuit damage.
The PWM control circuit 105 generates a notification signal PLS, and inputs the notification signal PLS to the coupling circuit 103, and the coupling circuit 103 generates a synchronization signal SYNC to confirm that the SR switch circuit 108 is not turned on, and then turns on the power switch SW. In addition, the optocoupler circuit 104 and the coupler circuit 103 are two separate circuits, respectively, for transmitting the information related to the output voltage generated at the secondary side to the primary side PWM controller 105 and transmitting the information related to the power switch control signal Spwm generated at the primary side to the secondary side SR control circuit 107, and this arrangement makes the circuit size limited.
In view of the above, the present invention provides a flyback power supply circuit, an SR switch control circuit thereof, and a power switch control circuit thereof, in which the flyback power supply circuit has a signal coupling circuit coupled between a primary side and a secondary side of a transformer, and transmits a signal of the primary side to the secondary side and transmits a signal of the secondary side to the primary side in different non-overlapping time periods through the same port, and the SR switch control circuit and the power switch control circuit thereof.
Disclosure of Invention
The present invention is directed to overcome the disadvantages and drawbacks of the prior art, and to provide a flyback power supply circuit, which avoids the occurrence of short-circuit penetration and circuit damage, and also avoids the limitation of the circuit size.
To achieve the above object, in one aspect, the present invention provides a flyback power supply circuit, including: a transformer having a primary winding for receiving an input voltage; and a secondary side winding for generating an output voltage; a power switch coupled to the primary winding for controlling the conduction time of the primary winding; a power switch control circuit, located on the primary side of the transformer, for generating a power switch control signal to control the power switch according to a coupling feedback signal, and generating a synchronous rectification pulse signal; a Synchronous Rectification (SR) switch coupled to the secondary winding for controlling a conduction time of the secondary winding to be conducted corresponding to a non-conduction time of the primary winding; an SR switch control circuit, located on the secondary side of the transformer, coupled to the SR switch, for receiving a coupled synchronous rectification signal to control the SR switch in a normal operation mode, and generating a feedback pulse signal according to the output voltage; and a signal coupling circuit, coupled between the SR switch control circuit and the power switch control circuit, for inductively generating the coupled synchronous rectification pulse signal in a non-contact manner, and inductively generating the coupled feedback signal in a non-contact manner from the feedback pulse signal; the signal coupling circuit is provided with a primary side port and a secondary side port, the primary side port is located on the primary side of the transformer, the secondary side port is located on the secondary side of the transformer, the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal respectively in different non-overlapping time periods, and the secondary side port generates the coupling synchronous rectification signal and receives the feedback pulse signal respectively in the corresponding non-overlapping different time periods.
In one preferred embodiment, the signal coupling circuit comprises a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are signals with pulse forms.
In one preferred embodiment, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch control circuit does not conduct the SR switch according to the coupled synchronous rectification signal related to the synchronous rectification pulse, so that the SR switch is not conducted before the power switch is conducted.
In one preferred embodiment, during an operation period, the SR switch control circuit determines that the power switch is not conductive based on a secondary side winding current flowing through the secondary side winding, an SR switch current flowing through the SR switch, or a voltage across the secondary side winding or the SR switch.
In one preferred embodiment, the feedback pulse signal comprises at least one feedback pulse having one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse number indicating the output voltage; and a power switch current flowing through the power switch is related to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or the combination thereof
In one preferred embodiment, the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond (micro-second).
In one preferred embodiment, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse is generated after a synchronous rectification pulse of the synchronous rectification pulse signal is generated and after a synchronous default period.
In the aforementioned embodiment, when the synchronous rectification pulse of the synchronous rectification pulse signal is generated and starts, the next synchronous rectification pulse is not generated during a synchronization threshold, the SR switch control circuit generates the feedback pulse, and then periodically generates the feedback pulse with a feedback period until the power switch control circuit generates the synchronous rectification pulse.
In the aforementioned embodiment, the synchronization default period is related to the output voltage.
In one preferred embodiment, during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse generated after a feedback pulse of the feedback pulse signal is generated and a feedback preset period elapses.
In the aforementioned embodiment, when the feedback pulse of the feedback pulse signal is generated and starts, the next feedback pulse is not generated during a feedback threshold period, the power switch control circuit generates the synchronous rectification pulse, and then periodically generates the synchronous rectification pulse with a synchronous period until the SR switch control circuit generates the feedback pulse.
In the aforementioned embodiment, the feedback preset period is related to the output voltage.
In one preferred embodiment, the SR switch control circuit comprises: an output voltage sampling amplifying circuit for sampling and amplifying the output voltage to generate an output voltage sampling amplifying signal; a feedback pulse signal generating circuit coupled between the output voltage sampling amplifying circuit and the secondary side port for generating the feedback pulse signal according to the output voltage sampling amplifying signal; an SR comparator coupled to the secondary side port for generating a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal; an SR timing circuit coupled to the comparator for generating a synchronous default period timing signal after timing a synchronous default period according to the synchronous comparison signal; and an SR switch control signal generating circuit coupled to the comparator and the SR switch for generating an SR switch control signal to control the SR switch according to the synchronous comparison signal.
In one preferred embodiment, the power switch control circuit comprises: a power switch control signal generating circuit coupled to the power switch for generating the power switch control signal according to a sampling feedback signal; a feedback signal sample-and-hold circuit coupled between the power switch control signal generating circuit and the primary side port for generating the sampling feedback signal according to the coupling feedback signal; and a feedback timing circuit coupled to the power switch control signal generating circuit and the feedback signal sample-and-hold circuit for generating a sampling signal and a clearing signal according to the power switch control signal and the coupled feedback signal, wherein the feedback signal sample-and-hold circuit converts the coupled feedback signal into the sampling feedback signal according to the sampling signal and the clearing signal.
In the foregoing embodiment, the feedback signal sample-and-hold circuit includes: a shielding circuit coupled to the power switch control signal generating circuit and the primary port for preventing the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary port during a shielding period according to a shielding signal related to the power switch control signal; and a sampling feedback signal generating circuit coupled between the shielding circuit and the power switch control signal generating circuit for generating the sampling feedback signal according to the coupling feedback signal, a clearing signal and a sampling signal.
In another aspect, the present invention provides an SR switch control circuit of a flyback power supply circuit, the flyback power supply circuit including a transformer having a primary winding for receiving an input voltage; and a secondary side winding for generating an output voltage; a power switch coupled to the primary winding for controlling the conduction time of the primary winding; a power switch control circuit, located on the primary side of the transformer, for generating a power switch control signal to control the power switch according to a coupling feedback signal, and generating a synchronous rectification pulse signal; a Synchronous Rectification (SR) switch coupled to the secondary winding for controlling a conduction time of the secondary winding to be conducted corresponding to a non-conduction time of the primary winding; the SR switch control circuit is positioned on the secondary side of the transformer, coupled to the SR switch, and used for receiving a coupled synchronous rectification signal to control the SR switch in a normal operation mode and generating a feedback pulse signal according to the output voltage; and a signal coupling circuit, coupled between the SR switch control circuit and the power switch control circuit, for inductively generating the coupled synchronous rectification pulse signal in a non-contact manner, and inductively generating the coupled feedback signal in a non-contact manner from the feedback pulse signal; the signal coupling circuit is provided with a primary side port and a secondary side port, the primary side port is positioned on the primary side of the transformer, the secondary side port is positioned on the secondary side of the transformer, the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal respectively in different non-overlapping time periods, and the secondary side port generates the coupling synchronous rectification signal and receives the feedback pulse signal respectively in the corresponding non-overlapping different time periods; the SR switch control circuit comprises: an output voltage sampling amplifying circuit for sampling and amplifying the output voltage to generate an output voltage sampling amplifying signal; a feedback pulse signal generating circuit coupled between the output voltage sampling amplifying circuit and the secondary side port for generating the feedback pulse signal according to the output voltage sampling amplifying signal; an SR comparator coupled to the secondary side port for generating a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal; an SR timing circuit coupled to the comparator for generating a synchronous default period timing signal after timing a synchronous default period according to the synchronous comparison signal; and an SR switch control signal generating circuit coupled to the comparator and the SR switch for generating an SR switch control signal to control the SR switch according to the synchronous comparison signal.
In one preferred embodiment, the signal coupling circuit comprises a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are signals with pulse forms.
In one preferred embodiment, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch control circuit does not conduct the SR switch according to the coupled synchronous rectification signal related to the synchronous rectification pulse, so that the SR switch is not conducted before the power switch is conducted.
In one preferred embodiment, during an operation period, the SR switch control circuit determines that the power switch is not conductive based on a secondary side winding current flowing through the secondary side winding, an SR switch current flowing through the SR switch, or a voltage across the secondary side winding or the SR switch.
In one preferred embodiment, the feedback pulse signal comprises at least one feedback pulse having one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse number indicating the output voltage; and a power switch current flowing through the power switch is related to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or the combination thereof
In one preferred embodiment, the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond (micro-second).
In one preferred embodiment, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse is generated after a synchronous rectification pulse of the synchronous rectification pulse signal is generated and after a synchronous default period.
In the aforementioned embodiment, when the synchronous rectification pulse of the synchronous rectification pulse signal is generated and starts, the next synchronous rectification pulse is not generated during a synchronization threshold, the SR switch control circuit generates the feedback pulse, and then periodically generates the feedback pulse with a feedback period until the power switch control circuit generates the synchronous rectification pulse.
In the aforementioned embodiment, the synchronization default period is related to the output voltage.
In one preferred embodiment, during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse generated after a feedback pulse of the feedback pulse signal is generated and a feedback preset period elapses.
In the aforementioned embodiment, when the feedback pulse of the feedback pulse signal is generated and starts, the next feedback pulse is not generated during a feedback threshold period, the power switch control circuit generates the synchronous rectification pulse, and then periodically generates the synchronous rectification pulse with a synchronous period until the SR switch control circuit generates the feedback pulse.
In the aforementioned embodiment, the feedback preset period is related to the output voltage.
In one preferred embodiment, the power switch control circuit comprises: a power switch control signal generating circuit coupled to the power switch for generating the power switch control signal according to a sampling feedback signal; a feedback signal sample-and-hold circuit coupled between the power switch control signal generating circuit and the primary side port for generating the sampling feedback signal according to the coupling feedback signal; and a feedback timing circuit coupled to the power switch control signal generating circuit and the feedback signal sample-and-hold circuit for generating a sampling signal and a clearing signal according to the power switch control signal and the coupled feedback signal, wherein the feedback signal sample-and-hold circuit converts the coupled feedback signal into the sampling feedback signal according to the sampling signal and the clearing signal.
In the foregoing embodiment, the feedback signal sample-and-hold circuit includes: a shielding circuit coupled to the power switch control signal generating circuit and the primary port for preventing the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary port during a shielding period according to a shielding signal related to the power switch control signal; and a sampling feedback signal generating circuit coupled between the shielding circuit and the power switch control signal generating circuit for generating the sampling feedback signal according to the coupling feedback signal, a clearing signal and a sampling signal.
In another aspect, the present invention provides a power switch control circuit of a flyback power supply circuit, the flyback power supply circuit including a transformer having a primary winding for receiving an input voltage; and a secondary side winding for generating an output voltage; a power switch coupled to the primary winding for controlling the conduction time of the primary winding; the power switch control circuit is positioned at the primary side of the transformer and used for generating a power switch control signal according to a coupling feedback signal so as to control the power switch and generate a synchronous rectification pulse signal; a Synchronous Rectification (SR) switch coupled to the secondary winding for controlling a conduction time of the secondary winding to be conducted corresponding to a non-conduction time of the primary winding; an SR switch control circuit, located on the secondary side of the transformer, coupled to the SR switch, for receiving a coupled synchronous rectification signal to control the SR switch in a normal operation mode, and generating a feedback pulse signal according to the output voltage; and a signal coupling circuit, coupled between the SR switch control circuit and the power switch control circuit, for inductively generating the coupled synchronous rectification pulse signal in a non-contact manner, and inductively generating the coupled feedback signal in a non-contact manner from the feedback pulse signal; the signal coupling circuit is provided with a primary side port and a secondary side port, the primary side port is positioned on the primary side of the transformer, the secondary side port is positioned on the secondary side of the transformer, the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal respectively in different non-overlapping time periods, and the secondary side port generates the coupling synchronous rectification signal and receives the feedback pulse signal respectively in the corresponding non-overlapping different time periods; the power switch control circuit includes: a power switch control signal generating circuit coupled to the power switch for generating the power switch control signal according to a sampling feedback signal; a feedback signal sample-and-hold circuit coupled between the power switch control signal generating circuit and the primary side port for generating the sampling feedback signal according to the coupling feedback signal; and a feedback timing circuit coupled to the power switch control signal generating circuit and the feedback signal sample-and-hold circuit for generating a sampling signal and a clearing signal according to the power switch control signal and the coupled feedback signal, wherein the feedback signal sample-and-hold circuit converts the coupled feedback signal into the sampling feedback signal according to the sampling signal and the clearing signal.
In one preferred embodiment, the feedback signal sample-and-hold circuit comprises: a shielding circuit coupled to the power switch control signal generating circuit and the primary port for preventing the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary port during a shielding period according to a shielding signal related to the power switch control signal; and a sampling feedback signal generating circuit coupled between the shielding circuit and the power switch control signal generating circuit for generating the sampling feedback signal according to the coupling feedback signal, a clearing signal and a sampling signal.
In one preferred embodiment, the signal coupling circuit comprises a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are signals with pulse forms.
In one preferred embodiment, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch control circuit does not conduct the SR switch according to the coupled synchronous rectification signal related to the synchronous rectification pulse, so that the SR switch is not conducted before the power switch is conducted.
In one preferred embodiment, during an operation period, the SR switch control circuit determines that the power switch is not conductive based on a secondary side winding current flowing through the secondary side winding, an SR switch current flowing through the SR switch, or a voltage across the secondary side winding or the SR switch.
In one preferred embodiment, the feedback pulse signal comprises at least one feedback pulse having one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse number indicating the output voltage; and a power switch current flowing through the power switch is related to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or the combination thereof
In one preferred embodiment, the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond (micro-second).
In one preferred embodiment, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse is generated after a synchronous rectification pulse of the synchronous rectification pulse signal is generated and after a synchronous default period.
In the aforementioned embodiment, when the synchronous rectification pulse of the synchronous rectification pulse signal is generated and starts, the next synchronous rectification pulse is not generated during a synchronization threshold, the SR switch control circuit generates the feedback pulse, and then periodically generates the feedback pulse with a feedback period until the power switch control circuit generates the synchronous rectification pulse.
In the aforementioned embodiment, the synchronization default period is related to the output voltage.
In one preferred embodiment, during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse generated after a feedback pulse of the feedback pulse signal is generated and a feedback preset period elapses.
In the aforementioned embodiment, when the feedback pulse of the feedback pulse signal is generated and starts, the next feedback pulse is not generated during a feedback threshold period, the power switch control circuit generates the synchronous rectification pulse, and then periodically generates the synchronous rectification pulse with a synchronous period until the SR switch control circuit generates the feedback pulse.
In the aforementioned embodiment, the feedback preset period is related to the output voltage.
In one preferred embodiment, the SR switch control circuit comprises: an output voltage sampling amplifying circuit for sampling and amplifying the output voltage to generate an output voltage sampling amplifying signal; a feedback pulse signal generating circuit coupled between the output voltage sampling amplifying circuit and the secondary side port for generating the feedback pulse signal according to the output voltage sampling amplifying signal; an SR comparator coupled to the secondary side port for generating a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal; an SR timing circuit coupled to the comparator for generating a synchronous default period timing signal after timing a synchronous default period according to the synchronous comparison signal; and an SR switch control signal generating circuit coupled to the comparator and the SR switch for generating an SR switch control signal to control the SR switch according to the synchronous comparison signal.
The purpose, technical content, features and effects of the invention will be more easily understood through the following detailed description of specific embodiments.
Drawings
FIG. 1 shows a prior art flyback power supply circuit;
FIG. 2 shows an embodiment of a flyback power supply circuit 200 according to the present invention;
FIG. 3 is a schematic diagram showing waveforms of a synchronous rectification pulse signal Sync, a power switch control signal Spwm, a SR switch control signal VSR, and a feedback pulse signal Sfb according to the present invention;
FIGS. 4A-4D are schematic waveforms of the synchronous rectified pulse signal Sync and the feedback pulse signal Sfb according to various embodiments of the present invention;
FIG. 5 is a schematic diagram showing waveforms of a synchronous rectification pulse signal Sync, a power switch control signal Spwm, and a feedback pulse signal Sfb according to an embodiment of the present invention;
FIG. 6 shows one embodiment of the SR switch control circuit 207 of the present invention;
FIG. 7 shows a more specific embodiment of the SR switch control circuit 207 of the present invention;
FIG. 8 illustrates one embodiment of a power switch control circuit 205 of the present invention;
FIG. 9 illustrates one embodiment of the feedback signal sample and hold circuit 2053 of the present invention;
FIG. 10 shows a more specific embodiment of a power switch control circuit 205 of the present invention;
FIG. 11 is a schematic diagram showing the waveforms of the masking signal BLKP and the synchronous rectified pulse signal Sync in the embodiment shown in FIG. 10;
fig. 12 shows a more specific embodiment of the power switch control circuit 205 of the present invention.
Fig. 13 is a waveform diagram of the synchronous rectification pulse signal Sync, the power switch control signal Spwm, the SR switch control signal VSR, the feedback pulse signal Sfb, the voltage Vopto, the ramp signal Sramp, the sample-hold signal Vfb _ SH, the sampling signal SH, and the clear signal CLR according to the present invention.
Description of the symbols in the drawings
100, 200 flyback power supply circuit
101 rectifier circuit
102, 202 transformer
103 coupling circuit
104 photo-coupled circuit
105 PWM control circuit
106 current sensing circuit
107 synchronous rectification control circuit
108 synchronous rectification switch circuit
204 signal coupling circuit
205 power switch control circuit
207 SR switch control circuit
208 SR switch
2051 power switch control signal generating circuit
2053 feedback signal sampling and holding circuit
2055 feedback timing circuit
2071 output voltage sampling and amplifying circuit
2073 feedback pulse signal generating circuit
2075 SR comparator
2077 SR timing circuit
2079 SR switch control signal generating circuit
3051 comparator
3052 latch circuit
3053 sample-and-hold circuit
3071 Voltage divider circuit
3072A comparator
3074 pulse switch
3078A delay timer
3079 ramp signal generating circuit
3173 pulse circuit
3174 pulse switch
20531 shading circuit
20533 sampling feedback signal generating circuit
BLKP mask signal
C1, C2 capacitor
CLR clear signal
COMP sampling feedback signal
FB feedback signal
GND ground potential
Iout output current
Iw2, Isr Current
P1 Primary side Port
P2 secondary side port
PLS notification signal
Pul1, Pul2, Pul3, Pul4 feedback pulses
PS1, PS2 pulse switch signal
REF reference potential
Sfb feedback pulse signal
SH sampling signal
Spwm power switch control signal
Sramp ramp signal
SRpul synchronous rectification pulse
SW power switch
SWb switch
Sync synchronous rectification pulse signal
Sx synchronous comparison signal
Tb masking pulse time length
Td synchronization default period
Tp feedback period
Ts synchronous commutation pulse time length
Tt synchronization threshold period
Vac AC voltage
Vin input voltage
Vfb coupled feedback signal
Vfb _ cmp feedback comparison signal
Vfb _ ltch latch feedback signal
Vfb _ sh sample-hold signal
Vo, Vopto voltage
Vout output voltage
Vosp output voltage sampling amplification signal
Vsr transvoltage
Vsync coupled synchronous rectified signal
Vth1 synchronous reference signal
Vth3 feedback reference signal
VSR SR switch control signal
Vw2 transpressure
W1 primary winding
W2 Secondary winding
Detailed Description
The drawings are schematic and are intended to show the coupling relationship between circuits and the relationship between signal waveforms, and the circuits, signal waveforms and frequencies are not drawn to scale.
Referring to fig. 2, an embodiment of a flyback power supply circuit 200 according to the present invention is shown. As shown in fig. 2, the ac voltage Vac is rectified by the rectifier circuit 101 to generate an input voltage Vin. The rectifier circuit 101 is, for example, a bridge rectifier circuit. In the flyback power supply circuit 200, the primary winding W1 of the transformer 202 receives the input voltage Vin. The power switch SW controls the on-time of the primary winding W1 to generate the output voltage Vout between the secondary winding W2 and a ground potential GND. The flyback power supply circuit 200 includes a transformer 202, a power switch SW, a signal coupling circuit 204, a power switch control circuit 205, an SR switch control circuit 207, and a Synchronous Rectification (SR) switch 208. The power switch SW is coupled to the primary winding W1 for controlling the on-time of the primary winding W1. The power switch control circuit 205 is disposed on the primary side of the transformer 202, and configured to generate a power switch control signal Spwm to control the power switch SW according to the coupling feedback signal Vfb, and generate a synchronous rectification pulse signal Sync according to the coupling feedback signal Vfb; for example, the synchronous rectified pulse signal Sync has a rectified pulse for converting and transmitting relevant information to the secondary side of the transformer 202 through the signal coupling circuit 204 before the power switch SW is turned on by the power switch control signal Spwm, but the SR switch 208 is not turned on.
A Synchronous Rectification (SR) switch 208 is coupled to the secondary winding W2 for controlling the conduction time of the secondary winding W2 to correspond to the non-conduction state when the primary winding W1 is conducted. The SR switch control circuit 207 is disposed on the secondary side of the transformer 202, coupled to the SR switch 208, and configured to receive the coupled synchronous rectification signal Vsync to control the SR switch 208 in the normal operation mode, and generate the feedback pulse signal Sfb according to the output voltage Vout or the output current Iout. For example, the SR switch control circuit 207 controls the SR switch 208 according to the coupled synchronous rectification signal Vsync associated with the synchronous rectification pulse signal Sync to determine the timing of turning off the secondary winding W2, and determines the timing of turning on the SR switch 208 according to the current Iw2 flowing through the secondary winding W2, the voltage Vw2 of the secondary winding W2, the current Isr flowing through the parasitic diode in the SR switch 208, or the voltage Vsr of the SR switch 208.
The signal coupling circuit 204 is coupled between the SR switch control circuit 207 and the power switch control circuit 205, and is configured to inductively generate the synchronous rectified pulse signal Sync and the feedback pulse signal Sfb in a non-contact manner, respectively, to generate the coupled synchronous rectified signal Vsync and the coupled feedback signal Vfb. The signal coupling circuit 204 has a primary port P1 and a secondary port P2, the primary port P1 is located on the primary side of the transformer 202, and the secondary port P2 is located on the secondary side of the transformer 202. The primary port P1 receives the synchronous rectified pulse signal Sync and generates the coupled feedback signal Vfb in different non-overlapping time periods, and the secondary port P2 generates the coupled synchronous rectified pulse signal Vsync and receives the feedback pulse signal Sfb in corresponding non-overlapping time periods. That is, the signal coupling circuit 204 has a primary side port P1 electrically connected to the power switch control circuit 205 and a secondary side port P2 electrically connected to the SR switch control circuit 207. In different non-overlapping time periods, the primary port P1 and the secondary port P2 respectively receive different signals generated by the power switch control circuit 205 and the SR switch control circuit 207, and the signal coupling circuit 204 generates corresponding signals at the secondary port P2 and the primary port P1 after sensing and converting in a non-contact manner.
It should be noted that the primary side of the transformer 202 is shown on the same side as the primary winding W1 of the transformer 202, and the circuits on the primary side of the transformer 202 are electrically connected to the reference potential REF; the secondary side of the transformer 202 is shown on the same side as the winding W2 on the secondary side of the transformer 202, and the circuits on the secondary side of the transformer 202 are commonly electrically connected to the ground potential GND; the transformer 202 and the signal coupling circuit 204 are coupled between the primary side and the secondary side.
In the embodiment, the signal coupling circuit 204 only includes a single pulse transformer, and in other embodiments, the signal coupling circuit 204 may also have a function of bidirectionally coupling and transmitting signals between the primary side and the secondary side of the transformer 202 at different time intervals by using the same port, for example, the signal coupling circuit 204 includes a pulse optical coupler. In a preferred embodiment, the input and output signals of the pulse transformer and the pulse optical coupler are signals having pulse forms. The feedback pulse signal Sfb and the coupled feedback signal Vfb, for example, but not limited to, respectively have the same or different feedback pulses, and the feedback pulses have one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse number indicating the output voltage Vout; the power switch current flowing through the power switch SW is related to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or the combination thereof. That is, the feedback pulse signal Sfb and the coupling feedback signal Vfb have pulse signals, but are not limited to a single pulse signal, and the level, time length, and number of pulses of the pulse signal can be used to indicate the output voltage.
In the present embodiment, the SR switch control circuit 207 generates the SR switch control signal Vsr to control the SR switch 208 according to, for example and without limitation, the coupling of the synchronous rectification signal Vsync and the current Iw2 flowing through the secondary winding W2, the voltage Vw2 of the secondary winding W2, the current Isr flowing through the parasitic diode in the SR switch 208, or the voltage Vsr of the SR switch 208. For example, but not limited to, according to the rising edge (or the falling edge, as shown in fig. 13) of the synchronous rectification pulse in the coupled synchronous rectification signal Vsync, the SR switch 208 is not turned on, and according to the current Iw2 flowing through the secondary winding W2, the voltage Vw2 of the secondary winding W2, the current Isr flowing through the parasitic diode in the SR switch 208, or the voltage Vsr of the SR switch 208, the power switch SW is turned on after being confirmed to be turned off. That is, the SR switch control circuit 207 confirms that the power switch SW is not turned on before turning on the SR switch 208. The power switch control circuit 205 determines the power switch control signal Spwm to turn on and off the power switch SW and thus the primary winding W1, for example, according to the coupled feedback signal Vfb. Compared with the prior art, in the present invention, the signal coupling circuit 204 has a primary port P1 and a secondary port P2, the primary port P1 is located on the primary side of the transformer 202, and the secondary port P2 is located on the secondary side of the transformer 202, wherein the primary port P1 respectively receives the synchronous rectified pulse signal Sync and generates the coupling feedback signal Vfb in different non-overlapping time periods, and the secondary port P2 respectively generates the coupling synchronous rectified pulse signal Vsync and receives the feedback pulse signal Sfb in corresponding different non-overlapping time periods. Instead of using different coupling circuits 103 and 104 (and different ports) to transmit the primary side notification signal PLS to the secondary side and the secondary side output voltage related information to the primary side PWM controller 105, respectively, as in the prior art. That is, the present invention can utilize the same port in the signal coupling circuit 204 to transmit the information on the primary side and the secondary side in the normal operation mode. Therefore, the space of the circuit can be effectively reduced, and the manufacturing cost and the size of the circuit are further reduced.
Fig. 3 is a schematic diagram showing waveforms of the synchronous rectification pulse signal Sync, the power switch control signal Spwm, the SR switch control signal VSR, and the feedback pulse signal Sfb according to the present invention. As shown, the power switch control circuit 205 generates a power switch control signal Spwm to control the power switch SW according to a coupled feedback signal Vfb related to the output voltage Vout or the output current Iout, and generates a synchronous rectification pulse signal Sync. Wherein, the synchronous rectification pulse signal Sync has synchronous rectification pulse; in a preferred embodiment, the synchronous rectification pulse is converted by the signal coupling circuit 204 and transmitted to the SR switch circuit 207 to control the SR switch 208 to be non-conductive; and the SR switch control circuit 207 turns off the SR switch 208 according to the coupled synchronous rectification signal Vsync with respect to the synchronous rectification pulse. In a preferred embodiment, the power switch control circuit 205 generates the synchronous rectification pulse of the synchronous rectification pulse signal Sync to turn off the SR switch 208, and then changes the level of the power switch control signal Spwm to turn on the power switch SW, so as to confirm that the power switch SW is turned on after the SR switch 208 is turned off. In a preferred embodiment, the synchronous rectification pulse signal Sync has a synchronous rectification pulse, and the feedback pulse signal Sfb has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond (micro-second).
The SR switch control circuit 207 generates the SR switch control signal Vsr according to the received coupled synchronous rectification signal Vsync in a normal operation mode, and for example, but not limited to, according to a current Iw2 flowing through the secondary winding W2, or a voltage Vw2 across the secondary winding W2, or a current Isr flowing through a parasitic diode in the SR switch 208, or a voltage Vsr across the SR switch 208. The SR switch control circuit 207 generates the feedback pulse signal Sfb according to the feedback signal FB related to the output voltage Vout or the output current Iout in the normal operation mode.
For example, in an operation period, the feedback pulse signal Sfb includes a feedback pulse generated after a synchronous default period Td elapses after the synchronous rectified pulse of the synchronous rectified pulse signal Sync is generated. The one operation period is, for example, but not limited to, a period in which the level of the power switch control signal Spwm is increased from a low level to a high level twice. For example, referring to fig. 3, taking high-level conduction and low-level non-conduction as an example, according to the rising edge of the synchronous rectification pulse signal Sync, the SR switch 208 is not turned on, and according to the feedback signal FB related to the output voltage Vout or the output current Iout, or according to: flows through the parasitic diode of the secondary winding W2 or the SR switch 208, and the cross-voltage of the secondary winding W2 or the SR switch 208 to generate the SR switch control signal VSR, thereby turning on the SR switch 208. The current condition of the secondary winding W2 can be determined, for example, from the voltage across the SR switch 208 or from the voltage at the illustrated left-hand node of the SR switch 208. For example, before the power switch control signal Spwm rises, the SR switch control signal VSR is changed from a high level to a low level, and the SR switch 208 is not turned on; and generates the SR switch control signal Vsr according to the current Iw2 flowing through the secondary winding W2, the voltage Vw2 of the secondary winding W2, the current Isr flowing through the parasitic diode in the SR switch 208, or the voltage Vsr of the SR switch 208, thereby turning on the SR switch 208. By this mechanism, the on-time and the off-time of the SR switch 208 can be properly controlled, and the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb are transmitted to the secondary side and the primary side at different time intervals by using the same port, respectively, so as to control the on-time and the off-time of the power switch SW and the SR switch 208, thereby effectively avoiding the short circuit penetration.
Fig. 4A-4D are schematic waveforms of the synchronous rectified pulse signal Sync and the feedback pulse signal Sfb according to various embodiments of the present invention. As shown in fig. 4A, the synchronous rectified pulse signal Sync and the feedback pulse signal Sfb have, for example, but not limited to, a single feedback pulse. As shown in fig. 4B, the synchronous rectified pulse signal Sync and the feedback pulse signal Sfb have, for example, but not limited to, a single feedback pulse, and the levels thereof may be different; the level of the feedback pulse signal Sfb is, for example, a level indicating the output voltage Vout. As shown in fig. 4C, the synchronous rectified pulse signal Sync and the feedback pulse signal Sfb have, for example, but not limited to, a single feedback pulse, and the time lengths of the feedback pulses may be different; the feedback pulse time length of the feedback pulse signal Sfb is, for example, used to indicate the level of the output voltage Vout. As shown in fig. 4D, the synchronous rectified pulse signal Sync and the feedback pulse signal Sfb have, for example, but not limited to, a plurality of feedback pulses, and the number of the feedback pulses may be different; the number of feedback pulses of the feedback pulse signal Sfb is, for example, used to indicate the level of the output voltage Vout.
Fig. 5 is a schematic diagram showing waveforms of the synchronous rectification pulse signal Sync, the power switch control signal Spwm, and the feedback pulse signal Sfb according to an embodiment of the invention. As shown, in an operation period, the feedback pulse signal Sfb has a feedback pulse Pul1, and the feedback pulse Pul1 is generated after the synchronous rectification pulse SRPul of the synchronous rectification pulse signal Sync is generated and passes through the synchronous default period Td. When the synchronous rectification pulse SRPul of the synchronous rectification pulse signal Sync starts after being generated, and the next synchronous rectification pulse SRPul is not generated during the synchronous threshold period Tt, the SR switch control circuit 207 generates the feedback pulse Pul2, and then periodically generates the feedback pulse Pul3 and the feedback pulse Pul4 with a feedback period Tp until the power switch control circuit 205 generates the synchronous rectification pulse SRPul. Thus, when the output terminal is under light load, the SR switch control circuit 207 can still continuously generate the feedback pulse Pul2 to indicate the output voltage Vout.
FIG. 6 shows one embodiment of the SR switch control circuit 207 of the present invention. As shown, the SR switch control circuit 207 includes: an output voltage sampling amplifying circuit 2071, a feedback pulse signal generating circuit 2073, an SR comparator 2075, an SR timing circuit 2077 and an SR switch control signal generating circuit 2079. The output voltage sampling amplifying circuit 2071 is used for sampling and amplifying the output voltage Vout to generate an output voltage sampling amplifying signal Vosp. The feedback pulse signal generating circuit 2073 is coupled between the output voltage sampling amplifying circuit 2071 and the secondary side port P2 for generating the feedback pulse signal Sfb according to the output voltage sampling amplifying signal Vosp. The SR comparator 2075 is coupled to the secondary port P2 for generating the synchronous comparison signal Sx according to the coupled synchronous rectified signal Vsync and the synchronous reference signal Vth 1. The SR timing circuit 2077 is coupled to the comparator 2075 for generating a timing signal of the synchronous default period after timing the synchronous default period according to the synchronous comparison signal Sx. The SR switch control signal generating circuit 2079 is coupled to the SR comparator 2075 and the SR switch 208 for generating an SR switch control signal VSR according to the synchronous comparison signal Sx to control the SR switch 208.
FIG. 7 shows a more specific embodiment of the SR switch control circuit 207 of the present invention. As shown, the SR switch control circuit 207 includes: an output voltage sampling amplifying circuit 2071, a feedback pulse signal generating circuit 2073, an SR comparator 2075, an SR timing circuit 2077 and an SR switch control signal generating circuit 2079. The output voltage sampling amplifying circuit 2071 is used for sampling and amplifying the output voltage Vout to generate an output voltage sampling amplifying signal Vosp. As shown, in the output voltage sampling amplifying circuit 2071, the voltage dividing circuit 3071 receives a voltage Vo associated with the output voltage Vout and generates a divided voltage associated with the output voltage Vout to generate an output voltage sampling amplifying signal Vosp. In the present embodiment, the output voltage sampling amplifying circuit 2071 comprises a comparator 3072 for comparing the voltage Vopto associated with the output voltage Vout with the ramp signal Sramp to generate the output voltage sampling amplifying signal Vosp. For example, when the ramp signal Sramp exceeds the voltage Vopto, a comparison signal having a high level is generated. The feedback pulse signal generating circuit 2073 is coupled between the output voltage sampling amplifying circuit 2071 and the secondary side port P2 for generating the feedback pulse signal Sfb according to the output voltage sampling amplifying signal Vosp. The feedback pulse signal generating circuit 2073 includes a pulse circuit 3073, which generates a pulse switching signal PS1 according to the comparison signal having a high level. The feedback pulse signal generating circuit 2073 comprises a pulse switch 3074, which operates according to a pulse switching signal PS1 to generate a feedback pulse signal Sfb at the secondary port P2.
Referring to fig. 7, the SR comparator 2075 is coupled to the secondary port P2 for generating the synchronous comparison signal Sx according to the coupled synchronous rectified signal Vsync and the synchronous reference signal Vth 1. The SR timing circuit 2077 is coupled to the SR comparator 2075 for receiving the synchronous comparison signal Sx and generating a synchronous default period timing signal after timing the synchronous default period. The synchronous default period timing signal is used, for example, to generate the feedback pulse of the feedback pulse signal Sfb after the synchronous rectification pulse of the synchronous rectification pulse signal Sync is generated and after the synchronous default period Td is passed. In the present embodiment, the SR timing circuit 2077 includes, for example but not limited to, a delay timer 3078 and a ramp signal generating circuit 3079. So that the delay effect of the timing signal of the synchronization default period, i.e., the synchronization default period Td, is related to the output voltage Vout. The ramp signal generating circuit 3079 is used for generating the ramp signal Sramp to be input to the comparator 3072. The SR switch control signal generating circuit 2079 is coupled to the SR comparator 2075 and the SR switch 208 for generating an SR switch control signal VSR according to the synchronous comparison signal Sx to control the SR switch 208.
Fig. 8 shows an embodiment of the power switch control circuit 205 of the present invention. As shown, the power switch control circuit 205 includes a power switch control signal generating circuit 2051, a feedback signal sample-and-hold circuit 2053, a feedback timing circuit 2055, and an SR pulse signal generating circuit 2057. The power switch control signal generating circuit 2051 is coupled to the power switch SW for generating the power switch control signal Spwm according to the sampled feedback signal Vfb. The feedback signal sample-and-hold circuit 2053 is coupled between the power switch control signal generating circuit 2051 and the primary side port P1, and is configured to generate a sampling feedback signal COMP according to the coupling feedback signal Vfb. The feedback timing circuit 2055 is coupled to the power switch control signal generating circuit 2051 and the feedback signal sample-and-hold circuit 2053, and is configured to generate a sampling signal SH and a clearing signal CLR according to the power switch control signal Spwm and the coupled feedback signal Vfb, wherein the feedback signal sample-and-hold circuit 2053 converts the coupled feedback signal Vfb into a sampling feedback signal COMP according to the sampling signal SH and the clearing signal CLR.
Fig. 9 shows an embodiment of the feedback signal sample-and-hold circuit 2053 of the present invention. As shown, the feedback signal sample-and-hold circuit 2053 includes a masking circuit 20531 and a sampled feedback signal generating circuit 20533. The masking circuit 20531, the power switch control signal generating circuit 2051 and the primary port P1 are coupled to prevent the feedback signal sample-and-hold circuit 2053 from receiving the synchronous rectified pulse signal Sync from the primary port P1 during the masking period according to a masking signal BLKP associated with the power switch control signal Spwm. The sampling feedback signal generating circuit 20533 is coupled between the masking circuit 20531 and the power switch control signal generating circuit 2051, and is used for generating a sampling feedback signal COMP according to the coupling feedback signal Vfb, the clearing signal CLR, and the sampling signal SH.
Fig. 10 shows a more specific embodiment of the power switch control circuit 205 of the present invention. As shown, the power switch control circuit 205 includes a power switch control signal generation circuit 2051, a feedback signal sample and hold circuit 2053, and a feedback timing circuit 2055. The power switch control signal generating circuit 2051 is coupled to the power switch SW for generating a power switch control signal Spwm according to the sampling feedback signal COMP. The pulse signal generating circuit 2057 is coupled to the power switch control signal generating circuit 2051, and generates a synchronous rectification pulse signal Sync according to the power switch control signal Spwm (in the embodiment, the pulse signal generating circuit 2057 receives a relevant signal of the power switch control signal Spwm). The feedback signal sample-and-hold circuit 2053 is coupled between the power switch control signal generating circuit 2051 and the primary side port P1, and is configured to generate a sampling feedback signal COMP according to the coupling feedback signal Vfb. The feedback timing circuit 2055 is coupled to the power switch control signal generating circuit 2051 and the feedback signal sample-and-hold circuit 2053, and is configured to generate a sampling signal SH and a clear signal CLR according to the power switch control signal Spwm and the coupled feedback signal Vfb (in the embodiment, for example, a signal related to the coupled feedback signal Vfb is received), wherein the feedback signal sample-and-hold circuit 2053 converts the coupled feedback signal Vfb into the sampling feedback signal COMP according to the sampling signal SH and the clear signal CLR. And prevents the feedback signal sample-and-hold circuit 2053 from receiving the synchronous rectification pulse signal Sync from the primary port P1 during the masking period according to the masking signal BLKP.
FIG. 11 is a schematic diagram showing signal waveforms of the masking signal BLKP and the synchronous rectified pulse signal Sync in the embodiment shown in FIG. 10. As shown, and referring to fig. 10, the blanking signal BLKP has a blanking pulse time length Tb, and the synchronous rectified pulse signal Sync has a synchronous rectified pulse time length Ts; the shielding pulse time length Tb is greater than the synchronous rectification pulse time length Ts, and the shielding pulse time length Tb covers the synchronous rectification pulse time length Ts; this causes the blanking signal BLKP to generate a blanking pulse, turning on the switch SWb, and electrically connecting the inverting input signal of the comparator 20531 in the feedback signal sample-and-hold circuit 2053 to the reference potential REF during the period of the synchronous rectification pulse in the synchronous rectification pulse signal Sync, so that the inverting input of the comparator 20531 does not receive the synchronous rectification pulse in the synchronous rectification pulse signal Sync.
Fig. 12 shows a more specific embodiment of the power switch control circuit 205 of the present invention. As shown, the power switch control circuit 205 includes a power switch control signal generation circuit 2051, a feedback signal sample and hold circuit 2053, and a feedback timing circuit 2055. The power switch control signal generating circuit 2051 is coupled to the power switch SW for generating a power switch control signal Spwm according to the sampling feedback signal COMP. The pulse circuit 3173 is coupled to the power switch control signal generating circuit 2051, and generates the pulse switch signal PS2 according to the power switch control signal Spwm. The pulse switch 3174 is coupled to the pulse circuit 3173, and operates according to the pulse switch signal PS2 to generate the synchronous rectified pulse signal Sync at the primary port P1. The feedback signal sample-and-hold circuit 2053 is coupled between the power switch control signal generating circuit 2051 and the primary side port P1, and is configured to generate a sampling feedback signal COMP according to the coupling feedback signal Vfb. The feedback timing circuit 2055 is coupled to the power switch control signal generating circuit 2051 and the feedback signal sample-and-hold circuit 2053, and is configured to generate a sampling signal SH and a clear signal CLR according to the power switch control signal Spwm (for example, receiving the pulse switch signal PS2 related to the power switch control signal Spwm in this embodiment) and the coupling feedback signal Vfb (for example, receiving the feedback comparison signal Vfb _ cmp related to the coupling feedback signal Vfb in this embodiment), wherein the feedback signal sample-and-hold circuit 2053 converts the coupling feedback signal Vfb into the sampling feedback signal COMP according to the sampling signal SH and the clear signal CLR.
With continued reference to fig. 12, the feedback signal sample-and-hold circuit 2053 includes, for example: a comparator 3051, a latch circuit 3052, and a sample hold circuit 3053. The comparator 3051 compares the coupled feedback signal Vfb with the feedback reference signal Vth3 to generate a feedback comparison signal Vfb _ cmp. The latch circuit 3052 generates a latch feedback signal Vfb _ ltch based on the feedback comparison signal Vfb _ cmp. As shown, the sample-and-hold circuit 3053 generates a sampling feedback signal COMP according to the latch feedback signal Vfb _ ltch, the sampling signal SH, and the clear signal CLR. Wherein the switch SW1 is controlled by the latch circuit 3052 generating a latch feedback signal Vfb _ ltch in response to the coupling feedback signal Vfb; the switch SW2 and the switch SW3 are respectively controlled by the sampling signal SH and the clear signal CLR to charge and discharge the capacitor C1 and the capacitor C2, so as to generate a sample hold signal Vfb _ SH and further generate a sampling feedback signal COMP. The feedback timing circuit 2055 is coupled to the power switch control signal generating circuit 2051 and the feedback signal sample-and-hold circuit 2053, and is configured to generate the sampling signal SH and the clearing signal CLR according to the power switch control signal Spwm (in the present embodiment, for example, receiving the signal pulse switch signal PS2 related to the power switch control signal Spwm) and the coupling feedback signal Vfb (in the present embodiment, for example, receiving the signal feedback comparison signal Vfb _ cmp related to the coupling feedback signal Vfb).
Fig. 13 is a waveform diagram of the synchronous rectification pulse signal Sync, the power switch control signal Spwm, the SR switch control signal VSR, the feedback pulse signal Sfb, the voltage Vopto, the ramp signal Sramp, the sample-hold signal Vfb _ SH, the sampling signal SH, and the clear signal CLR according to the present invention. As shown, the power switch control circuit 205 generates a power switch control signal Spwm to control the power switch SW according to a coupled feedback signal Vfb related to the output voltage Vout or the output current Iout, and generates a synchronous rectification pulse signal Sync. Wherein, the synchronous rectification pulse signal Sync has synchronous rectification pulse; in a preferred embodiment, the synchronous rectification pulse is converted by the signal coupling circuit 204 and transmitted to the SR switch circuit 207 to control the SR switch 208 to be non-conductive; and the SR switch control circuit 207 turns off the SR switch 208 according to the coupled synchronous rectification signal Vsync with respect to the synchronous rectification pulse. In a preferred embodiment, the power switch control circuit 205 generates the synchronous rectification pulse of the synchronous rectification pulse signal Sync to turn off the SR switch 208, and then changes the level of the power switch control signal Spwm to turn on the power switch SW, so as to confirm that the power switch SW is turned on after the SR switch 208 is turned off. In a preferred embodiment, the synchronous rectification pulse signal Sync has a synchronous rectification pulse, and the feedback pulse signal Sfb has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond (micro-second).
It should be noted that, in the present embodiment, during the operation period, the feedback pulse signal Sfb includes a feedback pulse, which is generated after the synchronous rectification pulse of the synchronous rectification pulse signal Sync is generated and after the synchronous default period Td is passed. The voltage Vopto and the ramp signal Sramp, plus the pulse length time of the clear signal CLR, are used to determine the synchronization default period Td, such that the synchronization default period Td is related to the output voltage Vout.
The present invention has been described with respect to the preferred embodiments, but the above description is only for the purpose of making the contents of the present invention easy to understand for those skilled in the art, and is not intended to limit the scope of the present invention. Equivalent variations will occur to those skilled in the art, within the same spirit of the invention. For example, two circuits or elements shown in various embodiments as being directly connected may have other circuits or elements interposed therebetween that do not interfere with the primary function, and thus, "coupled" should be taken to include both direct and indirect connections. For another example, the resistor or the voltage divider circuit is not limited to a resistor element, and may be replaced by other circuits, such as a transistor circuit. For another example, the positive and negative terminals of the error amplifier circuit and the comparator circuit can be interchanged, and only the relevant circuit or the meaning of the high and low level of the signal needs to be correspondingly modified; further, for example, since a signal (for example, but not limited to, a feedback signal) external to the control circuit may be subjected to voltage-current conversion, current-voltage conversion, or proportional conversion when it is taken into the control circuit for processing or calculation, the term "processing or calculation based on a certain signal" in the present invention is not limited to the processing or calculation based on the signal itself, and includes the processing or calculation based on the converted signal after the signal is subjected to the above-described conversion, if necessary. As another example, variations in all embodiments may be used interchangeably, such as pulse switch 3074 in the embodiment of FIG. 7, as well as in the embodiment of FIG. 10, and so forth. These and other equivalent variations are intended to be encompassed by the scope of the present invention, which is based on the teachings herein.

Claims (43)

1. A flyback power supply circuit, comprising:
a transformer having a primary winding for receiving an input voltage; and a secondary side winding for generating an output voltage;
a power switch coupled to the primary winding for controlling the conduction time of the primary winding;
a power switch control circuit, located on the primary side of the transformer, for generating a power switch control signal to control the power switch according to a coupling feedback signal, and generating a synchronous rectification pulse signal;
a synchronous rectifier switch coupled to the secondary winding for controlling the conduction time of the secondary winding to correspond to conduction when the primary winding is not conducted;
a synchronous rectification switch control circuit, located on the secondary side of the transformer, coupled to the synchronous rectification switch, for receiving a coupled synchronous rectification signal to control the synchronous rectification switch in a normal operation mode, and generating a feedback pulse signal according to the output voltage; and
a signal coupling circuit, coupled between the synchronous rectification switch control circuit and the power switch control circuit, for inducing the synchronous rectification pulse signal to generate the coupling synchronous rectification signal in a non-contact manner, and inducing the feedback pulse signal to generate the coupling feedback signal in a non-contact manner;
the signal coupling circuit is provided with a primary side port and a secondary side port, the primary side port is located on the primary side of the transformer, the secondary side port is located on the secondary side of the transformer, the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal respectively in different non-overlapping time periods, and the secondary side port generates the coupling synchronous rectification signal and receives the feedback pulse signal respectively in the corresponding non-overlapping different time periods.
2. The flyback power supply circuit of claim 1, wherein the signal coupling circuit comprises a pulse transformer or a pulse optical coupler, and input and output signals of the pulse transformer and the pulse optical coupler are signals having pulse forms.
3. The flyback power supply circuit of claim 1, wherein the synchronous rectified pulse signal has a synchronous rectified pulse before the power switch is turned on during an operation period; and the synchronous rectification switch control circuit does not conduct the synchronous rectification switch according to the coupling synchronous rectification signal related to the synchronous rectification pulse, so that the synchronous rectification switch is not conducted before the power switch is conducted.
4. The flyback power supply circuit of claim 1, wherein during an operation period, the synchronous rectifier switch control circuit determines that the power switch is not conducting based on a secondary winding current associated with the secondary winding, a synchronous rectifier switch current flowing through the synchronous rectifier switch, or a voltage across the secondary winding or the synchronous rectifier switch before conducting the synchronous rectifier switch.
5. The flyback power supply circuit of claim 1, wherein the feedback pulse signal comprises at least one feedback pulse having one or a combination of: a feedback pulse level, a feedback pulse time length, or a feedback pulse number indicating the output voltage; and a power switch current flowing through the power switch is related to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or a combination thereof.
6. The flyback power supply circuit of claim 1, wherein the synchronous rectified pulse signal has a synchronous rectified pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond.
7. The flyback power supply circuit of claim 1, wherein the feedback pulse signal has a feedback pulse during an operation period, the feedback pulse being generated after a synchronous default period after a synchronous rectified pulse of the synchronous rectified pulse signal is generated.
8. The flyback power supply circuit of claim 7, wherein when the synchronous rectification pulse of the synchronous rectification pulse signal starts to be generated, a next synchronous rectification pulse is not generated during a synchronization threshold, the synchronous rectification switch control circuit generates the feedback pulse, and then the feedback pulse is periodically generated with a feedback period until the power switch control circuit generates the synchronous rectification pulse.
9. The flyback power supply circuit of claim 7, wherein the synchronization default period is related to the output voltage.
10. The flyback power supply circuit of claim 1, wherein the synchronous rectification pulse signal has a synchronous rectification pulse generated after a feedback pulse of the feedback pulse signal is generated and a feedback preset period elapses during an operation period.
11. The flyback power supply circuit of claim 10, wherein the power switch control circuit generates the synchronous rectification pulse when the feedback pulse of the feedback pulse signal starts to be generated and the next feedback pulse is not generated during a feedback threshold period, and then periodically generates the synchronous rectification pulse with a synchronization period until the synchronous rectification switch control circuit generates the feedback pulse.
12. The flyback power supply circuit of claim 10, wherein the feedback default period is related to the output voltage.
13. The flyback power supply circuit of claim 1, wherein the synchronous rectification switch control circuit comprises:
an output voltage sampling amplifying circuit for sampling and amplifying the output voltage to generate an output voltage sampling amplifying signal;
a feedback pulse signal generating circuit coupled between the output voltage sampling amplifying circuit and the secondary side port for generating the feedback pulse signal according to the output voltage sampling amplifying signal;
a synchronous rectification comparator coupled to the secondary side port for generating a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal;
a synchronous rectification timing circuit coupled to the comparator for generating a synchronous default period timing signal after timing a synchronous default period according to the synchronous comparison signal; and
and the synchronous rectification switch control signal generating circuit is coupled with the comparator and the synchronous rectification switch and used for generating a synchronous rectification switch control signal according to the synchronous comparison signal so as to control the synchronous rectification switch.
14. The flyback power supply circuit of claim 1, wherein the power switch control circuit comprises:
a power switch control signal generating circuit coupled to the power switch for generating the power switch control signal according to a sampling feedback signal;
a feedback signal sample-and-hold circuit coupled between the power switch control signal generating circuit and the primary side port for generating the sampling feedback signal according to the coupling feedback signal; and
and the feedback timing circuit is coupled with the power switch control signal generating circuit and the feedback signal sampling and holding circuit and used for generating a sampling signal and a clearing signal according to the power switch control signal and the coupling feedback signal, wherein the feedback signal sampling and holding circuit converts the coupling feedback signal into the sampling feedback signal according to the sampling signal and the clearing signal.
15. The flyback power supply circuit of claim 14, wherein the feedback signal sample-and-hold circuit comprises:
a shielding circuit coupled to the power switch control signal generating circuit and the primary port for preventing the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary port during a shielding period according to a shielding signal related to the power switch control signal; and
and the sampling feedback signal generating circuit is coupled between the shielding circuit and the power switch control signal generating circuit and used for generating the sampling feedback signal according to the coupling feedback signal, the clearing signal and the sampling signal.
16. A synchronous rectification switch control circuit of a flyback power supply circuit is characterized in that the flyback power supply circuit comprises a transformer, a primary side winding and a secondary side winding, wherein the transformer is provided with the primary side winding and is used for receiving an input voltage; and a secondary side winding for generating an output voltage; a power switch coupled to the primary winding for controlling the conduction time of the primary winding; a power switch control circuit, located on the primary side of the transformer, for generating a power switch control signal to control the power switch according to a coupling feedback signal, and generating a synchronous rectification pulse signal; a synchronous rectifier switch coupled to the secondary winding for controlling the conduction time of the secondary winding to correspond to conduction when the primary winding is not conducted; the synchronous rectification switch control circuit is positioned on the secondary side of the transformer, is coupled with the synchronous rectification switch, and is used for receiving a coupled synchronous rectification signal in a normal operation mode so as to control the synchronous rectification switch and generate a feedback pulse signal according to the output voltage; and a signal coupling circuit, coupled between the synchronous rectification switch control circuit and the power switch control circuit, for inducing the synchronous rectification pulse signal to generate the coupling synchronous rectification signal in a non-contact manner, and inducing the feedback pulse signal to generate the coupling feedback signal in a non-contact manner; the signal coupling circuit is provided with a primary side port and a secondary side port, the primary side port is positioned on the primary side of the transformer, the secondary side port is positioned on the secondary side of the transformer, the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal respectively in different non-overlapping time periods, and the secondary side port generates the coupling synchronous rectification signal and receives the feedback pulse signal respectively in the corresponding non-overlapping different time periods; the synchronous rectification switch control circuit comprises:
an output voltage sampling amplifying circuit for sampling and amplifying the output voltage to generate an output voltage sampling amplifying signal;
a feedback pulse signal generating circuit coupled between the output voltage sampling amplifying circuit and the secondary side port for generating the feedback pulse signal according to the output voltage sampling amplifying signal;
a synchronous rectification comparator coupled to the secondary side port for generating a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal;
a synchronous rectification timing circuit coupled to the synchronous rectification comparator for generating a synchronous default period timing signal after timing a synchronous default period according to the synchronous comparison signal; and
and the synchronous rectification switch control signal generating circuit is coupled with the synchronous rectification comparator and the synchronous rectification switch and used for generating a synchronous rectification switch control signal according to the synchronous comparison signal so as to control the synchronous rectification switch.
17. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 16, wherein the signal coupling circuit comprises a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are signals having pulse forms.
18. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 16, wherein the synchronous rectification pulse signal has a synchronous rectification pulse before the power switch is turned on during an operation period; and the synchronous rectification switch control circuit does not conduct the synchronous rectification switch according to the coupling synchronous rectification signal related to the synchronous rectification pulse, so that the synchronous rectification switch is not conducted before the power switch is conducted.
19. The synchronous rectification switch control circuit of claim 16, wherein during an operation period, the synchronous rectification switch control circuit confirms that the power switch is not conducted according to a secondary side winding current flowing through the secondary side winding, a synchronous rectification switch current flowing through the synchronous rectification switch, or a voltage across the secondary side winding or the synchronous rectification switch before conducting the synchronous rectification switch.
20. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 16, wherein the feedback pulse signal comprises at least one feedback pulse having one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse number indicating the output voltage; and a power switch current flowing through the power switch is related to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or a combination thereof.
21. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 16, wherein the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond.
22. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 16, wherein the feedback pulse signal has a feedback pulse during an operation period, the feedback pulse being generated after a synchronous default period after a synchronous rectification pulse of the synchronous rectification pulse signal is generated.
23. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 22, wherein when the synchronous rectification pulse of the synchronous rectification pulse signal starts to be generated, the next synchronous rectification pulse is not generated during a synchronization threshold, the synchronous rectification switch control circuit generates the feedback pulse, and then periodically generates the feedback pulse with a feedback period until the synchronous rectification pulse is generated by the power switch control circuit.
24. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 22, wherein the synchronous default period is related to the output voltage.
25. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 16, wherein during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse generated after a feedback preset period after a feedback pulse of the feedback pulse signal is generated.
26. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 25, wherein when the feedback pulse of the feedback pulse signal is generated and started without generating the next feedback pulse during a feedback threshold period, the power switch control circuit generates the synchronous rectification pulse and then periodically generates the synchronous rectification pulse with a synchronization period until the synchronous rectification switch control circuit generates the feedback pulse.
27. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 25, wherein the feedback preset period is related to the output voltage.
28. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 16, wherein the power switch control circuit comprises:
a power switch control signal generating circuit coupled to the power switch for generating the power switch control signal according to a sampling feedback signal;
a feedback signal sample-and-hold circuit coupled between the power switch control signal generating circuit and the primary side port for generating the sampling feedback signal according to the coupling feedback signal; and
and the feedback timing circuit is coupled with the power switch control signal generating circuit and the feedback signal sampling and holding circuit and used for generating a sampling signal and a clearing signal according to the power switch control signal and the coupling feedback signal, wherein the feedback signal sampling and holding circuit converts the coupling feedback signal into the sampling feedback signal according to the sampling signal and the clearing signal.
29. The synchronous rectification switch control circuit of the flyback power supply circuit as claimed in claim 28, wherein the feedback signal sample-and-hold circuit comprises:
a shielding circuit coupled to the power switch control signal generating circuit and the primary port for preventing the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary port during a shielding period according to a shielding signal related to the power switch control signal; and
and the sampling feedback signal generating circuit is coupled between the shielding circuit and the power switch control signal generating circuit and used for generating the sampling feedback signal according to the coupling feedback signal, a clearing signal and a sampling signal.
30. A power switch control circuit of a flyback power supply circuit is characterized in that the flyback power supply circuit comprises a transformer which is provided with a primary side winding and is used for receiving an input voltage; and a secondary side winding for generating an output voltage; a power switch coupled to the primary winding for controlling the conduction time of the primary winding; the power switch control circuit is positioned at the primary side of the transformer and used for generating a power switch control signal according to a coupling feedback signal so as to control the power switch and generate a synchronous rectification pulse signal; a synchronous rectifier switch coupled to the secondary winding for controlling the conduction time of the secondary winding to correspond to conduction when the primary winding is not conducted; a synchronous rectification switch control circuit, located on the secondary side of the transformer, coupled to the synchronous rectification switch, for receiving a coupled synchronous rectification signal to control the synchronous rectification switch in a normal operation mode, and generating a feedback pulse signal according to the output voltage; and a signal coupling circuit, coupled between the synchronous rectification switch control circuit and the power switch control circuit, for inducing the synchronous rectification pulse signal to generate the coupling synchronous rectification signal in a non-contact manner, and inducing the feedback pulse signal to generate the coupling feedback signal in a non-contact manner; the signal coupling circuit is provided with a primary side port and a secondary side port, the primary side port is positioned on the primary side of the transformer, the secondary side port is positioned on the secondary side of the transformer, the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal respectively in different non-overlapping time periods, and the secondary side port generates the coupling synchronous rectification signal and receives the feedback pulse signal respectively in the corresponding non-overlapping different time periods; the power switch control circuit includes:
a power switch control signal generating circuit coupled to the power switch for generating the power switch control signal according to a sampling feedback signal;
a feedback signal sample-and-hold circuit coupled between the power switch control signal generating circuit and the primary side port for generating the sampling feedback signal according to the coupling feedback signal; and
and the feedback timing circuit is coupled with the power switch control signal generating circuit and the feedback signal sampling and holding circuit and used for generating a sampling signal and a clearing signal according to the power switch control signal and the coupling feedback signal, wherein the feedback signal sampling and holding circuit converts the coupling feedback signal into the sampling feedback signal according to the sampling signal and the clearing signal.
31. The power switch control circuit of the flyback power supply of claim 30, wherein the feedback signal sample-and-hold circuit comprises:
a shielding circuit coupled to the power switch control signal generating circuit and the primary port for preventing the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary port during a shielding period according to a shielding signal related to the power switch control signal; and
and the sampling feedback signal generating circuit is coupled between the shielding circuit and the power switch control signal generating circuit and used for generating the sampling feedback signal according to the coupling feedback signal, a clearing signal and a sampling signal.
32. The power switch control circuit of the flyback power supply of claim 30, wherein the signal coupling circuit comprises a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are signals having pulse forms.
33. The power switch control circuit of claim 30, wherein during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse before the power switch is turned on, and the synchronous rectification switch control circuit turns off the synchronous rectification switch according to the coupled synchronous rectification signal associated with the synchronous rectification pulse, so that the synchronous rectification switch is turned off before the power switch is turned on.
34. The power switch control circuit of claim 30, wherein during an operation period, the synchronous rectification switch control circuit determines that the power switch is not turned on according to a secondary winding current flowing through the secondary winding, a synchronous rectification switch current flowing through the synchronous rectification switch, or a voltage across the secondary winding or the synchronous rectification switch before turning on the synchronous rectification switch.
35. The power switch control circuit of the flyback power supply of claim 30, wherein the feedback pulse signal comprises at least one feedback pulse having one or a combination of: a feedback pulse level, a feedback pulse time length, or a feedback pulse number indicating the output voltage; and a power switch current flowing through the power switch is related to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or a combination thereof.
36. The power switch control circuit of the flyback power supply of claim 30, wherein the synchronous rectified pulse signal has a synchronous rectified pulse and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse is shorter than 1 microsecond.
37. The power switch control circuit of claim 30, wherein the feedback pulse signal has a feedback pulse during an operation period, the feedback pulse being generated after a synchronous default period after a synchronous rectified pulse of the synchronous rectified pulse signal is generated.
38. The power switch control circuit of claim 37, wherein when the synchronous rectification pulse of the synchronous rectification pulse signal is generated and started, the next synchronous rectification pulse is not generated during a synchronization threshold, the synchronous rectification switch control circuit generates the feedback pulse, and then periodically generates the feedback pulse with a feedback period until the power switch control circuit generates the synchronous rectification pulse.
39. The power switch control circuit of claim 37, wherein the synchronization default period is related to the output voltage.
40. The power switch control circuit of claim 30, wherein the synchronous rectification pulse signal has a synchronous rectification pulse during an operation period, the synchronous rectification pulse is generated after a feedback preset period after a feedback pulse of the feedback pulse signal is generated.
41. The power switch control circuit of claim 40, wherein when the feedback pulse of the feedback pulse signal is generated and begins without generating a next feedback pulse during a feedback threshold, the power switch control circuit generates the synchronous rectification pulse and then periodically generates the synchronous rectification pulse with a synchronization period until the synchronous rectification switch control circuit generates the feedback pulse.
42. The power switch control circuit of claim 40, wherein the feedback default period is related to the output voltage.
43. The power switch control circuit of the flyback power supply circuit of claim 30, wherein the synchronous rectification switch control circuit comprises:
an output voltage sampling amplifying circuit for sampling and amplifying the output voltage to generate an output voltage sampling amplifying signal;
a feedback pulse signal generating circuit coupled between the output voltage sampling amplifying circuit and the secondary side port for generating the feedback pulse signal according to the output voltage sampling amplifying signal;
a synchronous rectification comparator coupled to the secondary side port for generating a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal;
a synchronous rectification timing circuit coupled to the synchronous rectification comparator for generating a synchronous default period timing signal after timing a synchronous default period according to the synchronous comparison signal; and
and the synchronous rectification switch control signal generating circuit is coupled with the synchronous rectification comparator and the synchronous rectification switch and used for generating a synchronous rectification switch control signal according to the synchronous comparison signal so as to control the synchronous rectification switch.
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