TWI635699B - Flyback power converter and synchronous rectification (sr) switch control circuit and power switch control circuit thereof - Google Patents

Abstract

The invention provides a flyback power supply circuit, an SR switch control circuit and a power switch control circuit thereof. The flyback power supply circuit includes a transformer, a power switch, a power switch control circuit, a synchronous rectification (SR) switch, an SR switch control circuit, and a signal coupling circuit. The signal coupling circuit has a primary side port electrically connected to the power switch control circuit and a secondary side port electrically connected to the SR switch control circuit. In different periods that do not overlap with each other, the primary side port and the secondary side port receive different signals generated by the power switch control circuit and the SR switch control circuit, respectively, and the signal coupling circuit senses and converts in a non-contact manner. Generate corresponding signals to the secondary side port and the primary side port.

Description

Flyback power supply circuit and its SR switch control circuit and power switch control circuit

The invention relates to a flyback power supply circuit, an SR switch control circuit and a power switch control circuit thereof, and particularly to a signal coupling circuit coupled between a primary side and a secondary side of a transformer in a non-contact manner. In different periods that do not overlap with each other, the same group of ports is used to sense and convert the signals on the primary side and send them to the secondary side. The signals on the secondary side are sensed and converted to the flyback type. Power supply circuit and its SR switch control circuit and power switch control circuit.

FIG. 1 illustrates a prior art flyback power supply circuit 100 in which an AC voltage Vac is rectified by a rectifier circuit 101 to generate an input voltage Vin. The primary winding W1 of the transformer 102 receives an input voltage Vin. The power on control circuit 105 obtains the feedback voltage signal COMP related to the output voltage Vout via the optical coupling circuit 104 or from an auxiliary winding method (not shown), and obtains the current flowing through the power switch from the current sensing circuit 106. The current sense signal CS of the SW current generates a PWM signal. The PWM control circuit 105 generates a power switch control signal Spwm according to the PWM signal to control the operation of the power switch SW.

Continuing to refer to FIG. 1, in order to improve the power conversion efficiency, the secondary winding W2 of the flyback power supply circuit 100 is electrically connected to a synchronous rectification (SR) switch circuit 108, and the synchronous rectification control circuit 107 is based on the synchronous rectification switch circuit. The cross voltage of 108 is controlled by a synchronization signal SYNC, so that the secondary winding W2 is turned on when the primary winding W1 is not conductive, so as to convert the input voltage Vin into the output voltage Vout. If the secondary winding W2 is still conducting when the primary winding W1 is conducting, a short-through situation may result. However, in some operating states, such as continuous conduction mode (CCM), the flyback power supply circuit 100 may have the primary winding W1 turned on and the switches in the synchronous rectification switch circuit 108 may not be turned off. The possibility of conducting leads to the situation that the secondary winding W2 is still conducting when the primary winding W1 is turned on, and the flyback power supply circuit 100 is short-circuited and the circuit is damaged.

The PWM control circuit 105 generates a notification signal PLS, inputs it to the coupling circuit 103, and then generates a synchronization signal SYNC from the coupling circuit 103 to confirm that the SR switch circuit 108 is not conductive, and then turns on the power switch SW. In addition, the optical coupling circuit 104 and the coupling circuit 103 are two separate circuits, which are respectively used to transmit the information about the output voltage generated on the secondary side to the PWM controller 105 on the primary side and the power switch control signal generated on the primary side. Spwm related information is transmitted to the SR control circuit 107 on the secondary side. With this arrangement, the space for circuit miniaturization is limited.

In view of this, the present invention proposes a flyback power supply circuit and its SR switch control circuit and power switch control circuit in response to the shortcomings of the above-mentioned prior art. Between the secondary side and the secondary side, the primary side signal is transmitted to the secondary side and the secondary side signal is transmitted to the flyback power supply circuit of the primary side in different periods without overlapping each other. And its SR switch control circuit and power switch control circuit.

In one aspect, the present invention provides a flyback power supply circuit including: a transformer having a primary winding to receive an input voltage; and a secondary winding to generate an output voltage; a power switch, Coupled to the primary winding to control the on-time of the primary winding; a power switch control circuit, located on the primary side of the transformer, for generating a power switch control signal to control the power switch according to a coupling feedback signal The power switch generates a synchronous rectification pulse signal; a synchronous rectification (SR) switch is coupled to the secondary winding to control the conduction time of the secondary winding to correspond to the primary winding Conductive when not conducting; an SR switch control circuit, located on the secondary side of the transformer, coupled to the SR switch, for receiving a coupled synchronous rectification signal in a normal operating mode to control the SR switch, and according to The output voltage generates a feedback pulse signal; and a signal coupling circuit is coupled to the SR switch control circuit and the power switch. The control circuit is used to inductively generate the coupled synchronous rectified signal in a non-contact manner by the synchronous rectification pulse signal, and inductively generate the coupled feedback signal in the non-contact manner by the feedback pulse signal; The signal coupling circuit has a primary side port and a secondary side port. The primary side port is located on the primary side of the transformer, and the secondary side port is located on the secondary side of the transformer. The primary side ports do not overlap each other. In different periods of time, respectively receiving the synchronous rectification pulse signal and generating the coupling feedback signal, and the secondary side port respectively generating the coupling synchronous rectification signal and receiving the feedback in different corresponding periods of time that do not overlap with each other Pulse signal.

In a preferred embodiment, the signal coupling circuit includes a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are both signals in the form of pulses.

In a preferred embodiment, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch control circuit is based on the coupling related to the synchronous rectification pulse. The synchronous rectification signal does not turn on the SR switch, so that before the power switch is turned on, the SR switch is not turned on.

In a preferred embodiment, during an operation period, before the SR switch control circuit turns on the SR switch, the SR switch control circuit flows through the SR according to a secondary winding current flowing through one of the secondary windings. One of the switches is the SR switching current or the voltage across the secondary winding or the SR switch to confirm that the power switch is not conducting.

In a preferred embodiment, the feedback pulse signal includes at least one feedback pulse, which has one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse Number to indicate the output voltage; and a power switch current flowing through one of the power switches corresponds to the feedback pulse level, the feedback pulse time length, the feedback pulse number, or a combination thereof

In a preferred embodiment, the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse are shorter than 1 Micro-second.

In one of the preferred embodiments, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse undergoes a synchronous preset after a synchronous rectification pulse of one of the synchronous rectification pulse signals is generated. Generated after the period.

In the foregoing embodiment, when the synchronous rectification pulse of the synchronous rectification pulse signal is started, the next synchronous rectification pulse is not generated during a synchronization threshold period, the SR switch control circuit generates the feedback pulse, and then A feedback cycle periodically generates the feedback pulse until the power switch control circuit generates the synchronous rectification pulse.

In the foregoing embodiment, the synchronization preset period is related to the output voltage.

In a preferred embodiment, during an operation period, wherein the synchronous rectification pulse signal has a synchronous rectification pulse, the synchronous rectification pulse is generated after a feedback pulse is generated after a feedback pulse is generated. Generated after a preset period.

In the foregoing embodiment, when the feedback pulse of the feedback pulse signal is generated and the next feedback pulse is not generated within a feedback threshold period, the power switch control circuit generates the synchronization Rectify the pulse, and then periodically generate the synchronous rectify pulse with a synchronization period until the SR switch control circuit generates the feedback pulse.

In the foregoing embodiment, the feedback preset period is related to the output voltage.

In one of the preferred embodiments, the SR switch control circuit includes: an output voltage sampling circuit for sampling and amplifying the output voltage to generate an output voltage sampling signal; a feedback pulse signal generating circuit coupled to The output voltage sampling circuit is connected to the secondary side port to generate the feedback pulse signal according to the output voltage sampling signal. An SR comparator is coupled to the secondary side port to synchronize according to the coupling. A rectified signal and a synchronous reference signal generate a synchronous comparison signal; an SR timing circuit is coupled to the comparator for timing a synchronous preset period based on the synchronous comparison signal to generate a synchronous preset period timing A signal; and an SR switch control signal generating circuit coupled to the comparator and the SR switch to generate an SR switch control signal to control the SR switch according to the synchronous comparison signal.

In a preferred embodiment, the power switch control circuit includes: a power switch control signal generating circuit coupled to the power switch to generate the power switch control signal according to a sampled feedback signal; a The feedback signal sampling and holding circuit is coupled between the power switch control signal generating circuit and the primary side port to generate the sampling feedback signal according to the coupling feedback signal; and a feedback timing circuit and the feedback timing circuit. The power switch control signal generation circuit and the feedback signal sample-and-hold circuit are coupled to generate a sampling signal and a clear signal according to the power switch control signal and the coupling feedback signal, wherein the feedback signal sample-and-hold circuit According to the sampling signal and the clearing signal, the coupling feedback signal is converted into the sampling feedback signal.

In the foregoing embodiment, the feedback signal sample-and-hold circuit includes a masking circuit coupled to the power switch control signal generating circuit and the primary side port for masking a signal according to one of the power switch control signals. To prevent the feedback signal sample and hold circuit from receiving the synchronous rectification pulse signal from the primary side port during a masking period; and a sample feedback signal generation circuit coupled to the The shielding circuit and the power switch control signal generating circuit are configured to generate the sampling feedback signal according to the coupling feedback signal, a clear signal, and a sampling signal.

In another aspect, the present invention provides an SR switch control circuit for a flyback power supply circuit. The flyback power supply circuit includes a transformer with a primary winding to receive an input voltage; and a secondary winding. To generate an output voltage; a power switch coupled to the primary winding to control the on-time of the primary winding; a power switch control circuit located on the primary side of the transformer for feedback based on a coupling Signal, generating a power switch control signal to control the power switch, and generating a synchronous rectification pulse signal; a synchronous rectification (SR) switch, coupled to the secondary winding, for controlling the secondary winding The on time corresponds to the time when the primary winding is not conducting; the SR switch control circuit is located on the secondary side of the transformer and is coupled to the SR switch for receiving a coupling synchronization in a normal operation mode Rectify the signal to control the SR switch, and generate a feedback pulse signal according to the output voltage; and a signal coupling circuit, coupled Between the SR switch control circuit and the power switch control circuit, the synchronous rectification pulse signal is induced in a non-contact manner to generate the coupled synchronous rectification signal, and the feedback pulse signal is used in a non-contact manner. The coupling feedback signal is induced by induction; wherein the signal coupling circuit has a primary side port and a secondary side port, the primary side port is located on the primary side of the transformer, and the secondary side port is located on the secondary side of the transformer , Wherein the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal in different periods that do not overlap each other, and the secondary side port generates the corresponding different periods that do not overlap each other. The coupling synchronous rectification signal and receiving the feedback pulse signal; the SR switch control circuit includes: an output voltage sampling circuit for sampling and amplifying the output voltage to generate an output voltage sampling signal; a feedback pulse signal generating circuit, Coupled between the output voltage sampling circuit and the secondary side port to sample the signal according to the output voltage to generate the feedback pulse signal; SR comparator, coupled to the secondary side port is coupled to the synchronous rectifier in accordance with a synchronizing signal and the reference signal, generating a synchronization signal comparison; SR a timer circuit, Is coupled to the comparator to generate a synchronous preset period timing signal after timing a synchronous preset period according to the synchronous comparison signal; and an SR switch control signal generating circuit for the comparator and the SR switch And coupled to generate an SR switch control signal according to the synchronous comparison signal to control the SR switch.

In a preferred embodiment, the signal coupling circuit includes a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are both signals in the form of pulses.

In a preferred embodiment, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch control circuit is based on the coupling related to the synchronous rectification pulse. The synchronous rectification signal does not turn on the SR switch, so that before the power switch is turned on, the SR switch is not turned on.

In a preferred embodiment, during an operation period, before the SR switch control circuit turns on the SR switch, the SR switch control circuit flows through the SR according to a secondary winding current flowing through one of the secondary windings. One of the switches is the SR switching current or the voltage across the secondary winding or the SR switch to confirm that the power switch is not conducting.

In a preferred embodiment, the feedback pulse signal includes at least one feedback pulse, which has one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse The number is used to indicate the output voltage; and one power switch current flowing through the power switch corresponds to the feedback pulse level, the feedback pulse time length, the number of feedback pulses, or a combination thereof.

In a preferred embodiment, the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse are shorter than 1 Micro-second.

In one of the preferred embodiments, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse undergoes a synchronous preset after a synchronous rectification pulse of one of the synchronous rectification pulse signals is generated. Generated after the period.

In the foregoing embodiment, when the synchronous rectification pulse of the synchronous rectification pulse signal is started, the next synchronous rectification pulse is not generated during a synchronization threshold period, the SR switch control circuit generates the feedback pulse, and then A feedback cycle periodically generates the feedback pulse until the power switch control circuit generates the synchronous rectification pulse.

In the foregoing embodiment, the synchronization preset period is related to the output voltage.

In a preferred embodiment, during an operation period, wherein the synchronous rectification pulse signal has a synchronous rectification pulse, the synchronous rectification pulse is generated after a feedback pulse is generated after a feedback pulse is generated. Generated after a preset period.

In the foregoing embodiment, when the feedback pulse of the feedback pulse signal is generated and the next feedback pulse is not generated within a feedback threshold period, the power switch control circuit generates the synchronous rectification pulse, and then The synchronous rectification pulse is generated periodically with a synchronization period until the SR switch control circuit generates the feedback pulse.

In the foregoing embodiment, the feedback preset period is related to the output voltage.

In a preferred embodiment, the power switch control circuit includes: a power switch control signal generating circuit coupled to the power switch to generate the power switch control signal according to a sampled feedback signal; a The feedback signal sampling and holding circuit is coupled between the power switch control signal generating circuit and the primary side port to generate the sampling feedback signal according to the coupling feedback signal; and a feedback timing circuit and the feedback timing circuit. The power switch control signal generation circuit and the feedback signal sample-and-hold circuit are coupled to generate a sampling signal and a clear signal according to the power switch control signal and the coupling feedback signal, wherein the feedback signal sample-and-hold circuit According to the sampling signal and the clearing signal, the coupling feedback signal is converted into the sampling feedback signal.

In the foregoing embodiment, the feedback signal sample-and-hold circuit includes a masking circuit coupled to the power switch control signal generating circuit and the primary side port for masking a signal according to one of the power switch control signals. To prevent the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary side port during a masking period; and a sample-feedback signal generation circuit coupled to the masking circuit and the power switch control signal generation Between the circuits, the sampling feedback signal is generated according to the coupling feedback signal, a clear signal, and a sampling signal.

In another aspect, the present invention provides a power switch control circuit for a flyback power supply circuit. The flyback power supply circuit includes a transformer having a primary winding to receive an input voltage; and a secondary winding. To generate an output voltage; a power switch coupled to the primary winding to control the on-time of the primary winding; the power switch control circuit is located on the primary side of the transformer and is used to feedback based on a coupling Signal, generating a power switch control signal to control the power switch, and generating a synchronous rectification pulse signal; a synchronous rectification (SR) switch, coupled to the secondary winding, for controlling the secondary winding The ON time corresponds to the ON time when the primary winding is non-conductive; an SR switch control circuit, located on the secondary side of the transformer, is coupled to the SR switch for receiving a coupling synchronization in a normal operating mode Rectifying a signal to control the SR switch, and generating a feedback pulse signal according to the output voltage; and a signal coupling circuit, It is connected between the SR switch control circuit and the power switch control circuit, and is used to inductively generate the coupled synchronous rectified signal in a non-contact manner, and the feedback pulse signal is used in a non-contact manner. , The coupling feedback signal is induced; wherein the signal coupling circuit has a primary side port and a secondary side port, the primary side port is located on the primary side of the transformer, and the secondary side port is located on the secondary side of the transformer Side, wherein the primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal in different periods that do not overlap each other, and the secondary side port is in the corresponding different periods that do not overlap each other, respectively Generating the coupled synchronous rectification signal and receiving the feedback pulse signal; the power switch control circuit includes: a power switch control signal to generate electricity It is coupled to the power switch to generate a power switch control signal according to a sample feedback signal; a feedback signal sample and hold circuit is coupled to the power switch control signal generation circuit and the primary side port. For generating the sampling feedback signal according to the coupling feedback signal; and a feedback timing circuit coupled to the power switch control signal generation circuit and the feedback signal sampling and holding circuit for coupling the power switch A control signal and the coupling feedback signal to generate a sampling signal and a clear signal, wherein the feedback signal sample-and-hold circuit converts the coupling feedback signal into the sampling feedback signal according to the sampling signal and the clear signal. .

In one of the preferred embodiments, the feedback signal sampling and holding circuit includes a shielding circuit coupled to the power switch control signal generating circuit and the primary side port, and is configured to be connected to the power switch control signal according to A masking signal to prevent the feedback signal sampling and holding circuit from receiving the synchronous rectification pulse signal from the primary side port during a masking period; and a sampling feedback signal generating circuit coupled to the masking circuit and the power switch The control signal generating circuit is configured to generate the sampling feedback signal according to the coupling feedback signal, a clear signal, and a sampling signal.

In a preferred embodiment, the signal coupling circuit includes a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are both signals in the form of pulses.

In a preferred embodiment, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch control circuit is based on the coupling related to the synchronous rectification pulse. The synchronous rectification signal does not turn on the SR switch, so that before the power switch is turned on, the SR switch is not turned on.

In a preferred embodiment, during an operation period, before the SR switch control circuit turns on the SR switch, the SR switch control circuit flows through the SR according to a secondary winding current flowing through one of the secondary windings. One of the switches is the SR switching current or the voltage across the secondary winding or the SR switch to confirm that the power switch is not conducting.

In a preferred embodiment, the feedback pulse signal includes at least one feedback pulse, which has one or a combination of the following: a feedback pulse level, a feedback pulse time length, or a feedback pulse The number is used to indicate the output voltage; and one power switch current flowing through the power switch corresponds to the feedback pulse level, the feedback pulse time length, the number of feedback pulses, or a combination thereof.

In a preferred embodiment, the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the pulse time length of the synchronous rectification pulse and the feedback pulse are shorter than 1 Micro-second.

In one of the preferred embodiments, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse undergoes a synchronous preset after a synchronous rectification pulse of one of the synchronous rectification pulse signals is generated. Generated after the period.

In the foregoing embodiment, when the synchronous rectification pulse of the synchronous rectification pulse signal is started, the next synchronous rectification pulse is not generated during a synchronization threshold period, the SR switch control circuit generates the feedback pulse, and then A feedback cycle periodically generates the feedback pulse until the power switch control circuit generates the synchronous rectification pulse.

In the foregoing embodiment, the synchronization preset period is related to the output voltage.

In a preferred embodiment, during an operation period, wherein the synchronous rectification pulse signal has a synchronous rectification pulse, the synchronous rectification pulse is generated after a feedback pulse is generated after a feedback pulse is generated. Generated after a preset period.

In the foregoing embodiment, when the feedback pulse of the feedback pulse signal is generated and the next feedback pulse is not generated within a feedback threshold period, the power switch control circuit generates the synchronous rectification pulse, and then The synchronous rectification pulse is generated periodically with a synchronization period until the SR switch control circuit generates the feedback pulse.

In the foregoing embodiment, the feedback preset period is related to the output voltage.

In one of the preferred embodiments, the SR switch control circuit includes: an output voltage sampling circuit for sampling and amplifying the output voltage to generate an output voltage sampling signal; a feedback pulse signal generating circuit coupled to The output voltage sampling circuit is connected to the secondary side port to generate the feedback pulse signal according to the output voltage sampling signal. An SR comparator is coupled to the secondary side port to synchronize according to the coupling. A rectified signal and a synchronous reference signal generate a synchronous comparison signal; an SR timing circuit is coupled to the comparator for timing a synchronous preset period based on the synchronous comparison signal to generate a synchronous preset period timing A signal; and an SR switch control signal generating circuit coupled to the comparator and the SR switch to generate an SR switch control signal to control the SR switch according to the synchronous comparison signal.

Detailed descriptions will be provided below through specific embodiments to make it easier to understand the purpose, technical content, features and effects of the present invention.

100,200‧‧‧Flyback power supply circuit

101‧‧‧ rectifier circuit

102,202‧‧‧Transformer

103‧‧‧Coupling circuit

104‧‧‧optical coupling circuit

105‧‧‧PWM control circuit

106‧‧‧Current sensing circuit

107‧‧‧Synchronous Rectification Control Circuit

108‧‧‧Synchronous Rectifier Switch Circuit

204‧‧‧Signal coupling circuit

205‧‧‧Power switch control circuit

207‧‧‧SR switch control circuit

208‧‧‧SR switch

2051‧‧‧Power switch control signal generating circuit

2053‧‧‧Return signal sample and hold circuit

2055‧‧‧Feedback timing circuit

2071‧‧‧Output voltage sampling circuit

2073‧‧‧Feedback pulse signal generating circuit

2075‧‧‧SR comparator

2077‧‧‧SR timing circuit

2079‧‧‧SR switch control signal generating circuit

3051‧‧‧ Comparator

3052‧‧‧Latch circuit

3053‧‧‧Sample and Hold Circuit

3071‧‧‧Divided voltage circuit

3072‧‧‧ Comparator

3074‧‧‧Pulse Switch

3078‧‧‧ Delay Timer

3079‧‧‧Slope signal generating circuit

3173‧‧‧Pulse Circuit

3174‧‧‧Pulse Switch

20531‧‧‧Shading circuit

20533‧‧‧Sampling feedback signal generating circuit

BLKP‧‧‧Blocking signal

C1, C2‧‧‧Capacitors

CLR‧‧‧Clear signal

COMP‧‧‧Sampling feedback signal

FB‧‧‧Feedback

GND‧‧‧ ground potential

Iout‧‧‧Output current

Iw2, Isr‧‧‧Current

P1‧‧‧ side port

P2‧‧‧Secondary side port

PLS‧‧‧Notification signal

Pul1, Pul2, Pul3, Pul4‧‧‧ feedback pulse

PS1, PS2‧‧‧‧Pulse switch signal

REF‧‧‧Reference potential

Sfb‧‧‧ feedback pulse signal

SH‧‧‧Sampling signal

Spwm‧‧‧ Power Switch Control Signal

Sramp‧‧‧Slope Signal

SRPul‧‧‧Synchronous rectification pulse

SW‧‧‧Power Switch

SWb‧‧‧Switch

Sync‧‧‧Synchronous rectification pulse signal

Sx‧‧‧Synchronous comparison signal

Tb‧‧‧Mask pulse duration

Td‧‧‧Sync preset period

Tp‧‧‧Feedback cycle

Ts‧‧‧Synchronous rectification pulse time length

Tt‧‧‧Synchronization threshold period

Vac‧‧‧AC voltage

Vin‧‧‧ input voltage

Vfb‧‧‧Coupled feedback signal

Vfb_cmp ‧‧‧ feedback comparison signal

Vfb_ltch‧‧‧Latchback feedback signal

Vfb_sh‧‧‧Sampling and holding signal

Vo, Vopto‧‧‧Voltage

Vout‧‧‧Output voltage

Vosp‧‧‧Output voltage sampling signal

Vsr‧‧‧ Cross pressure

Vsync‧‧‧Coupled synchronous rectification signal

Vth1‧‧‧Sync reference signal

Vth3‧‧‧ feedback reference signal

VSR‧‧‧SR switch control signal

Vw2‧‧‧cross pressure

W1‧‧‧ primary winding

W2‧‧‧Secondary winding

Figure 1 shows a prior art flyback power supply circuit.

FIG. 2 shows an embodiment of a flyback power supply circuit 200 according to the present invention.

FIG. 3 shows waveforms of the synchronous rectification pulse signal Sync, the power switch control signal Spwm, the SR switch control signal VSR, and the feedback pulse signal Sfb according to the present invention.

4A-4D are schematic waveform diagrams of several embodiments of the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb according to the present invention.

FIG. 5 is a waveform diagram of a synchronous rectification pulse signal Sync, a power switch control signal Spwm, and a feedback pulse signal Sfb according to an embodiment of the present invention.

FIG. 6 shows an embodiment of the SR switch control circuit 207 of the present invention.

FIG. 7 shows a more specific embodiment of the SR switch control circuit 207 of the present invention.

FIG. 8 shows an embodiment of the power switch control circuit 205 of the present invention.

FIG. 9 shows an embodiment of the feedback signal sample-and-hold circuit 2053 according to the present invention.

FIG. 10 shows a more specific embodiment of the power switch control circuit 205 of the present invention.

FIG. 11 is a schematic diagram of signal waveforms of the shielding signal BLKP and the synchronous rectification pulse signal Sync in the embodiment of FIG. 10.

FIG. 12 shows a more specific embodiment of the power switch control circuit 205 of the present invention.

FIG. 13 shows a synchronous rectification pulse signal Sync, a power switch control signal Spwm, an SR switch control signal VSR, a feedback pulse signal Sfb, a voltage Vopto, a ramp signal Sramp, a sample and hold signal Vfb_sh, a sample signal SH, and clearing according to the present invention. Signal CLR waveform diagram.

The drawings in the present invention are schematic, and are mainly intended to represent the coupling relationship between various circuits and the relationship between signal waveforms. As for the circuits, signal waveforms and frequencies, they are not drawn to scale.

Please refer to FIG. 2, which shows an embodiment of the flyback power supply circuit 200 of the present invention. As shown in FIG. 2, the AC voltage Vac is rectified by the rectifier circuit 101 to generate an input voltage Vin. The rectifier circuit 101 is, for example, a bridge rectifier circuit. In the flyback power supply circuit 200, the primary winding W1 of the transformer 202 receives the input voltage Vin. The power switch SW controls the on-time of the primary winding W1, and generates an output voltage Vout between the secondary winding W2 and a ground potential GND. The flyback power supply circuit 200 includes a transformer 202, a power switch SW, a signal coupling circuit 204, a power switch control circuit 205, an SR switch control circuit 207, and a synchronous rectification (SR) switch 208. The power switch SW is coupled to the primary winding W1 to control the on-time of the primary winding W1. The power switch control circuit 205 is located on the primary side of the transformer 202, and is used to generate a power switch control signal Spwm to control the power switch SW according to the coupled feedback signal Vfb, and to generate synchronization based on the coupled feedback signal Vfb. Rectifying pulse signal Sync; among them, the synchronous rectifying pulse signal Sync is related to the power switch control signal Spwm. For example, the synchronous rectifying pulse signal Sync has a rectifying pulse, and is used to control the power switch SW before the power switch control signal Spwm is turned on by The signal coupling circuit 204 converts and transmits related information to the secondary side of the transformer 202 without turning on the SR switch 208.

A synchronous rectification (SR) switch 208 is coupled to the secondary winding W2 to control the conduction time of the secondary winding W2 so as to correspond to the non-conduction when the primary winding W1 is conducting. The SR switch control circuit 207 is located on the secondary side of the transformer 202, and is coupled to the SR switch 208. In normal operation mode, it receives the coupled synchronous rectification signal Vsync to control the SR switch 208, and according to the output voltage Vout or the output current Iout To generate the feedback pulse signal Sfb. For example, the SR switch control circuit 207 controls the SR switch 208 according to the coupled synchronous rectification signal Vsync related to the synchronous rectification pulse signal Sync, and determines the time point when the secondary winding W2 is not conducted, and according to the flow through the secondary winding W2 The current Iw2, or the cross-voltage Vw2 of the secondary winding W2, or the current Isr flowing through the parasitic diode in the SR switch 208, or the cross-voltage Vsr of the SR switch 208 determine the timing of turning on the SR switch 208.

The signal coupling circuit 204 is coupled between the SR switch control circuit 207 and the power switch control circuit 205 to synchronize the synchronous rectification pulse signal Sync in a non-contact manner to inductively generate the coupled synchronous rectification signal Vsync and return the pulse signal Sfb In a non-contact manner, the coupling feedback signal Vfb is induced. The signal coupling circuit 204 has a primary side port P1 and a secondary side port P2. The primary side port P1 is located on the primary side of the transformer 202, and the secondary side port P2 is located on the secondary side of the transformer 202. The primary side port P1 receives the synchronous rectification pulse signal Sync and generates the coupling feedback signal Vfb in different periods that do not overlap each other, and the secondary side port P2 generates coupling in the corresponding different periods that do not overlap each other. The synchronous rectification signal Vsync and the feedback pulse signal Sfb are received. That is, the signal coupling circuit 204 has a primary-side port P1 electrically connected to the power switch control circuit 205 and a secondary-side port P2 electrically connected to the SR switch control circuit 207. More specifically, for example, in the first period, the primary side port P1 receives the synchronous rectification pulse signal Sync generated by the power switch control circuit 205, and the signal coupling circuit 204 is in a non-contact manner, After induction and conversion, the corresponding coupled synchronous rectification signal Vsync is generated on the secondary side port P2. In the second period that does not overlap with the first period, the secondary side port P2 receives the feedback pulse signal Sfb and the signal is coupled. The circuit 204 generates the corresponding coupled feedback signal Vfb after induction and conversion in a non-contact manner.

It should be noted that the primary side of the transformer 202 represents the same side as the primary winding W1 of the transformer 202, and the circuits on the primary side of the transformer 202 are commonly electrically connected to the reference potential REF; the secondary side of the transformer 202 represents the secondary side of the transformer 202 The winding W2 is on the same side, and the circuits on the secondary side of the transformer 202 are commonly electrically connected to the ground potential GND; and the transformer 202 and the signal coupling circuit 204 are coupled between the primary side and the secondary side.

In this embodiment, the signal coupling circuit 204 includes only a single pulse transformer as shown in the figure. In other embodiments, the signal coupling circuit 204 may also include using the same port, and at different times on the primary side of the transformer 202 and The secondary side only needs to have a function of bidirectionally coupling and transmitting signals. For example, the signal coupling circuit 204 includes a pulsed optical coupler. In a preferred embodiment, the input and output signals of the aforementioned pulse transformer and pulse optical coupler are both signals in the form of pulses. The feedback pulse signal Sfb and the coupled feedback signal Vfb, for example, but not limited to, have the same or different feedback pulses respectively, and the feedback pulses have one or a combination of the following: feedback pulse level, feedback pulse time length Or the number of feedback pulses to indicate the output voltage Vout; and the power switch current flowing through the power switch SW corresponds to the feedback pulse level, the length of the feedback pulse time, the number of feedback pulses, or a combination thereof. That is to say, the feedback pulse signal Sfb and the coupling feedback signal Vfb have a signal in the form of a pulse, but are not limited to the form of a single pulse signal, but can be illustrated by the level, time length, and number of pulses of the pulse signal. The level of the output voltage.

In this embodiment, the SR switch control circuit 207 is, for example, but is not limited to, a coupling synchronous rectification signal Vsync and a current Iw2 flowing through the secondary winding W2, or a voltage Vw2 across the secondary winding W2, or flowing through SR The current Isr of the parasitic diode in the switch 208 or the cross-voltage Vsr of the SR switch 208 generates the SR switch control signal VSR to control the SR switch 208. And for example, but not limited to, coupled synchronous rectified signals The rising edge (or falling edge of the synchronous rectification pulse in Vsync, as shown in Figure 13), does not turn on the SR switch 208, and according to the current Iw2 flowing through the secondary winding W2, or the The cross-voltage Vw2, or the current Isr flowing through the parasitic diode in the SR switch 208, or the cross-voltage Vsr of the SR switch 208, to confirm that the power switch SW is not turned on, and then the SR switch 208 is turned on. That is, before the SR switch control circuit 207 turns on the SR switch 208, it first confirms that the power switch SW is not turned on. The power switch control circuit 205 determines, for example, the power switch control signal Spwm according to the coupling feedback signal Vfb to determine whether to turn on or off the power switch SW, and then to turn on and off the primary winding W1. Compared with the prior art, in the present invention, the signal coupling circuit 204 has a primary side port P1 and a secondary side port P2. The primary side port P1 is located on the primary side of the transformer 202, and the secondary side port P2 is located on the secondary side of the transformer 202. On the other hand, the primary side port P1 receives the synchronous rectification pulse signal Sync and the coupling feedback signal Vfb in different periods that do not overlap each other, and the secondary side port P2 is in the corresponding different periods that do not overlap each other. A coupling synchronous rectification signal Vsync and a feedback pulse signal Sfb are generated. Instead of the prior art, different coupling circuits 103 and optical coupling circuits 104 (and different ports) are used to transmit the notification signal PLS on the primary side to the secondary side, and the information about the output voltage on the secondary side to The PWM controller 105 on the primary side. In other words, in the normal operation mode, the present invention can use the same port in the signal coupling circuit 204 to transmit the primary and secondary information. In this way, the space of the circuit can be effectively reduced, thereby reducing the manufacturing cost and the size of the circuit.

FIG. 3 shows waveforms of the synchronous rectification pulse signal Sync, the power switch control signal Spwm, the SR switch control signal VSR, and the feedback pulse signal Sfb according to the present invention. As shown in the figure, the power switch control circuit 205 generates a power switch control signal Spwm to control the power switch SW according to the coupling feedback signal Vfb related to the output voltage Vout or the output current Iout, and generates a synchronous rectification pulse signal Sync. Among them, the synchronous rectification pulse signal Sync has a synchronous rectification pulse; in a preferred embodiment, the synchronous rectification pulse is converted and transmitted to the SR switch circuit 207 via the signal coupling circuit 204 to control the SR switch 208 to be non-conductive; and the SR switch The control circuit 207 does not turn on the SR switch 208 according to the coupled synchronous rectification signal Vsync related to the synchronous rectification pulse. In a preferred embodiment, the power switch control circuit 205 generates a synchronous rectification pulse signal Sync synchronous rectification pulse, so as not to turn on the SR switch 208, then change the level of the power switch control signal Spwm to turn on the power switch SW to confirm that the power switch SW is turned on when the SR switch 208 is not turned on. After turning on. In a preferred embodiment, the synchronous rectification pulse signal Sync has a synchronous rectification pulse, and the feedback pulse signal Sfb has a feedback pulse; wherein the pulse time lengths of the synchronous rectification pulse and the feedback pulse are shorter than 1 micron. Micro-second.

In a normal operation mode, the SR switch control circuit 207 synchronously rectifies the signal Vsync according to the received coupling, and for example, but is not limited to, the current Iw2 flowing through the secondary winding W2, or the cross-voltage Vw2 of the secondary winding W2. , Or the current Isr flowing through the parasitic diode in the SR switch 208, or the cross-voltage Vsr of the SR switch 208 to generate the SR switch control signal VSR. In the normal operation mode, the SR switch control circuit 207 generates a feedback pulse signal Sfb according to the feedback signal FB related to the output voltage Vout or the output current Iout.

For example, during an operation period, the feedback pulse signal Sfb includes a feedback pulse, and the feedback pulse is generated after the synchronous rectification pulse of the synchronous rectification pulse signal Sync passes after a synchronization preset period Td. The so-called one operation period is, for example, but not limited to, a period during which the Spwm level of the power switch control signal rises from a low level to a high level twice. For example, referring to FIG. 3, taking the high level conducting and low level non-conducting as examples, according to the rising edge of the synchronous rectification pulse signal Sync, the SR switch 208 is not turned on, and according to the feedback related to the output voltage Vout or the output current Iout The signal FB is either based on the current Iw2 flowing through the secondary winding W2, or the cross-voltage Vw2 of the secondary winding W2, or the current Isr flowing through the parasitic diode in the SR switch 208, or the The SR switch control signal VSR is generated by crossing the voltage Vsr, and the SR switch 208 is turned on. Regarding the current situation of the secondary winding W2, for example, it can be judged based on the voltage across the SR switch 208 or the voltage of the SR switch 208 at the left node in the figure. For example, before the power switch control signal Spwm rises, change the SR switch control signal VSR from a high level to a low level without turning on the SR switch 208; and according to the current Iw2 flowing through the secondary winding W2, or the secondary The cross voltage Vw2 of the side winding W2, or the current Isr flowing through the parasitic diode in the SR switch 208, or the cross voltage Vsr of the SR switch 208, and the SR switch The control signal VSR is changed from a low level to a high level, and the SR switch 208 is turned on. With this mechanism, the SR switch 208 can be properly turned on and off, and the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb can be transmitted to the secondary side and On the primary side, controlling the on-time and off-time of the power switch SW and the SR switch 208 can effectively avoid the situation of short-circuit penetration.

4A-4D are schematic waveform diagrams of several embodiments of the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb according to the present invention. As shown in FIG. 4A, the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb have, for example, but not limited to, a single pulse (SR pulse and feedback pulse, respectively). As shown in FIG. 4B, the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb have, for example but not limited to, a single pulse (respectively, an SR pulse and a feedback pulse), and their levels can be adjusted; among them, the feedback pulse signal Sfb The level of the feedback pulse is, for example, used to indicate the level of the output voltage Vout. As shown in FIG. 4C, the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb have, for example, but not limited to, a single pulse (SR pulse and feedback pulse respectively), and the pulse time length can be adjusted; among which, the feedback pulse signal The feedback pulse duration of Sfb is, for example, used to indicate the level of the output voltage Vout. As shown in FIG. 4D, the synchronous rectification pulse signal Sync and the feedback pulse signal Sfb have, for example, but not limited to, a complex pulse (respectively, a complex SR pulse and a complex feedback pulse), and the number of pulses can be changed; among which, the feedback pulse The number of feedback pulses of the signal Sfb is, for example, used to indicate the level of the output voltage Vout.

FIG. 5 is a waveform diagram of a synchronous rectification pulse signal Sync, a power switch control signal Spwm, and a feedback pulse signal Sfb according to an embodiment of the present invention. As shown in the figure, during an operation period, the feedback pulse signal Sfb has a feedback pulse Pul1, and the feedback pulse Pul1 is generated after the synchronous rectification pulse SRPul of the synchronous rectification pulse signal Sync is generated after the synchronization preset period Td. When the synchronous rectification pulse signal SRPul of the synchronous rectification pulse signal Sync starts, the next synchronous rectification pulse SRPul is not generated during the synchronization threshold period Tt, the SR switch control circuit 207 generates a feedback pulse Pul2, and then cycles with a feedback cycle Tp The feedback pulse Pul3 and the feedback pulse Pul4 are generated repeatedly until the power switch control circuit 205 is synchronized. Rectifying pulse SRPul. In this way, when the output terminal is lightly loaded, the SR switch control circuit 207 can still continuously generate a feedback pulse to indicate the output voltage Vout.

FIG. 6 shows an embodiment of the SR switch control circuit 207 of the present invention. As shown in the figure, the SR switch control circuit 207 includes an output voltage sampling circuit 2071, a feedback pulse signal generation circuit 2073, an SR comparator 2075, an SR timing circuit 2077, and an SR switch control signal generation circuit 2079. The output voltage sampling circuit 2071 is used to sample and amplify the output voltage Vout to generate an output voltage sampling signal Vosp. The feedback pulse signal generating circuit 2073 is coupled between the output voltage sampling circuit 2071 and the secondary side port P2, and is used to sample the signal Vosp according to the output voltage to generate the feedback pulse signal Sfb. The SR comparator 2075 is coupled to the secondary side port P2 to generate a synchronous comparison signal Sx according to the coupled synchronous rectification signal Vsync and the synchronous reference signal Vth1. The SR timing circuit 2077 is coupled to the comparator 2075, and is configured to compare the synchronization signal Sx according to the synchronization, and generate a synchronization preset period timing signal after timing the synchronization preset period. The SR switch control signal generating circuit 2079 is coupled to the SR comparator 2075 and the SR switch 208, and is configured to generate an SR switch control signal VSR according to the synchronous comparison signal Sx to control the SR switch 208.

FIG. 7 shows a more specific embodiment of the SR switch control circuit 207 of the present invention. The SR switch control circuit 207 includes an output voltage sampling circuit 2071, a feedback pulse signal generation circuit 2073, an SR comparator 2075, an SR timing circuit 2077, and an SR switch control signal generation circuit 2079. The output voltage sampling circuit 2071 is used to sample and amplify the output voltage Vout to generate an output voltage sampling signal Vosp. As shown in the figure, in the output voltage sampling circuit 2071, the voltage dividing circuit 3071 receives the voltage Vo related to the output voltage Vout and generates a divided voltage related to the output voltage Vout, thereby generating an output voltage sampling signal Vosp. In this embodiment, the output voltage sampling circuit 2071 includes a comparator 3072 to compare the voltage Vopto related to the output voltage Vout with the ramp signal Sramp to generate an output voltage sampling signal Vosp. For example, when the ramp signal Sramp exceeds the voltage Vopto, a comparison signal with a high level is generated. The feedback pulse signal generating circuit 2073 is coupled between the output voltage sampling circuit 2071 and the secondary side port P2, and is used to sample the signal Vosp according to the output voltage to generate the feedback pulse signal Sfb. Feedback pulse signal generating circuit 2073 includes a pulse circuit 3073, which generates a pulse switching signal PS1 according to the comparison signal having a high level. The feedback pulse signal generating circuit 2073 includes a pulse switch 3074, which operates according to the pulse switch signal PS1 to generate a feedback pulse signal Sfb at the secondary side port P2.

Please continue to refer to FIG. 7. The SR comparator 2075 is coupled to the secondary side port P2 to generate a synchronous comparison signal Sx according to the coupled synchronous rectification signal Vsync and the synchronous reference signal Vth1. The SR timing circuit 2077 is coupled to the SR comparator 2075 to receive a synchronous comparison signal Sx, and after timing a preset synchronization period, generates a synchronous preset timing signal. The timing signal for the synchronization preset period is used, for example, to cause the feedback pulse of the feedback pulse signal Sfb to be generated after the synchronization rectification pulse of the synchronization rectification pulse signal Sync has passed the synchronization preset period Td. In this embodiment, the SR timing circuit 2077 includes, but is not limited to, a delay timer 3078 and a ramp signal generating circuit 3079. The delay effect of the timing signal during the synchronization preset period, that is, the synchronization preset period Td, is related to the output voltage Vout. The ramp signal generating circuit 3079 is used to generate the aforementioned ramp signal Sramp, and is input to the comparator 3072. The SR switch control signal generating circuit 2079 is coupled to the SR comparator 2075 and the SR switch 208, and is used to generate an SR switch control signal VSR according to the synchronous comparison signal Sx to control the SR switch 208.

FIG. 8 shows an embodiment of the power switch control circuit 205 of the present invention. As shown in the figure, the power switch control circuit 205 includes a power switch control signal generating circuit 2051, a feedback signal sampling and holding circuit 2053, a feedback timing circuit 2055, and an SR pulse signal generating circuit 2057. The power switch control signal generating circuit 2051 is coupled to the power switch SW and is used to generate the power switch control signal Spwm according to the sampled feedback signal COMP. The feedback signal sampling and holding circuit 2053 is coupled between the power switch control signal generating circuit 2051 and the primary side port P1, and is configured to generate a sampling feedback signal COMP according to the coupling feedback signal Vfb. The feedback timing circuit 2055 is coupled to the power switch control signal generating circuit 2051 and the feedback signal sampling and holding circuit 2053, and is configured to generate the sampling signal SH and the clear signal CLR according to the power switch control signal Spwm and the coupled feedback signal Vfb. The feedback signal sample-and-hold circuit 2053 converts the coupling feedback signal Vfb into a sample feedback signal COMP according to the sample signal SH and the clear signal CLR.

FIG. 9 shows an embodiment of the feedback signal sample-and-hold circuit 2053 according to the present invention. As shown in the figure, the feedback signal sampling and holding circuit 2053 includes a shielding circuit 20531 and a sampling feedback signal generating circuit 20533. The masking circuit 20531 and the power switch control signal generating circuit 2051 are coupled to the primary side port P1 to mask the signal BLKP according to one of the power switch control signals Spwm to prevent the feedback signal from being sampled and held during the masking period. 2053 receives the synchronous rectification pulse signal Sync from the primary side port P1. The sampling feedback signal generating circuit 20533 is coupled between the shielding circuit 20531 and the power switch control signal generating circuit 2051, and is used for generating the sampling feedback signal COMP according to the coupling feedback signal Vfb, the clear signal CLR, and the sampling signal SH.

FIG. 10 shows a more specific embodiment of the power switch control circuit 205 of the present invention. As shown in the figure, the power switch control circuit 205 includes a power switch control signal generating circuit 2051, a feedback signal sampling and holding circuit 2053, and a feedback timing circuit 2055. The power switch control signal generating circuit 2051 is coupled to the power switch SW, and is used to generate the power switch control signal Spwm according to the sampled feedback signal COMP. The pulse signal generation circuit 2057 is coupled to the power switch control signal generation circuit 2051, and generates a synchronous rectification pulse signal according to the power switch control signal Spwm (in this embodiment, the pulse signal generation circuit 2057 receives the power switch control signal Spwm). Sync. The feedback signal sampling and holding circuit 2053 is coupled between the power switch control signal generating circuit 2051 and the primary side port P1, and is configured to generate a sampling feedback signal COMP according to the coupling feedback signal Vfb. The feedback timing circuit 2055 is coupled to the power switch control signal generation circuit 2051 and the feedback signal sample-and-hold circuit 2053, and is configured to couple the feedback signal Vfb and the coupled feedback signal Vfb according to the power switch control signal Spwm (in this embodiment, for example, The feedback signal Vfb signal) is used to generate a sampling signal SH and a clear signal CLR. The feedback signal sample-and-hold circuit 2053 converts the coupling feedback signal Vfb into a sample feedback signal COMP according to the sample signal SH and the clear signal CLR. According to the masking signal BLKP, during the masking period, the feedback signal sampling and holding circuit 2053 is prevented from receiving the synchronous rectification pulse signal Sync from the primary side port P1.

FIG. 11 is a schematic diagram of signal waveforms of the shielding signal BLKP and the synchronous rectification pulse signal Sync in the embodiment of FIG. 10. As shown in the figure and referring to FIG. 10, the masking signal BLKP has a masking pulse time length Tb, and the synchronous rectification pulse signal Sync has a synchronous rectification pulse time length Ts; wherein the masking pulse time length Tb is greater than the synchronous rectification pulse time length Ts, and The masking pulse time length Tb covers the synchronous rectification pulse time length Ts; this makes the masking signal BLKP generate a masking pulse during the synchronous rectifying pulse in the synchronous rectifying pulse signal Sync, the switch SWb is turned on, and the feedback signal is sampled and held. The reverse input of the comparator (used as the shielding circuit 20531) in 2053 is electrically connected to the reference potential REF, so that the reverse input of the comparator (used as the shielding circuit 20531) does not receive the synchronous rectification pulse signal. Synchronous rectification pulse in Sync.

FIG. 12 shows a more specific embodiment of the power switch control circuit 205 of the present invention. As shown in the figure, the power switch control circuit 205 includes a power switch control signal generating circuit 2051, a feedback signal sampling and holding circuit 2053, and a feedback timing circuit 2055. The power switch control signal generating circuit 2051 is coupled to the power switch SW, and is used to generate the power switch control signal Spwm according to the sampled feedback signal COMP. The pulse circuit 3173 is coupled to the power switch control signal generating circuit 2051, and generates a pulse switch signal PS2 according to the power switch control signal Spwm. The pulse switch 3174 is coupled to the pulse circuit 3173, and operates according to the pulse switch signal PS2 to generate a synchronous rectified pulse signal Sync on the primary side port P1. The feedback signal sampling and holding circuit 2053 is coupled between the power switch control signal generating circuit 2051 and the primary side port P1, and is configured to generate a sampling feedback signal COMP according to the coupling feedback signal Vfb. The feedback timing circuit 2055 is coupled to the power switch control signal generation circuit 2051 and the feedback signal sample-and-hold circuit 2053, and is configured to receive a pulse related to the power switch control signal Spwm according to the power switch control signal Spwm. Switch signal PS2) and coupling feedback signal Vfb (in this embodiment, for example, receiving a feedback comparison signal Vfb_cmp related to the coupling feedback signal Vfb) to generate a sampling signal SH and a clear signal CLR, where the feedback signal is sampled and held The circuit 2053 converts the coupling feedback signal Vfb into a sampling feedback signal COMP according to the sampling signal SH and the clear signal CLR.

Please continue to refer to FIG. 12. The feedback signal sample-and-hold circuit 2053 includes, for example, a comparator 3051, a latch circuit 3052, and a sample-and-hold circuit 3053. The comparator 3051 compares the coupled feedback signal Vfb with the feedback reference signal Vth3 to generate a feedback comparison signal Vfb_cmp. The latch circuit 3052 generates a latch feedback signal Vfb_ltch according to the feedback comparison signal Vfb_cmp. As shown in the figure, the sample and hold circuit 3053 generates a sample feedback signal COMP according to the latch feedback signal Vfb_ltch, the sample signal SH, and the clear signal CLR. Among them, the switch SW1 is controlled by the latch feedback signal Vfb_ltch related to the coupling feedback signal Vfb generated by the latch circuit 3052, and the switches SW2 and SW3 are controlled by the sampling signal SH and the clear signal CLR, respectively. The capacitor C1 and the capacitor C2 are charged and discharged, and a sample-and-hold signal Vfb_sh is generated, and then a sample feedback signal COMP is generated. The feedback timing circuit 2055 is coupled to the power switch control signal generation circuit 2051 and the feedback signal sample-and-hold circuit 2053, and is configured to receive a signal related to the power switch control signal Spwm according to the power switch control signal Spwm (in this embodiment, for example, The pulse switching signal PS2) and the coupling feedback signal Vfb (in this embodiment, for example, a signal feedback comparison signal Vfb_cmp related to the coupling feedback signal Vfb is received) to generate a sampling signal SH and a clear signal CLR.

FIG. 13 shows a synchronous rectification pulse signal Sync, a power switch control signal Spwm, an SR switch control signal VSR, a feedback pulse signal Sfb, a voltage Vopto, a ramp signal Sramp, a sample and hold signal Vfb_sh, a sample signal SH, and clearing according to the present invention. Signal CLR waveform diagram. As shown in the figure, the power switch control circuit 205 generates a power switch control signal Spwm to control the power switch SW according to the coupling feedback signal Vfb related to the output voltage Vout or the output current Iout, and generates a synchronous rectification pulse signal Sync. Among them, the synchronous rectification pulse signal Sync has a synchronous rectification pulse; in a preferred embodiment, the synchronous rectification pulse is converted and transmitted to the SR switch circuit 207 via the signal coupling circuit 204 to control the SR switch 208 to be non-conductive; and the SR switch The control circuit 207 does not turn on the SR switch 208 according to the coupled synchronous rectification signal Vsync related to the synchronous rectification pulse. In a preferred embodiment, the power switch control circuit 205 generates a synchronous rectification pulse of the synchronous rectification pulse signal Sync to change the level of the power switch control signal Spwm after the SR switch 208 is not turned on to turn on the power switch SW. To confirm the power switch SW The turn-on is after the SR switch 208 is turned off. In a preferred embodiment, the synchronous rectification pulse signal Sync has a synchronous rectification pulse, and the feedback pulse signal Sfb has a feedback pulse; wherein the pulse time lengths of the synchronous rectification pulse and the feedback pulse are shorter than 1 micron. Micro-second.

It should be noted that, in this embodiment, during the operation period, the feedback pulse signal Sfb includes a feedback pulse, and the feedback pulse is generated after the synchronous rectification pulse of the synchronous rectification pulse signal Sync passes the preset synchronization period Td. . The voltage Vopto and the ramp signal Sramp and the pulse length of the clear signal CLR are used to determine the synchronization preset period Td, so that the synchronization preset period Td is related to the output voltage Vout.

The present invention has been described above with reference to the preferred embodiments, but the above is only for making those skilled in the art easily understand the content of the present invention, and is not intended to limit the scope of rights of the present invention. In the same spirit of the invention, those skilled in the art can think of various equivalent changes. For example, in the embodiments, two circuits or components that are directly connected can be inserted with other circuits or components that do not affect the main function. Therefore, "coupling" should be considered to include direct and indirect connections. For another example, the resistor or voltage dividing circuit is not limited to a resistive element, and may be replaced by other circuits, such as a transistor circuit. For another example, the positive and negative terminals of the error amplifier circuit and the comparator circuit can be interchanged, and only need to correspondingly modify the meaning of the relevant circuit or the signal level. Another example is the signal outside the control circuit (such as but not limited to the feedback signal). ), When it is taken into the control circuit for processing or calculation, it may undergo voltage-current conversion, current-voltage conversion, ratio conversion, etc. Therefore, the “processing or calculation according to a signal” in the present invention is not limited to the processing based on the signal. In itself, it also includes, when necessary, performing the above-mentioned conversion on the signal, and then processing or calculating according to the converted signal. As another example, the changes in all the embodiments can be adopted interactively, such as the pulse switch 3074 in the embodiment of FIG. 7, which can also be applied to the embodiment of FIG. 10, and so on. All these can be deduced by analogy according to the teachings of the present invention. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

Claims (43)

A flyback power supply circuit includes: a transformer having a primary winding to receive an input voltage; a secondary winding to generate an output voltage and an output current; a power switch coupled to the primary side A winding for controlling the on-time of the primary winding; a power switch control circuit, located on the primary side of the transformer, for generating a power switch control signal to control the power switch according to a coupling feedback signal, and generating a Synchronous rectification pulse signal; a synchronous rectification (SR) switch is coupled to the secondary winding to control the conduction time of the secondary winding to correspond to the conduction when the primary winding is not conducting; The SR switch control circuit is located on the secondary side of the transformer and is coupled to the SR switch. In a normal operation mode, it receives a coupled synchronous rectification signal to control the SR switch, and according to the output voltage or the output Current to generate a feedback pulse signal; and a signal coupling circuit coupled to the SR switch control circuit and the power switch control circuit In between, the synchronous rectification pulse signal is induced in a non-contact manner to generate the coupled synchronous rectification signal, and the feedback pulse signal is induced in a non-contact manner to generate the coupled feedback signal; wherein the signal is coupled The circuit has a primary side port and a secondary side port. The primary side port is located on the primary side of the transformer and the secondary side port is located on the secondary side of the transformer. The primary side ports are different from each other without overlapping. During the period, respectively receiving the synchronous rectification pulse signal and generating the coupling feedback signal, and the secondary side port respectively generating the coupling synchronous rectification signal and receiving the feedback pulse during periods corresponding to different periods that do not overlap each other. Signal. The flyback power supply circuit according to item 1 of the patent application scope, wherein the signal coupling circuit includes a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler are both pulsed. Form of signal. According to the flyback power supply circuit described in item 1 of the scope of patent application, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch control circuit is based on The coupled synchronous rectification signal of the synchronous rectification pulse does not turn on the SR switch, so that before the power switch is turned on, the SR switch is not turned on. The flyback power supply circuit according to item 1 of the scope of patent application, wherein during an operation period, the SR switch control circuit performs a secondary operation on one of the secondary side windings before the SR switch is turned on. The side winding current, the SR switching current flowing through one of the SR switches, or the voltage across the secondary side winding or the SR switch to confirm that the power switch is not conducting. The flyback power supply circuit according to item 1 of the scope of patent application, wherein the feedback pulse signal includes at least one feedback pulse, which has one or a combination of the following: a feedback pulse level, a feedback pulse The length of time, or the number of feedback pulses, is used to indicate the output voltage; and a power switch current flowing through one of the power switches corresponds to the feedback pulse level, the duration of the feedback pulse, and the feedback pulse. Number, or a combination thereof. The flyback power supply circuit according to item 1 of the scope of patent application, wherein the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the synchronous rectification pulse and the feedback pulse The pulse duration is shorter than 1 microsecond. According to the flyback power supply circuit described in item 1 of the scope of patent application, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse is a synchronous rectification pulse which is one of the synchronous rectification pulse signals. Generated after generating a synchronization preset period. According to the flyback power supply circuit described in item 7 of the scope of patent application, when the synchronous rectification pulse signal of the synchronous rectification pulse signal is generated and the next synchronous rectification pulse is not generated within a synchronization threshold, the SR switch controls The circuit generates the feedback pulse, and then periodically generates the feedback pulse in a feedback cycle until the power switch control circuit generates the synchronous rectification pulse. The flyback power supply circuit according to item 7 of the scope of the patent application, wherein the synchronization preset period is related to the output voltage. According to the flyback power supply circuit described in item 1 of the scope of patent application, during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse, and the synchronous rectification pulse is generated from one of the feedback pulse signals. Generated after a pulse has passed a preset period of time after the pulse is generated. According to the flyback power supply circuit described in the scope of patent application No. 10, when the feedback pulse of the feedback pulse signal is generated and the next feedback pulse is not generated within a feedback threshold, the power switch The control circuit generates the synchronous rectification pulse, and then periodically generates the synchronous rectification pulse with a synchronization period until the SR switch control circuit generates the feedback pulse. The flyback power supply circuit according to item 10 of the patent application scope, wherein the feedback preset period is related to the output voltage. The flyback power supply circuit according to item 1 of the patent application scope, wherein the SR switch control circuit includes: an output voltage sampling circuit for sampling and amplifying the output voltage to generate an output voltage sampling signal; a feedback A pulse signal generating circuit is coupled between the output voltage sampling circuit and the secondary side port, and is used to generate the feedback pulse signal according to the output voltage sampling signal; an SR comparator is coupled to the secondary side port Connected to generate a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal; an SR timing circuit coupled to the SR comparator for timing a synchronous preset period based on the synchronous comparison signal Then, a synchronous preset timing signal is generated; and an SR switch control signal generating circuit is coupled with the SR comparator and the SR switch to generate an SR switch control signal according to the synchronous comparison signal to control the SR switch control signal. SR switch. The flyback power supply circuit according to item 1 of the scope of the patent application, wherein the power switch control circuit includes: a power switch control signal generating circuit coupled to the power switch and configured to provide a feedback signal according to a sample to Generating the power switch control signal; a feedback signal sampling and holding circuit, coupled between the power switch control signal generating circuit and the primary side port, for generating the sampling feedback signal according to the coupling feedback signal; and A feedback timing circuit is coupled to the power switch control signal generating circuit and the feedback signal sampling and holding circuit for generating a sampling signal and a clearing signal according to the power switch control signal and the coupling feedback signal. The feedback signal sampling and holding circuit converts the coupling feedback signal into the sampling feedback signal according to the sampling signal and the clear signal. The flyback power supply circuit according to item 14 of the scope of patent application, wherein the feedback signal sampling and holding circuit includes: a shielding circuit, which is coupled with the power switch control signal generating circuit and the primary side port, and is used for A masking signal related to one of the power switch control signals to prevent the feedback signal sampling and holding circuit from receiving the synchronous rectification pulse signal from the primary side port during a masking period; and a sampling feedback signal generating circuit, coupled Between the shielding circuit and the power switch control signal generating circuit, the sampling feedback signal is generated according to the coupling feedback signal, the clear signal, and the sampling signal. An SR switch control circuit for a flyback power supply circuit. The flyback power supply circuit includes a transformer with a primary winding to receive an input voltage; and a secondary winding to generate an output voltage and an output current. A power switch coupled to the primary winding to control the on-time of the primary winding; a power switch control circuit located on the primary side of the transformer to generate a power switch based on a coupled feedback signal A control signal controls the power switch and generates a synchronous rectification pulse signal; a synchronous rectification (SR) switch is coupled to the secondary winding to control the on-time of the secondary winding to correspond to It is turned on when the primary winding is not conducting; the SR switch control circuit is located on the secondary side of the transformer and is coupled to the SR switch for receiving a coupled synchronous rectification signal in a normal operation mode to control the An SR switch, and generates a feedback pulse signal according to the output voltage or the output current; and a signal coupling circuit coupled to The SR switch control circuit and the power switch control circuit are used to inductively generate the coupled synchronous rectified signal in a non-contact manner, and the feedback pulse signal is induced in a non-contact manner. The coupling feedback signal; wherein the signal coupling circuit has a primary side port and a secondary side port, the primary side port is located on the primary side of the transformer, and the secondary side port is located on the secondary side of the transformer, where The primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal in different periods that do not overlap with each other, and the secondary side port generates the signal in different periods corresponding to the different periods that do not overlap with each other. Coupling the synchronous rectification signal and receiving the feedback pulse signal; the SR switch control circuit includes: an output voltage sampling circuit for sampling and amplifying the output voltage to generate an output voltage sampling signal; a feedback pulse signal generating circuit, coupled Connected between the output voltage sampling circuit and the secondary side port to sample a signal according to the output voltage to generate the feedback pulse signal; An SR comparator is coupled to the secondary side port to generate a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal; an SR timing circuit is coupled to the SR comparator to be used according to the A synchronous comparison signal, and after timing a synchronous preset period, generating a synchronous preset period timing signal; and an SR switch control signal generating circuit coupled with the SR comparator and the SR switch for using the synchronous comparison signal To generate an SR switch control signal to control the SR switch. The SR switch control circuit of the flyback power supply circuit according to item 16 of the patent application scope, wherein the signal coupling circuit includes a pulse transformer or a pulse optical coupler, and the input and output of the pulse transformer and the pulse optical coupler The signals are all signals in the form of pulses. According to the SR switch control circuit of the flyback power supply circuit described in item 16 of the patent application scope, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse; and the SR switch The control circuit does not turn on the SR switch according to the coupled synchronous rectification signal related to the synchronous rectification pulse, so that before the power switch is turned on, the SR switch is not turned on. According to the SR switch control circuit of the flyback power supply circuit described in item 16 of the patent application scope, during an operation period, before the SR switch control circuit turns on the SR switch, A secondary winding current of one of the windings, an SR switching current flowing through one of the SR switches, or a voltage across the secondary winding or the SR switch to confirm that the power switch is not conducting. The SR switch control circuit of the flyback power supply circuit according to item 16 of the application, wherein the feedback pulse signal includes at least one feedback pulse, which has one or a combination of the following: a feedback pulse level , A feedback pulse time length, or a feedback pulse number to indicate the output voltage; and a power switch current flowing through one of the power switches corresponds to the feedback pulse level and the feedback pulse time length , The number of feedback pulses, or a combination thereof According to the SR switch control circuit of the flyback power supply circuit according to item 16 of the patent application scope, wherein the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the synchronous rectification The pulse duration of the pulse and the feedback pulse are shorter than 1 micro-second. According to the SR switch control circuit of the flyback power supply circuit described in item 16 of the patent application scope, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse is in the synchronous rectification pulse signal. One of the synchronous rectification pulses is generated after a synchronous preset period has passed. According to the SR switch control circuit of the flyback power supply circuit described in item 22 of the scope of patent application, when the synchronous rectification pulse of the synchronous rectification pulse signal is generated, the next synchronous rectification pulse is not generated during a synchronization threshold. The SR switch control circuit generates the feedback pulse, and then periodically generates the feedback pulse in a feedback cycle until the power switch control circuit generates the synchronous rectification pulse. The SR switch control circuit of the flyback power supply circuit according to item 22 of the scope of the patent application, wherein the synchronization preset period is related to the output voltage. According to the SR switch control circuit of the flyback power supply circuit described in item 16 of the patent application scope, during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse, and the synchronous rectification pulse is generated from the feedback pulse. One of the signals is generated after a feedback period has elapsed. For example, the SR switch control circuit of the flyback power supply circuit described in item 25 of the patent application scope, when the feedback pulse of the feedback pulse signal is generated, the next feedback is not generated within a feedback threshold. Pulse, the power switch control circuit generates the synchronous rectification pulse, and then periodically generates the synchronous rectification pulse with a synchronization period until the SR switch control circuit generates the feedback pulse. The SR switch control circuit of the flyback power supply circuit according to item 25 of the patent application scope, wherein the feedback preset period is related to the output voltage. The SR switch control circuit of the flyback power supply circuit according to item 16 of the scope of the patent application, wherein the power switch control circuit includes: a power switch control signal generating circuit coupled to the power switch for sampling according to a sampling A feedback signal to generate the power switch control signal; a feedback signal sample-and-hold circuit coupled between the power switch control signal generation circuit and the primary side port to generate the sample based on the coupled feedback signal Feedback signal; and a feedback timing circuit coupled to the power switch control signal generation circuit and the feedback signal sample-and-hold circuit for generating a sampling signal according to the power switch control signal and the coupling feedback signal And a clear signal, wherein the feedback signal sample-and-hold circuit converts the coupling feedback signal into the sample feedback signal according to the sampling signal and the clear signal. According to the SR switch control circuit of the flyback power supply circuit described in item 28 of the scope of patent application, the feedback signal sampling and holding circuit includes a shielding circuit, which is coupled with the power switch control signal generating circuit and the primary side port. Connected to shield the signal according to one of the control signals related to the power switch to prevent the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary side port during a masking period; and a sample feedback signal A generating circuit is coupled between the shielding circuit and the power switch control signal generating circuit, and is configured to generate the sampling feedback signal according to the coupling feedback signal, the clear signal, and the sampling signal. A power switch control circuit for a flyback power supply circuit. The flyback power supply circuit includes a transformer with a primary winding to receive an input voltage; and a secondary winding to generate an output voltage and an output current. A power switch coupled to the primary winding to control the on-time of the primary winding; the power switch control circuit is located on the primary side of the transformer to generate a power switch based on a coupling feedback signal A control signal controls the power switch and generates a synchronous rectification pulse signal; a synchronous rectification (SR) switch is coupled to the secondary winding to control the on-time of the secondary winding to correspond to It is turned on when the primary winding is non-conducting; an SR switch control circuit is located on the secondary side of the transformer and is coupled to the SR switch for receiving a coupled synchronous rectification signal in a normal operation mode to control the SR switch, and generates a feedback pulse signal according to the output voltage or the output current; and a signal coupling circuit for coupling The SR switch control circuit and the power switch control circuit are used to inductively generate the coupled synchronous rectified signal in a non-contact manner, and the feedback pulse signal is induced in a non-contact manner. Generating the coupling feedback signal; wherein the signal coupling circuit has a primary side port and a secondary side port, the primary side port is located on the primary side of the transformer, and the secondary side port is located on the secondary side of the transformer, The primary side port receives the synchronous rectification pulse signal and generates the coupling feedback signal in different periods that do not overlap with each other, and the secondary side port generates signals in different periods that correspond to each other without overlapping. The coupling synchronous rectification signal and receiving the feedback pulse signal; the power switch control circuit includes: a power switch control signal generating circuit coupled to the power switch for generating the power switch control according to a sample feedback signal Signal; a feedback signal sample-and-hold circuit coupled between the power switch control signal generating circuit and the primary side port for Coupling the feedback signal to generate the sample feedback signal; and a feedback timing circuit coupled to the power switch control signal generation circuit and the feedback signal sample-and-hold circuit for coupling the control signal with the power switch according to the power switch The feedback signal to generate a sampling signal and a clear signal, wherein the feedback signal sample-and-hold circuit converts the coupling feedback signal into the sample feedback signal according to the sampling signal and the clear signal. According to the power switch control circuit of the flyback power supply circuit described in item 30 of the patent application scope, the feedback signal sampling and holding circuit includes: a shielding circuit, which is coupled to the power switch control signal generating circuit and the primary side port For blocking the signal according to one of the control signals related to the power switch to prevent the feedback signal sample-and-hold circuit from receiving the synchronous rectification pulse signal from the primary side port during a masking period; and the generation of a sample feedback signal A circuit is coupled between the shielding circuit and the power switch control signal generating circuit, and is configured to generate the sampling feedback signal according to the coupling feedback signal, the clear signal, and the sampling signal. According to the power switch control circuit of the flyback power supply circuit described in the scope of the patent application, the signal coupling circuit includes a pulse transformer or a pulse optical coupler, and the input and output signals of the pulse transformer and the pulse optical coupler Both are signals in the form of pulses. According to the power switch control circuit of the flyback power supply circuit described in item 30 of the patent application scope, during an operation period, before the power switch is turned on, the synchronous rectification pulse signal has a synchronous rectification pulse, and the SR switch control circuit According to the coupled synchronous rectification signal related to the synchronous rectification pulse, the SR switch is not turned on, so that the SR switch is not turned on before the power switch is turned on. According to the power switch control circuit of the flyback power supply circuit described in item 30 of the patent application scope, during an operation period, before the SR switch control circuit is turned on, the SR switch flows through the secondary winding according to the relevant One of the secondary-side winding currents, one of the SR-switching currents flowing through the SR-switch, or the voltage across the secondary-side winding or the SR-switch to confirm that the power switch is not conducting. According to the power switch control circuit of the flyback power supply circuit described in item 30 of the patent application scope, the feedback pulse signal includes at least one feedback pulse, which has one or a combination of the following: a feedback pulse level, A feedback pulse time length, or a feedback pulse number, is used to indicate the output voltage; and a power switch current flowing through one of the power switches corresponds to the feedback pulse level, the feedback pulse time length, The number of feedback pulses, or a combination thereof. According to the power switch control circuit of the flyback power supply circuit according to item 30 of the application, the synchronous rectification pulse signal has a synchronous rectification pulse, and the feedback pulse signal has a feedback pulse; wherein the synchronous rectification pulse The pulse duration of the feedback pulse is shorter than 1 microsecond. According to the power switch control circuit of the flyback power supply circuit described in item 30 of the patent application scope, during an operation period, the feedback pulse signal has a feedback pulse, and the feedback pulse is in the synchronous rectification pulse signal. A synchronous rectification pulse is generated after a synchronous preset period has passed. According to the power switch control circuit of the flyback power supply circuit described in item 37 of the scope of patent application, when the synchronous rectification pulse of the synchronous rectification pulse signal is generated, the next synchronous rectification pulse is not generated during a synchronization threshold, The SR switch control circuit generates the feedback pulse, and then periodically generates the feedback pulse in a feedback cycle until the power switch control circuit generates the synchronous rectification pulse. According to the power switch control circuit of the flyback power supply circuit described in item 37 of the scope of the patent application, the preset synchronization period is related to the output voltage. According to the power switch control circuit of the flyback power supply circuit described in item 30 of the patent application scope, during an operation period, the synchronous rectification pulse signal has a synchronous rectification pulse, and the synchronous rectification pulse is generated from the feedback pulse signal. One feedback pulse is generated after a feedback period has elapsed. For example, the power switch control circuit of the flyback power supply circuit described in the scope of patent application No. 40, when the feedback pulse of the feedback pulse signal is generated, the next feedback pulse is not generated within a feedback threshold period. The power switch control circuit generates the synchronous rectification pulse, and then periodically generates the synchronous rectification pulse with a synchronization period until the SR switch control circuit generates the feedback pulse. The power switch control circuit of the flyback power supply circuit according to item 40 of the scope of the patent application, wherein the feedback preset period is related to the output voltage. According to the power switch control circuit of the flyback power supply circuit described in item 30 of the scope of patent application, the SR switch control circuit includes: an output voltage sampling circuit for sampling and amplifying the output voltage to generate an output voltage sampling signal ; A feedback pulse signal generating circuit, coupled between the output voltage sampling circuit and the secondary side port, for sampling the signal according to the output voltage to generate the feedback pulse signal; an SR comparator, and the two The secondary port is coupled to generate a synchronous comparison signal according to the coupled synchronous rectification signal and a synchronous reference signal; an SR timing circuit is coupled to the SR comparator to time one based on the synchronous comparison signal After the synchronization preset period, a synchronization preset period timing signal is generated; and an SR switch control signal generation circuit is coupled with the SR comparator and the SR switch to generate an SR switch control signal according to the synchronization comparison signal. To control the SR switch.