CN108075636B - Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit - Google Patents

Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit Download PDF

Info

Publication number
CN108075636B
CN108075636B CN201810021041.7A CN201810021041A CN108075636B CN 108075636 B CN108075636 B CN 108075636B CN 201810021041 A CN201810021041 A CN 201810021041A CN 108075636 B CN108075636 B CN 108075636B
Authority
CN
China
Prior art keywords
phase
voltage
bridge arm
driving signal
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810021041.7A
Other languages
Chinese (zh)
Other versions
CN108075636A (en
Inventor
杨鑫
李斌
李培永
乔宗标
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Yinglian Electronic System Co ltd
Original Assignee
Shanghai Yinglian Electronic System Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Yinglian Electronic System Co ltd filed Critical Shanghai Yinglian Electronic System Co ltd
Priority to CN201810021041.7A priority Critical patent/CN108075636B/en
Publication of CN108075636A publication Critical patent/CN108075636A/en
Application granted granted Critical
Publication of CN108075636B publication Critical patent/CN108075636B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4233—Arrangements for improving power factor of AC input using a bridge converter comprising active switches
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/083—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the ignition at the zero crossing of the voltage or the current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4291—Arrangements for improving power factor of AC input by using a Buck converter to switch the input current
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

The invention relates to the technical field of switching power supplies, in particular to a novel flexible commutation control algorithm applied to a BUCK type three-phase PFC circuit; the invention provides a novel control algorithm applied to a BUCK type three-phase PFC circuit, which adopts unique flexible commutation control logic aiming at commutation of a BUCK type three-phase PFC converter and well solves the problems of zero crossing, commutation point current distortion and large digital core resource occupation of commutation calculation.

Description

Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit
Technical Field
The invention relates to the technical field of switching power supplies, in particular to a flexible commutation control algorithm applied to a BUCK type three-phase PFC circuit.
Background
The three-phase power factor correction circuit is widely applied to medium and high power application occasions as a front-end power supply connected with a power grid; there are two main solutions for commonly used three-phase power factor correction circuits: a BOOST type three-phase PFC circuit, that is, a BOOST type three-phase PFC circuit, and a BUCK type three-phase PFC circuit, that is, a BUCK type three-phase PFC circuit. Compared with a BOOST type circuit, the BCUK type scheme has the advantages of wide output voltage range, no starting impact current and output current limiting capability and obvious advantages in specific application occasions; for example, in recent years, high-voltage direct current bus architectures widely discussed and popularized in the field of data centers domestically and abroad, namely, the domestic Scorpio program and the Open Computing Platform (OCP) in the united states, both require a high-voltage direct current bus, such as a 240VDC or 380VDC intermediate bus; aiming at a three-phase 220Vac alternating current input power grid system in China, if a BOOST type three-phase PFC circuit scheme is adopted, the typical output voltage of the circuit is 650VDC, a first-stage voltage reduction circuit is required to meet the requirement of bus voltage, the efficiency of the whole machine is greatly lost, and the cost is inevitably increased by two-stage design. And by adopting the BUCK type three-phase PFC circuit, the direct output of 240VDC or 380VDC through one-stage conversion can be realized, the efficiency is greatly improved, and the cost is greatly saved.
The BUCK type three-phase PFC circuit, such as the most typical three-phase six-switch BUCK type PFC circuit, has the advantages of simple topology, low stress of a switch device and small size of a magnetic device; however, since the input of the circuit is three-phase alternating voltage, the input voltage phase of each phase needs to be considered during control, and different control strategies are adopted for different phases of the switching tubes; if an analog controller is adopted, the control logic is abnormally complex, and no mature analog controller solution exists at present; therefore, the circuit is not widely popularized in practical application. In recent years, with the improvement of the operational capability of digital chips such as ARM, DSP and the like and the application and accumulation of the digital chips in the field of power supplies, the digital power supply technology taking the digital chips as control kernels is gradually mature; on the basis, products of the BUCK type three-phase PFC circuit controlled by the digital kernel gradually appear; most of products in the market at present adopt a three-phase six-switch BUCK type PFC circuit of a current integral control method or a PWM control method; the three-phase six-switch BUCK type PFC circuit applying the two control methods can well control total input current harmonic waves (THD), and particularly the three-phase six-switch BUCK type PFC circuit adopting the current integration control method has the advantages that the control method is very effective in input current harmonic wave suppression because the three-phase six-switch BUCK type PFC circuit carries out integration operation on input current and tracks input voltage waveform by using the integration operation result. However, current distortion of a zero crossing point and a commutation point exists in both the current integral control method and the PWM control method; meanwhile, the algorithm can be realized only by occupying a large amount of digital kernel resources during commutation control, the realization of a plurality of technical indexes of the main power circuit is influenced under the condition of the internal resources of a set digital control chip, the performance of the scheme is objectively influenced, and the wider popularization and application of the scheme are limited.
The invention provides a control algorithm applied to a BUCK type three-phase PFC circuit, which adopts a unique control logic for commutation of a BUCK type three-phase PFC converter and well solves the problems of zero crossing, commutation point current distortion and large digital kernel resource occupation of commutation calculation.
Disclosure of Invention
The flexible commutation control algorithm applied to the BUCK type three-phase PFC circuit optimizes the zero-crossing and commutation process calculation of the BUCK type three-phase PFC converter, can be applied to various circuit topologies of the BUCK type three-phase PFC circuit, and can be combined with various control methods such as a current integral control method and a PWM control method. For the convenience of describing the present invention, a three-phase six-switch BUCK-type PFC circuit using a current integration control method will be described.
First, a current integration control method will be briefly described. FIG. 2 is a schematic diagram of the current integration control method applied to the BUCK circuit. The circuit consists of a controlled current source (i.e. a BUCK upper tube current sampling circuit), an integrator, a PWM clock pulse, a voltage feedback compensation circuit, a comparator and an RS trigger.
The rising edge of the PWM clock pulse triggers the BUCK to be conducted, and the current iSFlowing through BUCK to control current source K iSCharging the integrator when the integrator voltage rises to the current reference voltage IrefWhen the circuit is started, the comparator is turned over, and the BUCK upper tube is turned off; at the same time, the integrator is reset, waiting for the arrival of the next clock pulse. Wherein the current reference voltage IrefGenerated by a voltage feedback compensation circuit. Assuming the BUCK circuit operates stably, each switching period is TSAnd duty ratio D, knowing:
Figure GDA0002802442080000031
namely:
Figure GDA0002802442080000032
wherein Is the average current of the BUCK upper tube,
Figure GDA0002802442080000033
in the fixed frequency converter, the current sampling coefficient K, the switching period Ks, and the integrating capacitor Creset are all constants, so it can be seen from the above derivation that, in the current integration control mode, the average current on the BUCK is proportional to the current reference voltage.
IS∝Iref
Based on the relation between the average current value on the BUCK and the current reference, the correct current integration control mode is adopted to control the three-phase 6-switch BUCK type PFC circuit so as to enable the current reference voltage I to berefThe direct current voltage-controlled three-phase power factor correction circuit is in real-time direct proportion to input voltage, can realize voltage following of three-phase input current, and can realize power factor correction, improve current harmonic and reduce THD.
The specific working principle is shown in fig. 3, 4, 5 and 6. In fig. 3, the absolute value of the three-phase voltage is divided into three areas, namely, a high area, a middle area and a low area, so that each phase voltage can be divided into 12 phase areas according to 30 degrees, and the following strategy control is adopted for different areas:
when the phase voltage is in a high region and the voltage is positive, the tube is long-passed; when the voltage is negative, the lower tube is long-passed;
when the phase voltage is in the middle area and the voltage is positive, the upper tube chops; when the voltage is negative, the lower tube chopping wave;
when the phase voltage is in a low region and the voltage is positive, the upper tube performs chopping; when the voltage is negative, the lower tube chopping wave;
according to the control scheme, the shaping of the three-phase input current can be realized only by controlling the middle-area and low-area phase switches. Using a phase selection circuit to select a high region phase uMaxPhase u with middle zoneMid. Using middle zone phase uMidGenerating a middle region phase current reference voltage using a high region phase uMaxA low-range phase current reference voltage is generated.
Because the line voltage formed by the low region phase and the high region phase is smaller than the line voltage formed by the middle region phase and the high region phase, when the switches of the low region phase and the middle region phase are simultaneously conducted, the current flows through the switch tube of the middle region; for three-phase alternating current, the following formula is satisfied:
uMax+uMid+uMin＝0
|uMax|＝|uMid+uMin|
therefore, if the high-region phase u is usedMaxPhase u with middle zoneMidAnd the voltage is taken as a current reference according to a sampling proportion K, and then:
|uMin|＝|uMax|-|uMid|
by aligning the phase u in the high regionMaxPhase u with middle zoneMidAnd the power factor correction of the three-phase alternating current input current is realized by corresponding control of the switching tube. The control logic is shown in fig. 4.
In practical application, when the current integral control method is adopted for digital control to control the three-phase 6-switch BUCK type PFC circuit, due to the fact that a digital control chip and an analog-to-digital conversion device generally adopt single power supply for power supply, quantization errors of the analog-to-digital conversion and the like, large errors exist in zero-crossing detection of alternating-current input voltage, and zero-crossing time of the alternating-current input voltage cannot be accurately judged; therefore, the phase change time of the upper tube and the lower tube is staggered with the zero crossing time of the actual voltage, the current waveform is distorted near the zero crossing point, and the THD index is influenced.
When the current integral control method is adopted to control the three-phase 6-switch BUCK type PFC circuit, each switch control signal is controlled by a high-region phase uMaxPhase u with middle zoneMidDetermining; input voltage every 30 degree phase, high region phase uMaxPhase u with middle zoneMidSwitching will occur, so commutation processing is required; known from the working principle of the traditional current integral control method, when the input voltage enters a 60-degree region and a 210-degree region from a 30-degree region and enters a 240-degree region, or enters a 150-degree region and a 300-degree region from a 120-degree region and enters a 330-degree region, the middle-region drive and the low-region drive are transposed front and back, and the realization of an actual control algorithm is very difficult, and a large amount of resources in a digital chip are occupied; meanwhile, the front and back transposition of the middle area drive and the low area drive can cause impact on a main power circuit, and current distortion is easy to generate, so that the THD value is increased.
On the basis of the traditional current integral control method, the invention introduces the following control logic by adding a control mode of leading and lagging regulating pulses:
1. changing 30-degree commutation logic, dividing the input voltage into three regions of leading edge low region, high region and trailing edge low region, taking the phase voltage a in fig. 7 as an example, wherein:
a) the leading edge low region is the zero crossing point to 60 degrees and the zero crossing point to 240 degrees
b)60 to 120DEG and 240 to 300DEG are high regions
c) The back edge low region is 120 degrees to zero crossing point and 300 degrees to zero crossing point
2. Before the zero crossing point of the input voltage, an advanced driving signal is added to inject advanced adjusting pulses into the corresponding switching device of the bridge arm of the phase, so that the corresponding switching device is ensured to be turned on in time during phase change
3. The front edge low area and the high area are master control areas, and the back edge low area is a slave control area; when the phase voltage is in a front edge low region and a front edge high region, comparing the phase current integral curve with the phase voltage to generate a driving signal of a corresponding switch device of the phase bridge arm; when the phase voltage is in the low region of the back edge, the difference between the high region drive and the low region drive of the front edge in other two phases of voltages is used for generating the drive signal of the corresponding switch device of the bridge arm of the phase.
4. After the input voltage crosses zero, a lag drive signal is added to inject lag regulation pulse into the corresponding switching device of the bridge arm of the phase so as to ensure that the corresponding switching device is turned on in time during phase change
After the control logic is introduced, the problems of zero crossing, commutation point current distortion and large amount of digital kernel resources occupied by commutation calculation are perfectly solved.
Drawings
FIG. 1 is a circuit diagram and control logic for one embodiment of the present invention;
FIG. 2 is a circuit diagram of a BUCK circuit using current integration and a typical waveform;
FIG. 3 illustrates a conventional BUCK-type three-phase PFC circuit with a current integral control method;
FIG. 4 is a control logic diagram of a current integral control method of a conventional BUCK type three-phase PFC circuit;
FIG. 5 is a logic diagram of a current integral controller of a BUCK type three-phase PFC circuit;
FIG. 6 is a typical waveform of a current integral control method of a conventional BUCK type three-phase PFC circuit;
FIG. 7 illustrates a control scheme for a BUCK-type three-phase PFC circuit according to the present invention;
fig. 8 is a typical waveform of the present invention applied to a BUCK type three-phase PFC circuit;
FIG. 9 shows a BUCK-type three-phase PFC circuit composed of three switches according to the present invention
FIG. 10 shows a BUCK-type three-phase PFC circuit composed of three bidirectional switches according to the present invention
Detailed Description
The invention provides a flexible commutation control algorithm applied to a BUCK type three-phase PFC circuit, which adopts the following control logic and well solves the problems of zero crossing, commutation point current distortion and large digital kernel resource occupation of commutation calculation.
1. Changing 30-degree commutation logic, and dividing the input voltage into a front edge low area, a high area and a back edge low area, wherein:
a) the leading edge low region is the zero crossing point to 60 degrees and the zero crossing point to 240 degrees
b)60 to 120DEG and 240 to 300DEG are high regions
c) The back edge low region is 120 degrees to zero crossing point and 300 degrees to zero crossing point
2. Injecting advanced adjusting pulses into the corresponding switching devices of the bridge arms of the phase before the zero crossing point of the input voltage to generate corresponding advanced driving signals, wherein the rising edges of the pulses of the driving signals are synchronous with the driving rising edges of the corresponding switching tubes of the bridge arms of the high region, the widths of the pulse of the driving signals are based on the duty ratio width corresponding to the phase voltage area which cannot be identified by the zero crossing point of the phase, the corresponding switching devices of the bridge arms of the phase are ensured to have the driving signals in the phase voltage area which cannot be identified by the zero crossing point of the phase when the phase is changed, and the corresponding switching
3. The front edge low area and the high area are master control areas, and the back edge low area is a slave control area; when the phase voltage is in a front edge low region and a front edge high region, comparing the phase current integral curve with the phase voltage to generate a driving signal of a corresponding switch device of the phase bridge arm; when the phase voltage is in the low region of the back edge, the difference between the high region drive and the low region drive of the front edge in other two phases of voltages is used for generating the drive signal of the corresponding switch device of the bridge arm of the phase.
4. Injecting lag regulating pulse into the corresponding switching device of the bridge arm of the phase after the input voltage crosses the zero point to generate a corresponding lag driving signal, wherein the falling edge of the pulse of the driving signal is synchronous with the driving falling edge of the corresponding switching tube of the bridge arm of the high region, the width is based on the duty ratio width corresponding to the phase voltage area which cannot be identified by the zero point of the phase, the corresponding switching device of the bridge arm of the phase is ensured to have the driving signal in the phase voltage area which cannot be identified by the zero point of the phase when the phase is changed, and the corresponding switching device of the bridge arm of the phase can
Although the phase angle divisions of the input voltage are defined by angles of 60 degrees, 120 degrees, 240 degrees, etc., as known from the basic knowledge of those skilled in the art, the actual meaning of the phase angle divisions in three-phase input is the time when one phase voltage crosses zero and the other two phases are equal; due to the reasons of three-phase imbalance or neutral drift, and the like, in practical application, the moment is around the equal angles of 60 degrees, 120 degrees, 240 degrees and the like, and certain deviation exists between the moment and the equal angles of 60 degrees, 120 degrees, 240 degrees and the like; for convenience of explanation, the following description will be made with reference to phase angles of 60 degrees, 120 degrees, 240 degrees, etc.
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention; it is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
It should be noted that the embodiments and features of the embodiments of the present invention can be applied independently or in combination with each other without conflict.
The invention is further described below with reference to the accompanying drawings and specific examples.
A three-phase six-switch BUCK-type PFC circuit is shown in fig. 1. The circuit consists of switching tubes Q1-Q6, rectifier diodes D1-D6, a freewheeling diode D7, an output filter inductor L1, an output filter capacitor C1, three-phase input voltages Va, Vb and Vc and an output voltage Vout; input voltage Va is connected to an a-phase arm composed of Q1, D1, Q4, and D4, input voltage Vb is connected to a B-phase arm composed of Q2, D2, Q5, and D5, and input voltage Vc is connected to a C-phase arm composed of Q3, D3, Q6, and D6. U shapeQ1、UQ2、UQ3、UQ4、UQ5、UQ6Are the driving signals from Q1 to Q6. Since the control methods of the a-phase bridge arm and the B-phase and C-phase bridge arms are completely the same, only the a-phase bridge arm is taken as an example for description.
According to the above-mentioned partitioning and control logic, the driving signal of the switching tube Q1 of the a-phase bridge arm includes five different time zones a, b, c, d, and e, and the commutation time of the five time zones are defined as X1, X2, X3, and X4, and the following four commutation processes are analyzed in detail.
Time X1: the zero crossing time of the A phase voltage from the negative voltage to the positive voltage. Before the moment, the C phase voltage is highest and is in a high region; the phase C current is used as an integral current, a Q3 driving signal is generated by comparing an integral current waveform with the phase C voltage, and the duty ratio is maximum; the B phase voltage is in a leading edge low region, the rising edge of a Q5 driving signal is synchronous with the rising edge of Q3, and the falling edge is generated by comparing an integrated current waveform with the B phase voltage; the phase A is in a low-back-edge region, the bridge arm switching tube Q4 drives the rising edge of the waveform to be synchronous with the falling edge of Q5, and the Q4 drives the falling edge of the waveform to be synchronous with the falling edge of Q3. That is, the drive signal of Q4 is determined by the difference between the drive signals of Q3 and Q5. After the time of X1, the phase B voltage (absolute value) is the highest, the phase B voltage is in a high region, the phase B current is taken as an integrated current, a Q5 driving signal is generated by comparing the integrated current waveform with the phase B voltage, and the duty ratio is the largest; the A phase voltage is in a leading edge low region, the rising edge of a Q1 driving signal is synchronous with the rising edge of Q5, and the falling edge is generated by comparing an integrated current waveform with the A phase voltage; the C-phase voltage is in a low-back-edge region, the rising edge of a driving waveform of a bridge arm switching tube Q3 is synchronous with the falling edge of Q1, and the falling edge of a driving waveform of Q3 is synchronous with the falling edge of Q5. That is, the drive signal of Q3 is determined by the difference between the drive signals of Q5 and Q1.
Time X2: at the time point of 60 degrees, the phase C voltage crosses zero from a positive voltage to a negative voltage, and the phase a voltage exceeds the phase B voltage (absolute value), resulting in the highest voltage. Before the moment, the phase B voltage (absolute value) is the highest and is in a high region, the phase B current is used as an integrated current, a Q5 driving signal is generated by comparing the integrated current waveform with the phase B voltage, and the duty ratio is the largest; the A phase voltage is in a leading edge low region, the rising edge of a Q1 driving signal is synchronous with the rising edge of Q5, and the falling edge is generated by comparing an integrated current waveform with the A phase voltage; the C-phase voltage is in a low-back-edge region, the rising edge of a driving waveform of a bridge arm switching tube Q3 is synchronous with the falling edge of Q1, and the falling edge of a driving waveform of Q3 is synchronous with the falling edge of Q5. That is, the drive signal of Q3 is determined by the difference between the drive signals of Q5 and Q1. After the time of X2, the phase A voltage is the highest and is in a high region, the phase A current is taken as an integrated current, a Q1 driving signal is generated by comparing the integrated current waveform with the phase A voltage, and the duty ratio is the largest; the C-phase voltage is in a leading edge low region, the rising edge of a Q6 driving signal is synchronous with the rising edge of Q1, and the falling edge is generated by comparing an integrated current waveform with the C-phase voltage; the phase B voltage is in a low back edge region, the bridge arm switching tube Q5 drives the rising edge of the waveform to be synchronous with the falling edge of Q6, and the Q5 drives the falling edge of the waveform to be synchronous with the falling edge of Q1. That is, the drive signal of Q5 is determined by the difference between the drive signals of Q6 and Q1.
Time X3: at the time point of 120 degrees, the phase B voltage crosses zero from the negative voltage to the positive voltage, and the phase C voltage (absolute value) exceeds the phase a voltage, and becomes the highest voltage. Before the moment, the phase A voltage is highest and is in a high region, the phase A current is taken as an integrated current, a Q1 driving signal is generated by comparing an integrated current waveform with the phase A voltage, and the duty ratio is maximum; the C-phase voltage is in a leading edge low region, the rising edge of a Q6 driving signal is synchronous with the rising edge of Q1, and the falling edge is generated by comparing an integrated current waveform with the C-phase voltage; the phase B voltage is in a low back edge region, the bridge arm switching tube Q5 drives the rising edge of the waveform to be synchronous with the falling edge of Q6, and the Q5 drives the falling edge of the waveform to be synchronous with the falling edge of Q1. That is, the drive signal of Q5 is determined by the difference between the drive signals of Q6 and Q1. After the time of X3, the phase C voltage is the highest and is in a high region, the phase C current is used as an integrated current, a Q6 driving signal is generated by comparing the integrated current waveform with the phase C voltage, and the duty ratio is the largest; the B phase voltage is in a leading edge low region, the rising edge of a Q2 driving signal is synchronous with the rising edge of Q6, and the falling edge is generated by comparing an integrated current waveform with the B phase voltage; the A-phase voltage is in a low back edge region, the rising edge of a driving waveform of a bridge arm switching tube Q1 is synchronous with the falling edge of Q2, and the falling edge of a driving waveform of Q1 is synchronous with the falling edge of Q6. That is, the drive signal of Q1 is determined by the difference between the drive signals of Q6 and Q2.
Time X4: the a-phase voltage is zero-crossing from a positive voltage to a negative voltage, and the B-phase voltage exceeds the C-phase voltage (absolute value), resulting in the highest voltage. Before the moment, the phase C voltage is the highest, the phase C is in a high region, the phase C current is used as an integrated current, a Q6 driving signal is generated by comparing an integrated current waveform with the phase C voltage, and the duty ratio is the largest; the B phase voltage is in a leading edge low region, the rising edge of a Q2 driving signal is synchronous with the rising edge of Q6, and the falling edge is generated by comparing an integrated current waveform with the B phase voltage; the A-phase voltage is in a low back edge region, the rising edge of a driving waveform of a bridge arm switching tube Q1 is synchronous with the falling edge of Q2, and the falling edge of a driving waveform of Q1 is synchronous with the falling edge of Q6. That is, the drive signal of Q1 is determined by the difference between the drive signals of Q6 and Q2. After the time of X4, the phase B voltage is the highest and is in a high region, the phase B current is used as an integrated current, a Q2 driving signal is generated by comparing the integrated current waveform with the phase B voltage, and the duty ratio is the largest; the A phase voltage is in a leading edge low region, the rising edge of a Q4 driving signal is synchronous with the rising edge of Q2, and the falling edge is generated by comparing an integrated current waveform with the A phase voltage; the C-phase voltage is in a low-back-edge region, the rising edge of a driving waveform of a bridge arm switching tube Q6 is synchronous with the falling edge of Q4, and the falling edge of a driving waveform of Q6 is synchronous with the falling edge of Q2. That is, the drive signal of Q6 is determined by the difference between the drive signals of Q2 and Q4.
At time X1, the conventional control method causes distortion of phase a current for the following reasons:
1. because the phase voltage of the A phase is approximately zero, the absolute value of the phase B is approximately equal to that of the phase C, and the controller cannot accurately judge the time of X1 in consideration of the precision of the analog-to-digital converter and the sampling delay of the digital controller, the phase change time of X1' may occur before X1 or after X1;
2. meanwhile, as the A phase voltage is approximately zero, the integrated current after phase conversion cannot be compared with the A phase voltage to generate Q1 for driving;
3. due to the presence of the input filter, the input voltage and the current are not completely in phase;
before and after the time of X1, the driving pulse widths of the B phase and the C phase are approximately equal because the phase voltages of the B phase and the C phase are approximately equal, and the difference value of the driving of the B phase and the C phase is probably at the rising edge of the driving, namely the leading side, because of the existence of parasitic parameters; it is also possible on the falling edge of the drive, i.e. on the lagging side.
Therefore, before the time of X1, a Q1 advanced driving signal is sent out synchronously with the rising edge of a Q3 driving signal, the advanced driving signal is actually represented as a series of narrow-pulse-width pulses, the rising edge of the driving signal is synchronous with the rising edge of Q3, the pulse width is based on the duty ratio width corresponding to a phase voltage area which cannot be identified by the zero crossing point of the phase, or a certain minimum duty ratio set by a controller, so that the phase voltage of Q1 cannot be accurately measured near the zero crossing point during phase change, and the driving signal cannot be accurately judged in the area of the zero crossing time; the driving signal pulse is positioned at the rising edge, namely the leading side, of the B-phase and C-phase driving, and is called as a leading adjusting pulse; due to the existence of the advance adjusting pulse, before the time of X1, namely before the zero crossing point of the phase A electricity, the switching tube Q1 on the phase A arm drives the pulse width to cover the phase B arm Q5 and the phase C arm Q3 to drive the rising edge, and when the difference between the phase A voltage and the phase B and phase C driving signals before the zero crossing point of the phase A voltage cannot be determined to be on the leading side or the lagging side, the switching tube Q1 on the phase A arm drives the pulse width to cover the phase B arm Q5, the phase C arm Q3 drives the rising edge, the switching tube Q4 on the phase A arm drives the pulse width to cover the phase B arm Q5 and the phase C arm Q3 to drive the falling edge, so that the phase A arm is smooth and has no distortion before the time of X1.
After the time of X1, a Q4 lagging drive signal is sent along with the falling edge of Q5, the lagging drive signal is actually expressed as a series of narrow pulse width pulses, the falling edge of the narrow pulse width pulses is synchronous with the falling edge of Q5, the pulse width is based on the duty ratio width corresponding to a phase voltage area which cannot be identified by the zero crossing point of the phase, or a certain minimum duty ratio set by a controller, so that the phase voltage of Q4 cannot be accurately measured near the zero crossing point during phase change, and the drive signal cannot be accurately judged in the area of the zero crossing time; the driving signal pulse is positioned at the falling edge of B-phase and C-phase driving, namely the lagging side, and is called as a lagging adjusting pulse; due to the existence of the lag adjusting pulse, after the time of X1, namely after the zero crossing point of the A-phase electricity, the lower switch tube Q4 of the A-phase bridge arm drives the pulse width to cover the B-phase bridge arm Q5 and the C-phase bridge arm Q3 to drive the falling edge, and when the difference between the B-phase drive signal and the C-phase drive signal after the zero crossing point of the A-phase electricity cannot be determined to be on the leading side or the lagging side, the upper switch tube Q1 of the A-phase bridge arm drives the pulse width to cover the B-phase bridge arm Q5, the C-phase bridge arm Q3 drives the rising edge, and the lower switch tube Q4 of the A-phase bridge arm drives the pulse width to cover the B-phase bridge arm Q5 and the C-phase bridge arm Q3.
Before the time X4, a pulse with a narrow pulse width driven by Q4, namely a lead regulation pulse, is sent out synchronously with the rising edge of Q6 as before and after the time X1; and after the time X4, Q1 is synchronously sent out along with the falling edge of Q2 to drive a narrow pulse width pulse, namely a lagging regulation pulse. The leading and lagging adjusting pulse signals are respectively positioned at the rising edge and the falling edge of the maximum duty ratio, so that no matter how the controller judges the phase change time X4', the switching tubes Q1 and Q4 of the A-phase bridge arm have driving signals, and the smooth wave form and no current distortion of the A-phase input current before and after the time X4 are ensured.
The switching-in time of the leading and lagging adjusting pulses is the time when the controller starts and stops injecting the adjusting pulses, the leading adjusting pulses can be injected at the last commutation time before the zero crossing point of the input voltage corresponding to the phase bridge arm, the lagging adjusting pulses can be stopped injecting at the next commutation time after the zero crossing point of the input voltage corresponding to the phase bridge arm, and the window voltage near the zero crossing point of the phase voltage can be used, namely when the controller judges that the absolute value of a certain phase voltage is lower than a set limit value, the phase bridge arm enters a commutation preparation period, and the leading adjusting pulses can be injected at the moment; and when the absolute value of a certain phase voltage is increased from low to higher than the set limit value, the injection of the hysteresis regulation pulse is stopped.
The widths of the leading and lagging adjusting pulses are set in various forms:
a. the duty ratio width corresponding to a phase voltage area which cannot be identified by the phase zero crossing point is taken as a standard; for example, when the input phase voltage is equal to 5V, the duty ratio D of the corresponding switching device of the corresponding bridge arm can be calculated5V(ii) a However, the analog-to-digital converter is limited by sampling precision and a chip power supply mode, and cannot accurately report an input phase voltage value, so that when the input phase voltage is less than or equal to 5V, D is used5VThe duty ratio of the pulse is adjusted as the lead or lag of the corresponding switch device of the corresponding bridge arm;
b. or setting a certain specific duty ratio as the minimum duty ratio output by the controller, and taking the minimum duty ratio as the duty ratio of the leading and lagging adjusting pulses;
c. directly phase-shifting the duty ratio calculated by the other switching tube of the same-phase bridge arm to obtain the duty ratio of the leading and lagging regulation pulses
The same control strategy is implemented simultaneously on the six switching devices of the A, B, C three legs. Since the control strategies of the three arms are identical, the B, C arm is not explained in detail here.
The implementation of the present invention is described above with reference to a three-phase six-switch BUCK-type PFC circuit using a current integration control method, which is a specific embodiment of the present invention. Therefore, the invention provides a control algorithm for the BUCK type three-phase PFC circuit, and the control algorithm adopts control logic to realize flexible phase change when the circuit is in phase change; the basic characteristics of the method comprise:
1. aiming at the three-phase input of the BUCK type three-phase PFC circuit, the three-phase input is divided into a front edge low area, a high area and a rear edge low area according to input voltage, wherein:
a) the leading edge low region is the zero crossing point to 60 degrees and the zero crossing point to 240 degrees
b)60 to 120DEG and 240 to 300DEG are high regions
c) The back edge low region is 120 degrees to zero crossing point and 300 degrees to zero crossing point
2. The front edge low area and the high area are master control areas, and the back edge low area is a slave control area;
a) when the phase voltage is in a high region, the duty ratio of the corresponding switching element of the corresponding bridge arm is obtained by comparing the phase input voltage with the phase current integral signal or triangular wave or sawtooth wave, and the duty ratio is maximum;
b) when the phase voltage is in a leading edge low region, the duty ratio of the corresponding switching element of the corresponding bridge arm of the phase is obtained by comparing the input voltage of the phase with a current integral signal or a triangular wave or a sawtooth wave in a high region;
c) when the phase voltage is in the low-area back edge, the rising edge of the driving signal of the corresponding switching device of the corresponding bridge arm is synchronous with the falling edge of the driving signal of the corresponding switching device of the bridge arm in the low-area front edge, and the falling edge of the driving signal of the corresponding switching device of the corresponding bridge arm is synchronous with the falling edge of the driving signal of the corresponding switching device of the bridge arm in the high-area;
3. before the input voltage of the phase crosses the zero point, an advanced driving signal is sent to the corresponding switching device of the bridge arm of the phase synchronously with the rising edge of the driving signal of the corresponding switching device of the bridge arm of the high-region phase, the advanced driving signal is actually expressed as a series of narrow pulse width pulses, the rising edge of the driving signal is synchronous with the rising edge of the driving signal of the corresponding switching device of the bridge arm of the high-region phase, the pulse width is based on the duty ratio width corresponding to the phase voltage area which cannot be identified by the zero point of the phase, or a certain minimum duty ratio set by a controller, so that the phase voltage of the corresponding switching device of the bridge arm of the phase near the zero point can not be accurately measured during phase; the driving signal pulse is positioned at the rising edge, namely the leading side, of the high-region phase and the leading edge low-region phase driving, and therefore the driving signal pulse is called as a leading adjusting pulse;
4. after the input voltage of the phase crosses the zero point, a lag driving signal is sent to the corresponding switching device of the phase bridge arm along with the falling edge of the driving signal of the corresponding switching device of the phase bridge arm in the high area, the lag driving signal is actually expressed as a series of narrow pulse width pulses, the falling edge of the lag driving signal is synchronous with the falling edge of the driving signal of the corresponding switching device of the phase bridge arm in the high area, the pulse width takes the duty ratio width corresponding to the phase voltage area which cannot be identified by the zero point of the phase as the standard, or a certain minimum duty ratio is set by a controller, so that the phase voltage of the corresponding switching device of the phase bridge arm in the vicinity of the zero point can not be; the driving signal pulse is positioned on the falling edge, namely the lagging side, of the high-region phase and the leading edge low-region phase driving, and therefore the driving signal pulse is called as a lagging adjusting pulse;
as can be seen from the above features, the control algorithm applied to the BUCK-type three-phase PFC circuit according to the present invention is actually a control logic algorithm for commutation of the BUCK-type three-phase PFC converter, and can be applied to various circuit topologies of the BUCK-type three-phase PFC circuit, and can be applied in combination with various control methods such as a current integration control method and a PWM control method. The three-phase six-switch BUCK PFC circuit using the current integration control method is described here, but is not the only embodiment of the present invention. The control algorithm with the above characteristics and applied to the BUCK type three-phase PFC circuit belongs to a specific embodiment of the control algorithm of the present invention.

Claims (7)

1. The flexible commutation control algorithm is applied to a BUCK type three-phase PFC circuit, is used for a commutation of a BUCK type three-phase PFC converter in control logic and a logic algorithm of a switch device driving signal wave sending, and is characterized in that:
a) aiming at the three-phase input of the BUCK type three-phase PFC circuit, the three-phase input is divided into a front edge low area, a high area and a back edge low area according to input voltage, wherein:
i. zero crossing point to 60deg and zero crossing point to 240deg are front edge low region
60deg to 120deg and 240deg to 300deg are high regions
iii the trailing edge low region from 120deg to zero and 300deg to zero
b) The front edge low area and the high area are master control areas, and the back edge low area is a slave control area;
i. when the phase voltage is in a high region, the duty ratio of the corresponding switching element of the corresponding bridge arm is obtained by comparing the phase input voltage with the phase current integral signal or triangular wave or sawtooth wave, and the duty ratio is maximum;
when the voltage of the current phase is in a leading edge low region, the duty ratio of the corresponding switching device of the corresponding bridge arm of the current phase is obtained by comparing the input voltage of the current phase with a current integral signal or a triangular wave or a sawtooth wave in a high region;
and iii, when the voltage of the current phase is in the low region of the back edge, the rising edge of the driving signal of the corresponding switching device of the corresponding bridge arm of the current phase is synchronous with the falling edge of the driving signal of the corresponding switching device of the bridge arm of the low region of the front edge, and the falling edge of the driving signal of the corresponding switching device of the corresponding bridge arm of the current phase is synchronous with the falling edge of the driving signal of the corresponding switching device of the bridge arm of the high region.
2. The flexible commutation control algorithm applied to a BUCK-type three-phase PFC circuit according to claim 1, wherein: the method is applied to a commutation algorithm of a BUCK type three-phase PFC converter in a control logic and a control algorithm generated by driving signals of all switching devices, and is combined with a basic control method of the BUCK type three-phase PFC circuit, wherein the basic control method is a current integration method or a PWM control method, and is used for controlling the on and off of all switching devices of the BUCK type three-phase PFC circuit so as to realize the functions of stabilizing the output voltage and correcting the input power factor.
3. The flexible commutation control algorithm applied to a BUCK-type three-phase PFC circuit according to claim 1, wherein: the BUCK type three-phase PFC circuit comprises a three-phase six-switch BUCK type PFC circuit, a BUCK type three-phase PFC circuit formed by three switches and a BUCK type three-phase PFC circuit formed by three bidirectional switches.
4. The flexible commutation control algorithm applied to a BUCK-type three-phase PFC circuit according to claim 1, wherein: injecting leading and lagging adjusting pulses into the corresponding switching device of the bridge arm of the phase before and after the zero crossing point of the input phase voltage, wherein the injected adjusting pulse signals meet the following conditions:
a) before the input voltage of the phase crosses the zero point, an advanced driving signal is sent to the corresponding switching device of the bridge arm of the phase synchronously with the rising edge of the driving signal of the corresponding switching device of the bridge arm of the high-region phase, the advanced driving signal is actually expressed as a series of narrow pulse width pulses, the rising edge of the driving signal is synchronous with the rising edge of the driving signal of the corresponding switching device of the bridge arm of the high-region phase, the pulse width is based on the duty ratio width corresponding to the phase voltage area which cannot be identified by the zero point of the phase, or a certain minimum duty ratio set by a controller, so that the phase voltage of the corresponding switching device of the bridge arm of the phase near the zero point can not be accurately measured during phase; the driving signal pulse is positioned at the rising edge, namely the leading side, of the high-region phase and the leading edge low-region phase driving, and therefore the driving signal pulse is called as a leading adjusting pulse;
b) after the input voltage of the phase crosses the zero point, a lag driving signal is sent to the corresponding switching device of the phase bridge arm along with the falling edge of the driving signal of the corresponding switching device of the phase bridge arm in the high area, the lag driving signal is actually expressed as a series of narrow pulse width pulses, the falling edge of the lag driving signal is synchronous with the falling edge of the driving signal of the corresponding switching device of the phase bridge arm in the high area, the pulse width takes the duty ratio width corresponding to the phase voltage area which cannot be identified by the zero point of the phase as the standard, or a certain minimum duty ratio is set by a controller, so that the phase voltage of the corresponding switching device of the phase bridge arm in the vicinity of the zero point can not be; the driving signal pulse is located at the falling edge of the high-region phase and the leading edge of the low-region phase, namely the lagging side, and is called as a lagging adjusting pulse.
5. The flexible commutation control algorithm applied to a BUCK-type three-phase PFC circuit according to claim 1, wherein: wherein the leading edge low zone, high district, back porch low zone three subregion to BUCK type three-phase PFC circuit three-phase input, wherein:
i. zero crossing point to 60deg and zero crossing point to 240deg are front edge low region
60deg to 120deg and 240deg to 300deg are high regions
iii the trailing edge low region from 120deg to zero and 300deg to zero
The input voltage is divided according to the phase angles of 60deg, 120deg and 240deg, the practical meaning of the phase angle division in three-phase input is that the zero crossing point of a certain phase voltage and the time when the other two phase voltages are equal, but not the accurate phase angle of each phase input voltage; due to the reason of three-phase imbalance or midpoint drift, the moment is near the phase angles of 60deg, 120deg and 240deg in practical application, and certain deviation exists between the actual phase angles of 60deg, 120deg and 240 deg; such deviations do not affect the basic principle of the present control algorithm.
6. The flexible commutation control algorithm applied to a BUCK-type three-phase PFC circuit according to claim 4, wherein: the leading and lagging adjusting pulses are adjusted, the switching-in time of the adjusting pulses is the time when the controller starts or stops injecting the adjusting pulses, the leading adjusting pulses can be injected at the last phase change time before the zero crossing point of the input voltage corresponding to the phase bridge arm, the lagging adjusting pulses can be stopped injecting at the next phase change time after the zero crossing point of the input voltage corresponding to the phase bridge arm, and the window voltage near the zero crossing point of the phase voltage can also be used, namely when the controller judges that the absolute value of a certain phase voltage is lower than a set limit value, the phase bridge arm enters a phase change preparation period, and the leading adjusting pulses can be injected at the moment; and when the absolute value of a certain phase voltage is increased from low to higher than the set limit value, the injection of the hysteresis regulation pulse is stopped.
7. The flexible commutation control algorithm applied to a BUCK-type three-phase PFC circuit according to claim 4, wherein: the widths of the leading and lagging adjusting pulses are set in various forms:
a) the duty ratio width corresponding to a phase voltage area which cannot be identified by the phase zero crossing point is taken as a standard; when the input phase voltage is equal to 5V, the duty ratio D of the corresponding switching device of the corresponding bridge arm can be calculated5V(ii) a However, the analog-to-digital converter is limited by sampling precision and a chip power supply mode, and cannot accurately report an input phase voltage value, so that when the input phase voltage is less than or equal to 5V, D is used5VThe duty ratio of the pulse is adjusted as the lead or lag of the corresponding switch device of the corresponding bridge arm;
b) or setting a certain specific duty ratio as the minimum duty ratio output by the controller, and taking the minimum duty ratio as the duty ratio of the leading and lagging adjusting pulses;
c) and directly performing phase shift processing on the duty ratio calculated by the other switching tube of the in-phase bridge arm to obtain the duty ratio of the leading and lagging adjusting pulses.
CN201810021041.7A 2018-01-10 2018-01-10 Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit Active CN108075636B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810021041.7A CN108075636B (en) 2018-01-10 2018-01-10 Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810021041.7A CN108075636B (en) 2018-01-10 2018-01-10 Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit

Publications (2)

Publication Number Publication Date
CN108075636A CN108075636A (en) 2018-05-25
CN108075636B true CN108075636B (en) 2021-01-26

Family

ID=62156640

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810021041.7A Active CN108075636B (en) 2018-01-10 2018-01-10 Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit

Country Status (1)

Country Link
CN (1) CN108075636B (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201234211Y (en) * 2008-07-22 2009-05-06 江苏捷诚车载电子信息工程有限公司 Automatic shifting control device for three-phase AC
TWI426692B (en) * 2011-01-10 2014-02-11 Richtek Technology Corp Multi-phase switching regulator and driver circuit and control method thereof
CN104320032B (en) * 2014-09-30 2017-03-29 海信科龙电器股份有限公司 A kind of AC/AC (alternating current) variable-frequency air conditioning control method and controller
CN104600733B (en) * 2014-12-23 2017-02-22 南京南瑞继保电气有限公司 Phase changing control method and phase changing control device
CN107395034A (en) * 2017-09-09 2017-11-24 孙崇山 From commutation rectification circuit and idle method for transformation

Also Published As

Publication number Publication date
CN108075636A (en) 2018-05-25

Similar Documents

Publication Publication Date Title
US7885085B2 (en) Cascaded PFC and resonant mode power converters
CN107896069B (en) Novel single-phase mixed three-level rectifier
Andersen et al. Current programmed control of a single-phase two-switch buck-boost power factor correction circuit
CN106655783B (en) Digital power supply control circuit and method
TWI497886B (en) Control device for multiphase interleaving dc-dc converter and control method thereof
EP2081285A2 (en) Cascaded PFC and resonant mode power converters
Chen et al. Modified interleaved current sensorless control for three-level boost PFC converter with considering voltage imbalance and zero-crossing current distortion
CN205195552U (en) Power factor correction converter of wide load scope
Matsumoto et al. A two-phase high step down coupled-inductor converter for next generation low voltage CPU
WO2019242407A1 (en) Method for controlling speed regulation system of asynchronous motor on basis of buck-boost matrix converter
CN103683918A (en) Switching power supply
US20130033240A1 (en) Pfc thd reduction by zvs or valley switching
CN106787668A (en) A kind of power factor correcting converter of loading range wide
Lai et al. New integrated control technique for two-stage server power to improve efficiency under the light-load condition
Hanson et al. A high-frequency power factor correction stage with low output voltage
CN109713889B (en) Power factor correction circuit and control method thereof
JP2013048553A (en) Method of controlling step-up chopper circuit
CN108306497B (en) Multiphase staggered parallel controller and control method thereof
CN112564475B (en) DCM control method and device for single-phase staggered parallel totem-pole PFC circuit
CN107979278A (en) A kind of width load step-up type power factor correcting converter
CN112311222A (en) Improved bridgeless DBPFC converter based on composite prediction current control and control method
Jiang et al. Hybrid-mode adaptive zero-voltage switching for single-phase DC–AC conversion with paralleled SiC MOSFETs
CN112636581B (en) Soft switch control circuit of totem-pole PFC rectifier
CN110943605A (en) Control method and device of totem-pole power factor correction circuit
CN111490692B (en) Resonant pole type soft switching inverter

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
PE01 Entry into force of the registration of the contract for pledge of patent right
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of invention: Flexible commutation control algorithm applied to buck three-phase PFC circuit

Effective date of registration: 20220214

Granted publication date: 20210126

Pledgee: Pudong Shanghai technology financing Company limited by guarantee

Pledgor: Shanghai Yinglian Electronic System Co.,Ltd.

Registration number: Y2022310000024

PC01 Cancellation of the registration of the contract for pledge of patent right
PC01 Cancellation of the registration of the contract for pledge of patent right

Date of cancellation: 20230505

Granted publication date: 20210126

Pledgee: Pudong Shanghai technology financing Company limited by guarantee

Pledgor: Shanghai Yinglian Electronic System Co.,Ltd.

Registration number: Y2022310000024

PE01 Entry into force of the registration of the contract for pledge of patent right
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of invention: Flexible commutation control algorithm applied to BUCK type three-phase PFC circuit

Effective date of registration: 20230506

Granted publication date: 20210126

Pledgee: Pudong Shanghai technology financing Company limited by guarantee

Pledgor: Shanghai Yinglian Electronic System Co.,Ltd.

Registration number: Y2023310000162