CN108012386B

CN108012386B - Control circuit, chip, method and switching device

Info

Publication number: CN108012386B
Application number: CN201810091614.3A
Authority: CN
Inventors: 郁炜嘉; 孙顺根; 郜小茹
Original assignee: Shanghai Bright Power Semiconductor Co Ltd
Current assignee: Shanghai Bright Power Semiconductor Co Ltd
Priority date: 2018-01-30
Filing date: 2018-01-30
Publication date: 2024-02-02
Anticipated expiration: 2038-01-30
Also published as: CN108012386A

Abstract

The application provides a control circuit, a chip, a method and a switching device. The control circuit provides a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal; and during the period of controlling the PMOS tube to switch from the off state to the on state, the driving electric signal and the pressure difference between the source electrode and the grid electrode of the PMOS tube are in an inverse change relation. The PMOS tube response speed is slow among the prior art has been solved to this application.

Description

Control circuit, chip, method and switching device

Technical Field

The present disclosure relates to electronic circuits, and particularly to a control circuit, a chip method, and a switching device.

Background

The switch circuit is widely applied to electronic products and has the advantages of quick response, high integration level and the like. For example, in an LED drive system, a switching circuit controls a resonant circuit to provide power to an LED load. With the increase of the actual demands of people on electronic products, the switching frequency variation range of the switching circuit is gradually increased. This places higher demands on the response capabilities of the hardware electrical devices themselves and the circuit structure in the switching circuit.

The PMOS transistor is often used as a switching device according to the design requirement of the switching circuit. In an actual PMOS control circuit design, due to the semiconductor characteristics of the PMOS, the source-gate voltage difference undergoes a ramp change as shown in fig. 1 during the transition from the off state to the on state, which results in a delay in the PMOS in response to the on control signal. When the switching high frequency of the on state and the off state occurs, the delay obviously limits the response frequency of the PMOS tube.

Disclosure of Invention

In view of the above drawbacks of the prior art, an object of the present application is to provide a control circuit, a chip method, and a switching device, which are used for solving the problems of slow response speed of a PMOS transistor in the prior art.

To achieve the above and other related objects, a first aspect of the present application provides a control circuit for a PMOS transistor, which provides a driving electrical signal to a gate of the PMOS transistor based on a received switch control signal; and during the period of controlling the PMOS tube to switch from the off state to the on state, the driving electric signal and the pressure difference between the source electrode and the grid electrode of the PMOS tube are in an inverse change relation.

In certain embodiments of the first aspect of the present application, the control circuit comprises: the sampling unit samples the pressure difference between the source electrode and the grid electrode of the PMOS tube and outputs the pressure difference in a feedback signal form; the control unit is connected with the sampling unit and the grid electrode of the PMOS tube and is used for providing a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal and the feedback signal; and during the period of controlling the PMOS tube to switch from the off state to the on state, the driving electric signal and the feedback signal are in a reverse change relation.

In certain embodiments of the first aspect of the present application, the sampling unit includes: the sampling resistor is connected with the grid electrode of the PMOS tube; and the input end of the first current mirror is connected with the sampling resistor, and the output end of the first current mirror is connected with a feedback resistor for transmitting the sampling electric signal from the sampling resistor to the feedback resistor so as to form a feedback signal.

In certain embodiments of the first aspect of the present application, the control unit comprises: the first control circuit module is connected with the grid electrode of the PMOS tube; and when receiving a corresponding on-off control signal, the first control circuit module adjusts a driving electric signal output to the grid electrode of the PMOS tube based on the change of the received feedback signal.

In certain embodiments of the first aspect of the present application, the first control circuit module includes: the current source submodule is connected with the sampling unit and is used for outputting a controlled electric signal which changes according to the feedback signal; the first switching circuit submodule receives the switching control signal and is connected with the current source submodule and used for being switched on or off along with the received switching control signal; and the driving circuit submodule is connected with the first switching circuit submodule and used for converting the received controlled electric signal into a driving electric signal and outputting the driving electric signal.

In certain embodiments of the first aspect of the present application, the current source submodule includes a controlled current source.

In certain embodiments of the first aspect of the present application, the control unit comprises: and the second control circuit module is connected with the PMOS tube, and when receiving a switch control signal corresponding to disconnection, the second control circuit module adjusts the pressure difference between the source electrode and the grid electrode of the PMOS to enable the PMOS tube to be in a disconnection state.

In certain embodiments of the first aspect of the present application, the second control circuit module includes: and the pull-up circuit submodule is connected between the grid electrode and the source electrode of the PMOS tube.

In certain embodiments of the first aspect of the present application, the second control circuit module further comprises: the second switching circuit sub-module is controlled by the switching control signal, is connected with the pull-up circuit sub-module, is turned on when receiving the switching control signal corresponding to the turn-off to control the pull-up circuit sub-module to up regulate the voltage of the driving end, and is turned off when receiving the switching control signal corresponding to the turn-on.

In certain embodiments of the first aspect of the present application, the control circuit further comprises: the non-overlapping control signal generation unit is used for outputting two paths of non-overlapping switch control signals based on the received switch control signals, wherein the output first switch control signal is used for controlling the PMOS tube to switch into an off state, and the output second switch control signal is used for controlling the PMOS tube to switch into an on state.

A second aspect of the present application provides a switching device comprising at least one switching circuit; the switching circuit includes: the control circuit and the PMOS tube as described above; wherein, the grid electrode of the PMOS tube is connected with the control circuit; the control circuit provides a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal, and the PMOS tube is switched between a conducting state and a disconnecting state based on the driving electric signal; and during the period of controlling the PMOS tube to switch from the off state to the on state, the driving electric signal and the pressure difference between the source electrode and the grid electrode of the PMOS tube are in an inverse change relation.

In certain embodiments of the second aspect of the present application, the switching circuit further comprises a second control circuit; the control circuit and the PMOS tube in the switch circuit are used for controlling the second PMOS tube to be switched from the on state to the off state, and the second control circuit is used for controlling the second PMOS tube to be switched from the off state to the on state.

In certain embodiments of the second aspect of the present application, the number of the switch circuits is plural, and the control circuit in each switch circuit individually controls the connected PMOS transistor.

A third aspect of the present application provides a chip comprising: a control circuit as claimed in any one of the preceding claims.

In some embodiments of the third aspect of the present application, the chip further includes a PMOS transistor connected to the control circuit, where at least one switch circuit is formed by the control circuit and the PMOS transistor.

In certain embodiments of the third aspect of the present application, the switching circuit further comprises a second control circuit; the control circuit and the PMOS tube in the switch circuit are used for controlling the second PMOS tube to be switched from the on state to the off state, and the second control circuit is used for controlling the second PMOS tube to be switched from the off state to the on state.

In certain embodiments of the third aspect of the present application, the number of the switch circuits is plural, and the control circuit in each switch circuit individually controls the connected PMOS transistor.

A fourth aspect of the present application provides a control method, configured to control a PMOS transistor, including: acquiring a switch control signal; when the obtained switch control signal indicates that the PMOS tube is conducted, outputting a driving electric signal to the grid electrode of the PMOS tube; during the transition from the disconnection state to the connection state of the PMOS tube, the driving electric signal and the source grid voltage difference of the PMOS tube are in an inverse change relation; and when the obtained switch control signal indicates to disconnect the PMOS tube, disconnecting the PMOS tube.

In some embodiments of the fourth aspect of the present application, the step of outputting the driving electrical signal to the gate of the PMOS transistor includes: sampling the electric signal of the source grid electrode of the PMOS tube; converting the sampled electrical signal into a feedback signal using a current mirror; and converting the feedback signal into a driving electric signal based on the switch control signal and outputting the driving electric signal to the grid electrode of the PMOS tube.

In certain embodiments of the fourth aspect of the present application, the step of converting the feedback signal into a driving electrical signal based on a switch control signal and outputting the driving electrical signal to the gate of the PMOS transistor includes: converting the feedback signal into a controlled electrical signal, the controlled electrical signal having the same variation as the feedback signal; and converting the received controlled electric signal into a driving electric signal based on the received switch control signal and outputting the driving electric signal to the grid electrode of the PMOS tube.

In certain embodiments of the fourth aspect of the present application, the step of disconnecting the PMOS transistor includes: and controlling a pull-up circuit submodule based on the switch control signal to up-regulate the grid voltage of the PMOS tube so as to enable the PMOS tube to be turned into an off state.

In some embodiments of the fourth aspect of the present application, when the obtained switch control signal indicates that the PMOS transistor is turned on, the method further includes: and disconnecting the up-regulating operation of the pull-up circuit sub-module.

In certain embodiments of the fourth aspect of the present application, the method further comprises: and converting the acquired switch control signal into a first control signal for controlling the PMOS tube to be turned into a conducting state and a second control signal for controlling the PMOS tube to be turned into a disconnecting state.

As described above, the control circuit, the chip method and the switching device of the present application have the following beneficial effects: according to the control circuit provided by the application, the drive electric signal which is reversely changed with the voltage difference of the PMOS source grid electrode is provided during the period that the PMOS tube is switched from the off state to the on state, so that the grid electrode voltage is reduced more rapidly, and the response speed of the conduction of the PMOS tube is effectively improved. In addition, as the PMOS tube gradually changes from the off state to the on state, the source-gate voltage difference gradually increases, so that the driving electric signal provided by the control circuit is reduced from large to small, and the aim of minimizing the consumption of the control circuit in the on period is also fulfilled.

On the other hand, the pull-up circuit submodule in the control circuit provided by the application adopts a mode of actively pulling up the grid voltage of the PMOS tube, so that parasitic capacitance of the source grid can be rapidly discharged during the period that the PMOS tube is switched from the on state to the off state, and the response speed of the disconnection of the PMOS tube is improved.

Drawings

Fig. 1 is a schematic diagram showing the change of the gate-source voltage during the switching between the on state and the off state of the PMOS transistor switch.

FIG. 2 is a schematic diagram of a conventional PMOS transistor and a control circuit.

FIG. 3 is a schematic diagram showing connection between the control circuit and the PMOS transistor.

Fig. 4 shows a block diagram of the control circuit of the present application.

Fig. 5 is a schematic diagram of the control circuit of the present application in some embodiments.

Fig. 6 is a schematic diagram of a control circuit according to the present application in still other embodiments.

Fig. 7 is a schematic circuit diagram of a control circuit according to another embodiment of the present application.

Fig. 8 shows a schematic package diagram of a chip of the present application.

Fig. 9 is a schematic circuit diagram of a switching circuit in a chip according to an embodiment of the present application.

Fig. 10 is a schematic circuit diagram of a plurality of switch circuits according to the present application in one embodiment.

Fig. 11 is a schematic circuit diagram of a plurality of switch circuits according to another embodiment of the present application.

Fig. 12 is a schematic circuit diagram of a plurality of switch circuits according to another embodiment of the present application.

Fig. 13 is a flowchart of a control method according to an embodiment of the present application.

Detailed Description

Further advantages and effects of the present application will be readily apparent to those skilled in the art from the present disclosure, by describing the embodiments of the present application with specific examples.

In the following description, reference is made to the accompanying drawings, which describe several embodiments of the present application. It is to be understood that other embodiments may be utilized and that mechanical, structural, electrical, and operational changes may be made without departing from the spirit and scope of the present disclosure. The following detailed description is not to be taken in a limiting sense, and the scope of embodiments of the present application is defined only by the claims of the issued patent.

Although the terms first, second, etc. may be used herein to describe various elements in some examples, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, the first preset threshold may be referred to as a second preset threshold, and similarly, the second preset threshold may be referred to as a first preset threshold, without departing from the scope of the various described embodiments. The first preset threshold and the preset threshold are both described as one threshold, but they are not the same preset threshold unless the context clearly indicates otherwise. Similar situations also include a first volume and a second volume.

Furthermore, as used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context indicates otherwise: a, A is as follows; b, a step of preparing a composite material; c, performing operation; a and B; a and C; b and C; A. b and C). An exception to this definition will occur only when a combination of elements, functions, steps or operations are in some way inherently mutually exclusive.

The switching device (also called a switching circuit) is widely applied to LED illumination, industrial control equipment, communication equipment, medical equipment, household appliances and the like. For example, in an LED driving system, a switching device is disposed in the driving system for performing excitation demagnetization control on a resonant device in the driving system to achieve the purpose of driving an LED load to operate. In another example, in the frequency conversion system, the switching device controls the voltage-controlled oscillator to supply power to the load by the PWM signal, wherein the PWM signal adjusts the duty ratio by the feedback information, so that the switching frequency of the switching device changes accordingly, thereby achieving the frequency conversion purpose. With the diversified demands of loads and improvements in the performance of circuit systems, the response frequency of switching devices is continuously increasing. For example, for a dimmable LED lighting system, one way to dim the LED load is to increase the switching frequency of the switching device, however, some known switching devices using PMOS transistors as switches, as shown in fig. 2, when EN receives a high level (indicating that the switch control signal of PMOS transistor M1 is turned on), transistors Q1 and Q3 are turned on and Q2 is turned off, so that the source gate voltage difference of M1 increases, and M1 is turned on; when the EN-side receives a low level (indicating the switch control signal for turning off the PMOS transistor M1), the transistors Q1 and Q3 are turned off and Q2 is turned on, so that the source-gate voltage difference of M1 is reduced, and M1 is turned off. In the above example, since M1 is a semiconductor device, it may undergo a ramp process as shown in fig. 1 when it is switched between an on state and an off state, and when the frequency of the switching control signal becomes high, the switching device shown in fig. 2 is necessarily limited in response capability by the inherent characteristics of the semiconductor device. Furthermore, in the switching device shown in fig. 2, in order to prevent breakdown of M1 during the on period of M1, a reverse diode D1 and a resistor R2 are also required, which causes current consumption of the switching device during the on period of resistor R2, which also increases internal consumption of the switching device.

The above examples are drawn to other circuit systems including a switching device, and in order to improve the performance of the switching device using a PMOS transistor as a switching device, the present application provides a control circuit of the PMOS transistor. Referring to fig. 3, a schematic diagram of a control circuit and a PMOS transistor of the present application are shown. The source electrode of the PMOS tube is connected to the power supply circuit, the grid electrode is used as a driving end to be connected with the control circuit, and the drain electrode is connected with a later-stage circuit for driving the load to work. The latter circuit includes, but is not limited to, the aforementioned resonant device or oscillator, etc. Taking an LED driving system as an example, the front end of the control circuit not shown includes a front-stage rectifying device, which rectifies an ac power source (such as mains supply) and outputs the rectified ac power through the power supply line, and the voltage of the rectified ac power source is represented by VCC; the power supply circuit is also connected with an LED load (not shown) and the drain electrode of the PMOS tube is connected with a resonance device (not shown), wherein the LED load is connected with the resonance device to form an electric conduction loop.

The control circuit provides a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal; and during the period of controlling the PMOS tube to switch from the off state to the on state, the driving electric signal and the pressure difference between the source electrode and the grid electrode of the PMOS tube are in an inverse change relation.

The switch control signal can be a PWM signal or other square wave signal provided by a front-stage control device. Here, the front-end control device may be a device having digital operation and logic processing capabilities, which may include a CPU, MCU, or other programmable logic device, etc., but is not limited thereto. For example, the front-stage control device is a control panel of an LED load, and outputs a corresponding switch control signal to the control circuit according to an instruction of a user operation. For another example, the front-stage control device is a feedback control circuit, and outputs a corresponding switch control signal to the control circuit according to information obtained through feedback processing. The control circuit comprises matched control units according to on and off instructions represented by switch control signals of the connected front-stage control device. For example, when the switch control signal is high level and indicates a turn-on instruction, the control circuit needs to reduce the gate voltage of the PMOS transistor so that the source-gate voltage difference of the PMOS transistor is greater than or equal to the voltage threshold of the turn-on of the semiconductor device, so as to realize the turn-on of the PMOS transistor; when the switch control signal is low level and represents an off command, the control circuit needs to increase the grid voltage of the PMOS tube so that the source grid voltage difference of the PMOS tube is smaller than the voltage threshold value to realize the off of the PMOS tube. It should be understood that, according to design requirements, the control circuit may also perform turning on the PMOS transistor based on the low-level switch control signal, and perform turning off the PMOS transistor based on the high-level switch control signal. When the control circuit reduces the gate voltage, the gate voltage is accelerated to be lower than a voltage threshold value by outputting a variable driving electric signal to the gate.

Taking the circuit structure shown in fig. 3 as an example, the control circuit can obtain the source gate voltage difference of the PMOS transistor by using the electrical connection relation with the PMOS source gate, and when receiving the switch control signal indicating conduction, the control circuit converts the voltage difference into a driving electrical signal with opposite variation by using the voltage following technology and the mirror current technology, so that the current of the driving electrical signal gradually decreases while the source gate voltage difference of the PMOS transistor gradually increases, thereby shortening the time when the voltage difference between the gate and the source of the PMOS transistor reaches the conduction threshold.

Referring to fig. 4, a schematic diagram of a control circuit according to an embodiment of the present application is shown. The control circuit includes: a sampling unit and a control unit. The sampling unit samples the pressure difference between the source electrode and the grid electrode of the PMOS tube and outputs the pressure difference in a feedback signal mode. The control unit is connected with the sampling unit and the grid electrode of the PMOS tube, and is provided with a connecting end (such as an EN end) connected with the front-stage control device so as to receive a switch control signal. The control unit is based on the received switch control signal and the and the feedback signal provides a driving electric signal for the grid electrode of the PMOS tube.

The sampling unit comprises a sampling resistor arranged between source gates of the PMOS tubes, and the feedback signal is represented by voltage at one end of the sampling resistor. Taking the PMOS transistor based on gate driving as shown in fig. 4 as an example, the voltage difference between the source and the gate of the PMOS transistor is adjusted by adjusting the gate voltage, so the feedback signal is represented by the voltage at one side of the sampling resistor connected to the gate. In some embodiments, the sampling resistor is connected across the source gate through a current mirror, and converts the sampled sampling signal into a feedback signal using the current mirror input side and output side having a current mirror relationship.

Referring to fig. 5, a schematic circuit diagram of the control circuit in an embodiment is shown. The sampling unit 11 comprises a sampling resistor R1, first current mirrors (M1 and M2) and a feedback resistor R2, wherein sources of the two transistors (M1 and M2) of the first current mirrors and sources of the PMOS tubes are connected into a power supply circuit jointly, an input end of the first current mirror is connected with the sampling resistor R1, an output end of the first current mirror is connected with the feedback resistor R2 and is grounded through the resistor R2, and an output end of the first current mirror is also used for being connected with the control unit. The sampling resistor R1 collects the pressure difference between the source grid electrodes of the PMOS tube through the first current mirror, and converts the pressure difference into a feedback signal through the first current mirror to be provided for the control unit. The input end current and the output end current of the first current mirror can be M1, wherein M is a fixed value which is smaller than 1, equal to 1 or larger than 1. When the PMOS tube is controlled to be switched from the off state to the on state, the voltage difference of the grid electrode of the PMOS tube source is gradually increased as shown in fig. 1, the voltage difference at two ends of the sampling resistor is also increased, the current output to the feedback resistor R2 by the first current mirror is gradually increased through the mirror image transmission of the first current mirror, and correspondingly, the voltage at the end of the feedback resistor R2 is gradually increased, namely the feedback signal output from the feedback resistor R2 is increased.

In the structure of the control circuit shown in fig. 5, the PMOS transistor is controlled by the control unit 12. The control unit 12 specifically controls the voltage difference before the source gate of the PMOS transistor by adjusting the current flowing to the gate of the PMOS transistor, thereby implementing on or off of the PMOS transistor. When the control unit 12 receives the on switch control signal, the received feedback signal is transmitted to the current branch where the PMOS transistor gate is located, so that the gate voltage is reduced based on the increase of the feedback signal. Thus, the conduction process of the PMOS transistor is affected by the gradual increase of the feedback signal, the driving electrical signal (current signal) provided to the gate gradually decreases, and when the PMOS transistor is turned on, the current of the driving electrical signal output to the gate is minimum. When the control unit 12 receives the switch control signal, the transmission line of the feedback signal can be disconnected, so that the change of the feedback signal cannot act on the current branch where the gate is located, and the gate voltage of the PMOS transistor is recovered to the voltage before the PMOS transistor is turned on, that is, the PMOS transistor is turned into the off state.

As shown in fig. 5, the control unit 12 includes a first control circuit module 121 and a second control circuit module 122, which are all connected to the gates of the PMOS transistors. The first control circuit module 121 is connected to the sampling unit 11 and the gate of the PMOS transistor, and turns on the PMOS transistor based on the received switch control signal. The second control circuit module 122 is connected with the gate and the source of the PMOS transistor, and disconnects the PMOS transistor based on the switch control signal.

In some embodiments, please refer to fig. 6, which shows a schematic diagram of the control circuit in one embodiment. The first control circuit module 22 adjusts the driving electric signal output to the PMOS transistor gate based on the change of the received feedback signal, and includes a current source sub-module 221, a first switching circuit sub-module 222, and a driving circuit sub-module 223.

The current source sub-module 221 is connected to the sampling unit 21, and is configured to output a controlled electric signal that varies according to the feedback signal. Here, a constant voltage power supply (VDD) is connected to the current source sub-module 221 to supply power to the active devices in the current source sub-module 221. The current source sub-module 221 includes a controlled current source (not shown) connected to the output terminal of the sampling unit 21, and the output electrical signal thereof varies inversely with the feedback signal. For example, the controlled current source is a PMOS type power tube, the source thereof is connected to the constant voltage power supply (VDD), the gate thereof is connected to the output end of the sampling unit 21, the drain thereof is connected to the first switching circuit sub-module 222, when the control circuit receives a switching control signal indicating on, the voltage of the feedback signal outputted from the sampling unit 21 decreases, the gate voltage of the corresponding PMOS type power tube decreases, the current of the controlled electric signal outputted from the drain thereof increases, and thus the controlled electric signal and the feedback signal are in a reverse variation relationship, and the subsequent circuit sub-module in the first control circuit module 22 can scale the controlled electric signal so as to reversely adjust the driving electric signal outputted to the gate of the PMOS tube.

In some specific examples, the current source sub-module includes a controlled current source and a voltage follower. To reduce voltage follower output distortion, the voltage follower includes a bias current source and a power tube. Referring to fig. 7, a schematic circuit diagram of a control circuit in an embodiment is shown. The current source submodule 321 includes a power tube M3, a bias current source Ibias and a power tube M4, where the power tube M3 is a CMOS power tube, the power tube M4 is a PMOS power tube and is used as a controlled current source, a drain electrode of the power tube M3 and a source electrode of the power tube M4 are connected to a constant voltage power supply together, a gate electrode of the power tube M3 receives a feedback signal, a source electrode is connected to the bias current source and a gate electrode of the power tube M4, and a drain electrode of the power tube M4 is connected to the first switching circuit submodule. When the control circuit receives the switch control signal indicating the conduction, the voltage of the feedback signal output by the sampling unit 31 decreases, the power tube M3 amplifies the received feedback signal and transmits the feedback signal to the power tube M4, the gate voltage of the power tube M4 decreases accordingly, the current of the controlled electric signal output by the drain electrode increases, and thus the controlled electric signal and the feedback signal have a reverse change relationship.

The current source submodule is connected to the grid electrode of the PMOS tube through the first switching circuit submodule and the driving circuit submodule. The first switch circuit submodule receives the switch control signal and is connected with the current source submodule, and when the switch control signal indicates that the PMOS tube is conducted, the first switch circuit submodule is conducted, so that a controlled electric signal changing along with the feedback signal is transmitted to the grid electrode of the PMOS tube through the drive circuit submodule; when the switch control signal indicates that the PMOS tube is disconnected, the first switch circuit submodule is disconnected to block the controlled electric signal from transmitting to the grid electrode of the PMOS tube. The first switch circuit sub-module may include an inverter according to the design requirement of the control circuit and a signal identifier indicating conduction in the switch control signal. For example, when the switch control signal is turned on at a high level, the switching tube in the first switching circuit sub-module is turned on. As another example, as shown in fig. 7, when the switch control signal is turned on at a low level, the switching tube in the first switching circuit sub-module 322 is turned on based on a high level of the inverter output.

For the circuit structure of the matched driving circuit sub-module, the first switching circuit sub-module can comprise two switching tubes and realize alternate on-off. As shown in fig. 7, the first switching circuit sub-module 322 includes a CMOS type switching transistor M6, a PMOS type switching transistor M5, and an inverter. When the switch control signal is turned on in a low level, the gates of the CMOS type switching transistor M6 and the PMOS type switching transistor M5 are connected to the front-stage control device through the inverter. When the switch control signal indicates on, the PMOS type switch tube M5 is on and the CMOS type switch tube M6 is off; when the switch control signal indicates off-on, the PMOS type switching transistor M5 is turned off and the CMOS type switching transistor M6 is turned on. The PMOS type switching transistor M5 prevents the controlled electric signal from being output to the driving circuit sub-module during the PMOS transistor turn-off period, and the CMOS type switching transistor M6 shorts the driving circuit sub-module during the PMOS transistor turn-off period, so that the driving circuit sub-module 323 does not have a current output.

The driving circuit submodule is connected with the first switching circuit submodule and used for converting the received controlled electric signal into a driving electric signal and outputting the driving electric signal. The driving circuit submodule can output the controlled electric signal in a current form by using a current mirror so as to adjust the driving electric signal output to the grid electrode of the PMOS tube and realize the purpose of adjusting the voltage of the source grid electrode of the PMOS tube. As shown in fig. 7, the driving circuit submodule 323 includes a second current mirror (M7, M8), wherein an input end of the second current mirror is connected to an output end of the first switching circuit submodule, and an output end of the second current mirror is connected to a gate of the PMOS transistor. The input current and the output current of the second current mirror are 1:N, wherein N can be one of a value smaller than 1, a value equal to 1 or a value larger than 1 according to the actual design requirement of the circuit and the selection of the PMOS tube. The input current and the output current of the current mirror are in mirror image change, and the current at the output end of the second current mirror is increased along with the voltage reduction of the feedback signal during the period that the PMOS tube is switched from the off state to the on state, so that the increasing speed of the voltage difference between the source grid electrodes of the PMOS tube is improved.

Here, it should be noted that the CMOS type and PMOS type electronic devices used in the above-mentioned control circuit are only examples, and are not limiting to the present application. In fact, both CMOS-type and PMOS-type electronics can be replaced according to actual design requirements. For example, the CMOS type switching transistor and the PMOS type switching transistor may be replaced with any one of a corresponding transistor (BJT), a Junction Field Effect Transistor (JFET), a depletion type (depletion) MOS power transistor, a thyristor (or thyristor), and the like.

When the control circuit receives a switching control signal representing disconnection, a first switching circuit submodule in a first control circuit module in the control circuit is disconnected, so that the source gate voltage of the PMOS tube is controlled by a second control circuit module. The second control circuit module is connected with the PMOS tube, and when receiving a switch control signal corresponding to disconnection, the second control circuit module adjusts the pressure difference between the source electrode and the grid electrode of the PMOS tube so as to enable the PMOS tube to be in a disconnection state. Wherein the second control circuit module can adjust the PMOS source gate voltage based on the turn-off of the first control circuit module. For example, the second control circuit module includes a resistor connected between source gates and serves as a pull-up circuit sub-module. When the first control circuit module is turned off, the resistor limits the PMOS source gate voltage to a voltage range less than the turn-on voltage threshold.

In some specific examples, the pull-up circuit submodule in the second control circuit module includes a switching tube mpull_up connected between the gate and the source of the PMOS tube. The source electrode and the drain electrode of the switch tube Mpull_up are correspondingly connected with the source electrode and the drain electrode of the PMOS tube respectively, and the grid electrode receives a switch control signal. Taking a high level in the switch control signal as an example, taking a PMOS type switch tube as the switch tube, when the switch control signal is at the high level, the PMOS type switch tube is disconnected, and the source grid voltage of the PMOS tube is controlled by the first control circuit module; when the switch control signal is at a low level, the PMOS type switch tube is turned on, and the source gate voltage of the PMOS type switch tube is turned off due to the conduction of the PMOS type switch tube.

In still other specific examples, the second control circuit module further includes a second switching circuit sub-module. The grid electrode of the switch tube Mpull_up is connected with the output end of the second switch circuit sub-module. The second switching circuit sub-module is controlled by the switching control signal, is turned on when receiving a switching control signal corresponding to turn-off to control the pull-up circuit sub-module to up regulate the voltage of the driving end, and is turned off when receiving a switching control signal corresponding to turn-on. As shown in fig. 7, the second switching circuit sub-module 33 includes a resistor R4, a switching tube M9, and a resistor R3 connected in series, where a gate of the switching tube M9 receives a switching control signal, a drain is connected to a power supply line through the resistor F4 and is connected to a gate of the switching tube mpull_up, and a source is grounded through the resistor R3. When the switch control signal indicates to be turned off, the switch tubes M9 and Mpull_up are both turned on, and the PMOS source grid voltages are almost equal so as to turn off the PMOS tubes; when the switch control signal indicates on, both the switch transistors M9 and mtull_up are off, and the PMOS source gate voltage is controlled by the first control circuit module 32.

In order to make the first control circuit module and the second control circuit module alternately control the gate of the PMOS transistor, the first switch circuit sub-module in the first control circuit module and the second switch circuit sub-module in the second control circuit module are controlled by different switch control signals. For example, when the first switching circuit sub-module is turned on when the switching control signal is high, the second switching circuit sub-module is turned off when the switching control signal is at a high level.

In some embodiments, to prevent the two control circuit modules from being triggered simultaneously by some interference, for example, hysteresis interference caused by charge and discharge of parasitic capacitance in the control circuit, the control circuit further includes a non-overlapping control signal generating unit (not shown) configured to output two non-overlapping switch control signals based on the received switch control signals, where the output first switch control signal is used to control the PMOS transistor to switch to an off state, and the output second switch control signal is used to control the PMOS transistor to switch to an on state. Specifically, as shown in fig. 7, the non-overlapping control signal generating unit is used as an access unit of the control circuit and the preceding control device, receives the switch control signal, and converts the received switch control signal into two differential switch control signals, namely a first switch control signal Pull-down and a second switch control signal Pull-up. The first control circuit can control the PMOS tube to be conducted based on the high level of the first switch control signal Pull-down, and control operation is not provided based on the low level of the first switch control signal; correspondingly, the second control circuit controls the PMOS tube to be disconnected based on the high level of the second switch control signal Pull-up, and a low level based on the second switch control signal Pull-up does not provide a control operation.

In the example of figure 7 which is now taken as an example, the control circuit controls the PMOS tube based on the switch control signal by the following control process: the non-overlapping control signal generating unit in the control circuit classifies the received switch control signals into two paths of non-overlapping switch control signals, namely a differential switch control signal, a first switch control signal Pull-down and a second switch control signal Pull-up. The first switch control signal Pull-Down is input to the first switch sub-module 322, and the second switch control signal Pull-up is input to the second switch sub-module 33. The first switch control signal Pull-down is consistent with the waveform of the switch control signal, and the second switch control signal Pull-up is opposite to the waveform of the switch control signal; both the first switching circuit sub-module 322 and the second switching circuit sub-module 331 are active high. That is, when the first switching control signal is at a high level and the second switching control signal is at a low level, the first switching circuit sub-module 322 is turned on and the second switching circuit sub-module 331 is turned off; when the first switch control signal is low and the second switch control signal is high, the first switch circuit sub-module 322 is off and the second switch circuit sub-module 331 is on. The sampling unit 31 formed by the sampling resistor R1, the first current mirrors (M1, M2) and the feedback resistor R2 in the control circuit converts the source-gate voltage difference of the PMOS transistor sampled by the sampling resistor R1 into a current flowing to the feedback resistor R2 through the first current mirrors (M1, M2), and outputs a feedback signal by using the feedback resistor R2, wherein the voltage of the feedback signal becomes larger as the source-gate voltage difference becomes larger. The current source sub-module 321 is connected to the sampling unit 31, wherein the power tube M3 performs the current source and the power tube M4 to convert the received feedback signal into a controlled electrical signal and transmit the controlled electrical signal to the first switching circuit sub-module 322, and when the first switching control signal Pull-down is at a high level, the inverter in the first switching circuit sub-module 322 converts the controlled electrical signal into a low level and outputs the low level to the switching tubes M5 and M6, wherein, M5 is disconnected, M6 is switched on, the controlled electric signal is transmitted between the grid electrode of the PMOS tube and the ground through the switched-on M6 and the second current mirrors (M7, M8) connected with the M6, and the driving electric signal flowing to the grid electrode of the PMOS tube is shunted, so that the driving electric signal is reduced along with the increase of the feedback electric signal.

It should be noted that the structure of each control circuit is only an example, and is not a limitation of the present application. The changes of the circuit structure performed by those skilled in the art under the technical ideas presented in the present application should be regarded as specific examples covered in the present application, and are not listed here. For example, the first switching circuit submodule is arranged in the sampling unit so that the first current mirror starts or stops sampling based on the switching control signal. For another example, the first switching circuit sub-module is disposed before the current source sub-module so that the current source sub-module starts or stops converting the feedback signal into the controlled electrical signal based on the switching control signal, and so on.

The application also provides a chip. The chip comprises a control circuit for controlling the on and off of the PMOS tube. The control circuit is shown in fig. 3-7 and the corresponding descriptions thereof, and is not described herein.

Referring to fig. 8, a schematic package diagram of a chip including the control circuit is shown. The chip includes a plurality of pins, wherein the pins include: a first pin (VCC) for connecting a power supply line, a second pin (GND) for grounding, a third pin (EN) for receiving a switch control signal, and the like. When the constant voltage power supply in the control circuit is an external power supply, the chip further comprises a fourth pin (VDD) for connecting the constant voltage power supply, and the like. According to the integrated circuit structure of the chip, the chip can further comprise a fifth pin (G) connected with the grid electrode of the PMOS tube, wherein the PMOS tube is a switching tube and is controlled by a control circuit in the chip. Or the PMOS tube is integrated in the chip, and correspondingly, the chip is provided with a sixth pin for connecting the drain electrode of the PMOS tube with an external subsequent circuit. Wherein the subsequent circuitry includes, but is not limited to: resonant circuits, loads, etc.

In some embodiments, in order to control the PMOS transistor with the higher driving power, the chip includes a switch circuit, where the switch circuit includes the first control circuit and the first PMOS transistor, the switch circuit is configured to control the second PMOS transistor to change from the on state to the off state, and in order to implement the second PMOS transistor to change from the off state to the on state, the chip further includes a second control circuit. Fig. 9 is a schematic diagram showing a structure in which the first control circuit 41, the first PMOS transistor 42, and the second control circuit 44 are respectively connected to the second PMOS transistor 43. The first control circuit 41 and the first PMOS transistor 42 are as described in any one of fig. 3 to 7, and in this example, the first control circuit 41 and the first PMOS transistor 42 are used to control the second PMOS transistor 43 to turn into the off state. The second control circuit 44 is configured to control the second PMOS transistor 43 to change from the off state to the on state. The second control circuit 44 provides a driving electric signal to the gate of the second PMOS transistor 43 based on the received switching control signal; during the transition from the off state to the on state of the second PMOS transistor 43, the driving electric signal and the voltage difference between the source and the gate of the second PMOS transistor 43 are in a reverse variation relationship.

In a specific example, as shown in fig. 9, the second control circuit 44 includes a sampling unit 441 and a first control circuit module 442. The sampling unit 441 is connected to the gate of the second PMOS transistor 43, and samples the voltage difference between the source and the gate of the second PMOS transistor 43 and outputs the voltage difference as a feedback signal. The first control circuit module 442 is also connected to the gate of the second PMOS transistor 43, and adjusts the driving electrical signal output to the gate of the PMOS transistor based on the change of the received feedback signal.

The sampling unit and the first control circuit module in the second control circuit are identical or similar to the sampling unit and the first control circuit module in the first control circuit, respectively, and are not described in detail here. The first control circuit block 412 in the first control circuit 41 is active high and the first control circuit block 442 in the second control circuit 44 is active low as shown in fig. 9. When the switch control signal takes the high level as the off command, the first control circuit module 412 in the first control circuit 41 is turned on and the second control circuit 44 is turned off, so that the first PMOS transistor 42 is turned on and the second PMOS transistor 43 is turned off; when the switch control signal takes the low level as the on command, the first control circuit module 412 in the first control circuit 41 is turned off and the second control circuit 44 is turned on, so that the first PMOS transistor 42 is turned off and the second PMOS transistor 43 is turned on.

According to design requirements, the chips can be integrated with multi-stage PMOS tubes and control circuits thereof, wherein in the adjacent cascade PMOS tubes, a former-stage PMOS tube and a corresponding control circuit are used as a pull-up circuit sub-module of a latter-stage PMOS tube so as to realize the disconnection control of the latter-stage PMOS tube, and thus the switch control of the PMOS tube with high driving power is realized.

The chip can be integrated with a plurality of switch circuits shown in fig. 7 and 9, and a control circuit in each switch circuit independently controls the connected PMOS tube. The connected PMOS tube can be integrated in a chip or connected with a switch circuit in the chip through a chip pin.

In some specific examples, please refer to fig. 10 and 11, wherein fig. 10 shows that a plurality of control circuits and connected PMOS transistors are connected in parallel and the sources of the PMOS transistors are commonly connected to the same power supply line, and fig. 11 shows that a plurality of control circuits and connected PMOS transistors are connected in parallel and the sources of the PMOS transistors are individually connected to the power supply lines. Taking an LED load as an example, the rear-stage circuit of each PMOS tube comprises an LED load, and each PMOS tube can be independently connected into each power supply circuit or commonly connected into the same power supply circuit according to the design requirement of the rear-stage circuit connected with each PMOS tube and the front-stage circuit connected with each control circuit; the front-stage control device of each control circuit can output PWM signals with corresponding duty ratios to the respective control circuit based on the light mode options selected by the user, and each control circuit independently controls the PMOS tube according to the received PWM signals so as to control the light intensity and the light frequency of each LED load.

In other specific examples, please refer to fig. 12, which shows a schematic circuit structure of a plurality of PMOS transistors controlled in series by a control circuit. Still take the LED load as an example, each PMOS tube is connected in series and each PMOS tube is connected with the LED load independently, and each control circuit is controlled by PWM signals provided by a front-stage control device, wherein the front-stage control device outputs PWM signals with corresponding duty ratios to each control circuit based on dimming intensity options selected by users so as to provide dimming control with fine light intensity variation and wide light intensity variation range.

The application also provides a switching device which is applied to various driving systems and control systems in a mode of a chip or integrated on a PCB. The switching device takes a PMOS tube as a switching device, and specifically comprises at least one switching circuit. The switch circuit comprises any one of control circuits and PMOS tubes shown in figures 3-7. And the grid electrode of the PMOS tube is connected with the control circuit. The control circuit provides a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal, and the PMOS tube is switched between a conducting state and a disconnecting state based on the driving electric signal; and during the period of controlling the PMOS tube to switch from the off state to the on state, the driving electric signal and the pressure difference between the source electrode and the grid electrode of the PMOS tube are in an inverse change relation.

When the switching device performs a conducting operation based on the received switching control signal, a first control circuit module in the control circuit provides a driving electric signal which changes reversely with the source grid voltage by utilizing the source grid voltage of the PMOS tube provided by the sampling unit so as to accelerate the change of the PMOS tube from the off state to the on state; when the switching device executes the switching-off operation based on the received switching control signal, a second control circuit module in the control circuit utilizes the switching tube to instantly reduce the source grid voltage of the PMOS tube below the threshold of the conducting voltage so as to accelerate the change of the PMOS tube from the conducting state to the disconnecting state.

In some embodiments, the PMOS transistor in the switch circuit needs to be driven by a multi-stage PMOS transistor to achieve connection and disconnection, so that the switch circuit further includes another control circuit, for distinguishing the foregoing one control circuit from the present other control circuit, the foregoing one control circuit is referred to as a first control circuit, the PMOS transistor connected to the first control circuit is a first PMOS transistor, the other control circuit is referred to as a second control circuit, and the PMOS transistor connected to the second control circuit is a second PMOS transistor. As shown in fig. 9, the first control circuit 41 and the first PMOS transistor 42 are configured to control the second PMOS transistor 43 to change from the on state to the off state, and the second control circuit 44 is configured to control the second PMOS transistor 43 to change from the off state to the on state. The circuit structure and the operation of the switching circuit are the same as or similar to those of the switching circuit described in the foregoing chip, and will not be described in detail herein.

In still other embodiments, as shown in fig. 10-12, the switching device includes a plurality of switching circuits, and the control circuit in each switching circuit individually controls the connected PMOS transistor. The circuit structure and the operation of the switching circuit are the same as or similar to those of the switching circuit of fig. 10 to 12 described in the foregoing chip, and will not be described herein.

The present application also provides a control method, please refer to fig. 13, which shows a flowchart of the control method in an embodiment. The control method is performed by any of the aforementioned control circuits, or other control systems capable of performing the control method.

In step S110, a switch control signal is acquired. The switch control signal can be a PWM signal or other square wave signal provided by a front-stage control device. Here, the front-end control device may be a device having digital operation and logic processing capabilities, which may include a CPU, MCU, or other programmable logic device, etc., but is not limited thereto. For example, the front-stage control device is a control panel of an LED load, and outputs a corresponding switch control signal to the control circuit according to an instruction of a user operation. For another example, the front-stage control device is a feedback control circuit, and outputs a corresponding switch control signal to the control circuit according to the information obtained through feedback processing.

In step S120, based on the on or off state indicated by the switch control signal, the PMOS transistor is controlled to perform a corresponding on or off operation.

Here the number of the elements to be processed is, the control circuit designs its response control according to on and off instructions indicated by a switch control signal of the connected preceding control device. For example, when the switch control signal is high level and indicates a turn-on instruction, the control circuit needs to reduce the gate voltage of the PMOS transistor so that the source-gate voltage difference of the PMOS transistor is greater than or equal to the voltage threshold of the turn-on of the semiconductor device, so as to realize the turn-on of the PMOS transistor; when the switch control signal is low level and represents an off command, the control circuit needs to increase the grid voltage of the PMOS tube so that the source grid voltage difference of the PMOS tube is smaller than the voltage threshold value to realize the off of the PMOS tube. It should be understood that, according to design requirements, the control circuit may also perform turning on the PMOS transistor based on the low-level switch control signal, and perform turning off the PMOS transistor based on the high-level switch control signal.

When the obtained switch control signal indicates that the PMOS tube is turned on, outputting a driving electric signal to the grid electrode of the PMOS tube; and during the transition period from the disconnection state to the connection state of the PMOS tube, the driving electric signal and the source grid voltage difference of the PMOS tube are in an inverse change relation.

By means of the electric connection relation with the PMOS source grid electrode, the control circuit (or the control system) can acquire the source grid electrode pressure difference of the PMOS tube, when receiving a switch control signal representing conduction, the control circuit (or the control system) converts the pressure difference into a driving electric signal which is opposite to the pressure difference by means of a controlled source technology or a mirror current technology, so that the source grid electrode pressure difference of the PMOS tube is gradually increased, and meanwhile, the current of the driving electric signal is gradually reduced, and therefore the time period that the pressure difference between the grid electrodes and the sources of the PMOS tube reaches a conduction threshold value is shortened.

In some embodiments, the control circuit samples a voltage difference between the source and the gate of the PMOS transistor and outputs the voltage difference as a feedback signal. The control circuit provides a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal and the feedback signal.

The control circuit comprises a sampling resistor arranged between source gates of the PMOS tubes, and the feedback signal is represented by voltage at one end of the sampling resistor. Taking the gate-driven PMOS transistor shown in fig. 5 as an example, the voltage difference between the source and the gate of the PMOS transistor is adjusted by adjusting the gate voltage, so the feedback signal is represented by the voltage at one side of the sampling resistor connected to the gate.

In some embodiments, sampling an electrical signal of a source gate of the PMOS transistor; converting the sampled electrical signal into a feedback signal using a current mirror; and converting the feedback signal into a driving electric signal based on the switch control signal and outputting the driving electric signal to the grid electrode of the PMOS tube.

As shown in fig. 5, the sampling unit in the control circuit includes a sampling resistor R1, a first current mirror (M1, M2) and a feedback resistor R2, where sources of two triodes (M1, M2) of the first current mirror and sources of PMOS tubes are connected to a power supply line together, an input end of the first current mirror is connected to the sampling resistor R1, an output end of the first current mirror is connected to the feedback resistor R2 and grounded through the resistor R2, and an output end of the first current mirror is also used to connect to the control unit. The sampling resistor R1 collects the pressure difference between the source grid electrodes of the PMOS tube through the first current mirror, and converts the pressure difference into a feedback signal through the first current mirror to be provided for the control unit. The input end current and the output end current of the first current mirror can be M1, wherein M is a fixed value which is smaller than 1, equal to 1 or larger than 1. When the PMOS tube is controlled to be switched from the off state to the on state, the voltage difference of the grid electrode of the PMOS tube source is gradually increased as shown in fig. 1, the voltage difference at two ends of the sampling resistor is also increased, the current output to the feedback resistor R2 by the first current mirror is gradually increased through the mirror image transmission of the first current mirror, and correspondingly, the voltage at the end of the feedback resistor R2 is gradually increased, namely the feedback signal output from the feedback resistor R2 is increased.

In the structure of the control circuit shown in fig. 5, the PMOS transistor is controlled by the control unit 12 in the control circuit. The control unit 12 specifically controls the voltage difference before the source gate of the PMOS transistor by adjusting the current flowing to the gate of the PMOS transistor, thereby implementing on or off of the PMOS transistor. When the control unit 12 receives the on switch control signal, the received feedback signal is transmitted to the current branch where the PMOS transistor gate is located, so that the gate voltage is reduced based on the increase of the feedback signal. Thus, the conduction process of the PMOS transistor is affected by the gradual increase of the feedback signal, the driving electrical signal (current signal) provided to the gate gradually decreases, and when the PMOS transistor is turned on, the current of the driving electrical signal output to the gate is minimum. When the control unit 12 receives the switch control signal, the transmission line of the feedback signal can be disconnected, so that the change of the feedback signal cannot act on the current branch where the gate is located, and the gate voltage of the PMOS transistor is recovered to the voltage before the PMOS transistor is turned on, that is, the PMOS transistor is turned into the off state.

In some embodiments, step S120 further comprises converting the feedback signal into a controlled electrical signal, the controlled electrical signal having the same variation as the feedback signal; the received controlled electrical signal is converted into a driving electrical signal based on the received switching control signal and output.

The current source sub-module 221 is connected to the sampling unit 21, and is configured to output a controlled electric signal that varies according to the feedback signal. Here, a constant voltage power supply (VDD) is connected to the current source sub-module 221 to supply power to the active devices in the current source sub-module 221.

The current source sub-module 221 includes a controlled current source (not shown) connected to the output terminal of the sampling unit 21, and the output electrical signal thereof varies inversely with the feedback signal. For example, the controlled current source is a PMOS type power tube, the source thereof is connected to the constant voltage power supply (VDD), the gate thereof is connected to the output end of the sampling unit 21, the drain thereof is connected to the first switching circuit sub-module 222, when the control circuit receives a switching control signal indicating on, the voltage of the feedback signal outputted from the sampling unit 21 decreases, the gate voltage of the corresponding PMOS type power tube decreases, the current of the controlled electric signal outputted from the drain thereof increases, and thus the controlled electric signal and the feedback signal are in a reverse variation relationship, and the subsequent circuit sub-module in the first control circuit module 22 can scale the controlled electric signal so as to reversely adjust the driving electric signal outputted to the gate of the PMOS tube.

The driving circuit submodule is connected with the first switching circuit submodule and used for converting the received controlled electric signal into a driving electric signal and outputting the driving electric signal. Here, the driving circuit sub-module may output the controlled electric signal in the form of a current using a current mirror, the drive electric signal output to the grid electrode of the PMOS tube is regulated, and the purpose of regulating the source grid electrode voltage of the PMOS tube is realized. As shown in fig. 7, the driving circuit submodule 323 includes a second current mirror (M7, M8), wherein an input end of the second current mirror is connected to an output end of the first switching circuit submodule, and an output end of the second current mirror is connected to a gate of the PMOS transistor. The input current and the output current of the second current mirror are 1:N, wherein, N can be one of a value less than 1, equal to 1 or greater than 1 according to the actual design requirement of the circuit and the choice of the PMOS tube. The input current and the output current of the current mirror are in mirror image change, and the current at the output end of the second current mirror is increased along with the voltage reduction of the feedback signal during the period that the PMOS tube is switched from the off state to the on state, so that the increasing speed of the voltage difference between the source grid electrodes of the PMOS tube is improved.

Here, it should be noted that the CMOS type and PMOS type electronic devices used in the above-mentioned control circuit are only examples, and are not limiting to the present application. In fact, both CMOS-type and PMOS-type electronics can be replaced according to actual design requirements. For example, the CMOS type switching transistor and the PMOS type switching transistor may be replaced with any one of a corresponding transistor (BJT), a Junction Field Effect Transistor (JFET), a depletion type (depletion) MOS power transistor, a thyristor dimmer, and the like.

When the control circuit receives a switch control signal indicating disconnection, step 122 is performed: and disconnecting the PMOS tube.

When the control circuit receives a switch control signal representing disconnection, a first control circuit module in the control circuit is disconnected, and the source grid voltage of the PMOS tube is controlled by a second control circuit module in the control circuit. The second control circuit module is connected with the PMOS tube, and when receiving a switch control signal corresponding to disconnection, the second control circuit module adjusts the pressure difference between the source electrode and the grid electrode of the PMOS tube so as to enable the PMOS tube to be in a disconnection state. Wherein the second control circuit module can adjust the PMOS source gate voltage based on the turn-off of the first control circuit module. For example, the second control circuit module includes a resistor connected between source gates and serves as a pull-up circuit sub-module. When the first control circuit module is turned off, the resistor limits the PMOS source gate voltage to a voltage range less than the turn-on voltage threshold.

In some embodiments, step S120 further includes a step of controlling a pull-up circuit sub-module to up-regulate the gate voltage of the PMOS transistor based on the switch control signal so as to turn the PMOS transistor into the off state.

In still other specific examples, the second control circuit module further includes a second switching circuit sub-module. The grid electrode of the switch tube Mpull_up is connected with the output end of the second switch circuit sub-module. The second switching circuit sub-module is controlled by the switching control signal, and is conducted when receiving the switching control signal which is correspondingly disconnected so as to control the pull-up circuit sub-module to up-regulate the voltage of the driving end; and switching off when receiving a corresponding on switch control signal, thus switching off the up-regulation operation of the pull-up circuit sub-module. As shown in fig. 7, the second switching circuit sub-module 33 includes a resistor R4, a switching tube M9, and a resistor R3 connected in series, where a gate of the switching tube M9 receives a switching control signal, a drain is connected to a power supply line through the resistor F4 and is connected to a gate of the switching tube mpull_up, and a source is grounded through the resistor R3. When the switch control signal indicates to be turned off, the switch tubes M9 and Mpull_up are both turned on, and the PMOS source grid voltages are almost equal so as to turn off the PMOS tubes; when the switch control signal indicates on, both the switch transistors M9 and mtull_up are off, and the PMOS source gate voltage is controlled by the first control circuit module 32.

In order to make the first control circuit module and the second control circuit module alternately control the gate of the PMOS transistor, the first switch circuit sub-module in the first control circuit module and the second switch circuit sub-module in the second control circuit module are controlled by different switch control signals. For example, the first switching sub-module is turned on when the switching control signal is high, and the second switching sub-module is turned off when the switching control signal is high.

In some embodiments, to prevent the two control circuit modules from being triggered simultaneously by some interference, such as hysteresis interference caused by parasitic capacitance charging and discharging in the control circuit, the control method further includes a step (not shown) of outputting two non-overlapping switch control signals based on the received switch control signals, where the output first switch control signal is used to control the PMOS transistor to switch to an off state, and the output second switch control signal is used to control the PMOS transistor to switch to an on state. Specifically, the non-overlapping control signal generating unit is used as an access unit of the control circuit and the preceding-stage control device, receives the switch control signal, and converts the received switch control signal into two paths of differential switch control signals, namely a first switch control signal and a second switch control signal. The first control circuit can control the PMOS tube to be conducted based on the high level of the first switch control signal, and control operation is not provided based on the low level of the first switch control signal; correspondingly, the second control circuit controls the PMOS tube to be disconnected based on the high level of the second switch control signal, and the control operation is not provided based on the low level of the second switch control signal.

In summary, in the control circuit provided by the application, during the period that the PMOS transistor is turned from the off state to the on state, a driving electric signal which is inversely changed with the voltage difference between the source and the gate of the PMOS is provided, so that the gate voltage is more rapidly reduced, and the response speed of the PMOS transistor in conduction is effectively improved. In addition, as the PMOS tube gradually changes from the off state to the on state, the source-gate voltage difference gradually increases, so that the driving electric signal provided by the control circuit is reduced from large to small, and the aim of minimizing the consumption of the control circuit in the on period is also fulfilled.

The foregoing embodiments are merely illustrative of the principles of the present application and their effectiveness, and are not intended to limit the application. Modifications and variations may be made to the above-described embodiments by those of ordinary skill in the art without departing from the spirit and scope of the present application. Accordingly, it is intended that all equivalent modifications and variations which may be accomplished by persons skilled in the art without departing from the spirit and technical spirit of the disclosure be covered by the claims of this application.

Claims

1. The control circuit of the PMOS tube is characterized in that a driving electric signal is provided for the grid electrode of the PMOS tube based on the received switch control signal; the control circuit of the PMOS tube comprises a sampling unit and a control unit; the sampling unit samples the pressure difference between the source electrode and the grid electrode of the PMOS tube and outputs the pressure difference in a feedback signal form; the control unit is connected with the sampling unit and the grid electrode of the PMOS tube and is used for providing a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal and the feedback signal; and during the period of controlling the PMOS tube to switch from the disconnection state to the connection state, the driving electric signal and the pressure difference between the source electrode and the grid electrode of the PMOS tube are in an inverse change relation, and the driving electric signal and the feedback signal are in an inverse change relation.

2. The PMOS transistor control circuit of claim 1, wherein said sampling unit comprises:

the sampling resistor is connected with the grid electrode of the PMOS tube;

and the input end of the first current mirror is connected with the sampling resistor, and the output end of the first current mirror is connected with a feedback resistor for transmitting the sampling electric signal from the sampling resistor to the feedback resistor so as to form a feedback signal.

3. The PMOS transistor control circuit according to claim 2, wherein said control unit comprises: the first control circuit module is connected with the grid electrode of the PMOS tube;

and when receiving a corresponding on-off control signal, the first control circuit module adjusts a driving electric signal output to the grid electrode of the PMOS tube based on the change of the received feedback signal.

4. The PMOS transistor control circuit of claim 3, wherein said first control circuit module comprises:

the current source submodule is connected with the sampling unit and is used for outputting a controlled electric signal which changes according to the feedback signal;

the first switching circuit submodule receives the switching control signal and is connected with the current source submodule and used for being switched on or off along with the received switching control signal;

And the driving circuit submodule is connected with the first switching circuit submodule and used for converting the received controlled electric signal into a driving electric signal and outputting the driving electric signal.

5. The PMOS transistor control circuit of claim 4, wherein said current source submodule includes: a controlled current source.

6. The PMOS transistor control circuit of claim 1, wherein said control unit comprises: and the second control circuit module is connected with the PMOS tube, and when receiving a switch control signal corresponding to disconnection, the second control circuit module adjusts the pressure difference between the source electrode and the grid electrode of the PMOS to enable the PMOS tube to be in a disconnection state.

7. The PMOS transistor control circuit of claim 6, wherein said second control circuit module comprises:

and the pull-up circuit submodule is connected between the grid electrode and the source electrode of the PMOS tube.

8. The PMOS transistor control circuit of claim 7, wherein said second control circuit module further comprises: the second switch circuit sub-module is controlled by the switch control signal, is connected with the pull-up circuit sub-module, is turned on when receiving the switch control signal corresponding to the turn-off to control the pull-up circuit sub-module to up regulate the voltage of the drive end of the PMOS tube, and is turned off when receiving the switch control signal corresponding to the turn-on.

9. The PMOS transistor control circuit according to claim 1 or 6, further comprising: the non-overlapping control signal generation unit is used for outputting two paths of non-overlapping switch control signals based on the received switch control signals, wherein the output first switch control signal is used for controlling the PMOS tube to switch into an off state, and the output second switch control signal is used for controlling the PMOS tube to switch into an on state.

10. A switching device comprising at least one switching circuit;

the switching circuit includes: the control circuit and PMOS transistor of any of claims 1-9; wherein, the grid electrode of the PMOS tube is connected with the control circuit;

the control circuit provides a driving electric signal for the grid electrode of the PMOS tube based on the received switch control signal, and the PMOS tube is switched between a conducting state and a disconnecting state based on the driving electric signal; and during the period of controlling the PMOS tube to switch from the off state to the on state, the driving electric signal and the pressure difference between the source electrode and the grid electrode of the PMOS tube are in an inverse change relation.

11. The switching device of claim 10, wherein the switching circuit further comprises a second control circuit; the control circuit and the PMOS tube in the switch circuit are used for controlling the second PMOS tube to be switched from the on state to the off state, and the second control circuit is used for controlling the second PMOS tube to be switched from the off state to the on state.

12. The switching device according to claim 10 or 11, wherein the number of the switching circuits is plural, and the control circuit in each of the switching circuits individually controls the connected PMOS transistor.

13. A chip, comprising: a control circuit as claimed in any one of claims 1 to 9.

14. The chip of claim 13, further comprising a PMOS tube connected to the control circuit, wherein, at least one switch circuit is formed by the control circuit and the PMOS tube.

15. The chip of claim 14, wherein the switching circuit further comprises a second control circuit; wherein, the control circuit and the PMOS tube in the switch circuit are used for controlling the second PMOS tube to be switched from the on state to the off state, the second control circuit is used for controlling the second PMOS tube to be switched from an off state to an on state.

16. The chip of claim 14 or 15, wherein the number of the switch circuits is plural, and the control circuit in each switch circuit individually controls the connected PMOS transistor.

17. The control method is used for controlling the PMOS tube and is characterized by comprising the following steps:

Acquiring a switch control signal;

when the obtained switch control signal indicates that the PMOS tube is conducted, outputting a driving electric signal to the grid electrode of the PMOS tube; the step of outputting the driving electric signal to the grid electrode of the PMOS tube comprises the following steps: sampling the electric signal of the source grid electrode of the PMOS tube; converting the sampled electrical signal into a feedback signal by using a current mirror; converting the feedback signal into a driving electric signal based on the switch control signal and outputting the driving electric signal to the grid electrode of the PMOS tube; during the transition from the disconnection state to the connection state of the PMOS tube, the driving electric signal and the source grid voltage difference of the PMOS tube are in an inverse change relation;

and when the obtained switch control signal indicates to disconnect the PMOS tube, disconnecting the PMOS tube.

18. The control method according to claim 17, wherein the step of converting the feedback signal into a driving electrical signal based on a switch control signal and outputting the driving electrical signal to the gate of the PMOS transistor comprises:

converting the feedback signal into a controlled electrical signal, the controlled electrical signal having the same variation as the feedback signal;

and converting the received controlled electric signal into a driving electric signal based on the received switch control signal and outputting the driving electric signal to the grid electrode of the PMOS tube.

19. The control method of claim 17, wherein the step of disconnecting the PMOS transistor comprises:

and controlling a pull-up circuit submodule based on the switch control signal to up-regulate the grid voltage of the PMOS tube so as to enable the PMOS tube to be turned into an off state.

20. The control method according to claim 19, wherein when the obtained switch control signal indicates that the PMOS transistor is turned on, further comprising: and disconnecting the up-regulating operation of the pull-up circuit sub-module.

21. The control method according to claim 17, characterized by further comprising: and converting the acquired switch control signal into a first control signal for controlling the PMOS tube to be turned into a conducting state and a second control signal for controlling the PMOS tube to be turned into a disconnecting state.