CN108010918A - The production method of tft array substrate and tft array substrate - Google Patents
The production method of tft array substrate and tft array substrate Download PDFInfo
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- CN108010918A CN108010918A CN201711201198.XA CN201711201198A CN108010918A CN 108010918 A CN108010918 A CN 108010918A CN 201711201198 A CN201711201198 A CN 201711201198A CN 108010918 A CN108010918 A CN 108010918A
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- metal
- tft array
- array substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
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- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention provides a kind of tft array substrate and a kind of production method of tft array substrate, including:Substrate, light shield layer, insulating layer, polysilicon layer, gate insulator, gate metal, separation layer and data line metal;Wherein described gate metal includes the first grid metal and second grid metal being set up in parallel;The data line metal is connected with the first via and the second via respectively, and the data line metal is connected by the first via with the first grid metal;The data line metal is connected by the second via with the polysilicon layer.The present invention provides a kind of tft array substrate and a kind of production method of tft array substrate, by adding a gate metal on gate insulator, so that data line metal is connected with the gate metal by the via of both sides above gate metal, so as to avoid the problem that causing tft array substrate that vertical broken string occurs since broken string occurring when data line metal forms a film, and then the production yield of tft array substrate is greatly improved.
Description
Technical field
The present invention relates to display technology field, and in particular to a kind of making side of tft array substrate and tft array substrate
Method.
Background technology
Thin Film Transistor-LCD (Thin film transistor-liquid crystal display, TFT-
LCD) have the advantages that low-voltage, micro energy lose, display contain much information, are easy to colorization, occupied in current monitor market
Leading position.It has been widely used in the electricity such as electronic computer, electronic notebook, mobile phone, video camera, high-definition television
Sub- equipment.
TFT-LCD display panels use dual-gated design more at present, as shown in Figure 1, the tft array substrate includes:Substrate
111st, light shield layer 112, insulating layer 113, polysilicon layer 12, gate insulator 13, gate metal 14, via 17,15 and of separation layer
Data line metal 16;Wherein, the data line metal 16 in each pixel and gate line 14 use the metal wire of different layers, gold respectively
Separated between category 16 and 14 gate line of data cable by one layer of separation layer 15.
High definition display panel has production technology the challenge of higher while our finer and smoother display pictures are brought,
All metal wires are required normally to connect conduction;But in the actual production process, often because data line metal 16
Data line metal broken string 18 occurs in film forming procedure causes display panel vertical broken string occur, it is difficult to repairs, causes display panel
Rise can not be just often occurred, influences the production yield of display panel.
The content of the invention
The present invention provides a kind of tft array substrate and a kind of production method of tft array substrate, to solve metallic data
Line causes tft array substrate vertical broken string occur in film forming procedure since data line metal breaks, so that display panel
The problem of can not normally showing.
To achieve the above object, technical solution provided by the invention is as follows:
According to an aspect of the present invention, the present invention provides a kind of tft array substrate, the tft array substrate to include:
Substrate;
Light shield layer, is arranged at the surface of the substrate;
Insulating layer, is covered in the surface of the substrate and the light shield layer
Polysilicon layer, is arranged at the top of the insulating layer;
Gate insulator, is covered in the surface of the polysilicon layer and the substrate;
Gate metal, is arranged at the surface of the gate insulator, including the first grid metal being set up in parallel and second
Gate metal;
Separation layer, is arranged at the top of the gate insulator and the gate metal;
Data line metal, is arranged at the insulation surface, the data line metal respectively with the first via and the second mistake
Hole is connected;
Wherein, the data line metal is connected by the first via with the first grid metal;The data line metal
It is connected by the second via with the polysilicon layer.
According to one preferred embodiment of the present invention, first via includes the first via of the first via of head end and tail end.
According to one preferred embodiment of the present invention, the first grid metal for strip metal and is located at the second grid
Between metal, the first grid metal and second grid metal are alternately distributed.
Described according to one preferred embodiment of the present invention the first via of head end and the first via of the tail end are located at described first
The upper surface at gate metal both ends, and be connected with the data line metal.
According to one preferred embodiment of the present invention, first via runs through the separation layer by the data line metal and institute
State first grid metal to be connected, second via sequentially passes through the separation layer and the gate insulator by the metal number
It is connected according to line with polysilicon layer.
According to one preferred embodiment of the present invention, the substrate include be cascading rigid substrate, light shield layer and absolutely
Edge layer.
According to another aspect of the present invention, the present invention provides a kind of production method of tft array substrate, the TFT
The production method of array base palte includes:
Step S10, a substrate is provided, side sets gradually light shield layer and insulating layer on the substrate;
Step S20, polysilicon layer is prepared in the substrate surface;
Step S30, gate insulator is prepared on the polysilicon layer surface;
Step S40, prepare gate metal in the gate insulator layer surface, the gate metal include being set up in parallel the
One gate metal and second grid metal;
Step S50, separation layer is formed on the gate metal surface;
Step S60, the first via and the second via are prepared, first via is through the separation layer and the first grid
Pole metal is connected, and second via is connected through the separation layer and the gate insulator and with the polysilicon layer;
Step S70, data line metal is formed in the insulation surface;
Wherein, the data line metal is connected by the first via with the first grid metal;The data line metal
It is connected by the second via with the polysilicon layer.
According to one preferred embodiment of the present invention, it is characterised in that first via includes the first via of head end and tail end
First via.
According to one preferred embodiment of the present invention, the first grid metal for strip metal and is located at the second grid
Between metal, the first grid metal and second grid metal are alternately distributed.
According to one preferred embodiment of the present invention, first via of head end and the first via of the tail end are located at described first
The upper surface at gate metal both ends, and be connected with the data line metal.
The present invention provides a kind of tft array substrate and a kind of production method of tft array substrate, by gate insulator
A gate metal is added on layer so that via phase of the data line metal with the gate metal by both sides above gate metal
Even, so as to avoid the problem that causing tft array substrate that vertical broken string occurs since broken string occurring when data line metal forms a film, and then
The production yield of tft array substrate is greatly improved.
Brief description of the drawings
, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution of the prior art
Attached drawing is briefly described needed in description, it should be apparent that, drawings in the following description are only some invented
Embodiment, for those of ordinary skill in the art, without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is that the structure diagram vertically to break occurs for the tft array substrate data line metal of the prior art;
Fig. 2 is the structure diagram of the tft array substrate of the embodiment of the present invention;
Fig. 3 is the flow chart of the tft array substrate production method of the embodiment of the present invention;
Fig. 4 a-4g are the structure diagram of the tft array substrate production method flow of the embodiment of the present invention.
Embodiment
The explanation of following embodiment is with reference to additional diagram, to illustrate the particular implementation that the present invention can be used to implementation
Example.The direction term that the present invention is previously mentioned, such as [on], [under], [preceding], [rear], [left side], [right side], [interior], [outer], [side]
Deng being only the direction with reference to annexed drawings.Therefore, the direction term used is to illustrate and understand the present invention, and is not used to
The limitation present invention.In figure, the similar unit of structure is with being given the same reference numerals.
The present invention is directed in existing tft array substrate and tft array substrate manufacturing technology, when being formed a film due to data line metal
The problem of generation broken string causes tft array substrate that vertical broken string occurs, and propose the production method and one kind of a kind of TFT substrate
The production method of OLED display, the present embodiment can improve the defect.
The present invention is described further with specific embodiment below in conjunction with the accompanying drawings:
Fig. 2 is the structure diagram of tft array substrate in the embodiment of the present invention, and Fig. 3 is the production method of tft array substrate
Flow chart, Fig. 4 are the structure diagram of the tft array substrate production method flow of the embodiment of the present invention, and the present invention provides one
The structure diagram of kind tft array substrate, the tft array substrate include:
Substrate 211, the substrate are usually glass substrate;
Light shield layer 212, the light shield layer 212 can be that metallic plate can also be non-metal board, usually golden with second grid
The position of category 24 is corresponding, and positioned at the underface of second grid metal 24;
Insulating layer 213, the insulating layer 213 are completely covered by the surface of the light shield layer 212 and the substrate 211.
Generally, the insulating layer 213 can be silicon nitride and silica, the effect of insulating layer 213 is isolation substrate
211 and polysilicon layer 22, to prevent the metal ion in substrate 211 to be diffused into polysilicon layer 22, reduce the shape of defect center
Into and leakage current generation.
Polysilicon layer 22, is arranged at the surface of the substrate 21;
Common, the polysilicon layer 22 is active layer, and polysilicon layer 22 includes being located at two outside source electrode heavy doping respectively
Area and drain electrode heavily doped region, and the channel region between the source electrode heavily doped region and drain electrode heavily doped region.
Gate insulator 23, is covered in the surface of the polysilicon layer 22 and the substrate 21;
Common, gate insulator 23 is also gate oxide, it is covered on the polysilicon layer 22, as polysilicon
The interface of layer 22 and grid, for can be silicon nitride by polysilicon layer 22 and gate isolation, the gate insulator 23, or
It is one layer of silicon nitride and layer of silicon dioxide.
Gate metal, is arranged at the surface of the gate insulator 23, including 28 He of first grid metal being set up in parallel
Second grid metal 24;
Gate metal is arranged on gate insulator 23, and the first grid metal 28 and second grid metal 24 are located at
In same level, and the first grid metal 28 is alternately distributed with the second grid metal.
In embodiments of the present invention, first grid metal 28 is strip metal, and second grid metal 24 is reguline metal,
Preferably, the width of the first grid metal 28 and the second grid metal 24 are of same size, but the first grid
The length of pole metal 28 is far more than the second grid metal 24.
The reason for so setting is, in the present invention is implemented, one spare metal of conduct of the first grid metal 28
Data cable uses, although keeping apart with data wire lines 27 through separation layer 25, passes through the first via 29 and data wire lines
27 are connected so that and when vertical broken string occurs for data wire lines, electric current can still be turned on by first grid metal 28, so that
Tft array substrate is avoided vertically to break the generation of phenomenon.
Furthermore grid generally use aluminium and aluminium alloy are formed.
Separation layer 25, is arranged at the top of the gate insulator 23 and the grid;
The separation layer 25 can be one layer, or two layers;When separation layer 25 is one layer, this layer can be oxygen
SiClx, silicon nitride or aluminium oxide;When separation layer 25 is two layers, first layer is silicon dioxide film, in order to improve the quality of film,
Second layer silicon nitride is added on silicon dioxide film.
Data line metal 26, is arranged at 25 surface of separation layer, the data line metal 26 respectively with the first via 29
It is connected with the second via 27.
Wherein, the data line metal 26 is connected by the first via 29 with the first grid metal 28;The metal
Data cable is connected by the second via 27 with the polysilicon layer 22.
As shown in Fig. 2, first via 29 includes the first via of the first via of head end and tail end, first mistake of head end
Hole and the first via of tail end connect the both ends with the first grid metal 28 respectively.
First via 29 runs through the separation layer 25 by the data line metal 26 and the first grid metal 28
It is connected, second via 27 sequentially passes through the separation layer 25 and the gate insulator 23 by 26 He of data line metal
Polysilicon layer 22 is connected.
According to another embodiment of the present invention, as shown in Fig. 3 and Fig. 4 a-4g, the present invention provides a kind of tft array substrate
Production method, the production method of the tft array substrate includes:
As shown in fig. 4 a, step S10, a substrate 311 is provided, 312 He of light shield layer is sequentially arranged above in the substrate 311
Insulating layer 313;
As shown in Figure 4 b, step S20, polysilicon layer 32 is prepared on 311 surface of substrate;
As illustrated in fig. 4 c, step S30, gate insulator 33 is prepared on 32 surface of polysilicon layer;
As shown in figure 4d, gate metal, the gate metal bag step S40, are prepared on 33 surface of gate insulator
Include the first grid metal 38 and second grid metal 34 being set up in parallel;
As shown in fig 4e, step S50, separation layer 35 is formed on the gate metal surface;
As shown in fig. 4f, the first via 39 and the second via 37 step S60, are prepared, first via 39 is through described
Separation layer 35 is connected with the first grid metal 38, and second via 37 runs through the separation layer 35 and the gate insulator
Layer 33 is simultaneously connected with the polysilicon layer 32;
As shown in figure 4g, step S70, data line metal 36 is formed on 35 surface of separation layer;
Wherein, the data line metal 36 is connected by the first via 39 with the first grid metal 38, the metal
Data cable 36 is connected by the second via 37 with the polysilicon layer 33.
The production method principle of tft array substrate is consistent with above-mentioned tft array substrate principle in the present embodiment, can specifically join
The operation principle of the tft array substrate of above preferred embodiment is examined, is no longer repeated herein.
The present invention provides a kind of tft array substrate and a kind of production method of tft array substrate, by gate insulator
A gate metal is added on layer so that via phase of the data line metal with the gate metal by both sides above gate metal
Even, so as to avoid the problem that causing tft array substrate that vertical broken string occurs since broken string occurring when data line metal forms a film, and then
The production yield of tft array substrate is greatly improved.
In conclusion although the present invention is disclosed above with preferred embodiment, above preferred embodiment simultaneously is not used to limit
The system present invention, those of ordinary skill in the art, without departing from the spirit and scope of the present invention, can make various changes and profit
Decorations, therefore protection scope of the present invention is subject to the scope that claim defines.
Claims (10)
1. a kind of tft array substrate, it is characterised in that the tft array substrate includes:
Substrate;
Light shield layer, is arranged at the surface of the substrate;
Insulating layer, is covered in the surface of the substrate and the light shield layer
Polysilicon layer, is arranged at the top of the insulating layer;
Gate insulator, is covered in the surface of the polysilicon layer and the substrate;
Gate metal, is arranged at the surface of the gate insulator, including the first grid metal and second grid being set up in parallel
Metal;
Separation layer, is arranged at the top of the gate insulator and the gate metal;
Data line metal, is arranged at the insulation surface, the data line metal respectively with the first via and the second via phase
Even;
Wherein, the data line metal is connected by the first via with the first grid metal;The data line metal passes through
Second via is connected with the polysilicon layer.
2. tft array substrate according to claim 1, it is characterised in that first via includes the first via of head end
With the first via of tail end.
3. tft array substrate according to claim 2, it is characterised in that the first grid metal is strip metal
And between the second grid metal, the first grid metal and second grid metal are alternately distributed.
4. tft array substrate according to claim 3, it is characterised in that first via of head end and the tail end
One via is located at the upper surface at the first grid metal both ends, and is connected with the data line metal.
5. tft array substrate according to claim 1, it is characterised in that first via will through the separation layer
The data line metal is connected with the first grid metal, and second via sequentially passes through the separation layer and the grid
The data line metal is connected by insulating layer with polysilicon layer.
6. tft array substrate according to claim 1, it is characterised in that the insulating layer is arranged at described.
7. a kind of production method of tft array substrate, it is characterised in that the production method of the tft array substrate includes:
Step S10, a substrate is provided, side sets gradually light shield layer and insulating layer on the substrate;
Step S20, polysilicon layer is prepared in the surface of insulating layer;
Step S30, gate insulator is prepared on the polysilicon layer surface;
Step S40, gate metal is prepared in the gate insulator layer surface, the gate metal includes the first grid being set up in parallel
Pole metal and second grid metal;
Step S50, separation layer is formed on the gate metal surface;
Step S60, the first via and the second via are prepared, first via is through the separation layer and first grid gold
Symbolic animal of the birth year connects, and second via is connected through the separation layer and the gate insulator and with the polysilicon layer;
Step S70, data line metal is formed in the insulation surface;
Wherein, the data line metal is connected by the first via with the first grid metal, and the data line metal passes through
Second via is connected with the polysilicon layer.
8. the production method of tft array substrate according to claim 7, it is characterised in that first via includes head
Hold the first via of the first via and tail end.
9. the production method of tft array substrate according to claim 8, it is characterised in that the first grid metal is
Strip metal and between the second grid metal, the first grid metal and second grid metal are alternately distributed.
10. the production method of tft array substrate according to claim 9, it is characterised in that first via of head end and
First via of tail end is located at the upper surface at the first grid metal both ends, and is connected with the data line metal.
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Cited By (1)
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CN109037240A (en) * | 2018-07-27 | 2018-12-18 | 京东方科技集团股份有限公司 | Array substrate and preparation method thereof, display panel, display device |
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CN105742296A (en) * | 2016-03-31 | 2016-07-06 | 上海天马有机发光显示技术有限公司 | Array substrate, fabrication method thereof, display panel and display device |
US20160225838A1 (en) * | 2015-02-02 | 2016-08-04 | Samsung Display Co., Ltd. | Organic light emitting diode display |
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CN1619837A (en) * | 2003-09-03 | 2005-05-25 | 三星Sdi株式会社 | Active matrix organic light emitting device having series thin film transistor, and fabrication method therefor |
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