CN108008660A - Orthogonal signalling high-speed, high precision processing method based on DSP and FPGA - Google Patents

Orthogonal signalling high-speed, high precision processing method based on DSP and FPGA Download PDF

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CN108008660A
CN108008660A CN201710652068.1A CN201710652068A CN108008660A CN 108008660 A CN108008660 A CN 108008660A CN 201710652068 A CN201710652068 A CN 201710652068A CN 108008660 A CN108008660 A CN 108008660A
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夏豪杰
胡梦雯
张海铖
李维诗
于连栋
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Hefei University of Technology
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Abstract

本发明公开了一种基于DSP和FPGA的正交信号高速高精度处理方法,包括FPGA工业级处理器和DSP两部分,FPGA工业级处理器、DSP通过双口RAM实现数据通信;以DSP为数据处理核心,负责主要的数学变换计算;以FPGA为协处理器,负责所有数字逻辑控制,实现对正交信号的采集、均值滤波、误差补偿、实时相位计算、相位细分辨向及相关数据的存储和显示;DSP通过矩阵运算计算FPGA采集的正交信号数据的误差补偿参数,并通过双口RAM通信将误差补偿参数传入FPGA。本发明在信号采集、传输、修正、细分辨向到数据存储整个过程中,DSP与FPGA分工协作,既能够满足系统实时性要求,又实现了正交信号的高精度处理。

The invention discloses a high-speed and high-precision processing method for orthogonal signals based on DSP and FPGA, including two parts: an FPGA industrial-grade processor and a DSP. The FPGA industrial-grade processor and the DSP realize data communication through a dual-port RAM; the DSP is used as the data The processing core is responsible for the main mathematical transformation calculation; the FPGA is used as the coprocessor, responsible for all digital logic control, and realizes the acquisition of quadrature signals, mean value filtering, error compensation, real-time phase calculation, phase fine resolution and storage of related data and display; DSP calculates the error compensation parameters of the quadrature signal data collected by FPGA through matrix operation, and transmits the error compensation parameters to FPGA through dual-port RAM communication. In the whole process of signal collection, transmission, correction, fine resolution and data storage, the present invention cooperates with DSP and FPGA, which can not only meet the real-time requirements of the system, but also realize high-precision processing of orthogonal signals.

Description

基于DSP和FPGA的正交信号高速高精度处理方法High-speed and High-precision Processing Method of Orthogonal Signal Based on DSP and FPGA

技术领域:Technical field:

本发明涉及精密测量领域,主要是一种基于DSP和FPGA的正交信号高速高精度处理方法。The invention relates to the field of precision measurement, and mainly relates to a high-speed and high-precision processing method for orthogonal signals based on DSP and FPGA.

背景技术:Background technique:

栅式传感器和激光干涉仪广泛应用于现代精密测量仪器、数控机床、光刻机、超精加工、量子物理学、生物分子学等领域,是现代精密测试典型的测量设备。因此提高栅式传感器和激光干涉仪精密距离测量技术的量程和精度具有重要的现实意义。在实际应用中,由于外界环境噪声、光学元件等制造误差、电子电路引入的电子噪声以及其他各种综合因素的影响,实际测得的两路信号中存在着交流幅值不等、直流电平分量以及正交误差等误差,最终影响位移测量精度。为了满足日益精密的测量要求和应用场合,栅式传感器和激光干涉仪也相应地向高分辨率、高精度、高测速等几个方向发展。Grid sensors and laser interferometers are widely used in modern precision measuring instruments, CNC machine tools, lithography machines, ultra-finishing, quantum physics, biomolecules and other fields, and are typical measurement equipment for modern precision testing. Therefore, it is of great practical significance to improve the range and precision of grid sensor and laser interferometer precision distance measurement technology. In practical applications, due to the influence of external environmental noise, manufacturing errors of optical components, electronic noise introduced by electronic circuits, and other comprehensive factors, there are unequal AC amplitudes and DC level components in the actually measured two-way signals. As well as errors such as quadrature error, they will ultimately affect the accuracy of displacement measurement. In order to meet the increasingly sophisticated measurement requirements and applications, grid sensors and laser interferometers are also correspondingly developing in several directions such as high resolution, high precision, and high speed measurement.

现有提升栅式传感器和激光干涉仪测量精度的方法主要是依托于传统的Heydemann椭圆修正方法。椭圆修正方法基于正交干涉信号参数实时估计的方法,利用数学模型对误差进行补偿,再通过细分辨向提升测量系统精度。基于 Heydemann椭圆修正方法的正交信号处理方法由于涉及数据采集、误差参数计算、误差补偿过程、细分辨向过程和存储显示等过程,对信号处理中各个环节的速度和处理精度都有非常高的要求,因此通常情况只可以进行正交信号离线分析与补偿,难以同时实现正交信号实时补偿和高精度处理。The existing methods for improving the measurement accuracy of grid sensors and laser interferometers mainly rely on the traditional Heydemann ellipse correction method. The ellipse correction method is based on the method of real-time estimation of orthogonal interference signal parameters, uses mathematical models to compensate errors, and then improves the accuracy of the measurement system through fine resolution. The quadrature signal processing method based on the Heydemann ellipse correction method involves data acquisition, error parameter calculation, error compensation process, fine resolution process, storage and display, etc., and has very high speed and processing accuracy in each link of signal processing. Therefore, it is usually only possible to perform offline analysis and compensation of quadrature signals, and it is difficult to realize real-time compensation and high-precision processing of quadrature signals at the same time.

发明内容:Invention content:

本发明专利的目的是解决正交信号在高精度处理过程存在的实时性差、集成度低、精度低等问题,优化正交信号测量系统输出测量数据的精度、分辨率、实时性等指标,提供了一种体积小、使用灵活、功耗小、性能高、响应速度快的基于DSP和FPGA的正交信号高速高精度处理方法;该方法能够克服外界环境噪声、光学元件等制造误差、电子电路引入的电子噪声以及其他各种综合因素制约,基于FPGA和DSP架构,提高信号处理速度和信号处理精度,扩大了零差干涉仪等光学仪器的使用范围,为高精度光栅信号分析与误差高速补偿提供硬件解决方案。The purpose of this invention patent is to solve the problems of poor real-time performance, low integration and low precision in the high-precision processing process of quadrature signals, optimize the precision, resolution, real-time performance and other indicators of the measurement data output by the quadrature signal measurement system, and provide A high-speed and high-precision processing method of orthogonal signals based on DSP and FPGA with small size, flexible use, low power consumption, high performance and fast response speed; this method can overcome external environmental noise, manufacturing errors of optical components, electronic circuits, etc. The introduction of electronic noise and other comprehensive factors, based on the FPGA and DSP architecture, improves the signal processing speed and signal processing accuracy, expands the use range of optical instruments such as homodyne interferometers, and provides high-precision grating signal analysis and high-speed error compensation. Provide hardware solutions.

为实现上述目的,本发明专利采用的技术方案是:In order to achieve the above object, the technical scheme adopted by the patent of the present invention is:

一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:包括FPGA工业级处理器(2)和DSP(3)两部分,FPGA工业级处理器(2)、 DSP(3)通过双口RAM(10)实现数据通信;所述方法的具体实现步骤如下:A high-speed and high-precision processing method for orthogonal signals based on DSP and FPGA, characterized in that: it includes two parts: FPGA industrial-grade processor (2) and DSP (3), FPGA industrial-grade processor (2), DSP (3) Realize data communication by dual-port RAM (10); The concrete realization steps of described method are as follows:

首先,光强信号经光电转换及信号调理电路(1)输出包含位移信息的模拟正交电压信号,由FPGA工业级处理器(2)驱动AD采样模块(4)对信号进行高速模数转换,并在FPGA工业级处理器(2)中经过均值滤波(5)得到进一步优化的正交信号数据,由FPGA工业级处理器(2)写入双口RAM(10)进行存储和高速缓冲;First, the light intensity signal outputs an analog orthogonal voltage signal containing displacement information through the photoelectric conversion and signal conditioning circuit (1), and the FPGA industrial-grade processor (2) drives the AD sampling module (4) to perform high-speed analog-to-digital conversion on the signal. And in the FPGA industrial-grade processor (2), obtain further optimized orthogonal signal data through mean filtering (5), and write it into the dual-port RAM (10) by the FPGA industrial-grade processor (2) for storage and high-speed buffering;

随后,DSP(3)通过EMIF接口外扩存储器的方式,读取双口RAM(10)中的正交信号数据,并对采样数据进行筛选(11),剔除异常点,接着通过矩阵运算计算补偿参数(12),并将补偿参数写入双口RAM(10)和SDRAM(13)中,再由FPGA工业级处理器(2)读取;Subsequently, the DSP (3) reads the quadrature signal data in the dual-port RAM (10) through the EMIF interface to expand the memory, and screens (11) the sampled data to eliminate abnormal points, and then calculates the compensation by matrix operation parameter (12), and the compensation parameter is written in the dual-port RAM (10) and SDRAM (13), and then read by the FPGA industrial-grade processor (2);

此时,FPGA工业级处理器(2)利用计算所得的补偿参数对正交信号进行实时误差补偿(6)、实时相位计算(7)和细分辨向(8);At this time, the FPGA industrial-grade processor (2) uses the calculated compensation parameters to perform real-time error compensation (6), real-time phase calculation (7) and fine resolution (8) for the quadrature signal;

最后,实时更新的相位数值写入双口RAM(10)并由DSP(3)实时计算并存储位移,位移数据再经双口RAM(10)被FPGA工业级处理器(2)读取,并通过数据存储SD卡(14)进行保存,同时发送到VGA显示模块(9)进行显示。Finally, the real-time updated phase value is written into the dual-port RAM (10) and the displacement is calculated and stored in real time by the DSP (3), and the displacement data is read by the FPGA industrial-grade processor (2) through the dual-port RAM (10) and then Save through the data storage SD card (14), and simultaneously send to the VGA display module (9) for display.

所述的一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:所述FPGA工业级处理器(2)与DSP(3)之间的实时数据交互如下:FPGA工业级处理器(2)向DSP(3)方向的指令通过在FPGA工业级处理器(2)中设置一个中断信号,当DSP(3)接收到该信号,则开始从双口RAM(10)中按照规则进行均值滤波数据读取;DSP(3)向FPGA工业级处理器(2)进行数据传输时,遵循同样的执行规则,DSP(3)提供一个IO信号,通知FPGA工业级处理器(2)从双口RAM(10)中读取数据。A kind of high-speed and high-precision processing method for orthogonal signals based on DSP and FPGA is characterized in that: the real-time data interaction between the FPGA industrial-grade processor (2) and DSP (3) is as follows: FPGA industrial-grade processing The instruction to the direction of DSP (3) from device (2) is by setting an interrupt signal in FPGA industrial-grade processor (2), when DSP (3) receives this signal, then starts to follow the rule from dual-port RAM (10) Perform mean filter data reading; when DSP (3) transmits data to FPGA industrial-grade processor (2), follow the same execution rule, DSP (3) provides an IO signal, informs FPGA industrial-grade processor (2) from Read data in dual-port RAM (10).

所述的一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:在DSP(3)中进行补偿参数计算(12),具体步骤是:按误差源分步补偿正交信号误差,包括正交信号中存在的正交误差α、幅值波动、直流漂移误差,共计7项误差。A kind of high-speed high-precision processing method of quadrature signal based on DSP and FPGA is characterized in that: carry out compensation parameter calculation (12) in DSP (3), concrete steps are: step by step compensation quadrature signal by error source Errors, including quadrature error α, amplitude fluctuation, and DC drift error in the quadrature signal, a total of 7 errors.

所述的一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:在FPGA(2)中进行相位计算(7)和细分辨向(8),具体步骤如下:相位计算(7)根据CORDIC算法,基于反正切三角函数运算计算每个采样点对应的相位值,并通过区间转换得到细分数,通过细分数的大小判断测量数据移动方向和实现位移的跟踪,输出每个有效采样点对应包含实时位移信息的数据,并在 DSP(3)中转换成位移信息。Described a kind of high-speed high-precision processing method for orthogonal signals based on DSP and FPGA is characterized in that: phase calculation (7) and fine resolution (8) are carried out in FPGA (2), and concrete steps are as follows: phase calculation ( 7) According to the CORDIC algorithm, the phase value corresponding to each sampling point is calculated based on the arctangent trigonometric function operation, and the subdivision number is obtained through interval conversion, and the movement direction of the measurement data is judged by the size of the subdivision number, and the tracking of the displacement is realized, and the output of each Effective sampling points correspond to data containing real-time displacement information, and are converted into displacement information in DSP (3).

FPGA工业级处理器(2)为协处理器,负责所有数字逻辑控制;DSP(3) 为数据处理核心功能模块,采用嵌入硬件乘法器、改进型哈佛结构、流水线结构和优化的集成电路设计,增加信号处理器的吞吐量,大幅提升DSP指令执行的速度,从而实现高效误差补偿参数计算。FPGA industrial-grade processor (2) is a co-processor responsible for all digital logic control; DSP (3) is the core function module of data processing, which adopts embedded hardware multiplier, improved Harvard structure, pipeline structure and optimized integrated circuit design, The throughput of the signal processor is increased, and the execution speed of DSP instructions is greatly improved, thereby realizing efficient calculation of error compensation parameters.

FPGA工业级处理器(2)驱动高速采样时:当测量数据正向递增时,同周期内实时相位值递增,相邻两点相位差始终为正且接近为0,正向移动至新周期时刻实时相位值从变化至π,该时刻相邻两点相位差为负且接近为;当测量数据反向递减时,同周期内实时相位值递减,相邻两点相位差始终为负且接近为0,反向移动至新周期时刻实时相位值从π变化至,该时刻相邻两点相位差为正且接近为2π。因此,整周期数根据相邻两点相位差的大小判断信号移动方向并在进入新周期时刻对整周期数作相增、减运算。When the FPGA industrial-grade processor (2) drives high-speed sampling: when the measured data increases in the positive direction, the real-time phase value increases in the same cycle, and the phase difference between two adjacent points is always positive and close to 0, moving forward to the new cycle time When the real-time phase value changes from π to π, the phase difference between two adjacent points at this moment is negative and close to ; when the measured data decreases in reverse, the real-time phase value decreases in the same cycle, and the phase difference between two adjacent points is always negative and close to 0, the real-time phase value changes from π to 0 in the reverse direction to the new cycle moment, and the phase difference between two adjacent points at this moment is positive and close to 2π. Therefore, the integral cycle number judges the signal moving direction according to the phase difference between two adjacent points, and the integral cycle number is added and subtracted when entering a new cycle.

与已有技术相比,本发明的优点是:Compared with prior art, the advantage of the present invention is:

本发明在专利《基于FPGA的正交信号实时处理方法》(专利号: 201710234903X)基础上,在硬件架构和算法上做了改进,是正交信号高精度实时处理的一种纯硬件实现。Based on the patent "FPGA-Based Real-Time Processing Method of Orthogonal Signals" (Patent No.: 201710234903X), the present invention has made improvements in hardware architecture and algorithms, and is a pure hardware implementation of high-precision real-time processing of orthogonal signals.

本发明在结构上基于FPGA和DSP架构以DSP配合FPGA为核心的硬件架构,以DSP为数据处理核心,主要负责主要的数学变换计算;以FPGA工业级处理器为协处理器,负责所有数字逻辑控制,充分发挥FPGA高速并行的特点和 DSP快速计算的能力。FPGA和DSP相互配合工作,通过一片双口RAM完成两者的通讯,并将其内部按其存储空间等分两块,利用乒乓技术完成对正交信号高速实时地数据缓冲。本发明方法在信号采集、传输、修正、细分辨向到数据存储等整个过程中,DSP与FPGA分工协作,既能够满足系统实时性要求,又实现了正交信号的高精度处理。本发明结构清晰,信号处理快速、高效,可实现对栅式传感器和单频激光干涉仪信号正交误差、幅值波动、直流漂移误差等的在线补偿,为高精度光栅信号的分析及误差的实时补偿提供工程解决方案。The present invention is structurally based on FPGA and DSP architecture, with DSP and FPGA as the core hardware architecture, with DSP as the data processing core, mainly responsible for the main mathematical transformation calculation; with the FPGA industrial-grade processor as the coprocessor, responsible for all digital logic Control, give full play to the high-speed parallel characteristics of FPGA and the fast calculation ability of DSP. FPGA and DSP work together to complete the communication between the two through a piece of dual-port RAM, and divide its interior into two equal parts according to its storage space, and use ping-pong technology to complete high-speed and real-time data buffering of orthogonal signals. In the whole process of signal acquisition, transmission, correction, fine resolution and data storage, the method of the present invention uses DSP and FPGA to cooperate in division of labor, which can not only meet the real-time requirements of the system, but also realize high-precision processing of orthogonal signals. The invention has a clear structure, fast and efficient signal processing, and can realize online compensation for the quadrature error, amplitude fluctuation, and DC drift error of the grating sensor and single-frequency laser interferometer signal, and is useful for the analysis and error detection of high-precision grating signals. Real-time compensation provides engineering solutions.

附图说明:Description of drawings:

图1是一种基于DSP和FPGA的正交信号高速高精度处理方法系统结构图。Figure 1 is a system structure diagram of a high-speed and high-precision processing method for orthogonal signals based on DSP and FPGA.

图2是实时正交信号处理系统框图。Figure 2 is a block diagram of a real-time quadrature signal processing system.

图3是FPGA工业级处理器的工作流程图。Fig. 3 is the working flowchart of FPGA industrial grade processor.

图4是DSP的工作流程图。Fig. 4 is the working flowchart of DSP.

具体实施方式:Detailed ways:

参见附图1,一种基于DSP和FPGA的正交信号高速高精度处理方法,包括FPGA工业级处理器2和DSP3两部分,FPGA工业级处理器2、DSP3通过双口RAM10实现数据通信;所述方法的具体实现步骤如下:Referring to accompanying drawing 1, a kind of orthogonal signal high-speed high-precision processing method based on DSP and FPGA, comprises FPGA industrial grade processor 2 and DSP3 two parts, FPGA industrial grade processor 2, DSP3 realize data communication by dual-port RAM10; The specific implementation steps of the method are as follows:

首先,光强信号经光电转换及信号调理电路1输出包含位移信息的模拟正交电压信号,由FPGA工业级处理器2驱动AD采样模块4对信号进行高速模数转换,并在FPGA工业级处理器2中经过均值滤波5得到进一步优化的正交信号数据,由FPGA工业级处理器2写入双口RAM10进行存储和高速缓冲;First, the light intensity signal outputs an analog orthogonal voltage signal containing displacement information through the photoelectric conversion and signal conditioning circuit 1, and the FPGA industrial-grade processor 2 drives the AD sampling module 4 to perform high-speed analog-to-digital conversion on the signal, and processes it in the FPGA industrial-grade In the device 2, the orthogonal signal data obtained through mean filtering 5 is further optimized, and is written into the dual-port RAM 10 by the FPGA industrial-grade processor 2 for storage and high-speed buffering;

随后,DSP(3)通过EMIF接口外扩存储器的方式,读取双口RAM10中的正交信号数据,并对采样数据进行筛选11,剔除异常点,接着通过矩阵运算计算补偿参数12,并将补偿参数写入双口RAM10和SDRAM13中,再由FPGA工业级处理器2读取;Subsequently, the DSP (3) reads the orthogonal signal data in the dual-port RAM 10 through the EMIF interface to expand the memory, and screens 11 the sampled data to remove abnormal points, and then calculates the compensation parameters 12 through matrix operations, and Compensation parameters are written into dual-port RAM10 and SDRAM13, and then read by FPGA industrial-grade processor 2;

此时,FPGA工业级处理器2利用计算所得的补偿参数对正交信号进行实时误差补偿6、实时相位计算7和细分辨向8;At this time, the FPGA industrial-grade processor 2 uses the calculated compensation parameters to perform real-time error compensation 6, real-time phase calculation 7 and fine resolution 8 for the quadrature signal;

最后,实时更新的相位数值写入双口RAM10并由DSP3实时计算并存储位移,位移数据再经双口RAM10被FPGA工业级处理器2读取,并通过数据存储SD卡 14进行保存,同时发送到VGA显示模块9进行显示。Finally, the real-time updated phase value is written into the dual-port RAM 10 and the displacement is calculated and stored in real time by the DSP3. The displacement data is then read by the FPGA industrial-grade processor 2 through the dual-port RAM 10, and stored through the data storage SD card 14, and sent simultaneously. To the VGA display module 9 for display.

FPGA工业级处理器2与DSP3之间的实时数据交互如下:FPGA工业级处理器2向DSP3方向的指令通过在FPGA工业级处理器2中设置一个中断信号,当DSP3接收到该信号,则开始从双口RAM10中按照规则进行均值滤波数据读取;DSP3向FPGA工业级处理器2进行数据传输时,遵循同样的执行规则,DSP3 提供一个IO信号,通知FPGA工业级处理器2从双口RAM10中读取数据。The real-time data interaction between FPGA industrial-grade processor 2 and DSP3 is as follows: FPGA industrial-grade processor 2 sends instructions to DSP3 by setting an interrupt signal in FPGA industrial-grade processor 2, and when DSP3 receives the signal, it starts Read mean value filtering data from dual-port RAM10 according to the rules; when DSP3 transmits data to FPGA industrial-grade processor 2, follow the same execution rules, and DSP3 provides an IO signal to notify FPGA industrial-grade processor 2 from dual-port RAM10 read data in.

参见附图2,本信号处理方法系统可分为:信号采集模块、逻辑控制模块、数据存储模块、实时显示模块、高速传输模块和补偿参数计算模块等。根据FPGA 工业级处理器2和DSP3各自的职责不同,FPGA工业级处理器2主要负责正交信号的采集、位移信号的显示与存储、数据的高速缓冲及整个电路的逻辑控制; DSP3主要负责正交信号误差补偿参数计算。Referring to accompanying drawing 2, the signal processing method system can be divided into: a signal acquisition module, a logic control module, a data storage module, a real-time display module, a high-speed transmission module, and a compensation parameter calculation module. According to the different responsibilities of FPGA industrial-grade processor 2 and DSP3, FPGA industrial-grade processor 2 is mainly responsible for the acquisition of orthogonal signals, display and storage of displacement signals, high-speed buffering of data, and logic control of the entire circuit; DSP3 is mainly responsible for normal Cross signal error compensation parameter calculation.

参见附图3、4,整个信号处理系统工作流程为:系统上电,FPGA电路完成初始化动作后,开始进行正交信号的高速采集和均值滤波;DSP完成自检,等待 FPGA方向的外部中断信号1;FPGA开通对DSP的数据通道,开始对正交信号采样数据的缓冲,数据存储在双口RAM中,当存储量达到一定的数量,开始实时向DSP发送中断信号1;DSP接收该信号1后,立即从双口RAM中读取数据并基于Heydemann椭圆拟合算法进行补偿参数的矩阵运算,计算完成后,补偿参数存入双口RAM中,并向FPGA提供中断信号2;FPGA接收中断信号2后立即利用补偿参数对采样信号进行补偿,补偿后的修正信号进入基于CORDIC 算法的反正切运算和基于区间转换的细分辨向模块中,得到实时更新的相位信息存入双口RAM,并向DSP提供中断信号3;DSP接收中断信号3,在内部将相位信息转换成实时位移量存入双口RAM,并向FPGA提供中断信号4;FPGA接收该信号4后从双口RAM中读取位移数据,并将位移数据以文件形式存储在SD 卡中。此时如果外界未发出结束信号,则继续进行数据传输和信号处理;如果外界发出结束信号,则FPGA会通知DSP结束编码。See Figures 3 and 4, the workflow of the entire signal processing system is as follows: the system is powered on, and after the FPGA circuit completes the initialization action, high-speed acquisition and mean value filtering of orthogonal signals are started; the DSP completes the self-test, and waits for an external interrupt signal from the FPGA direction 1. The FPGA opens the data channel to the DSP, and starts to buffer the orthogonal signal sampling data. The data is stored in the dual-port RAM. When the storage capacity reaches a certain amount, it starts to send an interrupt signal 1 to the DSP in real time; the DSP receives the signal 1 After that, read the data from the dual-port RAM immediately and perform the matrix operation of the compensation parameters based on the Heydemann ellipse fitting algorithm. After the calculation is completed, the compensation parameters are stored in the dual-port RAM, and an interrupt signal 2 is provided to the FPGA; the FPGA receives the interrupt signal Immediately after 2, the compensation parameters are used to compensate the sampling signal, and the compensated correction signal enters the arctangent operation based on the CORDIC algorithm and the fine resolution module based on the interval conversion, and the real-time updated phase information is stored in the dual-port RAM and sent to the DSP provides interrupt signal 3; DSP receives interrupt signal 3, internally converts phase information into real-time displacement and stores it in dual-port RAM, and provides interrupt signal 4 to FPGA; FPGA reads displacement from dual-port RAM after receiving signal 4 data, and store the displacement data in the SD card in the form of files. At this time, if the outside world does not send an end signal, the data transmission and signal processing will continue; if the outside world sends an end signal, the FPGA will notify the DSP to end the encoding.

正交信号中存在的正交误差α、幅值波动、直流漂移误差,共计7项误差。信号通过DSP实现的误差补偿参数计算,算法如下:The quadrature error α, amplitude fluctuation, and DC drift error in the quadrature signal have a total of 7 errors. The signal is calculated by the error compensation parameters realized by DSP, and the algorithm is as follows:

正交信号实际数学模型为:The actual mathematical model of the quadrature signal is:

则有:Then there are:

根据三角函数关系可得到正交信号的椭圆方程:According to the relationship of trigonometric functions, the elliptic equation of the quadrature signal can be obtained:

为了方便曲线拟合,可将上式改写为:In order to facilitate curve fitting, the above formula can be rewritten as:

AX2+BY2+CXY+DX+EY=1AX 2 +BY 2 +CXY+DX+EY=1

在DSP中进行如下的矩阵运算:Perform the following matrix operations in DSP:

通过计算五阶矩阵可以得到系数A,B,C,D,E的值,再通过简单计算得到α的值,并写入FPGA中对正交信号进行补偿:By calculating the fifth-order matrix, the values of coefficients A, B, C, D, and E can be obtained, and then the value of α can be obtained by simple calculation, and written into FPGA to compensate the orthogonal signal:

以上所述的本发明实施方式,并不构成对本发明保护范围的限定。任何在本发明的精神和原则之内所作的修改、等同替换和改进等,均应包含在本发明的权利要求保护范围之内。The embodiments of the present invention described above are not intended to limit the protection scope of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.

Claims (4)

1.一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:包括FPGA工业级处理器(2)和DSP(3)两部分,FPGA工业级处理器(2)、DSP(3)通过双口RAM(10)实现数据通信;所述方法的具体实现步骤如下:1. a high-speed and high-precision processing method for orthogonal signals based on DSP and FPGA, is characterized in that: comprise FPGA industrial grade processor (2) and DSP (3) two parts, FPGA industrial grade processor (2), DSP ( 3) Realize data communication by dual-port RAM (10); The concrete realization steps of described method are as follows: 首先,光强信号经光电转换及信号调理电路(1)输出包含位移信息的模拟正交电压信号,由FPGA工业级处理器(2)驱动AD采样模块(4)对信号进行高速模数转换,并在FPGA工业级处理器(2)中经过均值滤波(5)得到进一步优化的正交信号数据,由FPGA工业级处理器(2)写入双口RAM(10)进行存储和高速缓冲;First, the light intensity signal outputs an analog orthogonal voltage signal containing displacement information through the photoelectric conversion and signal conditioning circuit (1), and the FPGA industrial-grade processor (2) drives the AD sampling module (4) to perform high-speed analog-to-digital conversion on the signal. And in the FPGA industrial-grade processor (2), obtain further optimized orthogonal signal data through mean filtering (5), and write it into the dual-port RAM (10) by the FPGA industrial-grade processor (2) for storage and high-speed buffering; 随后,DSP(3)通过EMIF接口外扩存储器的方式,读取双口RAM(10)中的正交信号数据,并对采样数据进行筛选(11),剔除异常点,接着通过矩阵运算计算补偿参数(12),并将补偿参数写入双口RAM(10)和SDRAM(13)中,再由FPGA工业级处理器(2)读取;Subsequently, the DSP (3) reads the quadrature signal data in the dual-port RAM (10) through the EMIF interface to expand the memory, and screens (11) the sampled data to eliminate abnormal points, and then calculates the compensation by matrix operation parameter (12), and the compensation parameter is written in the dual-port RAM (10) and SDRAM (13), and then read by the FPGA industrial-grade processor (2); 此时,FPGA工业级处理器(2)利用计算所得的补偿参数对正交信号进行实时误差补偿(6)、实时相位计算(7)和细分辨向(8);At this time, the FPGA industrial-grade processor (2) uses the calculated compensation parameters to perform real-time error compensation (6), real-time phase calculation (7) and fine resolution (8) for the quadrature signal; 最后,实时更新的相位数值写入双口RAM(10)并由DSP(3)实时计算并存储位移,位移数据再经双口RAM(10)被FPGA工业级处理器(2)读取,并通过数据存储SD卡(14)进行保存,同时发送到VGA显示模块(9)进行显示。Finally, the real-time updated phase value is written into the dual-port RAM (10) and the displacement is calculated and stored in real time by the DSP (3), and the displacement data is read by the FPGA industrial-grade processor (2) through the dual-port RAM (10) and then Save through the data storage SD card (14), and simultaneously send to the VGA display module (9) for display. 2.根据权利要求1所述的一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:所述FPGA工业级处理器(2)与DSP(3)之间的实时数据交互如下:FPGA工业级处理器(2)向DSP(3)方向的指令通过在FPGA工业级处理器(2)中设置一个中断信号,当DSP(3)接收到该信号,则开始从双口RAM(10)中按照规则进行均值滤波数据读取;DSP(3)向FPGA工业级处理器(2)进行数据传输时,遵循同样的执行规则,DSP(3)提供一个IO信号,通知FPGA工业级处理器(2)从双口RAM(10)中读取数据。2. a kind of high-speed high-precision processing method for orthogonal signals based on DSP and FPGA according to claim 1, is characterized in that: the real-time data interaction between the FPGA industrial grade processor (2) and DSP (3) As follows: the instruction from the FPGA industrial grade processor (2) to the DSP (3) direction is by setting an interrupt signal in the FPGA industrial grade processor (2), and when the DSP (3) receives the signal, it starts to read from the dual-port RAM (10) according to the rules to read the average value filter data; DSP (3) to FPGA industrial grade processor (2) when data transmission, follow the same execution rules, DSP (3) provides an IO signal to notify the FPGA industrial grade The processor (2) reads data from the dual-port RAM (10). 3.根据权利要求1所述的一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:在DSP(3)中进行补偿参数计算(12),具体步骤是:按误差源分步补偿正交信号误差,包括正交信号中存在的正交误差α、幅值波动、直流漂移误差,共计7项误差。3. a kind of high-speed high-precision processing method for orthogonal signals based on DSP and FPGA according to claim 1, is characterized in that: carry out compensation parameter calculation (12) in DSP (3), concrete steps are: press error source Step-by-step compensation of quadrature signal errors, including quadrature error α, amplitude fluctuation, and DC drift error in the quadrature signal, a total of 7 errors. 4.根据权利要求1所述的一种基于DSP和FPGA的正交信号高速高精度处理方法,其特征在于:在FPGA(2)中进行相位计算(7)和细分辨向(8),具体步骤如下:相位计算(7)根据CORDIC算法,基于反正切三角函数运算计算每个采样点对应的相位值,并通过区间转换得到细分数,通过细分数的大小判断测量数据移动方向和实现位移的跟踪,输出每个有效采样点对应包含实时位移信息的数据,并在DSP(3)中转换成位移信息。4. a kind of high-speed high-precision processing method for orthogonal signals based on DSP and FPGA according to claim 1 is characterized in that: phase calculation (7) and fine resolution are carried out (8) in FPGA (2), specifically The steps are as follows: Phase calculation (7) According to the CORDIC algorithm, the phase value corresponding to each sampling point is calculated based on the arctangent trigonometric function operation, and the subdivision number is obtained through interval conversion, and the movement direction of the measurement data is judged and realized by the size of the subdivision number. For displacement tracking, output data containing real-time displacement information corresponding to each effective sampling point, and convert it into displacement information in DSP (3).
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