CN107968567B - NMOS switching tube driving circuit - Google Patents

NMOS switching tube driving circuit Download PDF

Info

Publication number
CN107968567B
CN107968567B CN201711382349.6A CN201711382349A CN107968567B CN 107968567 B CN107968567 B CN 107968567B CN 201711382349 A CN201711382349 A CN 201711382349A CN 107968567 B CN107968567 B CN 107968567B
Authority
CN
China
Prior art keywords
nmos
switch
electrically connected
tube
switch tube
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201711382349.6A
Other languages
Chinese (zh)
Other versions
CN107968567A (en
Inventor
罗旭程
胡建伟
程剑涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Awinic Technology Co Ltd
Original Assignee
Shanghai Awinic Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Awinic Technology Co Ltd filed Critical Shanghai Awinic Technology Co Ltd
Priority to CN201711382349.6A priority Critical patent/CN107968567B/en
Publication of CN107968567A publication Critical patent/CN107968567A/en
Application granted granted Critical
Publication of CN107968567B publication Critical patent/CN107968567B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)

Abstract

The invention discloses an NMOS (N-channel metal oxide semiconductor) switching tube driving circuit, which outputs a starting voltage for starting an NMOS switching tube through a boosting starting module, and outputs a superposed voltage of the starting voltage and a source voltage of the NMOS switching tube after the NMOS switching tube is started; the NMOS switching tube is turned off by controlling the turn-off of the boosting turn-on module, and charges of a grid electrode and a source electrode of the NMOS switching tube are released by the discharging module after the NMOS switching tube is turned off, so that the aim of quickly turning off the NMOS switching tube is fulfilled; on the basis of normally opening and closing the control NMOS switch tube, the time of the output voltage of the boosting opening module to the grid electrode of the NMOS switch tube can be effectively controlled through the delay module, and then the opening time of the NMOS switch tube is effectively controlled, so that the NMOS switch tube achieves the purpose of slow opening, the condition that the great surge current is transmitted to flow into a connected load is avoided, and the load is prevented from being damaged.

Description

NMOS switching tube driving circuit
Technical Field
The invention relates to the technical field of driving of an N-type Metal Oxide Semiconductor (NMOS) switching tube, in particular to an NMOS switching tube driving circuit.
Background
In an electronic system, a load switch (load switch) is generally used to connect or isolate two ports, for example, to cut off or connect power. The load switch may be integrated on the same IC (integrated circuit) as the control circuit, or may be a discrete component. A MOSFET (metal oxide semiconductor field effect transistor) is a commonly used load switch, and has P-type and N-type characteristics. The mobility of the NMOS switch tube is higher than that of a PMOS (P-type Metal oxide semiconductor) switch tube, that is, the on-resistance of the NMOS is lower than that of the PMOS in the same area, so the NMOS switch tube is a better load switch. However, when the conventional NMOS switch tube is used as a load switch, a large surge current is often transmitted to flow into a connected load, and further, the load is damaged to some extent.
Disclosure of Invention
In view of the above, the present invention provides an NMOS switching transistor driving circuit, which outputs a start-up voltage enabling the NMOS switching transistor to be started up through a boost start-up module, and outputs a superimposed voltage of the start-up voltage and a source voltage of the NMOS switching transistor after the NMOS switching transistor is started up; the NMOS switch tube is turned off through the turn-off control of the boosting turn-on module, and charges of a grid electrode and a source electrode of the NMOS switch tube are released through the discharging module after the NMOS switch tube is turned off, so that the purpose of rapidly turning off the NMOS switch tube is achieved; on the basis of normally opening and shutting off the control NMOS switching tube, the time of outputting voltage to the grid electrode of the NMOS switching tube by the boost starting module can be effectively controlled through the delay module arranged between the grid electrode of the NMOS switching tube and the boost starting module, and then the starting time of the NMOS switching tube is effectively controlled, so that the NMOS switching tube can be slowly opened, the condition that the transmitted large surge current flows into a connected load is avoided, and the load is prevented from being damaged.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
an NMOS switch tube driving circuit comprises:
the drain electrode of the NMOS switching tube is electrically connected with the input end of the power supply, and the source electrode of the NMOS switching tube is electrically connected with the load;
the voltage boosting starting module is used for providing starting voltage for the grid electrode of the NMOS switching tube and adopting the source electrode of the NMOS switching tube as a power supply end;
the delay module is arranged between the boosting starting module and the grid electrode of the NMOS switching tube and is used for controlling the starting time of the NMOS switching tube;
and the discharging module is used for releasing the charges of the grid electrode and the source electrode of the NMOS switching tube when the NMOS switching tube is turned off.
Optionally, the NMOS switching transistor driving circuit further includes:
and the VGS protection circuit is arranged between the grid electrode and the source electrode of the NMOS switch tube.
Optionally, the boost starting module includes:
the input end of the charge pump is connected with a clock signal, and the power supply end of the charge pump is electrically connected with the source electrode of the NMOS switching tube.
Optionally, the delay module includes:
one end of the first resistor is electrically connected with the output end of the boosting starting module, the other end of the first resistor is electrically connected with the grid electrode of the NMOS switch tube, and the first resistor and the parasitic grid-source capacitor of the NMOS switch tube form an RC delay circuit.
Optionally, the discharge module includes:
a first switch, a second switch and a second resistor;
one end of the first switch is electrically connected with a ground terminal, the other end of the first switch is electrically connected with one end of the second resistor, and the other end of the second resistor is electrically connected with the grid electrode of the NMOS switch tube;
one end of the second switch is electrically connected with the grid electrode of the NMOS switch tube, and the other end of the second switch is electrically connected with the source electrode of the NMOS switch tube.
Optionally, the discharge module includes:
a first switch, a second switch and a second resistor;
one end of the first switch is electrically connected with a ground terminal, the other end of the first switch is electrically connected with one end of the second resistor, and the other end of the second resistor is electrically connected with a source electrode of the NMOS switch tube;
one end of the second switch is electrically connected with the grid electrode of the NMOS switch tube, and the other end of the second switch is electrically connected with the source electrode of the NMOS switch tube.
Optionally, the first switch and the second switch are both switch tubes.
Optionally, the VGS protection circuit includes:
the anode of the Zener diode is electrically connected with the source electrode of the NMOS switch tube, and the cathode of the Zener diode is electrically connected with the grid electrode of the NMOS switch tube.
Optionally, the VGS protection circuit includes:
a first zener diode and a second zener diode;
the cathode of the first zener diode is electrically connected with the cathode of the second zener diode, the anode of the first zener diode is electrically connected with the source electrode of the NMOS switch tube, and the anode of the second zener diode is electrically connected with the gate of the NMOS switch tube.
Optionally, the VGS protection circuit includes:
a Zener diode and a PMOS switching tube;
the cathode of the Zener diode is electrically connected with the grid electrode of the NMOS switch tube, the anode of the Zener diode is electrically connected with the source electrode of the PMOS switch tube, and the grid electrode and the drain electrode of the PMOS switch tube are both electrically connected with the source electrode of the NMOS switch tube.
Compared with the prior art, the technical scheme provided by the invention at least has the following advantages:
the invention provides an NMOS switching tube driving circuit, comprising: the drain electrode of the NMOS switching tube is electrically connected with the input end of the power supply, and the source electrode of the NMOS switching tube is electrically connected with the load; the voltage boosting starting module is used for providing starting voltage for the grid electrode of the NMOS switching tube and adopting the source electrode of the NMOS switching tube as a power supply end; the delay module is arranged between the boosting starting module and the grid electrode of the NMOS switching tube and is used for controlling the starting time of the NMOS switching tube; and the discharging module is used for releasing the charges of the grid electrode and the source electrode of the NMOS switching tube when the NMOS switching tube is turned off.
According to the technical scheme provided by the invention, the boosting starting module outputs the starting voltage which enables the NMOS switching tube to be started, and the superposed voltage of the starting voltage and the source voltage of the NMOS switching tube is output after the NMOS switching tube is started; the NMOS switch tube is turned off through the turn-off control of the boosting turn-on module, and charges of a grid electrode and a source electrode of the NMOS switch tube are released through the discharging module after the NMOS switch tube is turned off, so that the purpose of rapidly turning off the NMOS switch tube is achieved; on the basis of normally opening and shutting off the control NMOS switching tube, the time of outputting voltage to the grid electrode of the NMOS switching tube by the boost starting module can be effectively controlled through the delay module arranged between the grid electrode of the NMOS switching tube and the boost starting module, and then the starting time of the NMOS switching tube is effectively controlled, so that the NMOS switching tube can be slowly opened, the condition that the transmitted large surge current flows into a connected load is avoided, and the load is prevented from being damaged.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an NMOS switch driving circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of another NMOS switch driving circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of another NMOS switch driving circuit according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of another NMOS switch driving circuit according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of another NMOS switch driving circuit according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of another NMOS switch driving circuit according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of another NMOS switch driving circuit according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As described in the background, a MOSFET (metal oxide semiconductor field effect transistor) is a commonly used load switch, and has P-type and N-type characteristics. The mobility of the NMOS switch tube is higher than that of a PMOS (positive channel Metal Oxide Semiconductor) switch tube, that is, the on-resistance of the NMOS is lower than that of the PMOS in the same area, so the NMOS switch tube is a better load switch. However, when the conventional NMOS switch tube is used as a load switch, a large surge current is often transmitted to flow into a connected load, and further, the load is damaged to some extent.
Based on this, the embodiment of the application provides an NMOS switching tube driving circuit, which outputs a start-up voltage enabling the NMOS switching tube to be started through a boost start-up module, and outputs a superimposed voltage of the start-up voltage and a source voltage of the NMOS switching tube after the NMOS switching tube is started up; the NMOS switching tube is turned off through the turn-off control of the boosting turn-on module, and charges of a grid electrode and a source electrode of the NMOS switching tube are released through the discharging module after the NMOS switching tube is turned off; on the basis of normally opening and shutting off the control NMOS switching tube, the time of outputting voltage to the grid electrode of the NMOS switching tube by the boost starting module can be effectively controlled through the delay module arranged between the grid electrode of the NMOS switching tube and the boost starting module, and then the starting time of the NMOS switching tube is effectively controlled, so that the NMOS switching tube can be slowly opened, the condition that the transmitted large surge current flows into a connected load is avoided, and the load is prevented from being damaged. In order to achieve the above object, the technical solutions provided by the embodiments of the present application are described in detail below, specifically with reference to fig. 1 to 7.
Referring to fig. 1, a schematic structural diagram of an NMOS switching transistor driving circuit provided in an embodiment of the present application is shown, where the NMOS switching transistor driving circuit includes:
the NMOS switch tube 100 is characterized in that the drain electrode of the NMOS switch tube 100 is electrically connected with a power input end Vcc, and the source electrode of the NMOS switch tube 100 is electrically connected with a load 200;
a voltage boosting turn-on module 300 for providing a turn-on voltage for the gate of the NMOS switch tube 100 and using the source of the NMOS switch tube 100 as a power supply end;
a delay module 400 disposed between the boost start-up module 300 and the gate of the NMOS switch tube 100, for controlling the start-up time of the NMOS switch tube 100;
and a discharging module 500 for releasing charges of the gate and the source of the NMOS switch tube 100 when the NMOS switch tube 100 is turned off.
As can be seen from the above, in the technical solution provided in the embodiment of the present application, the boost start module outputs the start voltage that enables the NMOS switch tube to start, and outputs the superimposed voltage of the start voltage and the source voltage of the NMOS switch tube after the NMOS switch tube is started (i.e., when the NMOS switch tube is stably turned on, the superimposed voltage is the sum of the voltage of the power input terminal Vcc and the start voltage); the NMOS switch tube is turned off through the turn-off control of the boosting turn-on module, and charges of a grid electrode and a source electrode of the NMOS switch tube are released through the discharging module after the NMOS switch tube is turned off, so that the purpose of rapidly turning off the NMOS switch tube is achieved; on the basis of normally opening and shutting off the control NMOS switching tube, the time of outputting voltage to the grid electrode of the NMOS switching tube by the boost starting module can be effectively controlled through the delay module connected between the grid electrode of the NMOS switching tube and the boost starting module, and then the starting time of the NMOS switching tube is effectively controlled, so that the NMOS switching tube can be slowly opened, the condition that the transmitted large surge current flows into the connected load is avoided, and the damage to the load is avoided.
Furthermore, in order to avoid breakdown of the NMOS switch tube under load jump or power supply jump, the NMOS switch tube needs to be effectively protected. Referring specifically to fig. 2, a schematic structural diagram of another NMOS switching transistor driving circuit provided in the embodiment of the present application is shown, where the NMOS switching transistor driving circuit further includes:
and the VGS protection circuit 600 is arranged between the grid electrode and the source electrode of the NMOS switch tube 100.
In an embodiment of the application, the VGS protection circuit may clamp a VGS (gate-source voltage difference) voltage of the NMOS switch transistor within a range that the NMOS switch transistor can bear, so as to protect the NMOS switch transistor from breakdown.
The specific circuit structure of the NMOS switching transistor driving circuit provided in the embodiments of the present application is described below with reference to the accompanying drawings.
Referring to fig. 3, a schematic structural diagram of another NMOS switching transistor driving circuit provided in the embodiment of the present application is shown, where the boost starting module provided in the embodiment of the present application may include:
the input end of the charge pump 310 is connected to the clock signal C L K, the power supply terminal of the charge pump 310 is electrically connected to the source of the NMOS switch tube 100, and the output end of the charge pump is connected to the delay module.
In an embodiment of the present application, the clock signal may be a signal output by an oscillator, that is, an input terminal of the charge pump is electrically connected to the oscillator; the charge pump is controlled to be started through a clock signal, namely, the clock signal is applied to the charge pump, so that the charge pump is controlled to start working to carry out boost control, and finally, starting voltage is output; and when the NMOS switch tube needs to be closed, stopping providing the clock signal for the charge pump, and further controlling the charge pump to be closed so as to finally control the NMOS switch tube to be closed. In an embodiment of the present application, the turn-on voltage output by the boost turn-on module needs to be greater than the threshold voltage of the NMOS switch tube, but the upper limit thereof needs to be less than the limit voltage that the NMOS switch tube can bear, and the specific value is not specifically limited in the present application, and needs to be specifically designed according to practical application.
Referring to fig. 3, the delay module provided in the embodiment of the present application includes:
and a first resistor R1, wherein one end of the first resistor R1 is electrically connected to the output end of the boost start-up module 300, and the other end of the first resistor R1 is electrically connected to the gate of the NMOS switch tube 100, and the first resistor R1 and the parasitic gate-source capacitance of the NMOS switch tube 100 form an RC delay circuit.
The first resistor and the parasitic gate-source capacitor of the NMOS switch tube form an RC delay circuit, the RC delay circuit can delay and transmit the output voltage of the boosting starting module to the grid electrode of the NMOS switch tube, and therefore the time of the NMOS switch tube can be effectively controlled, and the process of enabling the NMOS switch tube to be slowly started is achieved. Specifically, the turn-on speed of the NMOS switch tube can be derived from a time constant τ ═ R1 × (Cgs) formed by the first resistor R1 and the gate-source parasitic capacitor Cgs, so that the above formula can deduce that the turn-on time of the NMOS switch tube can be effectively controlled by controlling the resistance of the first resistor.
Referring to fig. 3, the discharge module provided in the embodiment of the present application includes:
a first switch S1, a second switch S2, and a second resistor R2;
one end of the first switch S1 is electrically connected to the ground Gnd, the other end of the first switch S1 is electrically connected to one end of the second resistor R2, and the other end of the second resistor R2 is electrically connected to the gate of the NMOS switch transistor 100;
one end of the second switch S2 is electrically connected to the gate of the NMOS switch tube 100, and the other end of the second switch S2 is electrically connected to the source of the NMOS switch tube 100.
When the NMOS switch tube is controlled to be closed, the charge pump is controlled to be closed. And then the first switch and the second switch are controlled to be simultaneously closed and conducted, and due to the fact that the conducting impedance of the second switch is small, the charges of the grid electrode of the NMOS switch tube can be rapidly released to the source electrode of the NMOS switch tube through the second switch, and therefore the NMOS switch tube is rapidly closed. Meanwhile, the first switch is turned on, so that the charges of the grid electrode of the NMOS switch tube can be released to the ground end through a path from the second resistor to the first switch, and the charges of the source electrode of the NMOS switch tube can also be released to the ground end through a path from the second switch to the second resistor to the first switch. And finally, the potentials of the grid electrode and the source electrode of the NMOS switch tube are pulled down to the ground, the NMOS switch tube is closed, and the power supply input end and the load are completely disconnected.
Or, the first switch, the second switch, and the second resistor provided in the embodiment of the present application may also implement a discharging function through other connection manners, specifically refer to fig. 4, which is a schematic structural diagram of another NMOS switching tube driving circuit provided in the embodiment of the present application, where the discharging module provided in the embodiment of the present application includes:
a first switch S1, a second switch S2, and a second resistor R2;
one end of the first switch S1 is electrically connected to the ground Gnd, the other end of the first switch S1 is electrically connected to one end of the second resistor R2, and the other end of the second resistor R2 is electrically connected to the source of the NMOS switch 100;
one end of the second switch S2 is electrically connected to the gate of the NMOS switch tube 100, and the other end of the second switch S2 is electrically connected to the source of the NMOS switch tube 100.
When the NMOS switch tube is controlled to be closed, the charge pump is controlled to be closed. And then the first switch and the second switch are controlled to be simultaneously closed and conducted, and due to the fact that the conducting impedance of the second switch is small, the charges of the grid electrode of the NMOS switch tube can be rapidly released to the source electrode of the NMOS switch tube through the second switch, and therefore the NMOS switch tube is rapidly closed. Meanwhile, the first switch is turned on, so that the charges of the grid electrode of the NMOS switch tube can be released to the ground end through a path of the second switch, the second resistor and the first switch, and the charges of the source electrode of the NMOS switch tube can also be released to the ground end through a path of the second resistor and the first switch. And finally, the potentials of the grid electrode and the source electrode of the NMOS switch tube are pulled down to the ground, the NMOS switch tube is closed, and the power supply input end and the load are completely disconnected.
In any of the above embodiments, the first switch and the second switch provided in the present application may be both switch tubes, and the present application is not particularly limited thereto.
The VGS protection circuit that this application embodiment provided is used for carrying out effectual protection to the NMOS switch tube, can avoid the NMOS switch tube to be punctured. Several specific VGS protection circuits provided in the embodiments of the present application are described in detail below with reference to the accompanying drawings.
Referring to fig. 5, a schematic structural diagram of another NMOS switching transistor driving circuit provided in the embodiment of the present application is shown, where the VGS protection circuit provided in the embodiment of the present application includes:
the anode of the zener diode ZD is electrically connected to the source of the NMOS switch tube 100, and the cathode of the zener diode ZD is electrically connected to the gate of the NMOS switch tube 100.
Generally, the reverse breakdown voltage of the zener diode is Vzr, and the forward conduction voltage is 0.7V, and the zener diode provided in the embodiment of the present application is used as the VGS protection circuit, so that the gate-source voltage difference VGS of the NMOS switch tube can be clamped between-0.7V and Vzr, including the end point value.
The VGS protection circuit that this application embodiment provided can also adopt two zener diodes to constitute. Referring to fig. 6, a schematic structural diagram of another NMOS switch tube provided in the embodiment of the present application is shown, where the VGS protection circuit provided in the embodiment of the present application includes:
a first zener diode ZD1 and a second zener diode ZD 2;
the cathode of the first zener diode ZD1 is electrically connected to the cathode of the second zener diode ZD2, the anode of the first zener diode ZD1 is electrically connected to the source of the NMOS switch 100, and the anode of the second zener diode ZD2 is electrically connected to the gate of the NMOS switch 100.
The VGS protection circuit provided by the embodiment of the application comprises two Zener diodes which are oppositely connected, and can clamp the gate-source voltage difference VGS of an NMOS switch tube between- (Vzr +0.7V) -Vzr +0.7V, including an end point value.
The VGS protection circuit provided in this embodiment of the present application may further include a zener diode and a PMOS switch. Referring to fig. 7, a schematic structural diagram of another NMOS switch tube provided in the embodiment of the present application is shown, where the VGS protection circuit provided in the embodiment of the present application includes:
a Zener diode ZD and a PMOS switching tube Pn;
the cathode of the zener diode ZD is electrically connected to the gate of the NMOS switch tube 100, the anode of the zener diode ZD is electrically connected to the source of the PMOS switch tube Pn, and both the gate and the drain of the PMOS switch tube Pn are electrically connected to the source of the NMOS switch tube 100.
The VGS protection circuit provided by the embodiment of the application comprises a Zener diode and a PMOS (P-channel metal oxide semiconductor) switching tube, wherein the grid-source voltage difference VGS of the NMOS switching tube can be clamped between- (0.7V +0.7V) -Vzr + Vth and comprises end point values; one of the values (0.7V +0.7V) is the forward conduction voltage of the zener diode, and the other value is the forward conduction voltage of the equivalent parasitic diode of the PMOS switch tube, and the magnitude thereof is generally 0.7V, and Vth is the threshold voltage of the PMOS switch tube, and the magnitude thereof is generally less than 1V.
The embodiment of the application provides an NMOS switch tube drive circuit, includes: the drain electrode of the NMOS switching tube is electrically connected with the input end of the power supply, and the source electrode of the NMOS switching tube is electrically connected with the load; the voltage boosting starting module is used for providing starting voltage for the grid electrode of the NMOS switching tube and adopting the source electrode of the NMOS switching tube as a power supply end; the delay module is arranged between the boosting starting module and the grid electrode of the NMOS switching tube and is used for controlling the starting time of the NMOS switching tube; and the discharging module is used for releasing the charges of the grid electrode and the source electrode of the NMOS switching tube when the NMOS switching tube is turned off.
As can be seen from the above, in the technical solution provided in the embodiment of the present application, the boost start module outputs the start voltage that enables the NMOS switch tube to start, and outputs the superimposed voltage of the start voltage and the source voltage of the NMOS switch tube after the NMOS switch tube is started; the NMOS switch tube is turned off through the turn-off control of the boosting turn-on module, and charges of a grid electrode and a source electrode of the NMOS switch tube are released through the discharging module after the NMOS switch tube is turned off, so that the purpose of rapidly turning off the NMOS switch tube is achieved; on the basis of normally opening and shutting off the control NMOS switching tube, the time of outputting voltage to the grid electrode of the NMOS switching tube by the boost starting module can be effectively controlled through the delay module arranged between the grid electrode of the NMOS switching tube and the boost starting module, and then the starting time of the NMOS switching tube is effectively controlled, so that the NMOS switching tube can be slowly opened, the condition that the transmitted large surge current flows into a connected load is avoided, and the load is prevented from being damaged.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. An NMOS switch tube driving circuit, comprising:
the drain electrode of the NMOS switching tube is electrically connected with the input end of the power supply, and the source electrode of the NMOS switching tube is electrically connected with the load;
the voltage boosting starting module is used for providing starting voltage for the grid electrode of the NMOS switching tube and adopting the source electrode of the NMOS switching tube as a power supply end; the boosting starting module outputs a starting voltage enabling the NMOS switching tube to be started, and outputs a superposed voltage of the starting voltage and a source voltage of the NMOS switching tube after the NMOS switching tube is started;
the delay module is arranged between the boosting starting module and the grid electrode of the NMOS switching tube and is used for controlling the starting time of the NMOS switching tube;
and the discharging module is used for releasing the charges of the grid electrode and the source electrode of the NMOS switching tube when the NMOS switching tube is turned off.
2. The NMOS switch transistor driver circuit of claim 1, wherein said NMOS switch transistor driver circuit further comprises:
and the VGS protection circuit is arranged between the grid electrode and the source electrode of the NMOS switch tube.
3. The NMOS switch tube driving circuit of claim 1, wherein the boost turn-on module comprises:
the input end of the charge pump is connected with a clock signal, and the power supply end of the charge pump is electrically connected with the source electrode of the NMOS switching tube.
4. The NMOS switch tube driver circuit of claim 1, wherein the delay module comprises:
one end of the first resistor is electrically connected with the output end of the boosting starting module, the other end of the first resistor is electrically connected with the grid electrode of the NMOS switch tube, and the first resistor and the parasitic grid-source capacitor of the NMOS switch tube form an RC delay circuit.
5. The NMOS switch tube driver circuit of claim 1, wherein the discharge module comprises:
a first switch, a second switch and a second resistor;
one end of the first switch is electrically connected with a ground terminal, the other end of the first switch is electrically connected with one end of the second resistor, and the other end of the second resistor is electrically connected with the grid electrode of the NMOS switch tube;
one end of the second switch is electrically connected with the grid electrode of the NMOS switch tube, and the other end of the second switch is electrically connected with the source electrode of the NMOS switch tube.
6. The NMOS switch tube driver circuit of claim 1, wherein the discharge module comprises:
a first switch, a second switch and a second resistor;
one end of the first switch is electrically connected with a ground terminal, the other end of the first switch is electrically connected with one end of the second resistor, and the other end of the second resistor is electrically connected with a source electrode of the NMOS switch tube;
one end of the second switch is electrically connected with the grid electrode of the NMOS switch tube, and the other end of the second switch is electrically connected with the source electrode of the NMOS switch tube.
7. The NMOS switch tube driving circuit of claim 5 or 6, wherein the first switch and the second switch are both switch tubes.
8. The NMOS switch tube driver circuit of claim 2, wherein the VGS protection circuit comprises:
the anode of the Zener diode is electrically connected with the source electrode of the NMOS switch tube, and the cathode of the Zener diode is electrically connected with the grid electrode of the NMOS switch tube.
9. The NMOS switch tube driver circuit of claim 2, wherein the VGS protection circuit comprises:
a first zener diode and a second zener diode;
the cathode of the first zener diode is electrically connected with the cathode of the second zener diode, the anode of the first zener diode is electrically connected with the source electrode of the NMOS switch tube, and the anode of the second zener diode is electrically connected with the gate of the NMOS switch tube.
10. The NMOS switch tube driver circuit of claim 2, wherein the VGS protection circuit comprises:
a Zener diode and a PMOS switching tube;
the cathode of the Zener diode is electrically connected with the grid electrode of the NMOS switch tube, the anode of the Zener diode is electrically connected with the source electrode of the PMOS switch tube, and the grid electrode and the drain electrode of the PMOS switch tube are both electrically connected with the source electrode of the NMOS switch tube.
CN201711382349.6A 2017-12-20 2017-12-20 NMOS switching tube driving circuit Active CN107968567B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201711382349.6A CN107968567B (en) 2017-12-20 2017-12-20 NMOS switching tube driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201711382349.6A CN107968567B (en) 2017-12-20 2017-12-20 NMOS switching tube driving circuit

Publications (2)

Publication Number Publication Date
CN107968567A CN107968567A (en) 2018-04-27
CN107968567B true CN107968567B (en) 2020-07-28

Family

ID=61995734

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201711382349.6A Active CN107968567B (en) 2017-12-20 2017-12-20 NMOS switching tube driving circuit

Country Status (1)

Country Link
CN (1) CN107968567B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109150141B (en) * 2018-10-23 2023-09-15 上海艾为电子技术股份有限公司 Analog switch circuit and switch control method and device thereof
CN110635669A (en) * 2019-11-14 2019-12-31 南京大学 High-voltage MOSFET switch driving and protecting circuit
CN115987266B (en) * 2023-01-16 2023-11-28 深圳市思远半导体有限公司 Switching circuit, control method and chip of NMOS switching tube

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201590755U (en) * 2009-12-17 2010-09-22 东南大学 Power MOS transistor grid drive circuit for grid floating and level conversion
US8779731B2 (en) * 2011-01-10 2014-07-15 Eta Semiconductor Inc. Synthetic ripple hysteretic powder converter
US9106228B2 (en) * 2013-06-23 2015-08-11 Semiconductor Components Industries, Llc Adaptive MOS transistor gate driver and method therefor
CN204086510U (en) * 2014-08-18 2015-01-07 上海晶丰明源半导体有限公司 Demagnetization detection control module and demagnetization detection system
CN206077216U (en) * 2016-08-31 2017-04-05 北京金晟达生物电子科技有限公司 A kind of efficient metal-oxide-semiconductor drive circuit

Also Published As

Publication number Publication date
CN107968567A (en) 2018-04-27

Similar Documents

Publication Publication Date Title
CN108123596B (en) NMOS switching tube driving circuit
US8723564B2 (en) Driving circuit
CN105098743B (en) Dynamic electrostatic electric discharge clamp circuit
US8295784B2 (en) Semiconductor switching device
US9935551B2 (en) Switching circuit including serially connected transistors for reducing transient current at time of turning off, and power supply circuit provided therewith
CN109004820B (en) Switch bootstrap charging circuit suitable for high-speed grid driving of GaN power device
CN104065251B (en) There is the drive circuit of controlled gate discharge current
EP2315354B1 (en) Semiconductor device
US8717086B2 (en) Adaptive cascode circuit using MOS transistors
CN107968567B (en) NMOS switching tube driving circuit
JP2010130822A (en) Semiconductor device
CN103141028A (en) Level shift circuit
US9912332B2 (en) Semiconductor device
US20190081564A1 (en) Method and circuitry for sensing and controlling a current
CN109075693B (en) Driving circuit of power element
JP2013198125A (en) Semiconductor device
CN106953627B (en) Grid driving circuit of power device
CN107395183B (en) Pulse high-current ignition switch circuit
US8619398B1 (en) ESD protection for differential output pairs
US11128295B1 (en) Semiconductor device
CN117811332A (en) Miller clamp driving circuit and half-bridge circuit system
US6633470B2 (en) Overvoltage protection circuit for bidirectional transmission gate
CN105991052B (en) Rectifier circuit with reduced reverse recovery time
JP5805573B2 (en) Output circuit
CN210380646U (en) Combined power tube driving circuit and power supply device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information
CB02 Change of applicant information

Address after: 201199 Room 1201, Lane 908, Xiuwen Road, Minhang District, Shanghai

Applicant after: Shanghai Awinic Technology Co.,Ltd.

Address before: Room 303-39, 33 Block 680 Guiping Road, Xuhui District, Shanghai, 2003

Applicant before: Shanghai Awinic Technology Co.,Ltd.

GR01 Patent grant
GR01 Patent grant