CN107919155A - A kind of non-volatile three-state content addressing memory and its addressing method - Google Patents
A kind of non-volatile three-state content addressing memory and its addressing method Download PDFInfo
- Publication number
- CN107919155A CN107919155A CN201610885142.XA CN201610885142A CN107919155A CN 107919155 A CN107919155 A CN 107919155A CN 201610885142 A CN201610885142 A CN 201610885142A CN 107919155 A CN107919155 A CN 107919155A
- Authority
- CN
- China
- Prior art keywords
- line
- matched
- memory
- storage unit
- volatile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
Landscapes
- Static Random-Access Memory (AREA)
Abstract
The present invention relates to embedded-type control field, discloses a kind of non-volatile three-state content addressing memory and its addressing method, and the memory includes:Scounting line, matched line, complementary search line and multiple storage units, the storage unit includes the first memory resistor and the second memory resistor, the first end of first memory resistor is connected with described search line, the second end of first memory resistor is connected with the matched line, the first end of second memory resistor is connected with the complementary search line, and the second end of second memory resistor is connected with the matched line.Non-volatile three-state content addressing memory provided by the invention and its realize addressing method, have the characteristics that storage density is greatly and highly reliable.
Description
Technical field
The present invention relates to embedded-type control field, more particularly to a kind of non-volatile three-state content addressing memory and in fact
Existing method.
Background technology
In big data and cloud computing era, with the popularization of various smart machines, substantial amounts of data produce therewith, while
Network is needed to be transmitted.In order to improve data transmission efficiency and security, carrying out screening to data in the router becomes non-
It is often necessary.Traditional screening technique based on software rely primarily on CPU (central processing unit) is carried out between main memory repeatedly access with
Compare operation and realize that time cost and power consumption cost are all bigger.And TCAM (ternary content addressable
Memory, three-state content addressing memory) as a kind of solution of hardware view, it can be realized quickly by comparing parallel
It is efficient to search and match, preferably solve the problems, such as that traditional software implementation method exists.
The quick of TCAM searches and matches often using the increase increased with power consumption of chip area as cost.Traditional
TCAM is designed based on SRAM (static RAM), and single TCAM units generally require 12-16 transistor, single
Elemental area is excessive to cause TCAM storage densitys to be difficult lifting, meanwhile, area also causes greatly parasitic capacitance larger, causes dynamic
(active) power consumption is larger.In addition, traditional TCAM inherits the volatile characteristic of SRAM, static (standby) pattern cannot be cut
Power-off source, the information otherwise stored are lost, this characteristic also causes its quiescent dissipation larger.
For traditional TCAM there are the problem of, a current research hotspot be how based on new nonvolatile storage come
Realize the non-volatile TCAM of high density.In the world, famous research institution includes IBM, NEC and Tohoku university, TSMC and platform
The flagship meeting ISSCC (meeting of International Solid integrated circuit) and Symposium in integrated circuit fields such as gulf Tsinghua University
Continuous 6 years from 2011 to 2016 reports of VLSI Circuits (VLSIC, large scale integrated circuit seminar) are non-volatile
The related ends of TCAM, compared to traditional TCAM, it is excellent that existing non-volatile TCAM has that cellar area is smaller, quiescent dissipation is low etc.
Point.First, transistor size is reduced to 2-6 in TCAM units, substantially reduces the area of TCAM units, secondly, new to deposit
The non-volatile characteristic of reservoir causes TCAM thoroughly to power off in the dormant state without worrying that information is lost, and is conducive to reduce
Quiescent dissipation.But existing non-volatile TCAM schemes still suffer from some problems, are mainly manifested in:
Memory window between " 0 " and " 1 " signal is smaller, for the non-volatile TCAM based on MRAM, due to MRAM in itself
Roff/Ron (Ron is low-resistance, and Roff is high resistant) is smaller, and is easily caused " 0 " in corresponding non-volatile TCAM by influence of fluctuations
Memory window between " 1 " signal is small.For the non-volatile TCAM based on RRAM, since it relies primarily on RRAM memory resistors
Between transistor partial pressure obtain " 0 " or " 1 ", and transistor and RRAM memory resistors fluctuated in small size it is all bigger, and
Fluctuation pattern is inconsistent, causes the memory window between the signal of obtained " 0 " and " 1 " to be easily deteriorated by influence of fluctuations.
The area of TCAM units is still larger, and the existing non-volatile TCAM cellar areas of minimum still have 50F2, and (F is each work
Characteristic size of the skill under).Since the auxiliary that existing non-volatile TCAM units still need transistor could realize TCAM functions,
And transistor needs to be produced in CMOS front process, the area of big TCAM units is so on the one hand supportted, is on the other hand also limited
TCAM unit three-dimensionals (3D) integrated possibilities, the 3D for being also unfavorable for playing RRAM can integration capability.
The content of the invention
The object of the present invention is to provide a kind of big and highly reliable non-volatile three-state content addressing memory of storage density
And its addressing method.
To achieve the above object, the present invention provides following technical solution:
A kind of non-volatile three-state content addressing memory, the memory include:Scounting line, matched line, complementary search line
With multiple storage units, the storage unit includes the first memory resistor and the second memory resistor, first memory resistor
First end is connected with described search line, and the second end of first memory resistor is connected with the matched line, second storage
The first end of resistance is connected with the complementary search line, and the second end of second memory resistor is connected with the matched line.
Optionally, the storage unit further includes the first current limiting device and the second current limiting device, first memory resistor
First end and first current limiting device connect after be connected again with described search line, the first end of second memory resistor with
It is connected again with the complementary search line after the second current limiting device series connection.
Optionally, the multiple storage unit is arranged in array, and the storage unit in same a line shares one
Bar matched line, the storage unit not being located on colleague do not share a matched line, the storage list in same row
Member shares a scounting line and complementary search line, and the storage unit not in same row does not share same scounting line,
And the storage unit in same row does not share same complementary search line.
Optionally, the memory further includes:
Line drive circuit is matched, the matching line drive circuit is connected with the matched line, the matching line drive circuit
For producing set voltage;
Line drive circuit is searched for, described search line drive circuit is connected with described search line, the complementary search line respectively,
Described search line drive circuit is used to produce resetting voltage;
Matched line sense amplifier, the matched line sense amplifier are connected with the matched line, and the matched line is sensitive
Amplifier is used to matched signal is amplified and be exported.
Present invention also offers a kind of addressing method applied to above-mentioned non-volatile three-state content addressing memory, described
The output terminal of distribution is connected with the input terminal of sense amplifier, the described method includes:
Search signal is obtained, described search signal includes " 1 ", " 0 " and " X ";
Judge whether described search signal is " 1 ";
If it is, matched line and scounting line are charged to pre-charge voltage, complementary search line keeps low level;
If it is not, then judging whether described search signal is " 0 ";
If described search signal is " 0 ", the matched line and complementary search line are precharged to high level, scounting line
Keep low level;
If described search signal is not " 0 ", judge whether described search signal is " X ";
If described search signal is " X ", described search line, matched line and complementary search line are pre-charged paramount electricity
It is flat;
Obtain the voltage of the matching line output terminal;
Judge whether the output voltage is more than reference voltage, the value of the reference voltage is setting value, the setting value
For a level value among high level VH2 and low level VL2, the high level VH2 is the signal and the storage
When the storage information of unit matches, level value of the matched line after discharge regime electric discharge, the low level VL2 is the institute
When stating signal and the storage information mismatch of the storage unit, level value of the matched line after discharge regime electric discharge;
If it is, output " 1 ";
If it is not, then output " 0 ".
The specific embodiment provided according to the present invention, the invention discloses following technique effect:It is provided by the invention non-easy
Three-state content addressing memory is lost, using can be in the device that complementary metal oxide semiconductor CMOS last part technologies integrate come structure
Storage unit is built, the transistor integrated not comprising needs in CMOS front process, on the one hand, the volume of storage unit is reduced,
The storage density of memory is increased, on the other hand, the 3D of memory is integrated into possibility.Moreover, the present invention believes in search
During breath, matched line is charged to by pre-charge voltage using matching line drive circuit, using search line drive circuit by described search
The voltage amplitude of line and the complementary search line, the i.e. acquisition of " 0 " and " 1 " signal are obtained not by the partial pressure of transistor
, the problem of memory window between " 0 " and " 1 " signal brought by the partial pressure of transistor is small is avoided, improves memory
Reliability.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to institute in embodiment
Attached drawing to be used is needed to be briefly described, it should be apparent that, drawings in the following description are only some implementations of the present invention
Example, for those of ordinary skill in the art, without having to pay creative labor, can also be according to these attached drawings
Obtain other attached drawings.
Fig. 1 is the structural representation of the storage unit of the non-volatile three-state content addressing memory of first embodiment of the invention
Figure;
Fig. 2 is the structural representation of the storage unit of the non-volatile three-state content addressing memory of second embodiment of the invention
Figure;
Fig. 3 is the structure diagram of the non-volatile three-state content addressing memory of first embodiment of the invention;
Fig. 4 is the structure diagram of the non-volatile three-state content addressing memory of second embodiment of the invention;
Fig. 5 is the addressing method flow diagram of the non-volatile three-state content addressing memory of the present invention;
Charge and discharge electrical schematic when Fig. 6 is the non-volatile three-state content addressing memory addressing of first embodiment of the invention.
Embodiment
Below in conjunction with the attached drawing in the embodiment of the present invention, the technical solution in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other without making creative work
Embodiment, belongs to the scope of protection of the invention.
The object of the present invention is to provide a kind of big and highly reliable non-volatile three-state content addressing memory of storage density
And its addressing method.
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, it is below in conjunction with the accompanying drawings and specific real
Applying mode, the present invention is described in further detail.
Fig. 1 is the structure diagram of the non-volatile three-state content addressing memory of first embodiment of the invention, such as Fig. 1 institutes
Show, non-volatile three-state content addressing memory includes:Scounting line 107,109, matched line 102,103, complementary search line 106,
108, line drive circuit 110 is matched, searches for line drive circuit 101, multiple matched line sense amplifiers 104,105 and multiple storages
Unit 111, the multiple storage unit are arranged in array, and the storage unit in same a line shares a matching
Line, the not shared matched line of the storage unit on colleague, the storage unit in same row do not share
One scounting line and complementary search line, the storage unit not in same row do not share same scounting line, and not position
Same complementary search line is not shared in the storage unit in same row;Matched line sense amplifier is a pair of with matched line one
It should connect, the output terminal of matched line is connected with the input terminal of the matched line sense amplifier, the sensitive amplification of matched line
Device is used for the output voltage of matched line compared with reference voltage Vref 1, and comparative result is amplified and is exported;The matching
Line drive circuit 110 is connected with the matched line, and the matching line drive circuit 110 is used to produce set voltage;Described search
Line drive circuit 101 is connected with described search line, the complementary search line respectively, and described search line drive circuit 101 is used to produce
Raw resetting voltage.Fig. 2 is that the structure of the storage unit of the non-volatile three-state content addressing memory of first embodiment of the invention is shown
It is intended to, as shown in Fig. 2, the storage unit includes the first memory resistor 204 and the second memory resistor 207, first storage
The first end 206 of resistance 204 is connected with described search line 202, the second end 205 of first memory resistor 204 with described
Distribution 201 is connected, and the first end 209 of second memory resistor 207 is connected with the complementary search line 203, and described second deposits
The second end 208 of storing up electricity resistance 207 is connected with the matched line 201.
Fig. 3 is the structural representation of the storage unit of the non-volatile three-state content addressing memory of second embodiment of the invention
Figure, as shown in figure 3, in the second embodiment of non-volatile three-state content addressing memory provided by the invention, in storage unit
First memory resistor, 302 first end 303 is connected with described search line 305 again after connecting with the first current limiting device 304, and described second
The first end 308 of memory resistor 306 is connected with the complementary search line 310 again after connecting with second current limiting device 309, the
The second end 303 of one memory resistor 302 is connected with matched line 301, second end 307 and the matched line 301 of the second memory resistor 306
It is connected.Fig. 4 is the structure diagram of the non-volatile three-state content addressing memory of second embodiment of the invention, as shown in figure 4, this
The storage unit 411 of the non-volatile three-state content addressing memory of embodiment is the storage unit with current limiting device, other yuan
Part and connection relation are identical with the non-volatile three-state content addressing memory in first embodiment, the non-volatile three-state content addressing
Memory includes scounting line 407,409, and matched line 402,403, complementary search line 406,408, matches line drive circuit 410, search
Bands drive circuit 401, multiple matched line sense amplifiers 404,405 and multiple storage units 411.
Non-volatile three-state content addressing memory provided by the invention can be in back segment using resistive formula memory RRAM etc.
The device that technique integrates is built-up, does not use the crystalline substance in the leading portion making of complementary metal oxide semiconductor CMOS technology
The devices such as body pipe, reduce the volume of storage unit, increase the storage density of memory, meanwhile, it is provided by the invention non-easy
Lose three-state content addressing memory and do not use the mode of traditional transistor partial pressure and obtain the memory window of " 1 " and " 0 ", avoid
The fluctuation of " 1 " and " 0 " window is big, it is unstable the problem of occur, enhance the reliability of information storage.
Fig. 5 is the addressing method flow diagram of the non-volatile three-state content addressing memory of the present invention, as shown in figure 5, should
Addressing method step is as follows:
Step 501:Search signal is obtained, described search signal includes " 1 ", " 0 " and " X ", and " 1 ", " 0 " and " X " is logic
Value;
Step 502:Judge whether described search signal is " 1 ";
Step 503:If described search signal is " 1 ", matched line is charged to precharge electricity by matching line drive circuit
Scounting line is charged to pre-charge voltage by pressure, search line drive circuit, and complementary search line keeps low level, for the present invention first
The storage unit without current limiting device in embodiment, the pre-charge voltage are generally supply voltage, for the present invention second
Storage unit containing current limiting device in embodiment, the pre-charge voltage are generally leading for supply voltage and the current limiting device
Be powered the sum of pressure.Afterwards, memory enters discharge regime, and Fig. 6 is the non-volatile three-state content addressing of first embodiment of the invention
Charge and discharge electrical schematic during memory addressing, as shown in fig. 6, in search " 1 ", if the logical value of storage unit storage is
" 1 ", then the storage unit there was only high resistant discharge path to matched line, go together other storage units matched situation also occurs
Under, matched line ML can only discharge into a higher level VH1, due to being that memory resistor is low between matched line ML and scounting line SL
Resistance state, scounting line SL can also discharge into a higher level with matched line ML, as shown in the solid line 607 in Fig. 6;If described deposit
The logical value of storage unit storage is " 0 ", and the storage unit has matched line ML low-resistance discharge path, and matched line ML can discharge
To compared with low level VL1, as shown in the dotted line 608 in Fig. 6, the memory resistor between scounting line SL and matched line ML is high-impedance state,
Scounting line SL can discharge into a higher level;
Step 504:If described search signal is not " 1 ", judge whether described search signal is " 0 ";
Step 505:If described search signal is " 0 ", the matched line and complementary search line are pre-charged paramount electricity
Flat, scounting line keeps low level, afterwards, into electric discharge comparison phase, as shown in fig. 6, when searching for " 0 ", if the storage
The logical value of unit storage is " 0 ", then the storage unit only has high resistant discharge path to matched line ML, in other storages of going together
Unit also occur it is matched in the case of, matched line ML can only discharge into a higher level VH1, such as the institute of solid line 604 in Fig. 6
Show, due to being that memory resistor is low resistance state between matched line ML and complementary search line SLB, complementary search line SLB also can be with matching
Line ML discharges into a higher level;If it is " 1 " that storage unit, which deposits logical value, which has matched line ML
Low-resistance discharge path, matched line ML can be discharged into compared with low level VL1, as shown in the dotted line 605 in Fig. 6, complementary search line SLB and
Memory resistor between matched line ML is high-impedance state, and complementary search line SLB can discharge into a higher level;
Step 506:If described search signal is not " 0 ", judge whether described search signal is " X ";
Step 507:If described search signal is " X ", described search line, matched line and complementary search line are pre-charged
To high level, afterwards, into electric discharge comparison phase, as shown in fig. 6, no matter the storage unit deposit logical value be " 1 " or
" 0 ", the storage unit will not discharge the matched line;
Step 508:Obtain the voltage of the matching line output terminal;
Step 509:Judge whether the output voltage is more than reference voltage, the value of the reference voltage is setting value, institute
Setting value is stated as a level value among the high level VH2 and low level VL2, as shown in the dotted line 611 in Fig. 6;
Step 510:If the output voltage is more than reference voltage, the sense amplifier being connected with matched line exports
" 1 ", represents memory cell storage information and search information match, the sense amplifier is a comparison amplifier;
Step 511:If the output voltage is less than or equal to reference voltage, the sense amplifier being connected with matched line
Export " 0 ", represent memory cell storage information and mismatched with search information.
Pre-charge voltage of the present invention is generally supply voltage in first embodiment provided by the invention, second
It is the sum of conducting voltage of supply voltage and current limiting device in embodiment.
Wherein, in first embodiment storage unit store truth table as shown in Table 1, for first embodiment
In storage unit storage truth table as shown in Table 2.
Table one
Store data | First memory resistor (RRAM resistance) | Second memory resistor (RRAM resistance) |
0 | HRS (high-impedance state) | LRS (low resistance state) |
1 | LRS (low resistance state) | HRS (high-impedance state) |
X | HRS (high-impedance state) | HRS (high-impedance state) |
Table two
Store data | First memory resistor (RRAM resistance) | Second memory resistor (RRAM resistance) |
0 | HRS (high-impedance state) | LRS (low resistance state) |
1 | LRS (low resistance state) | HRS (high-impedance state) |
X | HRS (high-impedance state) | HRS (high-impedance state) |
For non-volatile three-state content addressing memory provided by the invention write operation using apply encourage by the way of, point
For two steps, left side resistance is first write, then writes the right resistance, excitation applying mode is similar with the write operation of crossbar frameworks, can
Using VPP/2 or VPP/3 algorithms.VSET is set (set) voltage;VRESET is reset (reset) voltage, and VT is current limiting device
Conducting voltage.VSET and VRESET voltage are produced by ML drive circuits 201 and SL drive circuits 204, and first embodiment provides
Non-volatile three-state content addressing memory write operation VPP/2 algorithms apply energisation mode as shown in Table 3, VPP/3 algorithms
Apply energisation mode as shown in Table 4, the VPP/ of the write operation for the non-volatile three-state content addressing memory that second embodiment provides
2 algorithms apply energisation mode as shown in Table 5, and VPP/3 algorithms apply energisation mode as shown in Table 6.
Non-volatile three-state content addressing memory provided by the invention is when carrying out write operation and search information, using drive
Dynamic circuit set, reset and charging, the mode for not using traditional transistor partial pressure obtain the memory window of " 1 " and " 0 ", keep away
Exempt from the problem of fluctuation of " 1 " and " 0 " window is big, unstable to occur, enhance the reliability of information storage.
Table three
Table four
Table five
Table six
Each embodiment is described by the way of progressive in this specification, what each embodiment stressed be and other
The difference of embodiment, between each embodiment identical similar portion mutually referring to.
Specific case used herein is set forth the principle of the present invention and embodiment, and above example is said
It is bright to be only intended to help the method and its core concept for understanding the present invention;Meanwhile for those of ordinary skill in the art, foundation
The thought of the present invention, in specific embodiments and applications there will be changes.In conclusion this specification content is not
It is interpreted as limitation of the present invention.
Claims (5)
1. a kind of non-volatile three-state content addressing memory, it is characterised in that the memory includes:Scounting line, matched line, mutually
Mending scounting line and multiple storage units, the storage unit includes the first memory resistor and the second memory resistor, and described first deposits
The first end of storing up electricity resistance is connected with described search line, and the second end of first memory resistor is connected with the matched line, described
The first end of second memory resistor is connected with the complementary search line, second end and the matched line of second memory resistor
It is connected.
2. non-volatile three-state content addressing memory according to claim 1, it is characterised in that the storage unit is also wrapped
The first current limiting device and the second current limiting device are included, after the first end of first memory resistor is connected with first current limiting device
Be connected again with described search line, the first end of second memory resistor connect with second current limiting device after again with it is described mutually
Scounting line is mended to be connected.
3. non-volatile three-state content addressing memory according to claim 1 or 2, it is characterised in that the multiple storage
Unit is arranged in array, and the storage unit in same a line shares a matched line, described on not going together
Storage unit takes different matched lines, and the storage unit in same row shares a scounting line and complementary search
Line, the storage unit in different lines takes different scounting lines, and the storage unit in different lines accounts for
With different complementary search lines.
4. non-volatile three-state content addressing memory according to claim 1 or 2, it is characterised in that the memory is also
Including:
Line drive circuit is matched, the matching line drive circuit is connected with the matched line, and the matching line drive circuit is used for
Produce set voltage;
Line drive circuit is searched for, described search line drive circuit is connected with described search line, the complementary search line respectively, described
Search line drive circuit is used to produce resetting voltage;
Matched line sense amplifier, the matched line sense amplifier are connected with the matched line, the sensitive amplification of matched line
Device is used to matched signal is amplified and be exported.
5. a kind of addressing method of non-volatile three-state content addressing memory, it is characterised in that the method is applied to as described
The output terminal of matched line described in non-volatile three-state content addressing memory described in claim 1 or 2 and sense amplifier it is defeated
Enter end to be connected, the described method includes:
Search signal is obtained, described search signal includes " 1 ", " 0 " and " X ";
Judge whether described search signal is " 1 ";
If it is, matched line and scounting line are charged to pre-charge voltage, complementary search line keeps low level;
If it is not, then judging whether described search signal is " 0 ";
If described search signal is " 0 ", the matched line and complementary search line are precharged to high level, scounting line is kept
Low level;
If described search signal is not " 0 ", judge whether described search signal is " X ";
If described search signal is " X ", described search line, matched line and complementary search line are precharged to high level;
Obtain the voltage of the matching line output terminal;
Judge whether the output voltage is more than reference voltage, the value of the reference voltage is setting value, and the setting value is less than
High level VH2 and more than low level VL2, the high level VH2 is the signal and the storage information of the storage unit
When matching, level value of the matched line after discharge regime electric discharge, the low level VL2 deposits for the signal with described
When the storage information of storage unit mismatches, level value of the matched line after discharge regime electric discharge;
If it is, output " 1 ";
If it is not, then output " 0 ".
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610885142.XA CN107919155A (en) | 2016-10-11 | 2016-10-11 | A kind of non-volatile three-state content addressing memory and its addressing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610885142.XA CN107919155A (en) | 2016-10-11 | 2016-10-11 | A kind of non-volatile three-state content addressing memory and its addressing method |
Publications (1)
Publication Number | Publication Date |
---|---|
CN107919155A true CN107919155A (en) | 2018-04-17 |
Family
ID=61891809
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610885142.XA Pending CN107919155A (en) | 2016-10-11 | 2016-10-11 | A kind of non-volatile three-state content addressing memory and its addressing method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN107919155A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107945830A (en) * | 2016-10-12 | 2018-04-20 | 复旦大学 | A kind of non-volatile three-state content addressing memory and its addressing method |
CN108615812A (en) * | 2018-05-14 | 2018-10-02 | 浙江大学 | A kind of three-state content addressing memory based on memory diode |
CN112837720A (en) * | 2021-01-22 | 2021-05-25 | 之江实验室 | High-density tri-state content addressing memory and addressing method thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1373890A (en) * | 1999-07-12 | 2002-10-09 | 莫塞德技术公司 | Circuit and method for multiple match detection in content addressable memories |
US8908407B1 (en) * | 2011-07-30 | 2014-12-09 | Rambus Inc. | Content addressable memory (“CAM”) |
CN105280223A (en) * | 2014-05-27 | 2016-01-27 | 瑞萨电子株式会社 | Semiconductor integrated circuit |
-
2016
- 2016-10-11 CN CN201610885142.XA patent/CN107919155A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1373890A (en) * | 1999-07-12 | 2002-10-09 | 莫塞德技术公司 | Circuit and method for multiple match detection in content addressable memories |
US8908407B1 (en) * | 2011-07-30 | 2014-12-09 | Rambus Inc. | Content addressable memory (“CAM”) |
CN105280223A (en) * | 2014-05-27 | 2016-01-27 | 瑞萨电子株式会社 | Semiconductor integrated circuit |
Non-Patent Citations (2)
Title |
---|
ALIBERT F,SHERWOOD T,STRUKOV D B: "Hybrid CMOS/Nanodevice Circuits for High Throughput Pattern Matching Applications", 《NASA/ESA CONFERENCE ON ADAPTIVE HARDWARE AND SYSTEMS(AHS)》 * |
刘刚: "基于忆阻器的三态内容寻址存储器设计", 《CNKI硕士论文全文数据库》 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107945830A (en) * | 2016-10-12 | 2018-04-20 | 复旦大学 | A kind of non-volatile three-state content addressing memory and its addressing method |
CN108615812A (en) * | 2018-05-14 | 2018-10-02 | 浙江大学 | A kind of three-state content addressing memory based on memory diode |
CN112837720A (en) * | 2021-01-22 | 2021-05-25 | 之江实验室 | High-density tri-state content addressing memory and addressing method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107945830A (en) | A kind of non-volatile three-state content addressing memory and its addressing method | |
US9847132B1 (en) | Ternary content addressable memories | |
US10650892B2 (en) | Ternary memory cell and ternary memory cell arrangement | |
US20180040374A1 (en) | Ternary content addressable memories having a bit cell with memristors and serially connected match-line transistors | |
DE102013106684A1 (en) | Sense amplifier circuit for resistive memories | |
CN108962316B (en) | Content addressable memory unit based on memristor and CMOS and data search matching method | |
CN108352180A (en) | Josephson Magnetic Random Access Memory with Inductive Shunt | |
JP7216436B2 (en) | neural network circuit device | |
US11114147B2 (en) | Self-boost, source following, and sense-and-hold for accessing memory cells | |
CN103456341A (en) | Sense amplifier circuitry for resistive type memory | |
US11651808B2 (en) | Semiconductor memory device | |
CN107919155A (en) | A kind of non-volatile three-state content addressing memory and its addressing method | |
TW201344688A (en) | High speed magnetic random access memory-based ternary CAM | |
US20100246250A1 (en) | Pipeline Sensing Using Voltage Storage Elements to Read Non-Volatile Memory Cells | |
Zheng et al. | Memristor-based ternary content addressable memory (mTCAM) for data-intensive computing | |
Ly et al. | In-depth characterization of resistive memory-based ternary content addressable memories | |
US9312006B2 (en) | Non-volatile ternary content-addressable memory with resistive memory device | |
Bayram et al. | NV-TCAM: Alternative interests and practices in NVM designs | |
DE102022101639A1 (en) | DYNAMIC RANDOM ACCESS MEMORY (DRAM) WITH SCALABLE METADATA | |
Zheng et al. | Memristors-based ternary content addressable memory (mTCAM) | |
CN112837720A (en) | High-density tri-state content addressing memory and addressing method thereof | |
CN106847320A (en) | Contents address memory and its processing method | |
CN106409335A (en) | Content addressing storage unit circuit and search and write operation methods thereof, and memory | |
JPWO2014038341A1 (en) | Non-volatile associative memory | |
Wang et al. | A novel content addressable memory based on hybrid memristor-CMOS architecture |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
WD01 | Invention patent application deemed withdrawn after publication | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20180417 |