CN117219139A - Implementation method of physical unclonable function based on self-activated resistive random access device - Google Patents

Implementation method of physical unclonable function based on self-activated resistive random access device Download PDF

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Publication number
CN117219139A
CN117219139A CN202311170478.4A CN202311170478A CN117219139A CN 117219139 A CN117219139 A CN 117219139A CN 202311170478 A CN202311170478 A CN 202311170478A CN 117219139 A CN117219139 A CN 117219139A
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China
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self
memristor
activated
bits
unclonable function
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CN202311170478.4A
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蔡一茂
吴林东
王宗巍
王源
黄如
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North Ic Technology Innovation Center Beijing Co ltd
Peking University
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North Ic Technology Innovation Center Beijing Co ltd
Peking University
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Abstract

The invention discloses a method for realizing a physical unclonable function based on a self-activated resistance change device, belonging to the technical field of semiconductor and CMOS hybrid integrated circuits. The self-activated memristor device has excellent storage characteristics and selection characteristics, and the device is written, erased and read only when the threshold voltage is reached. The invention can inhibit crosstalk and leakage current without integrating transistors, has high reliability and large integration potential, and can effectively improve the safety and reliability of the physical unclonable function.

Description

Implementation method of physical unclonable function based on self-activated resistive random access device
Technical Field
The invention belongs to the technical field of semiconductor and CMOS hybrid integrated circuits, and particularly relates to a method for realizing a physical unclonable function based on a self-activated memristor, which has high safety and high reliability.
Background
The continuous progress of information technology promotes the rapid development of the fields of the Internet of things and the like, promotes the unprecedented expansion of the scale of intelligent equipment, and simultaneously makes the hardware security problem increasingly serious. The traditional hardware safety protection system is mainly realized based on complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) technology, so that the area is large, and the sensitivity to parameter changes such as process, power supply and temperature is high. These problems limit the further development of conventional hardware security systems.
The transition metal oxide memristor has the advantages of simple structure, small area, strong durability and low energy consumption, and meanwhile, the preparation process is compatible with CMOS, so that a lot of attention is paid. Due to the deviation of the preparation process and the resistance change mechanism of the conductive filament type memristor, unavoidable intrinsic fluctuation exists in the aspects of switching time, operating voltage and the like. These fluctuations can be used as an ideal random source for implementation of hardware security systems based on a crisscrossed array architecture. Compared with the traditional hardware security system, the memristor array security system has obvious advantages in the aspects of area, power consumption and the like, and the anti-attack capability of the system can be effectively improved by increasing the array scale.
However, as array scale increases, crosstalk and leakage current problems can inevitably occur with 1R-type memristor arrays, such that the reliability of memristor-type physical unclonable functions is severely degraded. To improve reliability, researchers have proposed a new array with "select tubes+memristors" as the basic structure. The 1T1R structure array taking the MOS tube as the selection unit can realize the gating of the memristor by applying voltage to the grid electrode, effectively inhibit the problems of crosstalk and leakage current of the array and improve the reliability of the physical unclonable function. However, as CMOS device size scaling capabilities gradually reach a limit, the 1T 1R-type memristor array integration potential gradually decreases, and when applied to a security system, it is difficult to meet higher security requirements. Therefore, new schemes are needed to improve the safety and reliability of memristor-type physical unclonable functions at the same time.
Disclosure of Invention
In order to effectively realize the cooperative optimization of the safety and the reliability of the memristor type physical unclonable function, the invention provides a novel physical unclonable function realization method based on a self-activated memristor.
The technical scheme provided by the invention is as follows:
the physical unclonable function implementation method based on the self-activated memristor is characterized by adopting a memristor array with a 1R structure, wherein word lines and bit lines of the array are mutually and vertically crossed, the self-activated memristor is arranged at a crossing point, the self-activated memristor comprises a top electrode, a dielectric layer and a bottom electrode, the dielectric layer is formed by overlapping a resistance change material with selective characteristics and a resistance change material with storage characteristics up and down, and the specific steps are as follows:
1) Selecting a self-activated memristor to be written in the memristor array, and applying a pulse signal to enable a material layer with selective characteristics in a dielectric layer of the self-activated memristor to be in a low-resistance state, so that the resistance value of a material layer with storage characteristics in the dielectric layer is changed;
2) Counting the distribution of the resistance values of the storage characteristic materials of the self-activated memristors in the memristor array, setting a reference resistance value as an intermediate value in the resistance value distribution, and setting the storage characteristic material layer of the self-activated memristor into a high resistance state when the resistance value of the storage characteristic materials is larger than the reference resistance value; and when the resistance value of the storage characteristic material is smaller than the reference resistance value, the storage characteristic material layer of the self-activated memristor is in a low resistance state. The set reference resistance value enables the storage characteristic material of the self-excited memristor in the memristor array to be in a high-resistance state and a low-resistance state to occupy 50% respectively;
3) When the memristor array has M word lines and N bit lines, the challenge of the physical unclonable function is M+N bits, wherein the first M bits are used for selecting the word lines, M/2 bits are 1, M/2 bits are 0, the last N bits are used for selecting the bit lines, the first N/2 bits are 1, and the last N/2 bits are 1;
4) For any challenge, the generation of the whole response is completed by using M/2 cycles, and M/2 response bits are generated in total, and 1' challenge in the first M-bit challenges is selected for gating of corresponding rows in each cycle; simultaneously gating two corresponding columns according to 2 '1' challenges in the last N bits;
5) Respectively reading out the current of the self-activated memristor of the strobe, wherein the mth row and the nth row 1 Current I of self-activated memristor of column 1 And the mth line n 2 Current I of self-activated memristor of column 2 Comparison I 1 And I 2 When I is the size of 1 =I 2 When the output response is 1; when I 1 ≠I 2 And when the output response is 0, and the like, all M/2 bit response values are obtained, so that the physical unclonable function is realized.
Preferably, the structure of the self-activated memristor is a metal-insulator-metal capacitance structure, or a metal-semiconductor-metal capacitance structure, or the like.
Preferably, the self-activated memristor electrode is made of a metal material and is realized through a semiconductor process; the electrodes may be made of various metal materials, such as Pt, al, au, W, cu and TiN.
Preferably, the dielectric layer with selective characteristics adopts transition metal oxide with excellent threshold conversion characteristics, such as VO x 、NbO x Etc.; the dielectric layer adopts transition metal oxide with excellent nonvolatile resistance change characteristics, such as TaO x 、HfO x 、AlO x Etc.
The self-activated memristor device has excellent storage characteristic and selection characteristic, so that the device can be written, erased and read only when the threshold voltage is reached. The array based on the device can inhibit crosstalk and leakage current without integrating transistors, has high reliability and large integration potential, and can effectively improve the safety and reliability of the physical unclonable function.
Drawings
FIG. 1 is a schematic diagram of a self-activated memristor of the present disclosure; wherein 1 is a top electrode; 2-an upper dielectric layer A; 3-a lower dielectric layer B; 4-bottom electrode.
FIG. 2 is a typical electrical characteristic of a self-activated memristor of the present disclosure.
FIG. 3 is a 1R structural array of the self-activated memristor of the present disclosure.
FIG. 4 is a schematic diagram of a physical unclonable function hardware architecture based on a self-activating memristor.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
It should be noted that the purpose of the disclosed embodiments is to aid further understanding of the present invention, but those skilled in the art will appreciate that: various alternatives and modifications are possible without departing from the spirit and scope of the invention and the appended claims. Therefore, the invention should not be limited to the disclosed embodiments, but rather the scope of the invention is defined by the appended claims.
As shown in FIG. 1, a typical structure diagram of a self-activated memristor adopted by the present invention is that a dielectric layer of the device of this type is composed of two materials which are stacked, and the two materials have a selection characteristic and a storage characteristic respectively. When the upper dielectric layer A uses a resistive material with selective characteristics, the lower dielectric layer B selects the resistive material with storage characteristics; and vice versa. Typical electrical characteristics of a self-activated memristor are shown in fig. 2. When the storage characteristic material is in a high-resistance state, the self-activated memristor shows typical nonvolatile resistance change characteristics, and is mainly derived from the resistance change of the storage characteristic material; when the storage characteristic material is in a low resistance state, the self-activated memristors exhibit typical threshold switching characteristics, primarily due to the resistance change of the selected material.
In order to realize a high-safety physical unclonable function system, the array structure used by the invention is shown in fig. 3, and is a memristor array with a typical 1R structure. The Word Lines (WL) and Bit lines (Bit lines, BL) of the array cross each other perpendicularly, with the self-activated memristors at the crossing points. It can be seen that the 1R array has a smaller cell area and higher integration compared to the memristor array of the 1T1R structure.
Based on the memristor array of the 1R structure, the architecture of the physical unclonable function system of the present invention is shown in FIG. 4. When the dielectric layer a is a material with selective characteristics and the dielectric layer B is a material with storage characteristics, the implementation method for taking this as an example is as follows:
1. writing phase:
1) The device to be written is selected by the row selection module and the column selection module, pulse signals are applied by the pre-writing circuit, the pulse generation module and the like, a dielectric layer A of the device is opened (the dielectric layer A is in a low-resistance state), and the resistance value of a dielectric layer B of the device is further changed.
2) After writing, the medium layer A of the device is opened through a writing circuit, a pulse generating module and the like, and the distribution of the resistance value of the medium layer B is counted.
3) Setting a reference resistance value, and setting the dielectric layer B to be in a high resistance state when the resistance value of the dielectric layer B is larger than the reference resistance value; and when the resistance of the dielectric layer B is smaller than the reference resistance, setting the dielectric layer B into a low resistance state. The set reference resistance value enables 50% of devices in the array, wherein the devices are in a high-resistance state and a low-resistance state, respectively.
2. The using stage is as follows:
1) When the array size is MxN, i.e., there are M word lines and N bit lines, the challenge of the physical unclonable function of the present invention is m+n bits, where the first M bits are used for word line selection, the first M/2 bits are 1, the M/2 bits are 0, the last N bits are used for bit line selection, the first N/2 bits are 1, and the last N/2 bits are 1. Thus, the challenge-response versus space capacity of the physically unclonable function of the invention isWhen m=n=32, the spatial capacity is 2.98x10 11 There is an exponentially magnitude challenge-response and therefore a high security.
2) For any challenge, the generation of the full response is accomplished using M/2 cycles, yielding a total of M/2 response bits. In each cycle, 1 "of the first M-bit challenges is selected for gating of the corresponding row (exemplified by the mth row); at the same time, according to the 2 "1" challenges in the last N bits, the corresponding two columns (in N 1 Columns and n 2 Listed as an example).
3) Reading out the nth row of the mth row by the read circuit 1 Of columnsDevice current (I) 1 ) And the mth line n 2 Device electricity of column (I 2 ) And compare I by a comparison circuit 1 And I 2 Is of a size of (a) and (b). When I 1 =I 2 When the output response is 1; when I 1 ≠I 2 When the output response is 0.
4) And the like, obtaining all M/2 bit response values, and realizing a physical unclonable function.
While the invention has been described in terms of preferred embodiments, it is not intended to be limiting. Any person skilled in the art can make many possible variations and modifications to the technical solution of the present invention or modifications to equivalent embodiments using the methods and technical contents disclosed above, without departing from the scope of the technical solution of the present invention. Therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present invention still fall within the scope of the technical solution of the present invention.

Claims (6)

1. The physical unclonable function implementation method based on the self-activated memristor is characterized by adopting a memristor array with a 1R structure, wherein word lines and bit lines of the array are mutually and vertically crossed, the self-activated memristor is arranged at a crossing point, the self-activated memristor comprises a top electrode, a dielectric layer and a bottom electrode, the dielectric layer is formed by overlapping a resistance change material with selective characteristics and a resistance change material with storage characteristics up and down, and the specific steps are as follows:
1) Selecting a self-activated memristor to be written in the memristor array, and applying a pulse signal to enable a material layer with selective characteristics in a dielectric layer of the self-activated memristor to be in a low-resistance state, so that the resistance value of a material layer with storage characteristics in the dielectric layer is changed;
2) Counting the distribution of storage characteristic material resistance values of self-activated memristors in the memristor array, setting a reference resistance value, and setting the storage characteristic material layer of the self-activated memristors into a high resistance state when the resistance value of the storage characteristic material is larger than the reference resistance value; when the resistance value of the storage characteristic material is smaller than the reference resistance value, the storage characteristic material layer of the self-activated memristor is in a low resistance state;
3) When the memristor array has M word lines and N bit lines, the challenge of the physical unclonable function is M+N bits, wherein the first M bits are used for selecting the word lines, M/2 bits are 1, M/2 bits are 0, the last N bits are used for selecting the bit lines, the first N/2 bits are 1, and the last N/2 bits are 1;
4) For any challenge, the generation of the whole response is completed by using M/2 cycles, and M/2 response bits are generated in total, and 1' challenge in the first M-bit challenges is selected for gating of corresponding rows in each cycle; simultaneously gating two corresponding columns according to 2 '1' challenges in the last N bits;
5) Respectively reading out the current of the self-activated memristor of the strobe, wherein the mth row and the nth row 1 Current I of self-activated memristor of column 1 And the mth line n 2 Current I of self-activated memristor of column 2 Comparison I 1 And I 2 When I is the size of 1 =I 2 When the output response is 1; when I 1 ≠I 2 And when the output response is 0, and the like, all M/2 bit response values are obtained, so that the physical unclonable function is realized.
2. The method of claim 1, wherein the reference resistance is set such that the memory characteristic material of the self-activated memristors in the memristor array is in a high-resistance state and a low-resistance state each of 50%.
3. The method of claim 1, wherein the self-activated memristor structure is a metal-insulator-metal capacitance structure or a metal-semiconductor-metal capacitance structure.
4. The method of claim 1, wherein the top electrode or bottom electrode is made of Pt, al, au, W, cu or TiN material.
5. The method for realizing a physical unclonable function based on a self-activated memristor of claim 1, wherein the resistive material with selective characteristics is VO x Or NbO x
6. The method for realizing a physical unclonable function based on a self-activated memristor of claim 1, wherein the resistive material with storage characteristic is TaO x 、HfO x Or AlO x
CN202311170478.4A 2023-09-12 2023-09-12 Implementation method of physical unclonable function based on self-activated resistive random access device Pending CN117219139A (en)

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