CN107908588A - A kind of ultrasound endoscope image acquisition interface system based on PCIE synchronous transfers - Google Patents
A kind of ultrasound endoscope image acquisition interface system based on PCIE synchronous transfers Download PDFInfo
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- CN107908588A CN107908588A CN201711027914.7A CN201711027914A CN107908588A CN 107908588 A CN107908588 A CN 107908588A CN 201711027914 A CN201711027914 A CN 201711027914A CN 107908588 A CN107908588 A CN 107908588A
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- pcie
- fpga
- bus interface
- data
- computer
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Abstract
The invention discloses a kind of ultrasound endoscope image acquisition interface system based on PCIE synchronous transfers, including with computer, PCIEx8 bus interface, FPGA and the peripheral data buffer being connected with FPGA, computer carries PCIE slots, and is connected by PCIE slots with PCIE x8 bus interface;FPGA completes the environment configurations to PCIE x8 bus interface as PCIE x8 bus interface control cores;The FPGA receives the control signal of computer by PCIE x8 bus interface, after computer identification drives the PCIE x8 bus interface, read the status information of PCIE x8 bus interface, and send data from PCIE x8 bus interface to FPGA, send data to be transferred in the inner buffer area of FPGA, so as to the processing to transmitted data.Invention system carries out high speed data transfer using PCIE buses, it, which receives the data speed of image, can reach 1GB/S, can be applied to endoscopic ultrasonography system and phased array supersonic endoscope system, meet requirement of real time.
Description
Technical field
The present invention relates to peeped in a kind of image capture interface system, more particularly to a kind of ultrasound based on PCIE synchronous transfers
Mirror image capture interface system.
Background technology
Super medical ultrasonic endoscope carries out Tomography to organs such as the stomach of human intracavity, intestines, can check under mucous membrane
Minimal disease, the early diagnosis to diseases such as cancers are of great significance, and are the boundless Medical Instruments of current application prospect.
With the continuous development of medical endoscopes, people propose higher and higher need to the image taking speed of medical endoscopes and the quality of imaging
Ask.Wherein ultrasonic endoscopic acquisition interface system can solve the problems, such as that the image taking speed of ultrasonic endoscopic is low, for fast in real time
Rapid-result picture is of great significance.
A kind of ultrasound endoscope image acquisition interface system based on USB synchronous transfers that patent CN201310519884 is announced
System transmission speed only has 16MB/S, and the about 1GB/S difference in speed that reaches with the present invention is very it will be evident that of the invention at the same time
But realize two-way communication, it is more accurate to data control, while can send data in FPGA internal buffers, then will
The data are used in follow-up image procossing.
The content of the invention
The purpose of the invention is to overcome deficiency of the prior art, there is provided a kind of ultrasound based on PCIE synchronous transfers
Endoscopic images acquisition interface system.Present system carries out high speed data transfer using PCIE buses, it receives the number of image
It can reach 1GB/S according to speed, can be applied to endoscopic ultrasonography system and phased array supersonic endoscope system, to meet in real time
Ask.
The purpose of the present invention is what is be achieved through the following technical solutions:
A kind of ultrasound endoscope image acquisition interface system based on PCIE synchronous transfers, including band computer, PCIEx8
Bus interface, FPGA and the peripheral data buffer being connected with FPGA, computer carries PCIE slots, and passes through PCIE slots
It is connected with PCIE x8 bus interface;
FPGA completes the environment configurations to PCIE x8 bus interface as PCIE x8 bus interface control cores;It is described
FPGA receives the control signal of computer by PCIE x8 bus interface, in the control signal and peripheral data buffer and
Under the control signal collective effect that FPGA itself is produced, FPGA, which sets up the data in peripheral data buffer, meets PCIE agreements
Data packet, view data is passed in computer under the control for passing through FPGA and computer by PCIE x8 bus interface;
After computer identification drives the PCIE x8 bus interface, the status information of PCIE x8 bus interface is read, with
And data are sent from PCIE x8 bus interface to FPGA, send data and be transferred in the inner buffer area of FPGA, so as to institute
Send the processing of data.
Further, the PCIE slots that computer carries meet PCIE 3.0.
Further, peripheral data buffer is DDR3.
Compared with prior art, beneficial effect caused by technical scheme is:
Ultrasound endoscope image acquisition interface system of the invention based on PCIE synchronous transfers realizes quick transmission image
Data function, transmission speed can reach 1GB/S, full applied to scan-type ultrasonic endoscopic and phased array supersonic endoscope etc.
Sufficient real-time display requirements;Dual transfer mode, data control are more accurate;By PCIE data bus interfaces, host computer can be with
Data are sent into lower computer FPGA, for follow-up image procossing.
Brief description of the drawings
Fig. 1 is the structure diagram of the present invention.
Fig. 2 is the flow chart of interface routine of the present invention.
Reference numeral:1st, computer;2nd, PCIE x8 data-interfaces;3、FPGA;4th, peripheral data buffer.
Embodiment
Embodiment of the present invention is specifically described below in conjunction with the accompanying drawings:
As shown in Figure 1, the present invention is by computer 1, PCIE x8 data-interfaces 2, FPGA 3,4 groups of peripheral data buffer
Into.
The present invention is mainly ultrasound data acquisition Interface design.Specifically used example is as shown in Fig. 2, PCIE x8 numbers
It is inserted into according to interface 2 in the PCIE slots of computer 1, starts slave computer and computer 1 based on FPGA 3.It is soft to open host computer
Part installation driving, completes the initialization of system.
When the initialization of system is completed, after PCIE x8 data-interfaces 2 communicate normally, the major function of realization has 3 as follows
It is a:
Function 1, reads PCIE status informations.Host computer sends the data structure of corresponding reading PCIE states, passes through
PCIE x8 data-interfaces 2 are received by slave computer, so that host computer is sent to by PCIE status informations are stored in FPGA3, by upper
Machine, which receives, to be judged, is prevented due to the data transmission fault of hardware anomalies appearance and record transmission information etc..
Function 2, sends data packet.The write request information for sending data is sent to down by PCIE by PCIEx8 data-interfaces
Position machine, slave computer, which is opened, to be write enabled, is received in host computer and is met the data packet of PCIE agreements, and data packet is saved in FPGA
In depositing, the processing for subsequent ultrasonic view data.
Function 3, received data packet.The view data of ultrasonic image-forming system collection is deposited after image processing system is handled
It is put into peripheral data buffer 4 (the present embodiment DDR3), FPGA is as control letter caused by the peripheral control unit of PCIE
Number and from host computer receive PCIE read data message signale co- controlling under, image data set is built up and meets PCIE
Protocol data bag, then sets up data head according to dma mode and passes through PCIE from peripheral hardware buffer reading ultrasound image data
X8 data-interfaces are transmitted in host computer with the speed of 1GB/S, ensure ultrasonic system real-time.
The present invention completes order control, data sending and the image data acquiring of ultrasonic system with the mechanism of message response,
Its is simple and compact for structure, and data transfer is efficiently and safe and reliable, improves the real-time of ultrasonic system.
The present invention is not limited to embodiments described above.The description to embodiment is intended to describe and says above
Bright technical scheme, above-mentioned embodiment is only schematical, is not restricted.This is not being departed from
In the case of invention objective and scope of the claimed protection, those of ordinary skill in the art may be used also under the enlightenment of the present invention
The specific conversion of many forms is made, these are belonged within protection scope of the present invention.
Claims (3)
1. a kind of ultrasound endoscope image acquisition interface system based on PCIE synchronous transfers, it is characterised in that calculated including band
Machine (1), PCIEx8 bus interface (2), FPGA (3) and the peripheral data buffer (4) being connected with FPGA (3), the calculating
Machine (1) carries PCIE slots, and is connected by PCIE slots with PCIE x8 bus interface (2);
FPGA (3) is used as PCIE x8 bus interface (2) control core, completes the environment configurations to PCIE x8 bus interface (2);
The FPGA (3) receives the control signal of computer (1) by PCIE x8 bus interface (2), in the control signal and peripheral hardware
Under the control signal collective effect that data buffer (4) and FPGA (3) itself are produced, FPGA (3) is by peripheral data buffer (4)
In data set up and meet the data packets of PCIE agreements, FPGA (3) and computer (1) are passed through by PCIE x8 bus interface (2)
View data is passed in computer (1) under control;
After computer (1) identification drives the PCIE x8 bus interface (2), the state letter of PCIE x8 bus interface (2) is read
Breath, and data are sent from PCIE x8 bus interface (2) to FPGA (3), the inside that transmission data are transferred to FPGA (3) is delayed
Deposit in area, so as to the processing to transmitted data.
2. the ultrasound endoscope image acquisition interface system according to claim 1 based on PCIE synchronous transfers, its feature
It is that the PCIE slots that the computer (1) carries meet PCIE 3.0.
3. the ultrasound endoscope image acquisition interface system according to claim 1 based on PCIE synchronous transfers, its feature
It is that the peripheral data buffer (4) is DDR3.
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Cited By (1)
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---|---|---|---|---|
CN115905039A (en) * | 2022-11-16 | 2023-04-04 | 逸超医疗科技(北京)有限公司 | Method for acquiring ultrasonic data at high speed based on PCIe interface |
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CN103294836A (en) * | 2013-05-13 | 2013-09-11 | 西安电子科技大学 | PCIE (peripheral component interconnect express) based radar data acquisition displaying and controlling system and method thereof |
CN103678217A (en) * | 2013-12-09 | 2014-03-26 | 无锡市同威科技有限公司 | High-speed scanning interface device based on PCIE |
CN103701776A (en) * | 2013-12-09 | 2014-04-02 | 无锡市同威科技有限公司 | Network data card and data transmission method based on FPGA (Field Programmable Gate Array) |
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2017
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Patent Citations (5)
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US20120131253A1 (en) * | 2010-11-18 | 2012-05-24 | Mcknight Thomas P | Pcie nvram card based on nvdimm |
CN102117342A (en) * | 2011-01-21 | 2011-07-06 | 中国科学院上海技术物理研究所 | Peripheral component interconnect (PCI) Express bus-based multiband infrared image real-time acquisition system and method |
CN103294836A (en) * | 2013-05-13 | 2013-09-11 | 西安电子科技大学 | PCIE (peripheral component interconnect express) based radar data acquisition displaying and controlling system and method thereof |
CN103678217A (en) * | 2013-12-09 | 2014-03-26 | 无锡市同威科技有限公司 | High-speed scanning interface device based on PCIE |
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CN115905039A (en) * | 2022-11-16 | 2023-04-04 | 逸超医疗科技(北京)有限公司 | Method for acquiring ultrasonic data at high speed based on PCIe interface |
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