CN107907914B - Measurement circuit of true geography three-component magnetometer - Google Patents

Measurement circuit of true geography three-component magnetometer Download PDF

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CN107907914B
CN107907914B CN201711434898.3A CN201711434898A CN107907914B CN 107907914 B CN107907914 B CN 107907914B CN 201711434898 A CN201711434898 A CN 201711434898A CN 107907914 B CN107907914 B CN 107907914B
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CN107907914A (en
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章雪挺
许欢
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Hangzhou Dianzi University
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01V—GEOPHYSICS; GRAVITATIONAL MEASUREMENTS; DETECTING MASSES OR OBJECTS; TAGS
    • G01V3/00—Electric or magnetic prospecting or detecting; Measuring magnetic field characteristics of the earth, e.g. declination, deviation
    • G01V3/40—Electric or magnetic prospecting or detecting; Measuring magnetic field characteristics of the earth, e.g. declination, deviation specially adapted for measuring magnetic field characteristics of the earth
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02A—TECHNOLOGIES FOR ADAPTATION TO CLIMATE CHANGE
    • Y02A90/00—Technologies having an indirect contribution to adaptation to climate change
    • Y02A90/30—Assessment of water resources

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Abstract

The invention relates to a measurement circuit of a true geographic three-component magnetometer. The invention comprises a power supply circuit, a sensor signal acquisition circuit, a main control circuit, a serial port gesture measurement circuit, an RTC clock circuit, a data transmission circuit, an SD card storage circuit, a file management circuit and an external interface circuit. The sensor signal acquisition circuit comprises a digital-to-analog conversion circuit, an X-axis analog signal addition circuit, a Y-axis analog signal addition circuit and a Z-axis analog signal addition circuit. The invention adopts the fluxgate sensor of Bartington company in UK, combines the characteristics of high sensitivity, high resolution, low power consumption and the like of the fluxgate sensor, and realizes the measurement of three components of geomagnetic field in real geographic environment based on the design of a measuring circuit by adding a serial port gesture measuring module.

Description

一种真地理三分量磁力仪的测量电路A measurement circuit of a true geographical three-component magnetometer

技术领域Technical field

本发明属于磁场测量技术领域，具体涉及一种真地理三分量磁力仪的测量电路。The invention belongs to the technical field of magnetic field measurement, and specifically relates to a measurement circuit of a true geographical three-component magnetometer.

背景技术Background technique

磁场环境测量在舰船消磁、控制仪器、航天航空、地质勘探、工业自动化、无损检测、磁性导航等众多领域有着广泛的应用。为了满足勘探、探矿等业务的需求，促使地质及海洋勘探事业的发展，人们对磁法探测提出了更高的要求。磁通门三分量仪就是利用三分量磁通门传感器实现测量的仪器。在以往的磁力仪中，只涉及仪器坐标系下磁场三分量的测量，而在实际运用中，往往需要参考的是真实地理环境下的磁场分量，因此，在磁力仪测量地磁场时，涉及到测量坐标轴转换的问题。再者，磁场是一个不断变化的量，在实际研究与探测中，需要了解磁场的变化趋势，在测量过程中需要对观测量进行实时存储与备份。因此，研制一种精度高，实时存储性好，且用于真实地理环境下的磁场三分量的磁通门三分量仪，将在地质勘探等领域中发挥重要的作用。Magnetic field environment measurement is widely used in many fields such as ship degaussing, control instruments, aerospace, geological exploration, industrial automation, non-destructive testing, magnetic navigation and so on. In order to meet the needs of exploration, prospecting and other businesses and promote the development of geological and marine exploration, people have put forward higher requirements for magnetic detection. The three-component fluxgate meter is an instrument that uses a three-component fluxgate sensor to achieve measurement. In the past, magnetometers only involved the measurement of three components of the magnetic field in the instrument coordinate system. However, in practical applications, it is often necessary to refer to the magnetic field components in the real geographical environment. Therefore, when the magnetometer measures the geomagnetic field, it involves The problem of measuring coordinate axis conversion. Furthermore, the magnetic field is a constantly changing quantity. In actual research and detection, it is necessary to understand the changing trend of the magnetic field, and the observed quantities need to be stored and backed up in real time during the measurement process. Therefore, the development of a three-component fluxgate instrument with high precision, good real-time storage, and use for three-component magnetic fields in real geographical environments will play an important role in geological exploration and other fields.

发明内容Contents of the invention

本发明的目的在于提供一种真地理三分量磁力仪的测量电路。The object of the present invention is to provide a measurement circuit for a true geographical three-component magnetometer.

本发明包括电源电路、传感器信号采集电路、主控电路、串口姿态测量电路、RTC时钟电路、数据传输电路、SD卡存储电路、文件管理电路、对外接口电路。传感器信号采集电路的信号输出端与对外接口电路的信号输入端单向信号连接，传感器信号采集电路的信号端与主控电路的第一信号端双向信号连接；对外接口电路的信号输出端与文件管理电路的信号输入端单向信号连接，对外接口电路的信号输入端与主控电路的第一信号输出端单向信号连接，对外接口电路的信号端与数据传输电路的信号端双向信号连接；主控电路的第二信号输出端与SD卡存储电路的信号输入端单向信号连接，主控电路的信号输入端与RTC时钟电路信号输出端单向信号连接，主控电路的第二信号端与串口姿态测量电路的信号端双向信号连接。The invention includes a power supply circuit, a sensor signal acquisition circuit, a main control circuit, a serial port attitude measurement circuit, an RTC clock circuit, a data transmission circuit, an SD card storage circuit, a file management circuit, and an external interface circuit. The signal output end of the sensor signal acquisition circuit is connected to the signal input end of the external interface circuit in a unidirectional signal manner, the signal end of the sensor signal acquisition circuit is connected to the first signal end of the main control circuit in a bidirectional signal manner; the signal output end of the external interface circuit is connected to the file The signal input end of the management circuit is connected with a one-way signal, the signal input end of the external interface circuit is connected with the first signal output end of the main control circuit with a one-way signal, and the signal end of the external interface circuit is connected with the signal end of the data transmission circuit with a bidirectional signal; The second signal output terminal of the main control circuit is connected with the signal input terminal of the SD card storage circuit in a one-way signal. The signal input terminal of the main control circuit is connected with the signal output terminal of the RTC clock circuit in a one-way signal. The second signal terminal of the main control circuit is Bidirectional signal connection with the signal end of the serial port attitude measurement circuit.

所述的电源电路包括+15V稳压电路、-15V稳压电路、+5V稳压电路、+4.5V基准电压电路、+3.3V稳压电路、+3.3V开关电源电路、+2.5V基准电压电路；+15V稳压电路、-15V稳压电路给磁通门传感器供电，+5V稳压电路为数据传输电路提供稳定性高的电压，并与线性电路得到纹波较小的+4.5V和+2.5V,其中+4.5V基准电压电路用于为传感器信号采集电路中三轴模拟信号加法电路提供高精度的基准电压，+2.5V基准电压电路用于为传感器信号采集电路中数模转换电路提供稳定的基准电压；+3.3V稳压电路及+3.3V开关电路则用于给主控电路、串口姿态测量电路、RTC时钟电路、SD卡存储电路、文件管理电路提供稳定电压；The power supply circuit includes a +15V voltage stabilizing circuit, a -15V voltage stabilizing circuit, a +5V voltage stabilizing circuit, a +4.5V reference voltage circuit, a +3.3V voltage stabilizing circuit, a +3.3V switching power supply circuit, and a +2.5V reference voltage Circuit; the +15V voltage stabilizing circuit and the -15V voltage stabilizing circuit supply power to the fluxgate sensor. The +5V voltage stabilizing circuit provides a highly stable voltage for the data transmission circuit, and is combined with the linear circuit to obtain +4.5V and a smaller ripple. +2.5V, of which the +4.5V reference voltage circuit is used to provide a high-precision reference voltage for the three-axis analog signal adder circuit in the sensor signal acquisition circuit, and the +2.5V reference voltage circuit is used for the digital-to-analog conversion circuit in the sensor signal acquisition circuit. Provide a stable reference voltage; the +3.3V voltage stabilizing circuit and the +3.3V switching circuit are used to provide stable voltage to the main control circuit, serial port attitude measurement circuit, RTC clock circuit, SD card storage circuit, and file management circuit;

所述的+15V稳压电路、-15V稳压电路包括开关电源芯片U1、电容C1-C3；电容C1的一端、开关电源芯片U1的2脚连接后接地，电容C1的另一端、开关电源芯片U1的1脚连接后接+24V电源；电容C2的一端接开关电源芯片U1的3脚，作为+15V电源输出端；电容C2的另一端、电容C3的一端、开关电源芯片U1的4脚连接后接地；电容C3的另一端接开关电源芯片U1的5脚，作为-15V电源输出端；开关电源芯片U1采用德州仪器的DC-DC开关电源芯片；The +15V voltage stabilizing circuit and the -15V voltage stabilizing circuit include switching power supply chip U1 and capacitors C1-C3; one end of capacitor C1 and pin 2 of switching power supply chip U1 are connected to ground, and the other end of capacitor C1 and switching power supply chip Pin 1 of U1 is connected to the +24V power supply; one end of the capacitor C2 is connected to pin 3 of the switching power supply chip U1 as the +15V power output; the other end of the capacitor C2, one end of the capacitor C3, and pin 4 of the switching power supply chip U1 are connected The other end of the capacitor C3 is connected to pin 5 of the switching power supply chip U1 as the -15V power output terminal; the switching power supply chip U1 adopts the DC-DC switching power supply chip of Texas Instruments;

所述的+5V稳压电路包括开关电源芯片U2、极性电容Cp1-Cp4、电阻R1-R4、电感L1、电容C4-C6、发光二极管D1；开关电源芯片U2的7脚、电阻R1的一端、极性电容Cp1的正极、极性电容Cp2的正极、极性电容Cp3的正极接+24V电源；极性电容Cp1的负极、极性电容Cp2的负极、极性电容Cp3的负极分别接地；电阻R1的另一端、开关电源芯片U2的5脚接电阻R2的一端；电阻R2的另一端、开关电源芯片U2的6脚连接后接地；电容C4的一端接开关电源芯片U2的1脚，电容C4的另一端、电感L1的一端、二极管D1的阴极接开关电源芯片U2的8脚；二极管D1的阳极接地；电感L1的另一端、电阻R3的一端、极性电容Cp4的正极、电容C5的一端、电容C6的一端连接，作为+5V电源输出端；电阻R3的另一端、电阻R4的一端接开关电源芯片U2的4脚；极性电容Cp4的负极、电阻R4的另一端连接后接地，电容C5的另一端、电容C6的另一端分别接地；开关电源芯片U2的剩余引脚悬空；开关电源芯片U2采用德州仪器的开关电源芯片TPS5420；The +5V voltage stabilizing circuit includes switching power supply chip U2, polar capacitors Cp1-Cp4, resistors R1-R4, inductor L1, capacitors C4-C6, and light-emitting diode D1; pin 7 of the switching power supply chip U2 and one end of the resistor R1 , the positive electrode of polar capacitor Cp1, the positive electrode of polar capacitor Cp2, and the positive electrode of polar capacitor Cp3 are connected to the +24V power supply; the negative electrode of polar capacitor Cp1, the negative electrode of polar capacitor Cp2, and the negative electrode of polar capacitor Cp3 are connected to ground respectively; the resistor The other end of R1 and pin 5 of switching power supply chip U2 are connected to one end of resistor R2; the other end of resistor R2 and pin 6 of switching power supply chip U2 are connected to ground; one end of capacitor C4 is connected to pin 1 of switching power supply chip U2, and capacitor C4 The other end of the inductor L1, one end of the inductor L1, and the cathode of the diode D1 are connected to pin 8 of the switching power supply chip U2; the anode of the diode D1 is connected to ground; the other end of the inductor L1, one end of the resistor R3, the positive electrode of the polarity capacitor Cp4, and one end of the capacitor C5 , one end of the capacitor C6 is connected as the +5V power output end; the other end of the resistor R3 and one end of the resistor R4 are connected to pin 4 of the switching power supply chip U2; the negative electrode of the polar capacitor Cp4 and the other end of the resistor R4 are connected to ground. The other end of C5 and the other end of capacitor C6 are grounded respectively; the remaining pins of the switching power supply chip U2 are floating; the switching power supply chip U2 adopts the switching power supply chip TPS5420 of Texas Instruments;

所述的+4.5V基准电压电路包括基准电压芯片U6、运算放大器芯片U7、电感L2、极性电容Cp8、电容C19-C24、电阻R20-R21；电感L2的一端、极性电容Cp8的正极、电容C19的一端接基准电压芯片U7的2脚；电感L2的另一端接+5V稳压电路的+5V稳压输出端；极性电容Cp8的负极、电容C19的另一端、基准电压芯片U6的4脚连接后接地；电阻R20的一端接基准电压芯片U6的6脚，电阻R20的另一端、电容C21的一端接运算放大器芯片U7的3脚，电容C21的另一端接地；电容C20的一端接基准电压芯片U6的5脚，电容C20的另一端接地；运算放大器芯片U7的4脚接地；电容C22的一端、运算放大器芯片U7的7脚连接后接+5V稳压电路的+5V稳压输出端，电容C22的另一端接地；电阻R21的一端接运算放大器芯片U7的6脚，电阻R21的另一端、电容C23的一端、电容C24的一端连接，作为+4.5V基准电压输出端，电容C23的另一端、电容C24的另一端分别接地；基准电压芯片U6、运算放大器芯片U7的剩余引脚悬空；基准电压芯片U6采用德州仪器的基准电压芯片REF5045；运算放大器芯片U7采用德州仪器的精密运放芯片OPA376；The +4.5V reference voltage circuit includes a reference voltage chip U6, an operational amplifier chip U7, an inductor L2, a polar capacitor Cp8, a capacitor C19-C24, and a resistor R20-R21; one end of the inductor L2, the positive electrode of the polar capacitor Cp8, One end of the capacitor C19 is connected to pin 2 of the reference voltage chip U7; the other end of the inductor L2 is connected to the +5V regulated output end of the +5V voltage stabilizing circuit; the negative pole of the polar capacitor Cp8, the other end of the capacitor C19, and the reference voltage chip U6 Pin 4 is connected to ground; one end of resistor R20 is connected to pin 6 of reference voltage chip U6, the other end of resistor R20 and one end of capacitor C21 are connected to pin 3 of operational amplifier chip U7, the other end of capacitor C21 is connected to ground; one end of capacitor C20 is connected to ground. The 5th pin of the reference voltage chip U6 and the other end of the capacitor C20 are connected to the ground; the 4th pin of the operational amplifier chip U7 is connected to the ground; one end of the capacitor C22 and the 7th pin of the operational amplifier chip U7 are connected to the +5V regulated output of the +5V voltage stabilizing circuit. end, the other end of capacitor C22 is connected to ground; one end of resistor R21 is connected to pin 6 of operational amplifier chip U7, the other end of resistor R21, one end of capacitor C23, and one end of capacitor C24 are connected as a +4.5V reference voltage output end, capacitor C23 The other ends of the capacitor C24 and the other end of the capacitor C24 are grounded respectively; the remaining pins of the reference voltage chip U6 and the operational amplifier chip U7 are left floating; the reference voltage chip U6 adopts the reference voltage chip REF5045 of Texas Instruments; the operational amplifier chip U7 adopts the precision operation of Texas Instruments. Put chip OPA376;

所述的+3.3V稳压电路包括稳压电源芯片U10、极性电容Cp10、电容C34-C36；极性电容Cp10的正极、电容C34的一端、稳压电源芯片U10的3脚连接后接电源VDD，极性电容Cp10的负极、电容C34的另一端分别接地；稳压电源芯片U10的1脚接地；电容C35的一端、电容C36的一端接稳压电源芯片U10的2脚，作为+3.3V稳压电路的+3.3V电压输出端，电容C35的另一端、电容C36的另一端分别接地；稳压电源芯片U10采用稳压电源芯片LM1117；The +3.3V voltage stabilizing circuit includes a voltage stabilizing power supply chip U10, a polar capacitor Cp10, and a capacitor C34-C36; the positive electrode of the polar capacitor Cp10, one end of the capacitor C34, and pin 3 of the voltage stabilizing power supply chip U10 are connected to the power supply. VDD, the negative pole of polarity capacitor Cp10 and the other end of capacitor C34 are connected to ground respectively; pin 1 of regulated power supply chip U10 is connected to ground; one end of capacitor C35 and one end of capacitor C36 are connected to pin 2 of regulated power supply chip U10 as +3.3V The +3.3V voltage output end of the voltage stabilizing circuit, the other end of the capacitor C35 and the other end of the capacitor C36 are connected to ground respectively; the voltage stabilizing power supply chip U10 uses the voltage stabilizing power supply chip LM1117;

所述的+3.3V开关电源电路包括开关电源芯片U11、电容C37-C40、电阻R23、发光二极管D3；电容C38的一端、电容C37的一端、开关电源芯片U11的3脚、4脚连接后接+5V稳压电路的+5V稳压输出端，电容C37的另一端、开关电源芯片U11的2脚连接后接地，电容C38的另一端、开关电源芯片U11的1脚连接后接地；电容C39的一端、电容C40的一端、电阻R23的一端、开关电源芯片U11的5脚、6脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C39的另一端、电容C40的另一端分别接地，电阻R23的另一端接发光二极管D3的阳极，发光二极管D3的阴极接地；开关电源芯片U11的剩余引脚悬空；开关电源芯片U11采用的是德州仪器的开关电源芯片TPS7350；The +3.3V switching power supply circuit includes switching power supply chip U11, capacitors C37-C40, resistor R23, and light-emitting diode D3; one end of capacitor C38, one end of capacitor C37, and pins 3 and 4 of switching power supply chip U11 are connected and connected. For the +5V regulated output end of the +5V voltage stabilizing circuit, the other end of the capacitor C37 is connected to pin 2 of the switching power supply chip U11 and then grounded. The other end of the capacitor C38 is connected to pin 1 of the switching power supply chip U11 and then grounded. The other end of the capacitor C39 is connected to the ground. One end, one end of the capacitor C40, one end of the resistor R23, pins 5 and 6 of the switching power supply chip U11 are connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit, the other end of the capacitor C39, and the other end of the capacitor C40 One end is connected to the ground respectively, the other end of the resistor R23 is connected to the anode of the light-emitting diode D3, and the cathode of the light-emitting diode D3 is connected to the ground; the remaining pins of the switching power supply chip U11 are suspended; the switching power supply chip U11 uses the switching power supply chip TPS7350 of Texas Instruments;

所述的+2.5V基准电压电路包括基准电压芯片U15、运算放大器芯片U16、电感L3、极性电容Cp13、电容C56-C61、电阻R33-R34；电感L3的一端、极性电容Cp13的正极、电容C56的一端接基准电压芯片U15的2脚，电感L3的另一端接+5V稳压电路的+5V稳压输出端，极性电容Cp13的负极、电容C56的另一端、基准电压芯片U15的4脚连接后接地；电阻R33的一端接基准电压芯片U15的6脚，电阻R33的另一端、电容C58的一端接运算放大器芯片U16的3脚，电容C58的另一端接地；电容C57的一端接基准电压芯片U15的5脚，电容C57的另一端接地；运算放大器芯片U16的4脚接地；电容C59的一端、运算放大器芯片U16的7脚连接后接+5V稳压电路的+5V稳压输出端，电容C59的另一端接地；电阻R34的一端接运算放大器芯片U16的6脚，电阻R34的另一端、电容C60的一端、电容C61的一端连接，作为+2.5V基准电压输出端，电容C60的另一端、电容C61的另一端分别接地；基准电压芯片U15、运算放大器芯片U16的其他引脚悬空；基准电压芯片U15采用德州仪器的基准电压芯片REF5045；运算放大器芯片U16采用德州仪器的精密运放芯片OPA376。The +2.5V reference voltage circuit includes a reference voltage chip U15, an operational amplifier chip U16, an inductor L3, a polar capacitor Cp13, a capacitor C56-C61, and a resistor R33-R34; one end of the inductor L3, the positive electrode of the polar capacitor Cp13, One end of the capacitor C56 is connected to pin 2 of the reference voltage chip U15, the other end of the inductor L3 is connected to the +5V voltage stabilizing output of the +5V voltage stabilizing circuit, the negative pole of the polarity capacitor Cp13, the other end of the capacitor C56, and the pin of the reference voltage chip U15 Pin 4 is connected to ground; one end of resistor R33 is connected to pin 6 of reference voltage chip U15, the other end of resistor R33 and one end of capacitor C58 are connected to pin 3 of operational amplifier chip U16, the other end of capacitor C58 is connected to ground; one end of capacitor C57 is connected to ground. The 5th pin of the reference voltage chip U15 and the other end of the capacitor C57 are connected to the ground; the 4th pin of the operational amplifier chip U16 is connected to the ground; one end of the capacitor C59 and the 7th pin of the operational amplifier chip U16 are connected to the +5V regulated output of the +5V voltage stabilizing circuit. end, the other end of capacitor C59 is connected to ground; one end of resistor R34 is connected to pin 6 of operational amplifier chip U16, the other end of resistor R34, one end of capacitor C60, and one end of capacitor C61 are connected as a +2.5V reference voltage output end, capacitor C60 The other end of the capacitor C61 is grounded respectively; the other pins of the reference voltage chip U15 and the operational amplifier chip U16 are left floating; the reference voltage chip U15 adopts the reference voltage chip REF5045 of Texas Instruments; the operational amplifier chip U16 adopts the precision operation of Texas Instruments. Put the chip OPA376.

所述的传感器信号采集电路包括X轴、Y轴、Z轴三个模拟信号加法电路及数模转换电路；三个结构相似的轴向模拟信号加法电路，用于将传感器输出信号电压值转换成模数转换电路可接受的电压值；The sensor signal acquisition circuit includes three analog signal addition circuits for the X-axis, Y-axis, and Z-axis and a digital-to-analog conversion circuit; three axial analog signal addition circuits with similar structures are used to convert the sensor output signal voltage value into Acceptable voltage values for analog-to-digital conversion circuits;

所述的X轴模拟信号加法电路包括运算放大器芯片U3、电阻R5-R9、电容C7-C10、极性电容Cp5；电阻R5的一端、电阻R6的一端、电阻R7的一端接运算放大器芯片U3的3脚，电阻R5的另一端接+4.5V基准电压电路的+4.5V基准电压输出端，电阻R6的另一端接电容C7的一端，作为X轴磁场信号输入端，电容C7的另一端接电阻R7的另一端并接地；运算放大器芯片U3的4脚接地；运算放大器芯片U3的1脚和2脚连接后接电源V_Back；电容C8的一端、极性电容Cp5的正极、运算放大器芯片U3的8脚接+5V稳压电路的+5V稳压输出端，电容C8的另一端接极性电容Cp5的负极并接地；运算放大器芯片U3的6脚、7脚、电容C10的一端连接作为X轴模拟信号加法电路的输出端，接通用插排P2的6脚；电容C9的一端、电阻R8的一端接运算放大器芯片U3的5脚，电容C9的另一端接地，电阻R8的另一端、电阻R9的一端接电容C10的另一端，电阻R9的另一端接电源V_Back；运算放大器芯片U3采用德州仪器的精密运放芯片OPA2376；The described Pin 3, the other end of the resistor R5 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit, the other end of the resistor R6 is connected to one end of the capacitor C7, which is used as the X-axis magnetic field signal input end, and the other end of the capacitor C7 is connected to the resistor The other end of R7 is connected to the ground; pin 4 of the operational amplifier chip U3 is connected to the ground; pins 1 and 2 of the operational amplifier chip U3 are connected and then connected to the power supply V_Back; one end of the capacitor C8, the positive electrode of the polarity capacitor Cp5, and pin 8 of the operational amplifier chip U3 The pin is connected to the +5V voltage stabilizing output of the +5V voltage stabilizing circuit, and the other end of capacitor C8 is connected to the negative pole of polar capacitor Cp5 and grounded; pins 6 and 7 of operational amplifier chip U3 and one end of capacitor C10 are connected as X-axis simulation The output end of the signal adder circuit is connected to pin 6 of universal plug-in strip P2; one end of capacitor C9 and one end of resistor R8 are connected to pin 5 of operational amplifier chip U3, the other end of capacitor C9 is connected to ground, and the other end of resistor R8 and resistor R9 One end is connected to the other end of the capacitor C10, and the other end of the resistor R9 is connected to the power supply V_Back; the operational amplifier chip U3 uses the Texas Instruments precision operational amplifier chip OPA2376;

所述的Y轴模拟信号加法电路包括运算放大器芯片U4、电阻R10-R14、电容C11-C14、极性电容Cp6；电阻R10的一端、电阻R11的一端、电阻R12的一端接运算放大器芯片U4的3脚，电阻R10的另一端接+4.5V基准电压电路的+4.5V基准电压输出端，电阻R11的另一端接电容C11的一端，作为Y周磁场信号的输入端，电容C11的另一端接电阻R12的另一端并接地；运算放大器芯片U4的4脚接地；运算放大器芯片U4的1脚和2脚连接后接电源V_Back；电容C12的一端、极性电容Cp6的正极、+5V稳压电路的+5V稳压输出端接运算放大器芯片U4的8脚，电容C12的另一端接极性电容Cp6的负极并接地；运算放大器芯片U4的6脚、7脚、电容C14的一端连接，作为Y轴模拟信号加法电路的输出端，接通用插排P2的4脚；电容C13的一端、电阻R13的一端接运算放大器芯片U4的5脚，电容C13的另一端接地，电阻R13的另一端、电阻R14的一端接电容C14的另一端，电阻R14的另一端接电源V_Back；运算放大器芯片U4采用德州仪器的精密运放芯片OPA2376；The Y-axis analog signal adding circuit includes an operational amplifier chip U4, resistors R10-R14, capacitors C11-C14, and polar capacitor Cp6; one end of the resistor R10, one end of the resistor R11, and one end of the resistor R12 are connected to the operational amplifier chip U4. 3 pins, the other end of the resistor R10 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit, the other end of the resistor R11 is connected to one end of the capacitor C11, which is used as the input end of the Y-circuit magnetic field signal, and the other end of the capacitor C11 is connected The other end of the resistor R12 is connected to the ground; pin 4 of the operational amplifier chip U4 is connected to the ground; pins 1 and 2 of the operational amplifier chip U4 are connected and then connected to the power supply V_Back; one end of the capacitor C12, the positive electrode of the polar capacitor Cp6, and the +5V voltage stabilizing circuit The +5V regulated output terminal is connected to pin 8 of the operational amplifier chip U4, and the other terminal of the capacitor C12 is connected to the negative electrode of the polar capacitor Cp6 and grounded; pins 6 and 7 of the operational amplifier chip U4 and one terminal of the capacitor C14 are connected as Y The output end of the axis analog signal adding circuit is connected to pin 4 of the universal plug-in strip P2; one end of the capacitor C13 and one end of the resistor R13 are connected to pin 5 of the operational amplifier chip U4, the other end of the capacitor C13 is connected to ground, and the other end of the resistor R13 and the resistor One end of R14 is connected to the other end of the capacitor C14, and the other end of the resistor R14 is connected to the power supply V_Back; the operational amplifier chip U4 uses the Texas Instruments precision operational amplifier chip OPA2376;

所述的Z轴模拟信号加法电路包括运算放大器芯片U5、电阻R15-R19、电容C15-C18、极性电容Cp7；电阻R15的一端、电阻R16的一端、电阻R17的一端接运算放大器芯片U5的3脚；电阻R15的另一端接+4.5V基准电压电路的+4.5V基准电压输出端；电阻R16的另一端接电容C15的一端，作为Z轴磁场信号的输入端；电容C15的另一端接电阻R17的另一端并接地；运算放大器芯片U5的4脚接地；运算放大器芯片U5的1脚和2脚连接后接电源V_Back；电容C16的一端、极性电容Cp7的正极、+5V稳压电路的+5V稳压输出端接运算放大器芯片U5的8脚，电容C16的另一端接极性电容Cp7的负极并接地；运算放大器芯片U5的6脚、7脚、电容C18的一端连接，作为Z轴模拟信号加法电路的输出端，接通用插排P2的2脚；电容C17的一端、电阻R18的一端接运算放大器芯片U5的5脚，电容C17的另一端接地，电阻R18的另一端、电阻R19的一端接电容C18的另一端，电阻R19的另一端接电源V_Back；运算放大器芯片U5采用德州仪器的精密运放芯片OPA2376；The Z-axis analog signal adding circuit includes an operational amplifier chip U5, resistors R15-R19, capacitors C15-C18, and polar capacitor Cp7; one end of the resistor R15, one end of the resistor R16, and one end of the resistor R17 are connected to the operational amplifier chip U5. 3 pins; the other end of the resistor R15 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit; the other end of the resistor R16 is connected to one end of the capacitor C15 as the input end of the Z-axis magnetic field signal; the other end of the capacitor C15 is connected The other end of the resistor R17 is connected to the ground; pin 4 of the operational amplifier chip U5 is connected to the ground; pins 1 and 2 of the operational amplifier chip U5 are connected and then connected to the power supply V_Back; one end of the capacitor C16, the positive electrode of the polar capacitor Cp7, and the +5V voltage stabilizing circuit The +5V regulated output terminal is connected to pin 8 of the operational amplifier chip U5, and the other terminal of the capacitor C16 is connected to the negative electrode of the polar capacitor Cp7 and grounded; pins 6 and 7 of the operational amplifier chip U5 and one terminal of the capacitor C18 are connected as Z The output end of the axis analog signal adding circuit is connected to pin 2 of the universal plug-in strip P2; one end of the capacitor C17 and one end of the resistor R18 are connected to pin 5 of the operational amplifier chip U5, the other end of the capacitor C17 is connected to ground, and the other end of the resistor R18 and the resistor One end of R19 is connected to the other end of the capacitor C18, and the other end of the resistor R19 is connected to the power supply V_Back; the operational amplifier chip U5 uses the Texas Instruments precision operational amplifier chip OPA2376;

所述的数模转换电路包括模数转换芯片U14、极性电容Cp11-Cp12、电阻R29-R32、电容C48-C55、晶振X3；电容C48的一端、极性电容Cp11的正极、模数转换芯片U14的1脚接+5V稳压电路的+5V稳压输出端；电容C48的另一端、极性电容Cp11的负极相接并接地；模数转换芯片U14的4脚接+2.5V基准电压电路的+2.5V基准电压输出端；模数转换芯片U14的3脚、6脚、7脚、9脚、11脚、13脚、5脚、2脚接地；电容C49的一端、模数转换芯片U14的8脚连接后作为数模转换电路的输入端VXToADC,接通用插排P2的6脚，电容C49的另一端接地；电容C50的一端、模数转换芯片U14的10脚连接后作为数模转换电路的输入端VYToADC,接通用插排P2的4脚，电容C50的另一端接地；电容C51的一端、模数转换芯片U14的12脚连接后作为数模转换电路的输入端VZToADC,接通用插排P2的2脚，电容C51的另一端接地；模数转换芯片U14的14脚接+3.3V稳压电路的+3.3V稳压输出端；电阻R29的一端接模数转换芯片U14的24脚，电阻R29的另一端接主控电路的52脚；电阻R30的一端接模数转换芯片U14的23脚，电阻R30的另一端接主控电路的54脚；电阻R31的一端接模数转换芯片U14的22脚，电阻R31的另一端接主控电路的53脚；电阻R32的一端接模数转换芯片U14的21脚，电阻R32的另一端接主控电路的56脚；模数转换芯片U14的20脚接地；晶振X3的一端、电容C54的一端接模数转换芯片U14的19脚；晶振X3的另一端、电容C55的一端接模数转换芯片U14的18脚；电容C54的另一端和电容C55的另一端连接后接地；模数转换芯片U14的17脚接地；电容C52的一端、极性电容Cp12的正极、模数转换芯片U14的15脚、16脚接+3.3V稳压电路的+3.3V稳压输出端；电容C52的另一端和极性电容C12的负极连接后接地；模数转换芯片U14其他引脚悬空；模数转换芯片U14采用德州仪器的24位模数转换芯片ADS1256。The digital-to-analog conversion circuit includes the analog-to-digital conversion chip U14, polar capacitors Cp11-Cp12, resistors R29-R32, capacitors C48-C55, crystal oscillator X3; one end of the capacitor C48, the positive electrode of the polar capacitor Cp11, and the analog-to-digital conversion chip. Pin 1 of U14 is connected to the +5V regulated output of the +5V voltage stabilizing circuit; the other end of capacitor C48 and the negative pole of polar capacitor Cp11 are connected to ground; pin 4 of analog-to-digital conversion chip U14 is connected to the +2.5V reference voltage circuit +2.5V reference voltage output end; pins 3, 6, 7, 9, 11, 13, 5, and 2 of the analog-to-digital conversion chip U14 are connected to ground; one end of the capacitor C49, the analog-to-digital conversion chip U14 The 8-pin connection is used as the input terminal of the digital-to-analog conversion circuit VXToADC, and the 6-pin of the universal strip P2 is connected, and the other end of the capacitor C49 is connected to the ground; one end of the capacitor C50 is connected to the 10-pin of the analog-to-digital conversion chip U14, which is used as the digital-to-analog conversion The input terminal VYToADC of the circuit is connected to pin 4 of the universal plug-in strip P2, and the other end of the capacitor C50 is connected to ground; one end of the capacitor C51 is connected to pin 12 of the analog-to-digital conversion chip U14 as the input terminal VZToADC of the digital-to-analog conversion circuit, and the input terminal VZToADC is connected to the universal plug. Pin 2 of row P2, the other end of capacitor C51 is connected to ground; pin 14 of analog-to-digital conversion chip U14 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; one end of resistor R29 is connected to pin 24 of analog-to-digital conversion chip U14 , the other end of the resistor R29 is connected to pin 52 of the main control circuit; one end of the resistor R30 is connected to pin 23 of the analog-to-digital conversion chip U14, the other end of the resistor R30 is connected to pin 54 of the main control circuit; one end of the resistor R31 is connected to the analog-to-digital conversion chip Pin 22 of U14, the other end of the resistor R31 is connected to pin 53 of the main control circuit; one end of the resistor R32 is connected to pin 21 of the analog-to-digital conversion chip U14, and the other end of the resistor R32 is connected to pin 56 of the main control circuit; the analog-to-digital conversion chip U14 The 20th pin is connected to the ground; one end of the crystal oscillator X3 and one end of the capacitor C54 are connected to the 19th pin of the analog-to-digital conversion chip U14; the other end of the crystal oscillator The other end of the capacitor C55 is connected to the ground; the 17-pin of the analog-to-digital conversion chip U14 is connected to the ground; one end of the capacitor C52, the positive electrode of the polarity capacitor Cp12, and the 15-pin and 16-pin of the analog-to-digital conversion chip U14 are connected to the +3.3V voltage stabilizing circuit. +3.3V regulated output terminal; the other end of the capacitor C52 is connected to the negative pole of the polar capacitor C12 and then grounded; the other pins of the analog-to-digital conversion chip U14 are left floating; the analog-to-digital conversion chip U14 uses the 24-bit analog-to-digital conversion chip ADS1256 from Texas Instruments .

所述的主控电路包括主控芯片U12、电阻R24-R25、电容C41-C44、晶振X2；电容C41的一端和晶振X2的一端接主控芯片U12的12脚，电容C42的一端和晶振X2的另一端接主控芯片U12的13脚，电容C41的另一端和电容C42的另一端接地，主控芯片U12的94脚通过电阻R24接地；电阻R25的一端、电容C43的一端接主控芯片U12的14脚，电阻R25的另一端接+3.3V稳压电路的+3.3V稳压输出端，电容C43的另一端接地；电容C44的一端接主控芯片U12的6脚，电容C44的另一端、主控芯片U12的50脚、75脚、100脚、28脚、11脚、22脚接+3.3V稳压电路的+3.3V稳压输出端；主控芯片U12的20脚、49脚、74脚、99脚、10脚、19脚接地；主控芯片U12的52脚连接模数转换电路中电阻R29的一端，53脚连接模数转换电路中电阻R31的一端，54脚连接模数转换电路中电容R30的一端，83脚接通用插排P2的12脚，56脚接模数转换电路中电阻R32的一端，30脚接SD卡存储电路的5脚，31脚接SD卡存储电路的7脚，32脚接SD卡存储电路的3脚，68脚接通用插排P2的8脚，69脚接通用插排P2的10脚，72脚接接插件SWD的2脚，76脚接接插件SWD的3脚，78脚接串口姿态测量电路的2脚，79脚接串口姿态测量电路的3脚，80脚接通用插排P2的14脚，1脚接RTC时钟电路的3脚，2脚接RTC时钟电路的15脚，4脚接RTC时钟电路的16脚,21脚接+3.3V稳压电路的+3.3V稳压输出端；主控芯片U12的剩余引脚悬空；主控芯片U12采用意法半导体的STM32F103RCT6芯片。The main control circuit includes a main control chip U12, resistors R24-R25, capacitors C41-C44, and crystal oscillator X2; one end of the capacitor C41 and one end of the crystal oscillator X2 are connected to pin 12 of the main control chip U12, and one end of the capacitor C42 is connected to the crystal oscillator X2 The other end of the main control chip U12 is connected to pin 13, the other end of the capacitor C41 and the other end of the capacitor C42 are connected to the ground, the 94 pin of the main control chip U12 is connected to the ground through the resistor R24; one end of the resistor R25 and one end of the capacitor C43 are connected to the main control chip Pin 14 of U12, the other end of resistor R25 is connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit, the other end of capacitor C43 is connected to ground; one end of capacitor C44 is connected to pin 6 of main control chip U12, and the other end of capacitor C44 On one end, pins 50, 75, 100, 28, 11, and 22 of the main control chip U12 are connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; pins 20 and 49 of the main control chip U12 , 74 pins, 99 pins, 10 pins, and 19 pins are grounded; pin 52 of the main control chip U12 is connected to one end of the resistor R29 in the analog-to-digital conversion circuit, pin 53 is connected to one end of the resistor R31 in the analog-to-digital conversion circuit, and pin 54 is connected to the analog-to-digital One end of the capacitor R30 in the conversion circuit, pin 83, is connected to pin 12 of the universal plug strip P2, pin 56 is connected to one end of the resistor R32 in the analog-to-digital conversion circuit, pin 30 is connected to pin 5 of the SD card storage circuit, and pin 31 is connected to the SD card storage circuit. Pin 7, pin 32 is connected to pin 3 of the SD card storage circuit, pin 68 is connected to pin 8 of the universal plug strip P2, pin 69 is connected to pin 10 of the universal plug strip P2, pin 72 is connected to pin 2 of the connector SWD, and pin 76 is connected to Pin 3 of the connector SWD, pin 78 is connected to pin 2 of the serial port attitude measurement circuit, pin 79 is connected to pin 3 of the serial port attitude measurement circuit, pin 80 is connected to pin 14 of the universal plug strip P2, and pin 1 is connected to pin 3 of the RTC clock circuit. Pin 2 is connected to pin 15 of the RTC clock circuit, pin 4 is connected to pin 16 of the RTC clock circuit, pin 21 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; the remaining pins of the main control chip U12 are left floating; the main control Chip U12 uses STMicroelectronics’ STM32F103RCT6 chip.

所述的串口姿态测量电路包括串口姿态测量芯片U17、电容C62、极性电容Cp14；串口姿态测量芯片U17的7脚、8脚、4脚分别接地；电容C62的一端、极性电容Cp14的正极、串口姿态测量芯片U17的1脚接+3.3V稳压电路的+3.3V稳压输出端，电容C62的另一端、极性电容Cp14的负极分别接地；串口姿态测量芯片U17的2脚接主控电路的78脚；串口姿态测量芯片U17的3脚接主控电路的79脚；串口姿态测量芯片U17的4、7、8脚接地；串口姿态测量芯片U17的其他引脚悬空；串口姿态测量芯片U17采用软芯微科技的LEADIY-M3芯片；所述的串口姿态测量电路通过测量磁力仪的实时姿态角，将磁力仪测量得到的载体坐标系下磁场三分量，转换成真实地理环境下的磁场三分量。The described serial port attitude measurement circuit includes a serial port attitude measurement chip U17, a capacitor C62, and a polarity capacitor Cp14; pins 7, 8, and 4 of the serial port attitude measurement chip U17 are grounded respectively; one end of the capacitor C62 and the positive electrode of the polarity capacitor Cp14 , Pin 1 of the serial port attitude measurement chip U17 is connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit, the other end of the capacitor C62 and the negative pole of the polar capacitor Cp14 are connected to ground respectively; Pin 2 of the serial port attitude measurement chip U17 is connected to the main Pin 78 of the control circuit; pin 3 of the serial port attitude measurement chip U17 is connected to pin 79 of the main control circuit; pins 4, 7, and 8 of the serial port attitude measurement chip U17 are connected to ground; other pins of the serial port attitude measurement chip U17 are left floating; serial port attitude measurement Chip U17 adopts the LEADIY-M3 chip of Softcore Micro Technology; the serial port attitude measurement circuit converts the three components of the magnetic field in the carrier coordinate system measured by the magnetometer into the real geographical environment by measuring the real-time attitude angle of the magnetometer. Three components of the magnetic field.

所述的RTC时钟电路包括时钟芯片U13、电阻R26-R28、电容C45-C46、纽扣电池B1；电容C45的一端、电阻R26的一端、时钟芯片U13的2脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C45的另一端接地，电阻R26的另一端、时钟芯片U13的3脚连接后接主控电路的1脚；时钟芯片U13的5脚、6脚、7脚、8脚、9脚、10脚、11脚、12脚、13脚接地；电阻R27的一端、时钟芯片U13的15脚连接后接主控电路的2脚，电阻R28的一端、时钟芯片U13的16脚连接后接主控电路的4脚，电阻R27的另一端、电阻R28的另一端连接后接+3.3V稳压电路的+3.3V稳压输出端；电容C46的一端、纽扣电池B1的正极接时钟芯片U13的14脚，电容C46的另一端接地，纽扣电池B1的负极接地；时钟芯片U13的剩余引脚悬空；时钟芯片U13采用善润半导体的DS3231SN芯片；所述的RTC时钟电路用于校准测量时间，保持测量时间与标准时间的同步。The RTC clock circuit includes a clock chip U13, resistors R26-R28, capacitors C45-C46, and button battery B1; one end of the capacitor C45, one end of the resistor R26, and the 2-pin connection of the clock chip U13 are connected to a +3.3V voltage stabilizing circuit. +3.3V regulated output end, the other end of the capacitor C45 is connected to ground, the other end of the resistor R26 is connected to pin 3 of the clock chip U13 and then connected to pin 1 of the main control circuit; pins 5, 6 and 7 of the clock chip U13 , 8-pin, 9-pin, 10-pin, 11-pin, 12-pin and 13-pin are connected to ground; one end of resistor R27 is connected to pin 15 of clock chip U13 and then connected to pin 2 of the main control circuit. One end of resistor R28 is connected to pin 15 of clock chip U13. Pin 16 is connected to pin 4 of the main control circuit. The other end of the resistor R27 and the other end of the resistor R28 are connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit. One end of the capacitor C46 and the button battery B1 are connected. The positive electrode is connected to pin 14 of the clock chip U13, the other end of the capacitor C46 is connected to the ground, and the negative electrode of the button battery B1 is connected to the ground; the remaining pins of the clock chip U13 are left floating; the clock chip U13 uses the DS3231SN chip of Shanrun Semiconductor; the RTC clock circuit is To calibrate the measurement time, keep the measurement time synchronized with the standard time.

所述的数据传输电路包括多通道RS-232线路驱动器/接收器U8、电容C25-C29、极性电容Cp9；多通道RS-232线路驱动器/接收器U8的1脚、3脚分别连接电容C25的两端，4脚、5脚分别连接电容C26的两端,15脚直接接地，10脚作为信号输出接通用插排P2的8脚，9脚作为信号输入接通用插排P2的10脚，6脚通过电容C29接地，2脚通过电容C28接地，电容C27的一端、极性电容Cp9的正极和16脚连接后接+5V稳压电路的+5V稳压输出端，电容C27的另一端、极性电容Cp9的负极连接后接地，7脚接接线座P1的4脚，8脚接接线座P1的3脚，多通道RS-232线路驱动器/接收器U8其他引脚悬空；多通道RS-232线路驱动器/接收器U8采用德州仪器的MAX3232芯片。The data transmission circuit includes a multi-channel RS-232 line driver/receiver U8, capacitors C25-C29, and polarity capacitor Cp9; pins 1 and 3 of the multi-channel RS-232 line driver/receiver U8 are respectively connected to the capacitor C25 At both ends, pins 4 and 5 are connected to the two ends of the capacitor C26 respectively, pin 15 is directly connected to the ground, pin 10 is used as a signal output to connect to pin 8 of the universal socket P2, and pin 9 is used as a signal input to connect to pin 10 of the universal socket P2. Pin 6 is connected to the ground through the capacitor C29, and pin 2 is connected to the ground through the capacitor C28. One end of the capacitor C27, the positive electrode of the polarity capacitor Cp9, and pin 16 are connected to the +5V voltage stabilizing output of the +5V voltage stabilizing circuit. The other end of the capacitor C27, The negative pole of polar capacitor Cp9 is connected to ground, pin 7 is connected to pin 4 of terminal block P1, pin 8 is connected to pin 3 of terminal block P1, and other pins of multi-channel RS-232 line driver/receiver U8 are left floating; multi-channel RS- The 232 line driver/receiver U8 uses the MAX3232 chip from Texas Instruments.

所述的SD卡存储电路包括SDCard-U18、电容C63、电阻R35-R36；电容C63的一端、SDCard-U18的4脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C63的另一端、SDCard-U18的6脚连接后接地；电阻R35的一端、SDCard-U18的3脚连接后接主控电路的32脚，电阻R35的另一端、电阻R36的一端接+3.3V稳压电路的+3.3V稳压输出端，电阻R36的另一端、SDCard-U18的7脚连接后接主控电路的31脚；SDCard-U18的5脚接主控电路的30脚，2脚接地；SDCard-U18的剩余引脚悬空。The SD card storage circuit includes SDCard-U18, capacitor C63, and resistors R35-R36; one end of the capacitor C63 and the 4-pin connection of SDCard-U18 are connected to the +3.3V voltage stabilizing output end of the +3.3V voltage stabilizing circuit, and the capacitor The other end of C63 and pin 6 of SDCard-U18 are connected to ground; one end of resistor R35 and pin 3 of SDCard-U18 are connected to pin 32 of the main control circuit. The other end of resistor R35 and one end of resistor R36 are connected to +3.3V. The +3.3V regulated output end of the voltage stabilizing circuit, the other end of resistor R36, is connected to pin 7 of SDCard-U18 and then connected to pin 31 of the main control circuit; pin 5 of SDCard-U18 is connected to pin 30 and pin 2 of the main control circuit Connect to ground; the remaining pins of SDCard-U18 are left floating.

所述的文件管理电路包括文件管理控制芯片U9、电容C30-C33、电阻R22、发光二极管D2、晶振X1；电容C30的一端接文件管理控制芯片U9的2脚，电容C30的另一端接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9的5脚接通用插排P2的12脚，6脚接通用插排P2的14脚；电容C31的一端、文件管理控制芯片U9的9脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C31的另一端接地；文件管理控制芯片U9的10脚接接线座P1的7脚，11脚接接线座P1的6脚；文件管理控制芯片U9的12脚接地；文件管理控制芯片U9的13脚、14脚分别接晶振X1的两端；电容C32的一端、电容C33的一端、文件管理控制芯片U9的28脚连接后接+3.3V稳压电路的+3.3V稳压输出端；电容C32的另一端、电容C33的另一端分别接地；发光二极管D2的阴极接文件管理控制芯片U9的24脚，发光二极管D2的阳极接电阻R22的一端，电阻R22的另一端接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9的23脚、21脚、20脚分别接地；文件管理控制芯片U9的19脚接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9其他引脚悬空；文件管理控制芯片U9采用CH376S芯片；所述的文件管理电路提高了数据读写速度，并丰富了文件管理与读写功能。The file management circuit includes the file management control chip U9, capacitors C30-C33, resistor R22, light-emitting diode D2, and crystal oscillator X1; one end of the capacitor C30 is connected to pin 2 of the file management control chip U9, and the other end of the capacitor C30 is connected to +3.3 The +3.3V voltage stabilizing output of the V voltage stabilizing circuit; pin 5 of the file management control chip U9 is connected to pin 12 of the universal plug strip P2, and pin 6 is connected to pin 14 of the universal plug strip P2; one end of the capacitor C31, the file management control chip Pin 9 of U9 is connected to the +3.3V regulated output of the +3.3V voltage stabilizing circuit, and the other end of the capacitor C31 is connected to ground; pin 10 of the file management control chip U9 is connected to pin 7 of the terminal block P1, and pin 11 is connected to the terminal block. Pin 6 of P1; pin 12 of the file management control chip U9 is connected to ground; pins 13 and 14 of the file management control chip U9 are connected to both ends of the crystal oscillator X1; one end of the capacitor C32, one end of the capacitor C33, and one end of the file management control chip U9 Pin 28 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; the other ends of capacitor C32 and capacitor C33 are connected to ground respectively; the cathode of light-emitting diode D2 is connected to pin 24 of the file management control chip U9 to emit light. The anode of diode D2 is connected to one end of resistor R22, and the other end of resistor R22 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; pins 23, 21, and 20 of the file management control chip U9 are connected to ground respectively; file management Pin 19 of the control chip U9 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; other pins of the file management control chip U9 are left floating; the file management control chip U9 uses the CH376S chip; the file management circuit improves the data Reading and writing speed, and enriched file management and reading and writing functions.

对外接口电路包括接线座电路、通用插排电路以及接插件电路；External interface circuits include terminal block circuits, universal strip circuits and connector circuits;

所述接线座电路包括接线座P1、二极管D4、极性电容Cp15；二极管D4的阳极接接线座P1的1脚，二极管D4的阴极接电源DC24V；接线座P1的2脚、8脚接地，3脚接数据传输电路的8脚，4脚接数据传输电路的7脚，6脚接文件管理电路的11脚，7脚接文件管理电路的10脚；极性电容Cp15的正极接接线座P1的5脚，极性电容Cp15的负极接地；The terminal block circuit includes terminal block P1, diode D4, and polar capacitor Cp15; the anode of diode D4 is connected to pin 1 of terminal block P1, and the cathode of diode D4 is connected to the power supply DC24V; pins 2 and 8 of terminal block P1 are connected to ground, and pin 3 is connected to ground. Pin 8 is connected to the data transmission circuit, pin 4 is connected to pin 7 of the data transmission circuit, pin 6 is connected to pin 11 of the file management circuit, and pin 7 is connected to pin 10 of the file management circuit; the positive pole of the polar capacitor Cp15 is connected to the terminal block P1. Pin 5, the negative pole of polar capacitor Cp15 is connected to ground;

所述通用插排电路包括通用插排P2；通用插排P2的3脚、5脚、7脚、9脚、11脚、13脚、15脚、17脚、19脚接地，16脚、18脚、20脚接+5V电源，2脚接Z轴模拟信号加法电路的7脚、数模转换电路的12脚，4脚接Y轴模拟信号加法电路的7脚、数模转换电路的10脚，6脚接X轴模拟信号加法电路的7脚、数模转换电路的8脚，8脚接数据传输电路的10脚、主控电路的68脚，10脚接数据传输电路的9脚、主控电路的69脚，12脚接文件管理电路的5脚、主控电路的83脚，14脚接文件管理电路的6脚、主控电路的80脚；The universal plug-in circuit includes universal plug-in strip P2; pins 3, 5, 7, 9, 11, 13, 15, 17 and 19 of the universal plug-in strip P2 are grounded, and pins 16 and 18 are grounded. , Pin 20 is connected to the +5V power supply, pin 2 is connected to pin 7 of the Z-axis analog signal adding circuit and pin 12 of the digital-to-analog conversion circuit, pin 4 is connected to pin 7 of the Y-axis analog signal adding circuit and pin 10 of the digital-to-analog conversion circuit. Pin 6 is connected to pin 7 of the X-axis analog signal adder circuit and pin 8 of the digital-to-analog conversion circuit. Pin 8 is connected to pin 10 of the data transmission circuit and pin 68 of the main control circuit. Pin 10 is connected to pin 9 of the data transmission circuit and the main control circuit. Pin 69 of the circuit, pin 12 is connected to pin 5 of the file management circuit and pin 83 of the main control circuit, pin 14 is connected to pin 6 of the file management circuit and pin 80 of the main control circuit;

所述接插件电路包含接插件SWD；接插件SWD的1脚接+3.3V电源，2脚接主控电路的72脚，3脚接主控电路的76脚，4脚接地。The connector circuit includes a connector SWD; pin 1 of the connector SWD is connected to the +3.3V power supply, pin 2 is connected to pin 72 of the main control circuit, pin 3 is connected to pin 76 of the main control circuit, and pin 4 is connected to ground.

本发明实现了一种真地理三分量磁力仪的测量电路。利用了磁通门传感器的低功耗、稳定性好、精度高、小体积等特点。在传感器信号采集电路中，设计模拟信号加法电路，用于将传感器输出信号电压值转换成模数转换电路可接受的电压值。在串口姿态测量电路中，选择功能齐全的姿态测量芯片LEADIY-M3实现磁力仪实时姿态信息，用于将测量的载体坐标系下磁场三分量，通过坐标变换得到真实地理环境下的地磁场分量。通过设计RTC时钟电路，将时间校准更精确化，保持了测量时间与标准时间的同步。在文件管理电路中，选择支持USB接口的文件管理控制芯片CH376S，丰富了文件管理与读写功能。The invention realizes a measurement circuit of a true geographical three-component magnetometer. It takes advantage of the fluxgate sensor's characteristics of low power consumption, good stability, high precision, and small size. In the sensor signal acquisition circuit, an analog signal adder circuit is designed to convert the sensor output signal voltage value into a voltage value acceptable to the analog-to-digital conversion circuit. In the serial port attitude measurement circuit, the fully functional attitude measurement chip LEADIY-M3 is selected to realize the real-time attitude information of the magnetometer, which is used to convert the measured three components of the magnetic field in the carrier coordinate system to obtain the geomagnetic field component in the real geographical environment through coordinate transformation. By designing the RTC clock circuit, the time calibration is more precise and the measurement time is kept synchronized with the standard time. In the file management circuit, the file management control chip CH376S that supports USB interface is selected to enrich the file management and reading and writing functions.

附图说明Description of the drawings

图1为本发明电路的整体框图；Figure 1 is an overall block diagram of the circuit of the present invention;

图2-图7为电源电路的电路图；其中图2为+15V稳压电路、-15V稳压电路的电路图，图3为+5V稳压电路的电路图，图4为+4.5V基准电压电路的电路图，图5为+3.3V稳压电路的电路图，图6为+3.3V开关电源电路的电路图，图7为+2.5V基准电压电路的电路图；Figures 2 to 7 are circuit diagrams of the power supply circuit; Figure 2 is the circuit diagram of the +15V voltage stabilizing circuit and the -15V voltage stabilizing circuit, Figure 3 is the circuit diagram of the +5V voltage stabilizing circuit, and Figure 4 is the +4.5V reference voltage circuit. Circuit diagram, Figure 5 is the circuit diagram of the +3.3V voltage stabilizing circuit, Figure 6 is the circuit diagram of the +3.3V switching power supply circuit, Figure 7 is the circuit diagram of the +2.5V reference voltage circuit;

图8-图11为传感器信号采集电路的电路图；其中图8为X轴模拟信号加法电路的电路图，图9为Y轴模拟信号加法电路的电路图，图10为Z轴模拟信号加法电路的电路图，图11为数模转换电路的电路图；Figures 8 to 11 are circuit diagrams of the sensor signal acquisition circuit; Figure 8 is a circuit diagram of the X-axis analog signal addition circuit, Figure 9 is a circuit diagram of the Y-axis analog signal addition circuit, and Figure 10 is a circuit diagram of the Z-axis analog signal addition circuit. Figure 11 is the circuit diagram of the digital-to-analog conversion circuit;

图12为主控电路的电路图；Figure 12 is a circuit diagram of the main control circuit;

图13为串口姿态测量电路的电路图；Figure 13 is the circuit diagram of the serial port attitude measurement circuit;

图14为RTC时钟电路的电路图；Figure 14 is the circuit diagram of the RTC clock circuit;

图15为数据传输电路的电路图；Figure 15 is a circuit diagram of the data transmission circuit;

图16为SD卡存储电路的电路图；Figure 16 is the circuit diagram of the SD card storage circuit;

图17为文件管理电路的电路图；Figure 17 is a circuit diagram of the file management circuit;

图18-图20为对外接口电路的电路图；其中图18为接线座电路的电路图，图19为通用插排电路的电路图，图20为接插件电路的电路图。Figures 18 to 20 are circuit diagrams of external interface circuits; Figure 18 is a circuit diagram of a terminal block circuit, Figure 19 is a circuit diagram of a universal strip circuit, and Figure 20 is a circuit diagram of a connector circuit.

具体实施方式Detailed ways

下面结合附图对本发明做进一步的分析。The present invention will be further analyzed below in conjunction with the accompanying drawings.

如图1所示，一种真地理三分量磁力仪的测量电路，包括主控电路Ⅰ、电源电路Ⅱ、传感器信号采集电路Ⅲ、对外接口电路Ⅳ、数据传输电路Ⅴ、SD卡存储电路Ⅵ、串口姿态测量电路Ⅶ、RTC时钟电路Ⅷ、文件管理电路Ⅸ。As shown in Figure 1, the measurement circuit of a true three-component magnetometer includes main control circuit I, power circuit II, sensor signal acquisition circuit III, external interface circuit IV, data transmission circuit V, SD card storage circuit VI, Serial port attitude measurement circuit VII, RTC clock circuit VIII, file management circuit IX.

电源电路Ⅱ包括+15V稳压电路、-15V稳压电路、+5V稳压电路、+4.5V基准电压电路、+3.3V稳压电路、+3.3V开关电源电路、+2.5V基准电压电路；Power supply circuit II includes +15V voltage stabilizing circuit, -15V voltage stabilizing circuit, +5V voltage stabilizing circuit, +4.5V reference voltage circuit, +3.3V voltage stabilizing circuit, +3.3V switching power supply circuit, and +2.5V reference voltage circuit;

如图2所示，+15V稳压电路、-15V稳压电路包括开关电源芯片U1、电容C1-C3；电容C1的一端、开关电源芯片U1的2脚连接后接地，电容C1的另一端、开关电源芯片U1的1脚连接后接+24V电源；电容C2的一端接开关电源芯片U1的3脚，作为+15V电源输出端；电容C2的另一端、电容C3的一端、开关电源芯片U1的4脚连接后接地；电容C3的另一端接开关电源芯片U1的5脚，作为-15V电源输出端；开关电源芯片U1采用德州仪器的DC-DC开关电源芯片。As shown in Figure 2, the +15V voltage stabilizing circuit and the -15V voltage stabilizing circuit include switching power supply chip U1 and capacitors C1-C3; one end of capacitor C1 and pin 2 of switching power supply chip U1 are connected to ground, and the other end of capacitor C1, Pin 1 of the switching power supply chip U1 is connected to the +24V power supply; one end of the capacitor C2 is connected to pin 3 of the switching power supply chip U1 as the +15V power output; the other end of the capacitor C2, one end of the capacitor C3, and the switching power supply chip U1 Pin 4 is connected to ground; the other end of capacitor C3 is connected to pin 5 of switching power supply chip U1 as the -15V power output; switching power supply chip U1 adopts the DC-DC switching power supply chip of Texas Instruments.

如图3所示，+5V稳压电路包括开关电源芯片U2、极性电容Cp1-Cp4、电阻R1-R4、电感L1、电容C4-C6、发光二极管D1；开关电源芯片U2的7脚、电阻R1的一端、极性电容Cp1的正极、极性电容Cp2的正极、极性电容Cp3的正极接+24V电源；极性电容Cp1的负极、极性电容Cp2的负极、极性电容Cp3的负极分别接地；电阻R1的另一端、开关电源芯片U2的5脚接电阻R2的一端；电阻R2的另一端、开关电源芯片U2的6脚连接后接地；电容C4的一端接开关电源芯片U2的1脚，电容C4的另一端、电感L1的一端、二极管D1的阴极接开关电源芯片U2的8脚；二极管D1的阳极接地；电感L1的另一端、电阻R3的一端、极性电容Cp4的正极、电容C5的一端、电容C6的一端连接，作为+5V电源输出端；电阻R3的另一端、电阻R4的一端接开关电源芯片U2的4脚；极性电容Cp4的负极、电阻R4的另一端连接后接地，电容C5的另一端、电容C6的另一端分别接地；开关电源芯片U2的剩余引脚悬空；开关电源芯片U2采用德州仪器的开关电源芯片TPS5420。As shown in Figure 3, the +5V voltage stabilizing circuit includes switching power supply chip U2, polar capacitors Cp1-Cp4, resistors R1-R4, inductor L1, capacitors C4-C6, and light-emitting diode D1; pin 7 of the switching power supply chip U2, resistor One end of R1, the positive electrode of polar capacitor Cp1, the positive electrode of polar capacitor Cp2, and the positive electrode of polar capacitor Cp3 are connected to the +24V power supply; the negative electrode of polar capacitor Cp1, the negative electrode of polar capacitor Cp2, and the negative electrode of polar capacitor Cp3 are respectively Ground; the other end of resistor R1 and pin 5 of switching power supply chip U2 are connected to one end of resistor R2; the other end of resistor R2 and pin 6 of switching power supply chip U2 are connected to ground; one end of capacitor C4 is connected to pin 1 of switching power supply chip U2 , the other end of the capacitor C4, one end of the inductor L1, and the cathode of the diode D1 are connected to pin 8 of the switching power supply chip U2; the anode of the diode D1 is connected to ground; the other end of the inductor L1, one end of the resistor R3, the anode of the polarity capacitor Cp4, and the capacitor One end of C5 and one end of capacitor C6 are connected as the +5V power output end; the other end of resistor R3 and one end of resistor R4 are connected to pin 4 of switching power supply chip U2; the negative electrode of polar capacitor Cp4 and the other end of resistor R4 are connected. The other end of the capacitor C5 and the other end of the capacitor C6 are grounded respectively; the remaining pins of the switching power supply chip U2 are left floating; the switching power supply chip U2 adopts the switching power supply chip TPS5420 of Texas Instruments.

如图4所示，+4.5V基准电压电路包括基准电压芯片U6、运算放大器芯片U7、电感L2、极性电容Cp8、电容C19-C24、电阻R20-R21；电感L2的一端、极性电容Cp8的正极、电容C19的一端接基准电压芯片U7的2脚；电感L2的另一端接+5V稳压电路的+5V稳压输出端；极性电容Cp8的负极、电容C19的另一端、基准电压芯片U6的4脚连接后接地；电阻R20的一端接基准电压芯片U6的6脚，电阻R20的另一端、电容C21的一端接运算放大器芯片U7的3脚，电容C21的另一端接地；电容C20的一端接基准电压芯片U6的5脚，电容C20的另一端接地；运算放大器芯片U7的4脚接地；电容C22的一端、运算放大器芯片U7的7脚连接后接+5V稳压电路的+5V稳压输出端，电容C22的另一端接地；电阻R21的一端接运算放大器芯片U7的6脚，电阻R21的另一端、电容C23的一端、电容C24的一端连接，作为+4.5V基准电压输出端，电容C23的另一端、电容C24的另一端分别接地；基准电压芯片U6、运算放大器芯片U7的剩余引脚悬空；基准电压芯片U6采用德州仪器的基准电压芯片REF5045；运算放大器芯片U7采用德州仪器的精密运放芯片OPA376。As shown in Figure 4, the +4.5V reference voltage circuit includes reference voltage chip U6, operational amplifier chip U7, inductor L2, polar capacitor Cp8, capacitor C19-C24, resistor R20-R21; one end of the inductor L2, polar capacitor Cp8 The positive pole and one end of capacitor C19 are connected to pin 2 of the reference voltage chip U7; the other end of the inductor L2 is connected to the +5V regulated output end of the +5V voltage stabilizing circuit; the negative pole of the polar capacitor Cp8, the other end of the capacitor C19, and the reference voltage Pin 4 of chip U6 is connected to ground; one end of resistor R20 is connected to pin 6 of reference voltage chip U6, the other end of resistor R20 and one end of capacitor C21 are connected to pin 3 of operational amplifier chip U7, and the other end of capacitor C21 is connected to ground; capacitor C20 One end of the capacitor is connected to pin 5 of the reference voltage chip U6, and the other end of the capacitor C20 is connected to ground; pin 4 of the operational amplifier chip U7 is connected to ground; one end of the capacitor C22 and pin 7 of the operational amplifier chip U7 are connected to +5V of the +5V voltage stabilizing circuit. At the voltage stabilizing output end, the other end of the capacitor C22 is connected to ground; one end of the resistor R21 is connected to pin 6 of the operational amplifier chip U7, and the other end of the resistor R21, one end of the capacitor C23, and one end of the capacitor C24 are connected as a +4.5V reference voltage output end. , the other end of the capacitor C23 and the other end of the capacitor C24 are grounded respectively; the remaining pins of the reference voltage chip U6 and the operational amplifier chip U7 are left floating; the reference voltage chip U6 adopts the reference voltage chip REF5045 of Texas Instruments; the operational amplifier chip U7 adopts the Texas Instruments Precision operational amplifier chip OPA376.

如图5所示，+3.3V稳压电路包括稳压电源芯片U10、极性电容Cp10、电容C34-C36；极性电容Cp10的正极、电容C34的一端、稳压电源芯片U10的3脚连接后接电源VDD，极性电容Cp10的负极、电容C34的另一端分别接地；稳压电源芯片U10的1脚接地；电容C35的一端、电容C36的一端接稳压电源芯片U10的2脚，作为+3.3V稳压电路的+3.3V电压输出端，电容C35的另一端、电容C36的另一端分别接地；稳压电源芯片U10采用稳压电源芯片LM1117。As shown in Figure 5, the +3.3V voltage stabilizing circuit includes a voltage stabilizing power supply chip U10, a polar capacitor Cp10, and a capacitor C34-C36; the positive electrode of the polarity capacitor Cp10, one end of the capacitor C34, and the 3-pin connection of the voltage stabilizing power supply chip U10 After connecting to the power supply VDD, the negative pole of the polar capacitor Cp10 and the other end of the capacitor C34 are connected to ground respectively; pin 1 of the voltage-stabilizing power supply chip U10 is connected to ground; one end of the capacitor C35 and one end of the capacitor C36 are connected to pin 2 of the voltage-stabilizing power supply chip U10 as The +3.3V voltage output terminal of the +3.3V voltage stabilizing circuit, the other end of the capacitor C35 and the other end of the capacitor C36 are grounded respectively; the voltage-stabilizing power supply chip U10 uses the voltage-stabilizing power supply chip LM1117.

如图6所示，+3.3V开关电源电路包括开关电源芯片U11、电容C37-C40、电阻R23、发光二极管D3；电容C38的一端、电容C37的一端、开关电源芯片U11的3脚、4脚连接后接+5V稳压电路的+5V稳压输出端，电容C37的另一端、开关电源芯片U11的2脚连接后接地，电容C38的另一端、开关电源芯片U11的1脚连接后接地；电容C39的一端、电容C40的一端、电阻R23的一端、开关电源芯片U11的5脚、6脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C39的另一端、电容C40的另一端分别接地，电阻R23的另一端接发光二极管D3的阳极，发光二极管D3的阴极接地；开关电源芯片U11的剩余引脚悬空；开关电源芯片U11采用的是德州仪器的开关电源芯片TPS7350。As shown in Figure 6, the +3.3V switching power supply circuit includes switching power supply chip U11, capacitors C37-C40, resistor R23, light-emitting diode D3; one end of capacitor C38, one end of capacitor C37, and pins 3 and 4 of switching power supply chip U11 Connect the +5V voltage stabilizing output of the +5V voltage stabilizing circuit. The other end of the capacitor C37 is connected to pin 2 of the switching power supply chip U11 and then grounded. The other end of the capacitor C38 is connected to pin 1 of the switching power supply chip U11 and then grounded. One end of the capacitor C39, one end of the capacitor C40, one end of the resistor R23, and pins 5 and 6 of the switching power supply chip U11 are connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit. The other end of the capacitor C39, the capacitor The other end of C40 is connected to the ground respectively, the other end of the resistor R23 is connected to the anode of the light-emitting diode D3, and the cathode of the light-emitting diode D3 is connected to the ground; the remaining pins of the switching power supply chip U11 are suspended; the switching power supply chip U11 uses the switching power supply chip TPS7350 of Texas Instruments .

如图7所示，+2.5V基准电压电路包括基准电压芯片U15、运算放大器芯片U16、电感L3、极性电容Cp13、电容C56-C61、电阻R33-R34；电感L3的一端、极性电容Cp13的正极、电容C56的一端接基准电压芯片U15的2脚，电感L3的另一端接+5V稳压电路的+5V稳压输出端，极性电容Cp13的负极、电容C56的另一端、基准电压芯片U15的4脚连接后接地；电阻R33的一端接基准电压芯片U15的6脚，电阻R33的另一端、电容C58的一端接运算放大器芯片U16的3脚，电容C58的另一端接地；电容C57的一端接基准电压芯片U15的5脚，电容C57的另一端接地；运算放大器芯片U16的4脚接地；电容C59的一端、运算放大器芯片U16的7脚连接后接+5V稳压电路的+5V稳压输出端，电容C59的另一端接地；电阻R34的一端接运算放大器芯片U16的6脚，电阻R34的另一端、电容C60的一端、电容C61的一端连接，作为+2.5V基准电压输出端，电容C60的另一端、电容C61的另一端分别接地；基准电压芯片U15、运算放大器芯片U16的其他引脚悬空；基准电压芯片U15采用德州仪器的基准电压芯片REF5045；运算放大器芯片U16采用德州仪器的精密运放芯片OPA376。As shown in Figure 7, the +2.5V reference voltage circuit includes reference voltage chip U15, operational amplifier chip U16, inductor L3, polar capacitor Cp13, capacitor C56-C61, resistor R33-R34; one end of the inductor L3, polar capacitor Cp13 The positive electrode and one end of capacitor C56 are connected to pin 2 of the reference voltage chip U15, the other end of the inductor L3 is connected to the +5V voltage stabilizing output end of the +5V voltage stabilizing circuit, the negative pole of the polarity capacitor Cp13, the other end of the capacitor C56, and the reference voltage Pin 4 of chip U15 is connected to ground; one end of resistor R33 is connected to pin 6 of reference voltage chip U15, the other end of resistor R33 and one end of capacitor C58 are connected to pin 3 of operational amplifier chip U16, and the other end of capacitor C58 is connected to ground; capacitor C57 One end of the capacitor is connected to pin 5 of the reference voltage chip U15, and the other end of the capacitor C57 is connected to ground; pin 4 of the operational amplifier chip U16 is connected to ground; one end of the capacitor C59 and pin 7 of the operational amplifier chip U16 are connected to +5V of the +5V voltage stabilizing circuit. At the voltage stabilizing output end, the other end of the capacitor C59 is connected to ground; one end of the resistor R34 is connected to pin 6 of the operational amplifier chip U16, and the other end of the resistor R34, one end of the capacitor C60, and one end of the capacitor C61 are connected as a +2.5V reference voltage output end. , the other end of the capacitor C60 and the other end of the capacitor C61 are grounded respectively; the other pins of the reference voltage chip U15 and the operational amplifier chip U16 are left floating; the reference voltage chip U15 adopts the reference voltage chip REF5045 of Texas Instruments; the operational amplifier chip U16 adopts the Texas Instruments Precision operational amplifier chip OPA376.

传感器信号采集电路Ⅲ包括X轴、Y轴、Z轴三个模拟信号加法电路以及数模转换电路；The sensor signal acquisition circuit III includes three analog signal addition circuits for the X-axis, Y-axis, and Z-axis and a digital-to-analog conversion circuit;

如图8所示，X轴模拟信号加法电路包括运算放大器芯片U3、电阻R5-R9、电容C7-C10、极性电容Cp5；电阻R5的一端、电阻R6的一端、电阻R7的一端接运算放大器芯片U3的3脚，电阻R5的另一端接+4.5V基准电压电路的+4.5V基准电压输出端，电阻R6的另一端接电容C7的一端，作为X轴磁场信号输入端，电容C7的另一端接电阻R7的另一端并接地；运算放大器芯片U3的4脚接地；运算放大器芯片U3的1脚和2脚连接后接电源V_Back；电容C8的一端、极性电容Cp5的正极、运算放大器芯片U3的8脚接+5V稳压电路的+5V稳压输出端，电容C8的另一端接极性电容Cp5的负极并接地；运算放大器芯片U3的6脚、7脚、电容C10的一端连接作为X轴模拟信号加法电路的输出端，接通用插排P2的6脚；电容C9的一端、电阻R8的一端接运算放大器芯片U3的5脚，电容C9的另一端接地，电阻R8的另一端、电阻R9的一端接电容C10的另一端，电阻R9的另一端接电源V_Back；运算放大器芯片U3采用德州仪器的精密运放芯片OPA2376；As shown in Figure 8, the X-axis analog signal adder circuit includes operational amplifier chip U3, resistors R5-R9, capacitors C7-C10, and polar capacitor Cp5; one end of resistor R5, one end of resistor R6, and one end of resistor R7 are connected to the operational amplifier Pin 3 of chip U3, the other end of resistor R5 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit, the other end of resistor R6 is connected to one end of capacitor C7, which serves as the X-axis magnetic field signal input end, and the other end of capacitor C7 One end is connected to the other end of the resistor R7 and grounded; pin 4 of the operational amplifier chip U3 is grounded; pins 1 and 2 of the operational amplifier chip U3 are connected and then connected to the power supply V_Back; one end of the capacitor C8, the positive electrode of the polarity capacitor Cp5, and the operational amplifier chip Pin 8 of U3 is connected to the +5V regulated output of the +5V voltage stabilizing circuit, and the other end of capacitor C8 is connected to the negative pole of polar capacitor Cp5 and grounded; pins 6 and 7 of operational amplifier chip U3 and one end of capacitor C10 are connected as The output end of the X-axis analog signal adder circuit is connected to pin 6 of universal plug-in strip P2; one end of capacitor C9 and one end of resistor R8 are connected to pin 5 of operational amplifier chip U3, the other end of capacitor C9 is connected to ground, and the other end of resistor R8 and One end of the resistor R9 is connected to the other end of the capacitor C10, and the other end of the resistor R9 is connected to the power supply V_Back; the operational amplifier chip U3 uses the Texas Instruments precision operational amplifier chip OPA2376;

如图9所示，Y轴模拟信号加法电路包括运算放大器芯片U4、电阻R10-R14、电容C11-C14、极性电容Cp6；电阻R10的一端、电阻R11的一端、电阻R12的一端接运算放大器芯片U4的3脚，电阻R10的另一端接+4.5V基准电压电路的+4.5V基准电压输出端，电阻R11的另一端接电容C11的一端，作为Y周磁场信号的输入端，电容C11的另一端接电阻R12的另一端并接地；运算放大器芯片U4的4脚接地；运算放大器芯片U4的1脚和2脚连接后接电源V_Back；电容C12的一端、极性电容Cp6的正极、+5V稳压电路的+5V稳压输出端接运算放大器芯片U4的8脚，电容C12的另一端接极性电容Cp6的负极并接地；运算放大器芯片U4的6脚、7脚、电容C14的一端连接，作为Y轴模拟信号加法电路的输出端，接通用插排P2的4脚；电容C13的一端、电阻R13的一端接运算放大器芯片U4的5脚，电容C13的另一端接地，电阻R13的另一端、电阻R14的一端接电容C14的另一端，电阻R14的另一端接电源V_Back；运算放大器芯片U4采用德州仪器的精密运放芯片OPA2376；As shown in Figure 9, the Y-axis analog signal adder circuit includes operational amplifier chip U4, resistors R10-R14, capacitors C11-C14, and polar capacitor Cp6; one end of resistor R10, one end of resistor R11, and one end of resistor R12 are connected to the operational amplifier Pin 3 of chip U4, the other end of resistor R10 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit, the other end of resistor R11 is connected to one end of capacitor C11, as the input end of the Y-circuit magnetic field signal, the capacitor C11 The other end is connected to the other end of the resistor R12 and grounded; pin 4 of the operational amplifier chip U4 is grounded; pins 1 and 2 of the operational amplifier chip U4 are connected and then connected to the power supply V_Back; one end of the capacitor C12, the positive pole of the polarity capacitor Cp6, +5V The +5V regulated output terminal of the voltage stabilizing circuit is connected to pin 8 of the operational amplifier chip U4, and the other terminal of the capacitor C12 is connected to the negative electrode of the polar capacitor Cp6 and grounded; pins 6 and 7 of the operational amplifier chip U4 are connected to one end of the capacitor C14. , as the output end of the Y-axis analog signal adder circuit, connect to pin 4 of the universal plug-in strip P2; one end of the capacitor C13 and one end of the resistor R13 are connected to pin 5 of the operational amplifier chip U4, the other end of the capacitor C13 is connected to ground, and the other end of the resistor R13 One end of the resistor R14 is connected to the other end of the capacitor C14, and the other end of the resistor R14 is connected to the power supply V_Back; the operational amplifier chip U4 uses Texas Instruments' precision operational amplifier chip OPA2376;

如图10所示，Z轴模拟信号加法电路包括运算放大器芯片U5、电阻R15-R19、电容C15-C18、极性电容Cp7；电阻R15的一端、电阻R16的一端、电阻R17的一端接运算放大器芯片U5的3脚；电阻R15的另一端接+4.5V基准电压电路的+4.5V基准电压输出端；电阻R16的另一端接电容C15的一端，作为Z轴磁场信号的输入端；电容C15的另一端接电阻R17的另一端并接地；运算放大器芯片U5的4脚接地；运算放大器芯片U5的1脚和2脚连接后接电源V_Back；电容C16的一端、极性电容Cp7的正极、+5V稳压电路的+5V稳压输出端接运算放大器芯片U5的8脚，电容C16的另一端接极性电容Cp7的负极并接地；运算放大器芯片U5的6脚、7脚、电容C18的一端连接，作为Z轴模拟信号加法电路的输出端，接通用插排P2的2脚；电容C17的一端、电阻R18的一端接运算放大器芯片U5的5脚，电容C17的另一端接地，电阻R18的另一端、电阻R19的一端接电容C18的另一端，电阻R19的另一端接电源V_Back；运算放大器芯片U5采用德州仪器的精密运放芯片OPA2376；As shown in Figure 10, the Z-axis analog signal adder circuit includes operational amplifier chip U5, resistors R15-R19, capacitors C15-C18, and polarity capacitor Cp7; one end of resistor R15, one end of resistor R16, and one end of resistor R17 are connected to the operational amplifier Pin 3 of chip U5; the other end of resistor R15 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit; the other end of resistor R16 is connected to one end of capacitor C15 as the input end of the Z-axis magnetic field signal; the other end of capacitor C15 The other end is connected to the other end of the resistor R17 and grounded; pin 4 of the operational amplifier chip U5 is connected to ground; pins 1 and 2 of the operational amplifier chip U5 are connected and then connected to the power supply V_Back; one end of the capacitor C16, the positive pole of the polarity capacitor Cp7, +5V The +5V regulated output terminal of the voltage stabilizing circuit is connected to pin 8 of the operational amplifier chip U5, and the other terminal of the capacitor C16 is connected to the negative electrode of the polar capacitor Cp7 and grounded; pins 6 and 7 of the operational amplifier chip U5 are connected to one end of the capacitor C18. , as the output end of the Z-axis analog signal adding circuit, connect to pin 2 of the universal plug-in strip P2; one end of the capacitor C17 and one end of the resistor R18 are connected to pin 5 of the operational amplifier chip U5, the other end of the capacitor C17 is connected to ground, and the other end of the resistor R18 One end of the resistor R19 is connected to the other end of the capacitor C18, and the other end of the resistor R19 is connected to the power supply V_Back; the operational amplifier chip U5 uses the Texas Instruments precision operational amplifier chip OPA2376;

如图11所示，数模转换电路包括模数转换芯片U14、极性电容Cp11-Cp12、电阻R29-R32、电容C48-C55、晶振X3；电容C48的一端、极性电容Cp11的正极、模数转换芯片U14的1脚接+5V稳压电路的+5V稳压输出端；电容C48的另一端、极性电容Cp11的负极相接并接地；模数转换芯片U14的4脚接+2.5V基准电压电路的+2.5V基准电压输出端；模数转换芯片U14的3脚、6脚、7脚、9脚、11脚、13脚、5脚、2脚接地；电容C49的一端、模数转换芯片U14的8脚连接后接通用插排P2的6脚，电容C49的另一端接地；电容C50的一端、模数转换芯片U14的10脚连接后接通用插排P2的4脚，电容C50的另一端接地；电容C51的一端、模数转换芯片U14的12脚连接后接通用插排P2的2脚，电容C51的另一端接地；模数转换芯片U14的14脚接+3.3V稳压电路的+3.3V稳压输出端；电阻R29的一端接模数转换芯片U14的24脚，电阻R29的另一端接主控电路的52脚；电阻R30的一端接模数转换芯片U14的23脚，电阻R30的另一端接主控电路的54脚；电阻R31的一端接模数转换芯片U14的22脚，电阻R31的另一端接主控电路的53脚；电阻R32的一端接模数转换芯片U14的21脚，电阻R32的另一端接主控电路的56脚；模数转换芯片U14的20脚接地；晶振X3的一端、电容C54的一端接模数转换芯片U14的19脚；晶振X3的另一端、电容C55的一端接模数转换芯片U14的18脚；电容C54的另一端和电容C55的另一端连接后接地；模数转换芯片U14的17脚接地；电容C52的一端、极性电容Cp12的正极、模数转换芯片U14的15脚、16脚接+3.3V稳压电路的+3.3V稳压输出端；电容C52的另一端和极性电容C12的负极连接后接地；模数转换芯片U14其他引脚悬空；模数转换芯片U14采用德州仪器的24位模数转换芯片ADS1256。As shown in Figure 11, the digital-to-analog conversion circuit includes the analog-to-digital conversion chip U14, polar capacitors Cp11-Cp12, resistors R29-R32, capacitors C48-C55, and crystal oscillator X3; one end of the capacitor C48, the positive electrode of the polar capacitor Cp11, and the analog Pin 1 of the digital conversion chip U14 is connected to the +5V regulated output of the +5V voltage stabilizing circuit; the other end of the capacitor C48 and the negative pole of the polar capacitor Cp11 are connected to ground; pin 4 of the analog-to-digital conversion chip U14 is connected to +2.5V The +2.5V reference voltage output terminal of the reference voltage circuit; pins 3, 6, 7, 9, 11, 13, 5, and 2 of the analog-to-digital conversion chip U14 are grounded; one end of the capacitor C49, the analog-to-digital Pin 8 of the conversion chip U14 is connected to pin 6 of the universal power strip P2, and the other end of the capacitor C49 is connected to ground; one end of the capacitor C50 is connected to pin 10 of the analog-to-digital conversion chip U14, and then connected to pin 4 of the universal power strip P2, and capacitor C50 The other end of the capacitor C51 is connected to the ground; one end of the capacitor C51 and the 12-pin of the analog-to-digital conversion chip U14 are connected to the 2-pin of the universal plug strip P2, and the other end of the capacitor C51 is connected to the ground; the 14-pin of the analog-to-digital conversion chip U14 is connected to the +3.3V voltage regulator The +3.3V regulated output end of the circuit; one end of the resistor R29 is connected to pin 24 of the analog-to-digital conversion chip U14, the other end of the resistor R29 is connected to pin 52 of the main control circuit; one end of the resistor R30 is connected to pin 23 of the analog-to-digital conversion chip U14 , the other end of resistor R30 is connected to pin 54 of the main control circuit; one end of resistor R31 is connected to pin 22 of the analog-to-digital conversion chip U14, the other end of resistor R31 is connected to pin 53 of the main control circuit; one end of resistor R32 is connected to the analog-to-digital conversion chip Pin 21 of U14, the other end of the resistor R32 is connected to pin 56 of the main control circuit; pin 20 of the analog-to-digital conversion chip U14 is connected to ground; one end of the crystal oscillator X3 and one end of the capacitor C54 are connected to pin 19 of the analog-to-digital conversion chip U14; The other end, one end of the capacitor C55 is connected to the 18 pin of the analog-to-digital conversion chip U14; the other end of the capacitor C54 is connected to the other end of the capacitor C55 and then connected to ground; the 17 pin of the analog-to-digital conversion chip U14 is connected to the ground; one end of the capacitor C52, the polarity capacitor The positive pole of Cp12 and pins 15 and 16 of the analog-to-digital conversion chip U14 are connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; the other end of the capacitor C52 is connected to the negative pole of the polar capacitor C12 and then grounded; the analog-to-digital conversion The other pins of chip U14 are left floating; the analog-to-digital conversion chip U14 uses the 24-bit analog-to-digital conversion chip ADS1256 from Texas Instruments.

如图12所示，主控电路Ⅰ包括主控芯片U12、电阻R24-R25、电容C41-C44、晶振X2；电容C41的一端和晶振X2的一端接主控芯片U12的12脚，电容C42的一端和晶振X2的另一端接主控芯片U12的13脚，电容C41的另一端和电容C42的另一端接地，主控芯片U12的94脚通过电阻R24接地；电阻R25的一端、电容C43的一端接主控芯片U12的14脚，电阻R25的另一端接+3.3V稳压电路的+3.3V稳压输出端，电容C43的另一端接地；电容C44的一端接主控芯片U12的6脚，电容C44的另一端、主控芯片U12的50脚、75脚、100脚、28脚、11脚、22脚接+3.3V稳压电路的+3.3V稳压输出端；主控芯片U12的20脚、49脚、74脚、99脚、10脚、19脚接地；主控芯片U12的52脚连接模数转换电路中电阻R29的一端，53脚连接模数转换电路中电阻R31的一端，54脚连接模数转换电路中电容R30的一端，83脚接通用插排P2的12脚，56脚接模数转换电路中电阻R32的一端，30脚接SD卡存储电路的5脚，31脚接SD卡存储电路的7脚，32脚接SD卡存储电路的3脚，68脚接通用插排P2的8脚，69脚接通用插排P2的10脚，72脚接接插件SWD的2脚，76脚接接插件SWD的3脚，78脚接串口姿态测量电路的2脚，79脚接串口姿态测量电路的3脚，80脚接通用插排P2的14脚，1脚接RTC时钟电路的3脚，2脚接RTC时钟电路的15脚，4脚接RTC时钟电路的16脚；主控芯片U12的剩余引脚悬空；主控芯片U12采用意法半导体的STM32F103RCT6芯片。As shown in Figure 12, the main control circuit I includes the main control chip U12, resistors R24-R25, capacitors C41-C44, and crystal oscillator X2; one end of the capacitor C41 and one end of the crystal oscillator X2 are connected to pin 12 of the main control chip U12, and the capacitor C42 One end and the other end of the crystal oscillator X2 are connected to pin 13 of the main control chip U12, the other end of the capacitor C41 and the other end of the capacitor C42 are connected to ground, and pin 94 of the main control chip U12 is connected to the ground through the resistor R24; one end of the resistor R25 and one end of the capacitor C43 Connect pin 14 of the main control chip U12, the other end of the resistor R25 is connected to the +3.3V voltage stabilizing output end of the +3.3V voltage stabilizing circuit, the other end of the capacitor C43 is connected to ground; one end of the capacitor C44 is connected to pin 6 of the main control chip U12. The other end of the capacitor C44, the 50-pin, 75-pin, 100-pin, 28-pin, 11-pin, and 22-pin of the main control chip U12 are connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; the 20 pin of the main control chip U12 Pins 49, 74, 99, 10, and 19 are grounded; pin 52 of the main control chip U12 is connected to one end of the resistor R29 in the analog-to-digital conversion circuit, and pin 53 is connected to one end of the resistor R31 in the analog-to-digital conversion circuit. Pin 83 is connected to one end of the capacitor R30 in the analog-to-digital conversion circuit, pin 83 is connected to pin 12 of the universal plug strip P2, pin 56 is connected to one end of the resistor R32 in the analog-to-digital conversion circuit, pin 30 is connected to pin 5 of the SD card storage circuit, and pin 31 is connected to Pin 7 and pin 32 of the SD card storage circuit are connected to pin 3 of the SD card storage circuit. Pin 68 is connected to pin 8 of the universal plug strip P2. Pin 69 is connected to pin 10 of the universal plug strip P2. Pin 72 is connected to pin 2 of the connector SWD. , Pin 76 is connected to pin 3 of the SWD connector, pin 78 is connected to pin 2 of the serial port attitude measurement circuit, pin 79 is connected to pin 3 of the serial port attitude measurement circuit, pin 80 is connected to pin 14 of the universal plug strip P2, and pin 1 is connected to the RTC clock circuit 3 pins, 2 pins are connected to pin 15 of the RTC clock circuit, and pin 4 is connected to pin 16 of the RTC clock circuit; the remaining pins of the main control chip U12 are left floating; the main control chip U12 uses the STM32F103RCT6 chip of STMicroelectronics.

如图13所示，串口姿态测量电路Ⅶ包括串口姿态测量芯片U17、电容C62、极性电容Cp14；串口姿态测量芯片U17的7脚、8脚、4脚分别接地；电容C62的一端、极性电容Cp14的正极接串口姿态测量芯片IC16的1脚，电容C62的另一端、极性电容Cp14的负极分别接地；串口姿态测量芯片U17的2脚接主控电路的78脚；串口姿态测量芯片U17的3脚接主控电路的79脚；串口姿态测量芯片U17的其他引脚悬空；串口姿态测量芯片U17采用软芯微科技的LEADIY-M3芯片。As shown in Figure 13, the serial port attitude measurement circuit VII includes the serial port attitude measurement chip U17, capacitor C62, and polarity capacitor Cp14; pins 7, 8, and 4 of the serial port attitude measurement chip U17 are grounded respectively; one end of the capacitor C62 and the polarity capacitor Cp14 are grounded respectively. The positive pole of the capacitor Cp14 is connected to pin 1 of the serial port attitude measurement chip IC16, the other end of the capacitor C62 and the negative pole of the polar capacitor Cp14 are connected to ground respectively; pin 2 of the serial port attitude measurement chip U17 is connected to pin 78 of the main control circuit; the serial port attitude measurement chip U17 Pin 3 is connected to pin 79 of the main control circuit; the other pins of the serial port attitude measurement chip U17 are left floating; the serial port attitude measurement chip U17 uses the LEADIY-M3 chip of Softcore Micro Technology.

如图14所示，RTC时钟电路Ⅷ包括时钟芯片U13、电阻R26-R28、电容C45-C46、纽扣电池B1；电容C45的一端、电阻R26的一端、时钟芯片U13的2脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C45的另一端接地，电阻R26的另一端、时钟芯片U13的3脚连接后接主控电路的1脚；时钟芯片U13的5脚、6脚、7脚、8脚、9脚、10脚、11脚、12脚、13脚接地；电阻R27的一端、时钟芯片U13的15脚连接后接主控电路的2脚，电阻R28的一端、时钟芯片U13的16脚连接后接主控电路的4脚，电阻R27的另一端、电阻R28的另一端连接后接+3.3V稳压电路的+3.3V稳压输出端；电容C46的一端、纽扣电池B1的正极接时钟芯片U13的14脚，电容C46的另一端接地，纽扣电池B1的负极接地；时钟芯片U13的剩余引脚悬空；时钟芯片U13采用善润半导体的DS3231SN芯片。As shown in Figure 14, the RTC clock circuit VIII includes the clock chip U13, resistors R26-R28, capacitors C45-C46, and button battery B1; one end of the capacitor C45, one end of the resistor R26, and the 2-pin connection of the clock chip U13 are connected to +3.3 The +3.3V regulated output terminal of the V voltage stabilizing circuit, the other end of the capacitor C45 is connected to ground, the other end of the resistor R26 is connected to pin 3 of the clock chip U13, and then connected to pin 1 of the main control circuit; pins 5 and 6 of the clock chip U13 Pins 7, 8, 9, 10, 11, 12, and 13 are connected to ground; one end of resistor R27 and pin 15 of clock chip U13 are connected and then connected to pin 2 of the main control circuit. One end of resistor R28, Pin 16 of the clock chip U13 is connected to pin 4 of the main control circuit. The other end of the resistor R27 and the other end of the resistor R28 are connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; one end of the capacitor C46, The positive electrode of the button battery B1 is connected to pin 14 of the clock chip U13, the other end of the capacitor C46 is connected to the ground, and the negative electrode of the button battery B1 is connected to the ground; the remaining pins of the clock chip U13 are left floating; the clock chip U13 uses the DS3231SN chip of Shanrun Semiconductor.

如图15所示，数据传输电路Ⅴ包括多通道RS-232线路驱动器/接收器U8、电容C25-C29、极性电容Cp9；多通道RS-232线路驱动器/接收器U8的1脚、3脚分别连接电容C25的两端，4脚、5脚分别连接电容C26的两端,15脚直接接地，10脚作为信号输出接通用插排P2的8脚，9脚作为信号输入接通用插排P2的10脚，6脚通过电容C29接地，2脚通过电容C28接地，电容C27的一端、极性电容Cp9的正极和16脚连接后接+5V稳压电路的+5V稳压输出端，电容C27的另一端、极性电容Cp9的负极连接后接地，7脚接接线座P1的4脚，8脚接接线座P1的3脚，多通道RS-232线路驱动器/接收器U8其他引脚悬空；多通道RS-232线路驱动器/接收器U8采用德州仪器的MAX3232芯片。As shown in Figure 15, data transmission circuit V includes multi-channel RS-232 line driver/receiver U8, capacitors C25-C29, and polarity capacitor Cp9; pins 1 and 3 of multi-channel RS-232 line driver/receiver U8 Connect the two ends of the capacitor C25 respectively, pins 4 and 5 are connected to the two ends of the capacitor C26 respectively, pin 15 is directly connected to the ground, pin 10 is used as a signal output to connect to pin 8 of the universal plug strip P2, and pin 9 is used as a signal input to connect to the universal plug strip P2 10 pins, 6 pins are grounded through capacitor C29, 2 pins are grounded through capacitor C28, one end of capacitor C27, the positive electrode of polarity capacitor Cp9 and 16 feet are connected to the +5V voltage stabilizing output of the +5V voltage stabilizing circuit, capacitor C27 The other end, the negative pole of the polar capacitor Cp9 is connected to the ground, pin 7 is connected to pin 4 of the terminal block P1, pin 8 is connected to pin 3 of the terminal block P1, and the other pins of the multi-channel RS-232 line driver/receiver U8 are left floating; The multi-channel RS-232 line driver/receiver U8 uses Texas Instruments' MAX3232 chip.

如图16所示，SD卡存储电路Ⅵ包括SDCard-U18、电容C63、电阻R35-R36；电容C63的一端、SDCard-U18的4脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C63的另一端、SDCard-U18的6脚连接后接地；电阻R35的一端、SDCard-U18的3脚连接后接主控电路的32脚，电阻R35的另一端、电阻R36的一端接+3.3V稳压电路的+3.3V稳压输出端，电阻R36的另一端、SDCard-U18的7脚连接后接主控电路的31脚；SDCard-U18的5脚接主控电路的30脚，2脚接地；SDCard-U18的剩余引脚悬空。As shown in Figure 16, SD card storage circuit VI includes SDCard-U18, capacitor C63, and resistors R35-R36; one end of capacitor C63 and pin 4 of SDCard-U18 are connected to the +3.3V voltage regulator of the +3.3V voltage regulator circuit. At the output end, the other end of capacitor C63 is connected to pin 6 of SDCard-U18 and then grounded; one end of resistor R35 is connected to pin 3 of SDCard-U18 and then connected to pin 32 of the main control circuit. The other end of resistor R35 and one end of resistor R36 are connected. Connect the +3.3V voltage stabilizing output end of the +3.3V voltage stabilizing circuit. The other end of the resistor R36 and pin 7 of SDCard-U18 are connected to pin 31 of the main control circuit. Pin 5 of SDCard-U18 is connected to pin 30 of the main control circuit. Pins, 2 pins are grounded; the remaining pins of SDCard-U18 are left floating.

如图17所示，文件管理电路Ⅸ包括文件管理控制芯片U9、电容C30-C33、电阻R22、发光二极管D2、晶振X1；电容C30的一端接文件管理控制芯片U9的2脚，电容C30的另一端接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9的5脚接通用插排P2的12脚，6脚接通用插排P2的14脚；电容C31的一端、文件管理控制芯片U9的9脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C31的另一端接地；文件管理控制芯片U9的10脚接接线座P1的7脚，11脚接接线座P1的6脚；文件管理控制芯片U9的12脚接地；文件管理控制芯片U9的13脚、14脚分别接晶振X1的两端；电容C32的一端、电容C33的一端、文件管理控制芯片U9的28脚连接后接+3.3V稳压电路的+3.3V稳压输出端；电容C32的另一端、电容C33的另一端分别接地；发光二极管D2的阴极接文件管理控制芯片U9的24脚，发光二极管D2的阳极接电阻R22的一端，电阻R22的另一端接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9的23脚、21脚、20脚分别接地；文件管理控制芯片U9的19脚接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9其他引脚悬空；文件管理控制芯片U9采用CH376S芯片。As shown in Figure 17, the file management circuit IX includes the file management control chip U9, capacitors C30-C33, resistor R22, light-emitting diode D2, and crystal oscillator X1; one end of the capacitor C30 is connected to pin 2 of the file management control chip U9, and the other end of the capacitor C30 One end is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; pin 5 of the file management control chip U9 is connected to pin 12 of the universal plug strip P2, and pin 6 is connected to pin 14 of the universal plug strip P2; one end of the capacitor C31, Pin 9 of the file management control chip U9 is connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit, and the other end of the capacitor C31 is connected to ground; pin 10 of the file management control chip U9 is connected to pins 7 and 11 of the terminal block P1 Pin 6 of the terminal block P1; pin 12 of the file management control chip U9 is connected to ground; pins 13 and 14 of the file management control chip U9 are connected to both ends of the crystal oscillator X1; one end of the capacitor C32, one end of the capacitor C33, and the file management Pin 28 of the control chip U9 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; the other end of the capacitor C32 and the other end of the capacitor C33 are connected to ground respectively; the cathode of the light-emitting diode D2 is connected to the file management control chip U9 Pin 24, the anode of the light-emitting diode D2 is connected to one end of the resistor R22, and the other end of the resistor R22 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; pins 23, 21, and 20 of the file management control chip U9 are respectively Ground; pin 19 of the file management control chip U9 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; other pins of the file management control chip U9 are left floating; the file management control chip U9 uses the CH376S chip.

对外接口电路Ⅳ包括接线座电路、通用插排电路以及接插件电路；External interface circuit IV includes terminal block circuit, universal strip circuit and connector circuit;

如图18所示，接线座电路包括接线座P1、二极管D4、极性电容Cp15；二极管D4的阳极接接线座P1的1脚，二极管D4的阴极接电源DC24V；接线座P1的2脚、8脚接地，3脚接数据传输电路的8脚，4脚接数据传输电路的7脚，6脚接文件管理电路的11脚，7脚接文件管理电路的10脚；极性电容Cp15的正极接接线座P1的5脚，极性电容Cp15的负极接地；As shown in Figure 18, the terminal block circuit includes terminal block P1, diode D4, and polar capacitor Cp15; the anode of diode D4 is connected to pin 1 of terminal block P1, and the cathode of diode D4 is connected to the power supply DC24V; pins 2 and 8 of terminal block P1 The pin is connected to ground, pin 3 is connected to pin 8 of the data transmission circuit, pin 4 is connected to pin 7 of the data transmission circuit, pin 6 is connected to pin 11 of the file management circuit, pin 7 is connected to pin 10 of the file management circuit; the positive electrode of the polarity capacitor Cp15 is connected Pin 5 of terminal block P1 and the negative electrode of polar capacitor Cp15 are connected to ground;

如图19所示，通用插排电路包括通用插排P2；通用插排P2的3脚、5脚、7脚、9脚、11脚、13脚、15脚、17脚、19脚接地，16脚、18脚、20脚接+5V电源，2脚接Z轴模拟信号加法电路的7脚、数模转换电路的12脚，4脚接Y轴模拟信号加法电路的7脚、数模转换电路的10脚，6脚接X轴模拟信号加法电路的7脚、数模转换电路的8脚，8脚接数据传输电路的10脚、主控电路的68脚，10脚接数据传输电路的9脚、主控电路的69脚，12脚接文件管理电路的5脚、主控电路的83脚，14脚接文件管理电路的6脚、主控电路的80脚；As shown in Figure 19, the universal plug-in strip circuit includes universal plug-in strip P2; pins 3, 5, 7, 9, 11, 13, 15, 17 and 19 of the universal plug-in strip P2 are grounded, and 16 Pins 18 and 20 are connected to the +5V power supply, pin 2 is connected to pin 7 of the Z-axis analog signal adding circuit and pin 12 of the digital-to-analog conversion circuit, and pin 4 is connected to pin 7 of the Y-axis analog signal adding circuit and the digital-to-analog conversion circuit. Pin 10, pin 6 is connected to pin 7 of the X-axis analog signal adder circuit, pin 8 of the digital-to-analog conversion circuit, pin 8 is connected to pin 10 of the data transmission circuit, pin 68 of the main control circuit, pin 10 is connected to pin 9 of the data transmission circuit Pin 69 of the main control circuit, pin 12 is connected to pin 5 of the file management circuit and pin 83 of the main control circuit, pin 14 is connected to pin 6 of the file management circuit and pin 80 of the main control circuit;

如图20所示，接插件电路包含接插件SWD；接插件SWD的1脚接+3.3V电源，2脚接主控电路的72脚，3脚接主控电路的76脚，4脚接地。As shown in Figure 20, the connector circuit includes connector SWD; pin 1 of connector SWD is connected to the +3.3V power supply, pin 2 is connected to pin 72 of the main control circuit, pin 3 is connected to pin 76 of the main control circuit, and pin 4 is connected to ground.

由于电路采用英国Bartington公司的MAG03MCL100磁通门传感器，传感器将磁信号转化成电压信号输出，电压范围在[-10V,10V]之间，而市场上的高精度模数转换芯片只能转换[0,5V]的电压值，因此设计了相同结构的三个轴向模拟信号加法电路，用于将传感器输出信号电压值转换成模数转换电路可接受的电压值。设计串口姿态测量电路，用于实时测量磁力仪的姿态信息，并通过坐标变换矩阵，将测量得到的载体坐标系下磁场三分量转换为真实地理坐标系下的地磁场分量。Since the circuit uses the MAG03MCL100 fluxgate sensor from Bartington Company in the UK, the sensor converts the magnetic signal into a voltage signal output. The voltage range is between [-10V, 10V], while the high-precision analog-to-digital conversion chip on the market can only convert [0 ,5V] voltage value, so three axial analog signal adder circuits with the same structure were designed to convert the sensor output signal voltage value into a voltage value acceptable to the analog-to-digital conversion circuit. A serial port attitude measurement circuit is designed to measure the attitude information of the magnetometer in real time, and convert the measured three-component magnetic field in the carrier coordinate system into the geomagnetic field component in the real geographical coordinate system through the coordinate transformation matrix.

本发明所涉及的电路为真地理下三分量磁力仪测量电路，该测量电路应用范围广泛，不仅可用于航天航空，也可运用于复杂的海底环境。电路可实时测量真地理坐标系下三分量矢量磁场值，为绘制磁异常成图提供精确原始数据，有利于探测、搜寻技术的发展。The circuit involved in the present invention is a true three-component magnetometer measurement circuit. This measurement circuit has a wide range of applications and can be used not only in aerospace but also in complex seabed environments. The circuit can measure the three-component vector magnetic field value in the true geographical coordinate system in real time, providing accurate original data for mapping magnetic anomalies, which is conducive to the development of detection and search technology.

Claims (8)

1.一种真地理三分量磁力仪的测量电路，包括电源电路、传感器信号采集电路、主控电路 、串口姿态测量电路、RTC时钟电路、数据传输电路、SD卡存储电路、文件管理电路、对外接口电路，其特征在于：1. A true geographical three-component magnetometer measurement circuit, including a power supply circuit, sensor signal acquisition circuit, main control circuit, serial port attitude measurement circuit, RTC clock circuit, data transmission circuit, SD card storage circuit, file management circuit, external Interface circuit, characterized by: 所述的电源电路包括+15V稳压电路、-15V稳压电路、+5V稳压电路、+4.5V基准电压电路、+3.3V稳压电路、+3.3V开关电源电路、+2.5V基准电压电路；+15V稳压电路、-15V稳压电路给磁通门传感器供电，+5V稳压电路为数据传输电路提供稳定性高的电压，并与线性电路得到纹波较小的+4.5V和+2.5V,其中+4.5V基准电压电路用于为传感器信号采集电路中三轴模拟信号加法电路提供高精度的基准电压，+2.5V基准电压电路用于为传感器信号采集电路中数模转换电路提供稳定的基准电压；+3.3V稳压电路及+3.3V开关电路则用于给主控电路、串口姿态测量电路、RTC时钟电路、SD卡存储电路、文件管理电路提供稳定电压；The power supply circuit includes a +15V voltage stabilizing circuit, a -15V voltage stabilizing circuit, a +5V voltage stabilizing circuit, a +4.5V reference voltage circuit, a +3.3V voltage stabilizing circuit, a +3.3V switching power supply circuit, and a +2.5V reference voltage Circuit; the +15V voltage stabilizing circuit and the -15V voltage stabilizing circuit supply power to the fluxgate sensor. The +5V voltage stabilizing circuit provides a highly stable voltage for the data transmission circuit, and is combined with the linear circuit to obtain +4.5V and a smaller ripple. +2.5V, of which the +4.5V reference voltage circuit is used to provide a high-precision reference voltage for the three-axis analog signal adder circuit in the sensor signal acquisition circuit, and the +2.5V reference voltage circuit is used for the digital-to-analog conversion circuit in the sensor signal acquisition circuit. Provide a stable reference voltage; the +3.3V voltage stabilizing circuit and the +3.3V switching circuit are used to provide stable voltage to the main control circuit, serial port attitude measurement circuit, RTC clock circuit, SD card storage circuit, and file management circuit; 所述的传感器信号采集电路包括X轴、Y轴、Z轴三个模拟信号加法电路及数模转换电路；The sensor signal acquisition circuit includes three analog signal addition circuits for X-axis, Y-axis, and Z-axis and a digital-to-analog conversion circuit; 所述的X轴模拟信号加法电路包括运算放大器芯片U3、电阻R5-R9、电容C7-C10、极性电容Cp5；电阻R5的一端、电阻R6的一端、电阻R7的一端接运算放大器芯片U3的3脚，电阻R5的另一端接+4.5V基准电压电路的+4.5V基准电压输出端，电阻R6的另一端接电容C7的一端，作为X轴磁场信号输入端，电容C7的另一端接电阻R7的另一端并接地；运算放大器芯片U3的4脚接地；运算放大器芯片U3的1脚和2脚连接后接电源V_Back；电容C8的一端、极性电容Cp5的正极、运算放大器芯片U3的8脚接+5V稳压电路的+5V稳压输出端，电容C8的另一端接极性电容Cp5的负极并接地；运算放大器芯片U3的6脚、7脚、电容C10的一端连接作为X轴模拟信号加法电路的输出端，接通用插排P2的6脚；电容C9的一端、电阻R8的一端接运算放大器芯片U3的5脚，电容C9的另一端接地，电阻R8的另一端、电阻R9的一端接电容C10的另一端，电阻R9的另一端接电源V_Back；运算放大器芯片U3采用德州仪器的精密运放芯片OPA2376；The described Pin 3, the other end of the resistor R5 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit, the other end of the resistor R6 is connected to one end of the capacitor C7, which is used as the X-axis magnetic field signal input end, and the other end of the capacitor C7 is connected to the resistor The other end of R7 is connected to the ground; pin 4 of the operational amplifier chip U3 is connected to the ground; pins 1 and 2 of the operational amplifier chip U3 are connected and then connected to the power supply V_Back; one end of the capacitor C8, the positive electrode of the polarity capacitor Cp5, and pin 8 of the operational amplifier chip U3 The pin is connected to the +5V voltage stabilizing output of the +5V voltage stabilizing circuit, and the other end of capacitor C8 is connected to the negative pole of polar capacitor Cp5 and grounded; pins 6 and 7 of operational amplifier chip U3 and one end of capacitor C10 are connected as X-axis simulation The output end of the signal adder circuit is connected to pin 6 of universal plug-in strip P2; one end of capacitor C9 and one end of resistor R8 are connected to pin 5 of operational amplifier chip U3, the other end of capacitor C9 is connected to ground, and the other end of resistor R8 and resistor R9 One end is connected to the other end of the capacitor C10, and the other end of the resistor R9 is connected to the power supply V_Back; the operational amplifier chip U3 uses the Texas Instruments precision operational amplifier chip OPA2376; 所述的Y轴模拟信号加法电路包括运算放大器芯片U4、电阻R10-R14、电容C11-C14、极性电容Cp6；电阻R10的一端、电阻R11的一端、电阻R12的一端接运算放大器芯片U4的3脚，电阻R10的另一端接+4.5V基准电压电路的+4.5V基准电压输出端，电阻R11的另一端接电容C11的一端，作为Y周磁场信号的输入端，电容C11的另一端接电阻R12的另一端并接地；运算放大器芯片U4的4脚接地；运算放大器芯片U4的1脚和2脚连接后接电源V_Back;电容C12的一端、极性电容Cp6的正极、+5V稳压电路的+5V稳压输出端接运算放大器芯片U4的8脚，电容C12的另一端接极性电容Cp6的负极并接地；运算放大器芯片U4的6脚、7脚、电容C14的一端连接，作为Y轴模拟信号加法电路的输出端，接通用插排P2的4脚；电容C13的一端、电阻R13的一端接运算放大器芯片U4的5脚，电容C13的另一端接地，电阻R13的另一端、电阻R14的一端接电容C14的另一端，电阻R14的另一端接电源V_Back；运算放大器芯片U4采用德州仪器的精密运放芯片OPA2376；The Y-axis analog signal adding circuit includes an operational amplifier chip U4, resistors R10-R14, capacitors C11-C14, and polar capacitor Cp6; one end of the resistor R10, one end of the resistor R11, and one end of the resistor R12 are connected to the operational amplifier chip U4. 3 pins, the other end of the resistor R10 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit, the other end of the resistor R11 is connected to one end of the capacitor C11, which is used as the input end of the Y-circuit magnetic field signal, and the other end of the capacitor C11 is connected The other end of the resistor R12 is connected to the ground; pin 4 of the operational amplifier chip U4 is connected to the ground; pins 1 and 2 of the operational amplifier chip U4 are connected and then connected to the power supply V_Back; one end of the capacitor C12, the positive electrode of the polar capacitor Cp6, and the +5V voltage stabilizing circuit The +5V regulated output terminal is connected to pin 8 of the operational amplifier chip U4, and the other terminal of the capacitor C12 is connected to the negative electrode of the polar capacitor Cp6 and grounded; pins 6 and 7 of the operational amplifier chip U4 and one terminal of the capacitor C14 are connected as Y The output end of the axis analog signal adding circuit is connected to pin 4 of the universal plug-in strip P2; one end of the capacitor C13 and one end of the resistor R13 are connected to pin 5 of the operational amplifier chip U4, the other end of the capacitor C13 is connected to ground, and the other end of the resistor R13 and the resistor One end of R14 is connected to the other end of the capacitor C14, and the other end of the resistor R14 is connected to the power supply V_Back; the operational amplifier chip U4 uses the Texas Instruments precision operational amplifier chip OPA2376; 所述的Z轴模拟信号加法电路包括运算放大器芯片U5、电阻R15-R19、电容C15-C18、极性电容Cp7；电阻R15的一端、电阻R16的一端、电阻R17的一端接运算放大器芯片U5的3脚；电阻R15的另一端接+4.5V基准电压电路的+4.5V基准电压输出端；电阻R16的另一端接电容C15的一端，作为Z轴磁场信号的输入端；电容C15的另一端接电阻R17的另一端并接地；运算放大器芯片U5的4脚接地；运算放大器芯片U5的1脚和2脚连接后接电源V_Back；电容C16的一端、极性电容Cp7的正极、+5V稳压电路的+5V稳压输出端接运算放大器芯片U5的8脚，电容C16的另一端接极性电容Cp7的负极并接地；运算放大器芯片U5的6脚、7脚、电容C18的一端连接，作为Z轴模拟信号加法电路的输出端，接通用插排P2的2脚；电容C17的一端、电阻R18的一端接运算放大器芯片U5的5脚，电容C17的另一端接地，电阻R18的另一端、电阻R19的一端接电容C18的另一端，电阻R19的另一端接电源V_Back；运算放大器芯片U5采用德州仪器的精密运放芯片OPA2376；The Z-axis analog signal adding circuit includes an operational amplifier chip U5, resistors R15-R19, capacitors C15-C18, and polar capacitor Cp7; one end of the resistor R15, one end of the resistor R16, and one end of the resistor R17 are connected to the operational amplifier chip U5. 3 pins; the other end of the resistor R15 is connected to the +4.5V reference voltage output end of the +4.5V reference voltage circuit; the other end of the resistor R16 is connected to one end of the capacitor C15 as the input end of the Z-axis magnetic field signal; the other end of the capacitor C15 is connected The other end of the resistor R17 is connected to the ground; pin 4 of the operational amplifier chip U5 is connected to the ground; pins 1 and 2 of the operational amplifier chip U5 are connected and then connected to the power supply V_Back; one end of the capacitor C16, the positive electrode of the polar capacitor Cp7, and the +5V voltage stabilizing circuit The +5V regulated output terminal is connected to pin 8 of the operational amplifier chip U5, and the other terminal of the capacitor C16 is connected to the negative electrode of the polar capacitor Cp7 and grounded; pins 6 and 7 of the operational amplifier chip U5 and one terminal of the capacitor C18 are connected as Z The output end of the axis analog signal adding circuit is connected to pin 2 of the universal plug-in strip P2; one end of the capacitor C17 and one end of the resistor R18 are connected to pin 5 of the operational amplifier chip U5, the other end of the capacitor C17 is connected to ground, and the other end of the resistor R18 and the resistor One end of R19 is connected to the other end of the capacitor C18, and the other end of the resistor R19 is connected to the power supply V_Back; the operational amplifier chip U5 uses the Texas Instruments precision operational amplifier chip OPA2376; 所述的数模转换电路包括模数转换芯片U14、极性电容Cp11-Cp12、电阻R29-R32、电容C48-C55、晶振X3；电容C48的一端、极性电容Cp11的正极、模数转换芯片U14的1脚接+5V稳压电路的+5V稳压输出端；电容C48的另一端、极性电容Cp11的负极相接并接地；模数转换芯片U14的4脚接+2.5V基准电压电路的+2.5V基准电压输出端；模数转换芯片U14的3脚、6脚、7脚、9脚、11脚、13脚、5脚、2脚接地；电容C49的一端、模数转换芯片U14的8脚连接后接通用插排P2的6脚，电容C49的另一端接地；电容C50的一端、模数转换芯片U14的10脚连接后接通用插排P2的4脚，电容C50的另一端接地；电容C51的一端、模数转换芯片U14的12脚连接后接通用插排P2的2脚，电容C51的另一端接地；模数转换芯片U14的14脚接+3.3V稳压电路的+3.3V稳压输出端；电阻R29的一端接模数转换芯片U14的24脚，电阻R29的另一端接主控电路的52脚；电阻R30的一端接模数转换芯片U14的23脚，电阻R30的另一端接主控电路的54脚；电阻R31的一端接模数转换芯片U14的22脚，电阻R31的另一端接主控电路的53脚；电阻R32的一端接模数转换芯片U14的21脚，电阻R32的另一端接主控电路的56脚；模数转换芯片U14的20脚接地；晶振X3的一端、电容C54的一端接模数转换芯片U14的19脚；晶振X3的另一端、电容C55的一端接模数转换芯片U14的18脚；电容C54的另一端和电容C55的另一端连接后接地；模数转换芯片U14的17脚接地；电容C52的一端、极性电容Cp12的正极、模数转换芯片U14的15脚、16脚接+3.3V稳压电路的+3.3V稳压输出端；电容C52的另一端和极性电容C12的负极连接后接地；模数转换芯片U14其他引脚悬空；模数转换芯片U14采用德州仪器的24位模数转换芯片ADS1256；The digital-to-analog conversion circuit includes the analog-to-digital conversion chip U14, polar capacitors Cp11-Cp12, resistors R29-R32, capacitors C48-C55, crystal oscillator X3; one end of the capacitor C48, the positive electrode of the polar capacitor Cp11, and the analog-to-digital conversion chip. Pin 1 of U14 is connected to the +5V regulated output of the +5V voltage stabilizing circuit; the other end of capacitor C48 and the negative pole of polar capacitor Cp11 are connected to ground; pin 4 of analog-to-digital conversion chip U14 is connected to the +2.5V reference voltage circuit +2.5V reference voltage output end; pins 3, 6, 7, 9, 11, 13, 5, and 2 of the analog-to-digital conversion chip U14 are connected to ground; one end of the capacitor C49, the analog-to-digital conversion chip U14 After the 8-pin connection is connected to the 6-pin of the universal plug-in strip P2, the other end of the capacitor C49 is connected to the ground; one end of the capacitor C50 and the 10-pin of the analog-to-digital conversion chip U14 are connected and then connected to the 4-pin of the universal plug-in strip P2, and the other end of the capacitor C50 Connect one end of the capacitor C51 to pin 12 of the analog-to-digital conversion chip U14 and then connect to pin 2 of the universal plug strip P2. The other end of the capacitor C51 is connected to the ground. Pin 14 of the analog-to-digital conversion chip U14 is connected to the + of the +3.3V voltage stabilizing circuit. 3.3V regulated output terminal; one end of the resistor R29 is connected to pin 24 of the analog-to-digital conversion chip U14, and the other end of the resistor R29 is connected to pin 52 of the main control circuit; one end of the resistor R30 is connected to pin 23 of the analog-to-digital conversion chip U14, and the resistor R30 The other end of the resistor R31 is connected to pin 54 of the main control circuit; one end of the resistor R31 is connected to pin 22 of the analog-to-digital conversion chip U14, the other end of the resistor R31 is connected to pin 53 of the main control circuit; one end of the resistor R32 is connected to pin 21 of the analog-to-digital conversion chip U14 pin, the other end of resistor R32 is connected to pin 56 of the main control circuit; pin 20 of analog-to-digital conversion chip U14 is connected to ground; one end of crystal oscillator X3 and one end of capacitor C54 are connected to pin 19 of analog-to-digital conversion chip U14; the other end of crystal oscillator X3, One end of capacitor C55 is connected to pin 18 of analog-to-digital conversion chip U14; the other end of capacitor C54 is connected to the other end of capacitor C55 and then grounded; pin 17 of analog-to-digital conversion chip U14 is connected to ground; one end of capacitor C52 and the positive electrode of polarity capacitor Cp12 , Pins 15 and 16 of the analog-to-digital conversion chip U14 are connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit; the other end of the capacitor C52 is connected to the negative pole of the polar capacitor C12 and then grounded; the other analog-to-digital conversion chips U14 The pin is left floating; the analog-to-digital conversion chip U14 uses Texas Instruments' 24-bit analog-to-digital conversion chip ADS1256; 所述的主控电路包括主控芯片U12、电阻R24-R25、电容C41-C44、晶振X2；电容C41的一端和晶振X2的一端接主控芯片U12的12脚，电容C42的一端和晶振X2的另一端接主控芯片U12的13脚，电容C41的另一端和电容C42的另一端接地，主控芯片U12的94脚通过电阻R24接地；电阻R25的一端、电容C43的一端接主控芯片U12的14脚，电阻R25的另一端接+3.3V稳压电路的+3.3V稳压输出端，电容C43的另一端接地；电容C44的一端接主控芯片U12的6脚，电容C44的另一端、主控芯片U12的50脚、75脚、100脚、28脚、11脚、22脚接+3.3V稳压电路的+3.3V稳压输出端；主控芯片U12的20脚、49脚、74脚、99脚、10脚、19脚接地；主控芯片U12的52脚连接模数转换电路中电阻R29的一端，53脚连接模数转换电路中电阻R31的一端，54脚连接模数转换电路中电容R30的一端，83脚接通用插排P2的12脚，56脚接模数转换电路中电阻R32的一端，30脚接SD卡存储电路的5脚，31脚接SD卡存储电路的7脚，32脚接SD卡存储电路的3脚，68脚接通用插排P2的8脚，69脚接通用插排P2的10脚，72脚接接插件SWD的2脚，76脚接接插件SWD的3脚，78脚接串口姿态测量电路的2脚，79脚接串口姿态测量电路的3脚，80脚接通用插排P2的14脚，1脚接RTC时钟电路的3脚，2脚接RTC时钟电路的15脚，4脚接RTC时钟电路的16脚,21脚接+3.3V稳压电路的+3.3V稳压输出端；主控芯片U12的剩余引脚悬空；主控芯片U12采用意法半导体的STM32F103RCT6芯片；The main control circuit includes a main control chip U12, resistors R24-R25, capacitors C41-C44, and crystal oscillator X2; one end of the capacitor C41 and one end of the crystal oscillator X2 are connected to pin 12 of the main control chip U12, and one end of the capacitor C42 is connected to the crystal oscillator X2 The other end of the main control chip U12 is connected to pin 13, the other end of the capacitor C41 and the other end of the capacitor C42 are connected to the ground, the 94 pin of the main control chip U12 is connected to the ground through the resistor R24; one end of the resistor R25 and one end of the capacitor C43 are connected to the main control chip Pin 14 of U12, the other end of resistor R25 is connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit, the other end of capacitor C43 is connected to ground; one end of capacitor C44 is connected to pin 6 of main control chip U12, and the other end of capacitor C44 On one end, pins 50, 75, 100, 28, 11, and 22 of the main control chip U12 are connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; pins 20 and 49 of the main control chip U12 , 74 pins, 99 pins, 10 pins, and 19 pins are grounded; pin 52 of the main control chip U12 is connected to one end of the resistor R29 in the analog-to-digital conversion circuit, pin 53 is connected to one end of the resistor R31 in the analog-to-digital conversion circuit, and pin 54 is connected to the analog-to-digital One end of the capacitor R30 in the conversion circuit, pin 83, is connected to pin 12 of the universal plug strip P2, pin 56 is connected to one end of the resistor R32 in the analog-to-digital conversion circuit, pin 30 is connected to pin 5 of the SD card storage circuit, and pin 31 is connected to the SD card storage circuit. Pin 7, pin 32 is connected to pin 3 of the SD card storage circuit, pin 68 is connected to pin 8 of the universal plug strip P2, pin 69 is connected to pin 10 of the universal plug strip P2, pin 72 is connected to pin 2 of the connector SWD, and pin 76 is connected to Pin 3 of the connector SWD, pin 78 is connected to pin 2 of the serial port attitude measurement circuit, pin 79 is connected to pin 3 of the serial port attitude measurement circuit, pin 80 is connected to pin 14 of the universal plug strip P2, and pin 1 is connected to pin 3 of the RTC clock circuit. Pin 2 is connected to pin 15 of the RTC clock circuit, pin 4 is connected to pin 16 of the RTC clock circuit, pin 21 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; the remaining pins of the main control chip U12 are left floating; the main control Chip U12 uses STMicroelectronics’ STM32F103RCT6 chip; 所述的串口姿态测量电路包括串口姿态测量芯片U17、电容C62、极性电容Cp14；串口姿态测量芯片U17的7脚、8脚、4脚分别接地；电容C62的一端、极性电容Cp14的正极、串口姿态测量芯片U17的1脚接+3.3V稳压电路的+3.3V稳压输出端，电容C62的另一端、极性电容Cp14的负极分别接地；串口姿态测量芯片U17的2脚接主控电路的78脚；串口姿态测量芯片U17的3脚接主控电路的79脚；串口姿态测量芯片U17的4、7、8脚接地；串口姿态测量芯片U17的其他引脚悬空；串口姿态测量芯片U17采用软芯微科技的LEADIY-M3芯片；The described serial port attitude measurement circuit includes a serial port attitude measurement chip U17, a capacitor C62, and a polarity capacitor Cp14; pins 7, 8, and 4 of the serial port attitude measurement chip U17 are grounded respectively; one end of the capacitor C62 and the positive electrode of the polarity capacitor Cp14 , Pin 1 of the serial port attitude measurement chip U17 is connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit, the other end of the capacitor C62 and the negative pole of the polar capacitor Cp14 are connected to ground respectively; Pin 2 of the serial port attitude measurement chip U17 is connected to the main Pin 78 of the control circuit; pin 3 of the serial port attitude measurement chip U17 is connected to pin 79 of the main control circuit; pins 4, 7, and 8 of the serial port attitude measurement chip U17 are connected to ground; other pins of the serial port attitude measurement chip U17 are left floating; serial port attitude measurement Chip U17 uses Softcore Micro Technology’s LEADIY-M3 chip; 所述的RTC时钟电路包括时钟芯片U13、电阻R26-R28、电容C45-C46、纽扣电池B1；电容C45的一端、电阻R26的一端、时钟芯片U13的2脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C45的另一端接地，电阻R26的另一端、时钟芯片U13的3脚连接后接主控电路的1脚；时钟芯片U13的5脚、6脚、7脚、8脚、9脚、10脚、11脚、12脚、13脚接地；电阻R27的一端、时钟芯片U13的15脚连接后接主控电路的2脚，电阻R28的一端、时钟芯片U13的16脚连接后接主控电路的4脚，电阻R27的另一端、电阻R28的另一端连接后接+3.3V稳压电路的+3.3V稳压输出端；电容C46的一端、纽扣电池B1的正极接时钟芯片U13的14脚，电容C46的另一端接地，纽扣电池B1的负极接地；时钟芯片U13的剩余引脚悬空；时钟芯片U13采用善润半导体的DS3231SN芯片；The RTC clock circuit includes a clock chip U13, resistors R26-R28, capacitors C45-C46, and button battery B1; one end of the capacitor C45, one end of the resistor R26, and the 2-pin connection of the clock chip U13 are connected to a +3.3V voltage stabilizing circuit. +3.3V regulated output end, the other end of the capacitor C45 is connected to ground, the other end of the resistor R26 is connected to pin 3 of the clock chip U13 and then connected to pin 1 of the main control circuit; pins 5, 6 and 7 of the clock chip U13 , 8-pin, 9-pin, 10-pin, 11-pin, 12-pin and 13-pin are connected to ground; one end of resistor R27 is connected to pin 15 of clock chip U13 and then connected to pin 2 of the main control circuit. One end of resistor R28 is connected to pin 15 of clock chip U13. Pin 16 is connected to pin 4 of the main control circuit. The other end of the resistor R27 and the other end of the resistor R28 are connected to the +3.3V regulated output end of the +3.3V voltage stabilizing circuit. One end of the capacitor C46 and the button battery B1 are connected. The positive electrode is connected to pin 14 of the clock chip U13, the other end of the capacitor C46 is connected to the ground, and the negative electrode of the button battery B1 is connected to the ground; the remaining pins of the clock chip U13 are left floating; the clock chip U13 uses the DS3231SN chip of Shanrun Semiconductor; 所述的数据传输电路包括多通道 RS-232 线路驱动器/接收器U8、电容C25-C29、极性电容Cp9；多通道 RS-232 线路驱动器/接收器U8的1脚、3脚分别连接电容C25的两端，4脚、5脚分别连接电容C26的两端,15脚直接接地，10脚作为信号输出接通用插排P2的8脚，9脚作为信号输入接通用插排P2的10脚，6脚通过电容C29接地，2脚通过电容C28接地，电容C27的一端、极性电容Cp9的正极和16脚连接后接+5V稳压电路的+5V稳压输出端，电容C27的另一端、极性电容Cp9的负极连接后接地，7脚接接线座P1的4脚，8脚接接线座P1的3脚，多通道RS-232线路驱动器/接收器U8其他引脚悬空；多通道 RS-232 线路驱动器/接收器U8采用德州仪器的MAX3232芯片；The data transmission circuit includes a multi-channel RS-232 line driver/receiver U8, capacitors C25-C29, and polarity capacitor Cp9; pins 1 and 3 of the multi-channel RS-232 line driver/receiver U8 are respectively connected to the capacitor C25 At both ends, pins 4 and 5 are connected to the two ends of the capacitor C26 respectively, pin 15 is directly connected to the ground, pin 10 is used as a signal output to connect to pin 8 of the universal socket P2, and pin 9 is used as a signal input to connect to pin 10 of the universal socket P2. Pin 6 is connected to the ground through the capacitor C29, and pin 2 is connected to the ground through the capacitor C28. One end of the capacitor C27, the positive electrode of the polarity capacitor Cp9, and pin 16 are connected to the +5V voltage stabilizing output of the +5V voltage stabilizing circuit. The other end of the capacitor C27, The negative pole of polar capacitor Cp9 is connected to ground, pin 7 is connected to pin 4 of terminal block P1, pin 8 is connected to pin 3 of terminal block P1, and other pins of multi-channel RS-232 line driver/receiver U8 are left floating; multi-channel RS- 232 line driver/receiver U8 uses Texas Instruments MAX3232 chip; 所述的SD卡存储电路包括SDCard-U18、电容C63、电阻R35-R36；电容C63的一端、SDCard-U18的4脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C63的另一端、SDCard-U18的6脚连接后接地；电阻R35的一端、SDCard-U18的3脚连接后接主控电路的32脚，电阻R35的另一端、电阻R36的一端接+3.3V稳压电路的+3.3V稳压输出端，电阻R36的另一端、SDCard-U18的7脚连接后接主控电路的31脚；SDCard-U18的5脚接主控电路的30脚，2脚接地；SDCard-U18的剩余引脚悬空；The SD card storage circuit includes SDCard-U18, capacitor C63, and resistors R35-R36; one end of the capacitor C63 and the 4-pin connection of SDCard-U18 are connected to the +3.3V voltage stabilizing output end of the +3.3V voltage stabilizing circuit, and the capacitor The other end of C63 and pin 6 of SDCard-U18 are connected to ground; one end of resistor R35 and pin 3 of SDCard-U18 are connected to pin 32 of the main control circuit. The other end of resistor R35 and one end of resistor R36 are connected to +3.3V. The +3.3V regulated output end of the voltage stabilizing circuit, the other end of resistor R36, is connected to pin 7 of SDCard-U18 and then connected to pin 31 of the main control circuit; pin 5 of SDCard-U18 is connected to pin 30 and pin 2 of the main control circuit Ground; the remaining pins of SDCard-U18 are left floating; 所述的文件管理电路包括文件管理控制芯片U9、电容C30-C33、电阻R22、发光二极管D2、晶振X1；电容C30的一端接文件管理控制芯片U9的2脚，电容C30的另一端接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9的5脚接通用插排P2的12脚，6脚接通用插排P2的14脚；电容C31的一端、文件管理控制芯片U9的9脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C31的另一端接地；文件管理控制芯片U9的10脚接接线座P1的7脚，11脚接接线座P1的6脚；文件管理控制芯片U9的12脚接地；文件管理控制芯片U9的13脚、14脚分别接晶振X1的两端；电容C32的一端、电容C33的一端、文件管理控制芯片U9的28脚连接后接+3.3V稳压电路的+3.3V稳压输出端；电容C32的另一端、电容C33的另一端分别接地；发光二极管D2的阴极接文件管理控制芯片U9的24脚，发光二极管D2的阳极接电阻R22的一端，电阻R22的另一端接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9的23脚、21脚、20脚分别接地；文件管理控制芯片U9的19脚接+3.3V稳压电路的+3.3V稳压输出端；文件管理控制芯片U9其他引脚悬空；文件管理控制芯片U9采用CH376S芯片；The file management circuit includes the file management control chip U9, capacitors C30-C33, resistor R22, light-emitting diode D2, and crystal oscillator X1; one end of the capacitor C30 is connected to pin 2 of the file management control chip U9, and the other end of the capacitor C30 is connected to +3.3 The +3.3V voltage stabilizing output of the V voltage stabilizing circuit; pin 5 of the file management control chip U9 is connected to pin 12 of the universal plug strip P2, and pin 6 is connected to pin 14 of the universal plug strip P2; one end of the capacitor C31, the file management control chip Pin 9 of U9 is connected to the +3.3V regulated output of the +3.3V voltage stabilizing circuit, and the other end of the capacitor C31 is connected to ground; pin 10 of the file management control chip U9 is connected to pin 7 of the terminal block P1, and pin 11 is connected to the terminal block. Pin 6 of P1; pin 12 of the file management control chip U9 is connected to ground; pins 13 and 14 of the file management control chip U9 are connected to both ends of the crystal oscillator X1; one end of the capacitor C32, one end of the capacitor C33, and one end of the file management control chip U9 Pin 28 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; the other ends of capacitor C32 and capacitor C33 are connected to ground respectively; the cathode of light-emitting diode D2 is connected to pin 24 of the file management control chip U9 to emit light. The anode of diode D2 is connected to one end of resistor R22, and the other end of resistor R22 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; pins 23, 21, and 20 of the file management control chip U9 are connected to ground respectively; file management Pin 19 of the control chip U9 is connected to the +3.3V voltage stabilizing output of the +3.3V voltage stabilizing circuit; other pins of the file management control chip U9 are left floating; the file management control chip U9 uses the CH376S chip; 对外接口电路包括接线座电路、通用插排电路以及接插件电路；External interface circuits include terminal block circuits, universal strip circuits and connector circuits; 所述接线座电路包括接线座P1、二极管D4、极性电容Cp15；二极管D4的阳极接接线座P1的1脚，二极管D4的阴极接电源DC24V；接线座P1的2脚、8脚接地，3脚接数据传输电路的8脚，4脚接数据传输电路的7脚，6脚接文件管理电路的11脚，7脚接文件管理电路的10脚；极性电容Cp15的正极接接线座P1的5脚，极性电容Cp15的负极接地；The terminal block circuit includes terminal block P1, diode D4, and polar capacitor Cp15; the anode of diode D4 is connected to pin 1 of terminal block P1, and the cathode of diode D4 is connected to the power supply DC24V; pins 2 and 8 of terminal block P1 are connected to ground, and pin 3 is connected to ground. Pin 8 is connected to the data transmission circuit, pin 4 is connected to pin 7 of the data transmission circuit, pin 6 is connected to pin 11 of the file management circuit, and pin 7 is connected to pin 10 of the file management circuit; the positive pole of the polar capacitor Cp15 is connected to the terminal block P1. Pin 5, the negative pole of polar capacitor Cp15 is connected to ground; 所述通用插排电路包括通用插排P2；通用插排P2的3脚、5脚、7脚、9脚、11脚、13脚、15脚、17脚、19脚接地，16脚、18脚、20脚接+5V电源，2脚接Z轴模拟信号加法电路的7脚、数模转换电路的12脚，4脚接Y轴模拟信号加法电路的7脚、数模转换电路的10脚，6脚接X轴模拟信号加法电路的7脚、数模转换电路的8脚，8脚接数据传输电路的10脚、主控电路的68脚，10脚接数据传输电路的9脚、主控电路的69脚，12脚接文件管理电路的5脚、主控电路的83脚，14脚接文件管理电路的6脚、主控电路的80脚；The universal plug-in circuit includes universal plug-in strip P2; pins 3, 5, 7, 9, 11, 13, 15, 17 and 19 of the universal plug-in strip P2 are grounded, and pins 16 and 18 are grounded. , Pin 20 is connected to the +5V power supply, pin 2 is connected to pin 7 of the Z-axis analog signal adding circuit and pin 12 of the digital-to-analog conversion circuit, pin 4 is connected to pin 7 of the Y-axis analog signal adding circuit and pin 10 of the digital-to-analog conversion circuit. Pin 6 is connected to pin 7 of the X-axis analog signal adder circuit and pin 8 of the digital-to-analog conversion circuit. Pin 8 is connected to pin 10 of the data transmission circuit and pin 68 of the main control circuit. Pin 10 is connected to pin 9 of the data transmission circuit and the main control circuit. Pin 69 of the circuit, pin 12 is connected to pin 5 of the file management circuit and pin 83 of the main control circuit, pin 14 is connected to pin 6 of the file management circuit and pin 80 of the main control circuit; 所述接插件电路包含接插件SWD；接插件SWD的1脚接+3.3V电源，2脚接主控电路的72脚，3脚接主控电路的76脚，4脚接地。The connector circuit includes a connector SWD; pin 1 of the connector SWD is connected to the +3.3V power supply, pin 2 is connected to pin 72 of the main control circuit, pin 3 is connected to pin 76 of the main control circuit, and pin 4 is connected to ground. 2.如权利要求1所述的一种真地理三分量磁力仪的测量电路，其特征在于：所述的+15V稳压电路、-15V稳压电路包括开关电源芯片U1、电容C1-C3；电容C1的一端、开关电源芯片U1的2脚连接后接地，电容C1的另一端、开关电源芯片U1的1脚连接后接+24V电源；电容C2的一端接开关电源芯片U1的3脚，作为+15V电源输出端；电容C2的另一端、电容C3的一端、开关电源芯片U1的4脚连接后接地；电容C3的另一端接开关电源芯片U1的5脚，作为-15V电源输出端；开关电源芯片U1采用德州仪器的DC-DC开关电源芯片。2. A measurement circuit for a true three-component magnetometer as claimed in claim 1, characterized in that: the +15V voltage stabilizing circuit and the -15V voltage stabilizing circuit include a switching power supply chip U1 and capacitors C1-C3; One end of the capacitor C1 is connected to pin 2 of the switching power supply chip U1 and then connected to ground. The other end of the capacitor C1 is connected to pin 1 of the switching power supply chip U1 and then connected to the +24V power supply. One end of the capacitor C2 is connected to pin 3 of the switching power supply chip U1 as +15V power output terminal; the other end of capacitor C2, one end of capacitor C3, and pin 4 of switching power supply chip U1 are connected to ground; the other end of capacitor C3 is connected to pin 5 of switching power supply chip U1 as the -15V power output terminal; switch The power chip U1 uses the DC-DC switching power supply chip of Texas Instruments. 3.如权利要求1所述的一种真地理三分量磁力仪的测量电路，其特征在于：所述的+5V稳压电路包括开关电源芯片U2、极性电容Cp1-Cp4、电阻R1-R4、电感L1、电容C4-C6、发光二极管D1；开关电源芯片U2的7脚、电阻R1的一端、极性电容Cp1的正极、极性电容Cp2的正极、极性电容Cp3的正极接+24V电源；极性电容Cp1的负极、极性电容Cp2的负极、极性电容Cp3的负极分别接地；电阻R1的另一端、开关电源芯片U2的5脚接电阻R2的一端；电阻R2的另一端、开关电源芯片U2的6脚连接后接地；电容C4的一端接开关电源芯片U2的1脚，电容C4的另一端、电感L1的一端、二极管D1的阴极接开关电源芯片U2的8脚；二极管D1的阳极接地；电感L1的另一端、电阻R3的一端、极性电容Cp4的正极、电容C5的一端、电容C6的一端连接，作为+5V电源输出端；电阻R3的另一端、电阻R4的一端接开关电源芯片U2的4脚；极性电容Cp4的负极、电阻R4的另一端连接后接地，电容C5的另一端、电容C6的另一端分别接地；开关电源芯片U2的剩余引脚悬空；开关电源芯片U2采用德州仪器的开关电源芯片TPS5420。3. A measurement circuit for a true three-component magnetometer as claimed in claim 1, characterized in that: the +5V voltage stabilizing circuit includes a switching power supply chip U2, polar capacitors Cp1-Cp4, and resistors R1-R4. , inductor L1, capacitor C4-C6, light-emitting diode D1; pin 7 of the switching power supply chip U2, one end of the resistor R1, the positive electrode of the polar capacitor Cp1, the positive electrode of the polar capacitor Cp2, and the positive electrode of the polar capacitor Cp3 are connected to the +24V power supply ;The negative electrode of polar capacitor Cp1, the negative electrode of polar capacitor Cp2, and the negative electrode of polar capacitor Cp3 are connected to ground respectively; the other end of resistor R1 and pin 5 of switching power supply chip U2 are connected to one end of resistor R2; the other end of resistor R2, switch Pin 6 of the power supply chip U2 is connected to ground; one end of the capacitor C4 is connected to pin 1 of the switching power supply chip U2; the other end of the capacitor C4, one end of the inductor L1, and the cathode of the diode D1 are connected to pin 8 of the switching power supply chip U2; The anode is connected to the ground; the other end of the inductor L1, one end of the resistor R3, the positive electrode of the polar capacitor Cp4, one end of the capacitor C5, and one end of the capacitor C6 are connected as a +5V power supply output; the other end of the resistor R3 and one end of the resistor R4 are connected Pin 4 of the switching power supply chip U2; the negative pole of the polar capacitor Cp4 and the other end of the resistor R4 are connected to ground, the other end of the capacitor C5 and the other end of the capacitor C6 are grounded respectively; the remaining pins of the switching power supply chip U2 are left floating; the switching power supply Chip U2 uses Texas Instruments switching power supply chip TPS5420. 4.如权利要求1所述的一种真地理三分量磁力仪的测量电路，其特征在于：所述的+4.5V基准电压电路包括基准电压芯片U6、运算放大器芯片U7、电感L2、极性电容Cp8、电容C19-C24、电阻R20-R21；电感L2的一端、极性电容Cp8的正极、电容C19的一端接基准电压芯片U7的2脚；电感L2的另一端接+5V稳压电路的+5V稳压输出端；极性电容Cp8的负极、电容C19的另一端、基准电压芯片U6的4脚连接后接地；电阻R20的一端接基准电压芯片U6的6脚，电阻R20的另一端、电容C21的一端接运算放大器芯片U7的3脚，电容C21的另一端接地；电容C20的一端接基准电压芯片U6的5脚，电容C20的另一端接地；运算放大器芯片U7的4脚接地；电容C22的一端、运算放大器芯片U7的7脚连接后接+5V稳压电路的+5V稳压输出端，电容C22的另一端接地；电阻R21的一端接运算放大器芯片U7的6脚，电阻R21的另一端、电容C23的一端、电容C24的一端连接，作为+4.5V基准电压输出端，电容C23的另一端、电容C24的另一端分别接地；基准电压芯片U6、运算放大器芯片U7的剩余引脚悬空；基准电压芯片U6采用德州仪器的基准电压芯片REF5045；运算放大器芯片U7采用德州仪器的精密运放芯片OPA376。4. A measurement circuit for a true three-component magnetometer as claimed in claim 1, characterized in that: the +4.5V reference voltage circuit includes a reference voltage chip U6, an operational amplifier chip U7, an inductor L2, a polarity Capacitor Cp8, capacitor C19-C24, resistor R20-R21; one end of the inductor L2, the positive electrode of the polar capacitor Cp8, and one end of the capacitor C19 are connected to pin 2 of the reference voltage chip U7; the other end of the inductor L2 is connected to the +5V voltage stabilizing circuit +5V regulated output terminal; the negative electrode of polar capacitor Cp8, the other end of capacitor C19, and the 4-pin of the reference voltage chip U6 are connected to ground; one end of the resistor R20 is connected to the 6-pin of the reference voltage chip U6, and the other end of the resistor R20, One end of capacitor C21 is connected to pin 3 of operational amplifier chip U7, and the other end of capacitor C21 is connected to ground; one end of capacitor C20 is connected to pin 5 of reference voltage chip U6, and the other end of capacitor C20 is connected to ground; pin 4 of operational amplifier chip U7 is connected to ground; capacitor One end of C22 and pin 7 of the operational amplifier chip U7 are connected to the +5V regulated output end of the +5V voltage stabilizing circuit, and the other end of the capacitor C22 is connected to ground; one end of the resistor R21 is connected to pin 6 of the operational amplifier chip U7, and the The other end, one end of capacitor C23 and one end of capacitor C24 are connected as a +4.5V reference voltage output end. The other end of capacitor C23 and the other end of capacitor C24 are connected to ground respectively; the remaining pins of reference voltage chip U6 and operational amplifier chip U7 Floating; the reference voltage chip U6 uses the reference voltage chip REF5045 of Texas Instruments; the operational amplifier chip U7 uses the precision operational amplifier chip OPA376 of Texas Instruments. 5.如权利要求1所述的一种真地理三分量磁力仪的测量电路，其特征在于：所述的+3.3V稳压电路包括稳压电源芯片U10、极性电容Cp10、电容C34-C36；极性电容Cp10的正极、电容C34的一端、稳压电源芯片U10的3脚连接后接电源VDD，极性电容Cp10的负极、电容C34的另一端分别接地；稳压电源芯片U10的1脚接地；电容C35的一端、电容C36的一端接稳压电源芯片U10的2脚，作为+3.3V稳压电路的+3.3V电压输出端，电容C35的另一端、电容C36的另一端分别接地；稳压电源芯片U10采用稳压电源芯片LM1117。5. A measurement circuit for a true three-component magnetometer as claimed in claim 1, characterized in that: the +3.3V voltage stabilizing circuit includes a voltage stabilizing power supply chip U10, a polar capacitor Cp10, and a capacitor C34-C36. ;The positive electrode of the polar capacitor Cp10, one end of the capacitor C34, and the 3-pin of the voltage-stabilizing power supply chip U10 are connected to the power supply VDD. The negative electrode of the polarity capacitor Cp10 and the other end of the capacitor C34 are connected to ground respectively; pin 1 of the voltage-stabilizing power supply chip U10 Ground; one end of capacitor C35 and one end of capacitor C36 are connected to pin 2 of the voltage-stabilizing power supply chip U10, which serves as the +3.3V voltage output end of the +3.3V voltage stabilizing circuit. The other end of capacitor C35 and the other end of capacitor C36 are connected to ground respectively; The voltage-stabilized power chip U10 uses the voltage-stabilized power chip LM1117. 6.如权利要求1所述的一种真地理三分量磁力仪的测量电路，其特征在于：所述的+3.3V开关电源电路包括开关电源芯片U11、电容C37-C40、电阻R23、发光二极管D3；电容C38的一端、电容C37的一端、开关电源芯片U11的3脚、4脚连接后接+5V稳压电路的+5V稳压输出端，电容C37的另一端、开关电源芯片U11的2脚连接后接地，电容C38的另一端、开关电源芯片U11的1脚连接后接地；电容C39的一端、电容C40的一端、电阻R23的一端、开关电源芯片U11的5脚、6脚连接后接+3.3V稳压电路的+3.3V稳压输出端，电容C39的另一端、电容C40的另一端分别接地，电阻R23的另一端接发光二极管D3的阳极，发光二极管D3的阴极接地；开关电源芯片U11的剩余引脚悬空；开关电源芯片U11采用的是德州仪器的开关电源芯片TPS7350。6. A measurement circuit for a true three-component magnetometer as claimed in claim 1, characterized in that: the +3.3V switching power supply circuit includes a switching power supply chip U11, capacitors C37-C40, resistor R23, and light emitting diodes. D3; One end of the capacitor C38, one end of the capacitor C37, and pins 3 and 4 of the switching power supply chip U11 are connected to the +5V regulated output end of the +5V voltage stabilizing circuit. The other end of the capacitor C37, pin 2 of the switching power supply chip U11 The other end of the capacitor C38 and pin 1 of the switching power supply chip U11 are connected and then grounded; one end of the capacitor C39, one end of the capacitor C40, one end of the resistor R23, and pins 5 and 6 of the switching power supply chip U11 are connected and then connected. For the +3.3V regulated output terminal of the +3.3V voltage stabilizing circuit, the other ends of the capacitor C39 and the other end of the capacitor C40 are connected to the ground respectively. The other end of the resistor R23 is connected to the anode of the light-emitting diode D3, and the cathode of the light-emitting diode D3 is grounded; switching power supply The remaining pins of chip U11 are left floating; the switching power supply chip U11 uses Texas Instruments switching power supply chip TPS7350. 7.如权利要求1所述的一种真地理三分量磁力仪的测量电路，其特征在于：所述的+2.5V基准电压电路包括基准电压芯片U15、运算放大器芯片U16、电感L3、极性电容Cp13、电容C56-C61、电阻R33-R34；电感L3的一端、极性电容Cp13的正极、电容C56的一端接基准电压芯片U15的2脚，电感L3的另一端接+5V稳压电路的+5V稳压输出端，极性电容Cp13的负极、电容C56的另一端、基准电压芯片U15的4脚连接后接地；电阻R33的一端接基准电压芯片U15的6脚，电阻R33的另一端、电容C58的一端接运算放大器芯片U16的3脚，电容C58的另一端接地；电容C57的一端接基准电压芯片U15的5脚，电容C57的另一端接地；运算放大器芯片U16的4脚接地；电容C59的一端、运算放大器芯片U16的7脚连接后接+5V稳压电路的+5V稳压输出端，电容C59的另一端接地；电阻R34的一端接运算放大器芯片U16的6脚，电阻R34的另一端、电容C60的一端、电容C61的一端连接，作为+2.5V基准电压输出端，电容C60的另一端、电容C61的另一端分别接地；基准电压芯片U15、运算放大器芯片U16的其他引脚悬空；基准电压芯片U15采用德州仪器的基准电压芯片REF5045；运算放大器芯片U16采用德州仪器的精密运放芯片OPA376。7. A measurement circuit for a true three-component magnetometer as claimed in claim 1, characterized in that: the +2.5V reference voltage circuit includes a reference voltage chip U15, an operational amplifier chip U16, an inductor L3, a polarity Capacitor Cp13, capacitor C56-C61, resistor R33-R34; one end of the inductor L3, the positive electrode of the polar capacitor Cp13, and one end of the capacitor C56 are connected to pin 2 of the reference voltage chip U15, and the other end of the inductor L3 is connected to the +5V voltage stabilizing circuit. At the +5V regulated output terminal, the negative pole of polar capacitor Cp13, the other end of capacitor C56, and the 4-pin of the reference voltage chip U15 are connected to ground; one end of the resistor R33 is connected to the 6-pin of the reference voltage chip U15, and the other end of the resistor R33, One end of capacitor C58 is connected to pin 3 of operational amplifier chip U16, and the other end of capacitor C58 is connected to ground; one end of capacitor C57 is connected to pin 5 of reference voltage chip U15, and the other end of capacitor C57 is connected to ground; pin 4 of operational amplifier chip U16 is connected to ground; capacitor One end of C59 and pin 7 of the operational amplifier chip U16 are connected to the +5V voltage stabilizing output of the +5V voltage stabilizing circuit, and the other end of the capacitor C59 is connected to ground; one end of the resistor R34 is connected to pin 6 of the operational amplifier chip U16, and the The other end, one end of capacitor C60 and one end of capacitor C61 are connected as the +2.5V reference voltage output end. The other end of capacitor C60 and the other end of capacitor C61 are connected to ground respectively; other pins of reference voltage chip U15 and operational amplifier chip U16 Floating; the reference voltage chip U15 uses the reference voltage chip REF5045 of Texas Instruments; the operational amplifier chip U16 uses the precision operational amplifier chip OPA376 of Texas Instruments. 8.如权利要求1所述的一种真地理三分量磁力仪的测量电路，其特征在于：所述的磁通门传感器为英国Bartington公司的MAG03MCL100磁通门传感器。8. The measurement circuit of a true geographical three-component magnetometer according to claim 1, characterized in that: the fluxgate sensor is the MAG03MCL100 fluxgate sensor of the British Bartington Company.
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