CN107888228B - Interface circuit, integrated circuit, method, system and program product for a transponder - Google Patents
Interface circuit, integrated circuit, method, system and program product for a transponder Download PDFInfo
- Publication number
- CN107888228B CN107888228B CN201710983388.5A CN201710983388A CN107888228B CN 107888228 B CN107888228 B CN 107888228B CN 201710983388 A CN201710983388 A CN 201710983388A CN 107888228 B CN107888228 B CN 107888228B
- Authority
- CN
- China
- Prior art keywords
- signal
- circuit
- resistor
- interface
- transponder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/59—Responders; Transponders
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Near-Field Transmission Systems (AREA)
- Dc Digital Transmission (AREA)
Abstract
The invention provides a transponder interface circuit, an integrated circuit signal, an extraction method and a system, wherein the circuit comprises: the C1 interface signal filtering circuit is used for filtering a C6 signal; the matching circuit is used for matching the signals output by the C1 interface signal filtering circuit; and the data extraction circuit is used for extracting the C1 interface signal output by the matching circuit. The circuit, the integrated circuit, the method, the system and the computer program product provided by the invention have the advantages of simple circuit, high reliability of data transmission and good impact resistance and static resistance.
Description
Technical Field
The invention relates to the technical field of railway signal transmission, in particular to a transponder C1 interface signal filtering matching circuit, an integrated circuit, a method, a system and a program product.
Background
A response Transmission system (BTS) is a safety Transmission system based on point information Transmission in a railway Transmission system, and realizes safety information Transmission between roadside equipment or ground equipment and vehicle-mounted equipment. The transponder transmission system comprises three basic components of a transponder transmission module (BTM), a vehicle-mounted Antenna Unit (AU), a transponder, a ground electronic unit (LEU) and the like.
The transponder is installed in the center of a track, is divided into an active transponder (controlledbalise) and a passive transponder (Fixed Balise), is a point device for transmitting information to a train on the basis of the ground, is mainly used for providing reliable ground Fixed information and variable information to the train-control vehicle-mounted device, and the information comprises signal data, control data, position and geographic information, train target operation information, access information, line speed, temporary speed limit and other information. As the running speed of trains is continuously increased, transponders have become important basic devices in high-speed train control systems. During the operation of the train, the BTM continuously radiates energy to the ground through the antenna unit AU, the transponder receives the power radiated by the antenna unit to work, internal coding information or coding information (only an active transponder) of a ground electronic unit (LEU) is sent to the vehicle-mounted antenna AU, the vehicle-mounted antenna transmits received uplink information to the BTM, and the BTM sends received data to the vehicle-mounted control core.
The communication between the transponder device and other devices of the train control system is mainly realized through the following interfaces:
interface A: a wireless transmission interface between the transponder and the vehicle ATP;
interface C: a transmission interface between a trackside electronic unit (LEU) and an active transponder that receives a C1 interface signal for transmitting message data and a C6 signal that provides a power supply signal.
With the great increase of the train speed, the railway system puts higher requirements on the stability of signal transmission, and the C interface is used as an interface between the active transponder and the LEU to play a vital role in the signal transmission. The existing C interface circuit can not meet the data transmission requirement of a high-speed train.
Disclosure of Invention
The invention aims to provide a circuit, an integrated circuit, a method, a system and a computer program product which are simple in circuit and high in reliability of transmission data.
To this end, the invention provides a transponder interface circuit, wherein the circuit comprises:
the C1 interface signal filtering circuit is used for filtering a C6 signal;
the matching circuit is used for matching the signals output by the C1 interface signal filtering circuit;
and the data extraction circuit is used for extracting the C1 interface signal output by the matching circuit.
Further, the C1 interface signal filter circuit comprises a C6 signal band elimination circuit and a C6 signal band-pass circuit.
Further, two C6 signal bandstop circuits respectively receive the differential signals of the C1 interface signals: the circuit comprises a positive electrode signal C1_1 and a negative electrode signal C1_2, wherein one end of the C6 signal band-pass circuit is connected with a first C6 signal band-stop circuit, and the other end of the C6 signal band-pass circuit is connected with a second C6 signal band-stop circuit.
Furthermore, the C6 signal band elimination circuit is a parallel resonance circuit formed by connecting a resistor, an inductor and a capacitor in parallel.
Furthermore, the C6 signal band pass circuit is a series resonance circuit formed by connecting an inductor and a capacitor in series.
Further, the matching circuit is a resistor network.
Further, the resistor network comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor and a second capacitor, wherein
The first end of the first resistor is connected with the first end of the first capacitor, the second end of the first resistor is connected with the first end of the second resistor, the second end of the second resistor is connected with the first end of the second capacitor, the second end of the second capacitor is connected with the second end of the fourth resistor, the first end of the fourth resistor is connected with the second end of the third resistor, the first end of the third resistor is connected with the second end of the first capacitor, and the second end of the third resistor is further connected with the second end of the first resistor.
Further, the first resistor is composed of two resistors connected in parallel, and the second resistor is composed of two resistors connected in parallel.
Further, the transponder interface circuit further has a direct current point location circuit, and the direct current point location circuit is connected with the matching circuit.
Further, the data extraction circuit comprises a differential receiving module, which is used for converting the C1 differential signal into a single-ended signal and sending the single-ended signal to the active logic processing module CPLD.
Furthermore, an open code check terminal is arranged at the connection position of the matching circuit and the data extraction circuit and used for sending the C1 interface signal to the C1 signal open code check circuit.
Further, the C1 signal code-breaking check circuit performs code-breaking check on the C1 signal and outputs the signal to the active logic processing module CPLD.
The present invention also provides a transponder interface integrated circuit, wherein the integrated circuit comprises:
a signal input port for receiving a C1 interface signal superimposed with a C6 signal;
the C1 interface signal filtering module is used for filtering a C6 signal;
the matching module is used for matching the C1 interface signals generated by the C1 signal filtering module;
the data extraction module is used for extracting the signals output by the matching module;
and the signal output port is used for outputting the signal extracted by the data extraction module.
Further, the C1 interface signal filter circuit comprises a C6 signal band elimination circuit and a C6 signal band-pass circuit.
Further, two C6 signal bandstop circuits respectively receive the differential signals of the C1 interface signals: the circuit comprises a positive electrode signal C1_1 and a negative electrode signal C1_2, wherein one end of the C6 signal band-pass circuit is connected with a first C6 signal band-stop circuit, and the other end of the C6 signal band-pass circuit is connected with a second C6 signal band-stop circuit.
Furthermore, the C6 signal band elimination circuit is a parallel resonance circuit formed by connecting a resistor, an inductor and a capacitor in parallel.
Furthermore, the C6 signal band pass circuit is a series resonance circuit formed by connecting an inductor and a capacitor in series.
Further, the matching circuit is a resistor network.
Further, the resistor network comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor and a second capacitor, wherein
The first end of the first resistor is connected with the first end of the first capacitor, the second end of the first resistor is connected with the first end of the second resistor, the second end of the second resistor is connected with the first end of the second capacitor, the second end of the second capacitor is connected with the second end of the fourth resistor, the first end of the fourth resistor is connected with the second end of the third resistor, the first end of the third resistor is connected with the second end of the first capacitor, and the second end of the third resistor is further connected with the second end of the first resistor.
Further, the first resistor is composed of two resistors connected in parallel, and the second resistor is composed of two resistors connected in parallel.
Further, the transponder interface circuit further has a direct current point location circuit, and the direct current point location circuit is connected with the matching circuit.
Further, the data extraction circuit comprises a differential receiving module, which is used for converting the C1 differential signal into a single-ended signal and sending the single-ended signal to the active logic processing module CPLD.
Furthermore, an open code check terminal is arranged at the connection position of the matching circuit and the data extraction circuit and used for sending the C1 interface signal to the C1 signal open code check circuit.
Further, the C1 signal code-breaking check circuit performs code-breaking check on the C1 signal and outputs the signal to the active logic processing module CPLD.
The invention also provides a method for extracting the C1 interface signal of the active transponder, and the method for recovering the C1 interface signal comprises the following steps:
filtering out the C6 signal in the C1 interface signal;
matching the C1 interface signals;
the matched C1 interface signal is extracted.
Furthermore, the C6 interface signal is filtered by a filter circuit formed by the parallel resonance circuit and the series resonance circuit.
Further, the C1 interface signal is matched through a resistor network consisting of a resistor and a capacitor.
Further, the extracting the matched C1 interface signal is specifically to convert a differential signal of the C1 interface signal into a single-ended signal, so as to extract the C1 interface signal.
Correspondingly, the invention also provides an active transponder C1 interface signal extraction system, which comprises: a memory; and one or more processors;
wherein the memory is communicatively coupled to the one or more processors and has stored therein instructions executable by the one or more processors to cause the one or more processors to perform the method.
Correspondingly, the invention also provides a computer program product, which comprises computer executable instructions, and the computer executable instructions can execute the method.
The circuit, the integrated circuit, the method, the system and the computer program product provided by the invention have the advantages of simple circuit, high reliability of data transmission and good impact resistance and static resistance.
Drawings
In order to illustrate the embodiments of the invention more clearly, the drawings that are needed in the description of the embodiments will be briefly described below, it being apparent that the drawings in the following description are some embodiments of the invention, and that other drawings may be derived from those drawings by a person skilled in the art without inventive effort.
FIG. 1: a basic structure diagram of a transponder transmission system;
FIG. 2: the basic principle structure diagram of the transponder of the invention;
FIG. 3: the structure schematic diagram of the transponder transmission system interface;
FIG. 4: a basic structure circuit schematic diagram of a signal filtering/matching circuit of a C1 interface;
FIG. 5: basic structure circuit principle structure diagram of data extraction circuit.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
See fig. 1 for a basic block diagram of a transponder transmission system. The transponder transmission system mainly comprises vehicle-mounted equipment and ground equipment. The vehicle-mounted equipment comprises a vehicle-mounted receiving processor and a vehicle-mounted antenna; the ground equipment includes a wayside electronic unit (LEU) and a ground transponder.
Ground transponders are functionally divided into two categories, active transponders and passive transponders. As shown in fig. 2, the passive transponder transmits data information stored inside to the in-vehicle apparatus, the active transponder transmits changed data information from the roadside apparatus, and the active transponder transmits data information stored inside thereof to the in-vehicle apparatus when the roadside apparatus malfunctions. Thus, for an active transponder, it should itself contain the full functionality of a passive transponder, or the passive transponder is part of an active transponder.
Depending on the basic function of a ground transponder, the transponder can be divided into several modules as follows:
an antenna portion: receiving a vehicle-mounted energy carrier frequency and sending data information to vehicle-mounted equipment;
a power supply section: converting the received energy carrier frequency into a working power supply of the responder;
data storage: for storing transponder data information and manufacturing information;
data management: selecting the working mode of the transponder, such as the working mode, the programming mode and the like;
a modulation circuit: after FSK modulation is carried out on the data of the responder, the data is transmitted to a transmitting antenna;
programming interface: the interface of the programming tool can rewrite the internal data information of the transponder.
The six functions mentioned above are basic modules of a passive transponder, and for an active transponder, the six functions also include the following two parts:
c, interface circuit: an interface to an LEU;
a data conversion circuit: the LEU's DBPL code is converted to transponder data.
The transponder is used as a point type data transmission device of a high-speed railway, is a main component of a transponder system, is used for realizing two-way communication between trains and the ground at a fixed place, provides various required point type information for a vehicle-mounted computer, and provides safety guarantee for high-speed operation of trains, wherein the point type information comprises information such as switch zone length, access path length, gradient, blocking zone length, curve and the like.
The trackside electronic unit (LEU) is an electronic interface device between a ground transponder and a signal system, is a data acquisition and processing unit, and is used for converting information such as incoming track signals and signal lamp positions into messages and transmitting the messages to an active transponder for sending.
The C-interface is the data interface between the surface transponder and the surface electronics unit LEU, as shown in fig. 3. The C interface signals include a baseband signal C1 interface signal and a sine wave signal C6 signal.
Wherein: the C1 interface transmits baseband signals to the active transponder. The characteristic indexes of the C1 interface mainly include signal level, return loss, waveform and bit coding, average data rate, rising edge and falling edge, eye pattern, etc. The C6 interface transmits power signals. The LEU sends an 8.820KHz sine wave C6 signal directly through the circuit to the active transponder. The C6 interface characteristic indexes mainly include signal level, return loss, frequency, harmonic wave and the like.
Interface C1 inputs signals: the coding mode is DBPL coding, and the average transmission rate is 564 Kbit/s.
Interface C6 inputs signals: 8820 + -0.1 KHz.
Since the frequency of the C1 interface signal is very different from that of the C6 interface signal, the LEU respectively amplifies the power of the C1 interface signal and the C6 interface signal, and then couples the two amplified signals into a transformer, thereby realizing the transmission of two different signals on a pair of transmission lines. Therefore, the transponder first separates the C1 interface signal and the C6 interface signal which are superposed together. And the signal protection and isolation module realizes the separation of the C1 interface signal and the C6 interface signal.
The C interface initially realizes the isolation of a C1 signal and a C6 signal through a signal protection and isolation module, so that the C6 signal is transmitted to a C6 interface signal filtering/matching module, and the C1 interface signal is transmitted to a C1 interface signal filtering/matching module. The C1 interface signal filtering/matching module filters the C6 signal from the C1 interface signal and matches the C1 interface signal, then outputs the C1 interface signal to the data extraction circuit, the data extraction circuit extracts the signal of the C1 interface signal filtering/matching module, converts the C1 differential signal (positive pole signal C1_1 and negative pole signal C1_2) of the extracted C1 interface signal into a single-ended signal and outputs the single-ended signal to the active logic processing module (CPLD), and simultaneously provides the C1 signal to the C1 interface signal code-breaking checking circuit to check the code breaking of the C1 signal.
The C6 signal enters the active circuit through the processing of the signal filtering/matching circuit of the C6 interface, and the working voltage is provided for the active transponder.
The basic structure of the C1 interface signal filtering/matching circuit is shown in fig. 4, and the circuit mainly includes:
the C1 interface signal filtering circuit is used for filtering the C6 signal from the C1 interface signal so as to prevent the C6 signal from interfering the C1 signal and causing the error code of the C1 signal;
the C1 interface signal matching circuit achieves impedance matching of the C1 differential signal with the data extraction circuit, and eliminates signal reflection in the communication line.
The C1 interface signal filter circuit specifically includes:
the C1 interface signal filter circuit comprises two C6 signal band elimination circuits and a C6 signal band-pass circuit. The C6 signal band elimination circuit is a parallel resonance circuit, and the C6 signal band-pass circuit is a series resonance circuit. As shown in fig. 3, the two parallel resonant circuits receive a C1 positive signal C1_1 and a C1 negative signal C1_2 of a C1 differential signal, respectively. The parallel resonance circuit comprises a resistor and a capacitor of an inductor which are connected in parallel. As shown, the resistor R1, the inductor L1, and the capacitor C1 form a first parallel resonant circuit for receiving a C1 positive signal C1_ 1; the resistor R2, the inductor L2 and the capacitor C2 form a second parallel resonant circuit for receiving a C1 negative pole signal C1_ 2. The first parallel resonant circuit and the second parallel resonant circuit form a band-stop circuit for the C6 signal.
A series resonant circuit is connected between the first parallel resonant circuit and the second parallel resonant circuit. As shown in fig. 4, the inductor L3 and the capacitor C3 are connected in series to form a series resonant circuit, which realizes the path of the C6 signal. The filter circuit formed by the first parallel resonant circuit, the second parallel resonant circuit and the series resonant circuit realizes the filtering of the C6 signal from the C1 interface signal.
The circuit further prevents the interference of the C6 signal to the C1 signal, and improves the anti-interference performance of the system.
A matching circuit:
and a matching circuit is also arranged behind the C1 interface signal filtering circuit. As shown in fig. 4, the matching circuit is composed of a resistor and a capacitor, and specifically includes: the resistor R3 is connected in parallel with the resistor R5 to form a first group of parallel resistors, and the resistor R4 is connected in parallel with the resistor R6 to form a second group of parallel resistors. The first ends of the first group of parallel resistors are connected with one end of the inductor L3 connected with the resistor R1, and the second ends of the first group of parallel resistors are connected with the first ends of the second group of parallel resistors; the second end of the second set of parallel resistors is connected to the end of the capacitor C3 connected to the resistor R2. A first terminal of the capacitor C4 is connected to a first terminal of the first set of parallel resistors, a second terminal of the capacitor C4 is connected to a first terminal of the resistor R7, and a second terminal of the resistor R7 is connected to a second terminal of the first set of parallel resistors. The first end of the resistor R8 is connected to the second end of the resistor R7, the second end of the resistor R8 is connected to the second end of the capacitor C5, and the first end of the capacitor C5 is connected to the second end of the second set of parallel resistors.
The C1 interface signal matching circuit matches the impedance of the C1 differential signal with the impedance of the data extraction circuit, eliminates signal reflection in a communication line and is more beneficial to the stability of the transmission of the C1 interface signal.
In the C1 interface signal filtering matching circuit, a dc point location circuit is also connected to the data matching circuit to provide a dc point location for the data matching circuit. The direct current point location circuit specifically comprises:
the dc point location circuit includes a plurality of capacitors and resistors, as shown in fig. 4. In the direct-current point position circuit, a first end of a resistor R9 is connected with a power supply VCC, a second end of a resistor R9 is connected with a first end of a capacitor C6, a second end of a capacitor C6 is grounded, a first end of a capacitor C7 is connected with a first end of a capacitor C71, a second end of a capacitor C7 is connected with a first end of a capacitor C8, and a second end of the capacitor C8 is grounded; a first end of the resistor R10 is connected with a first end of the capacitor C7, a second end of the resistor R10 is connected with a first end of the resistor R11, and a second end of the resistor R11 is grounded; the second terminal of the resistor R10 is further connected to the second terminal of the resistor R7 to enable the dc point location circuit to be connected to the data matching circuit to provide a dc point location for the data matching circuit.
The data extraction circuit receives the C1 differential signal output by the matching circuit, and in combination with the schematic diagram of the data extraction circuit shown in fig. 5, the a terminal and the B terminal of the matching circuit are connected to the a terminal and the B terminal of the data extraction circuit, respectively.
The data extraction circuit extracts signals output by the C1 interface signal matching circuit, so that C1 differential signals are converted into single-ended signals and output to the active logic processing module CPLD, and meanwhile, C1 differential signals are led out to the C1 interface signal code-breaking checking circuit through code-breaking checking (DMJ), so that code-breaking checking on the C1 signals is realized.
Differential signals C1_1 and C1_2 of the C1 interface signal enter the data extraction circuit through an A end and a B end respectively after being filtered by the filter circuit and matched by the matching circuit, and the data extraction circuit extracts data and converts the C1 differential signal into a single-ended signal. The specific structure of the data extraction circuit is shown in fig. 3.
The specific structure of the data extraction circuit is shown in fig. 5. The C1 differential signal is converted into the single-ended signal in the digital extraction circuit mainly by a differential receiving module (for example, a DS90C032B chip of TI corporation can be used, but the invention is not limited to the chip, and any other module capable of converting a differential signal into a single-ended signal can be used in the invention). The connection structure of the signal filtering/matching circuit of the C1 interface is as follows: a first end of the resistor R12 is connected with a second end of a capacitor C4 in the matching circuit, a second end of the resistor R12 is connected with a first end of a resistor R15, a second end of the resistor R12 is also connected with a first end of a capacitor C9, and a second end of the capacitor C9 is grounded; a second terminal of the resistor R15 is connected to the positive signal input terminal of the differential receiving chip.
The first end of the resistor R13 is connected with the second end of the capacitor C5 in the matching circuit, the first end of the resistor R13 is also connected with the first end of the capacitor C11, the second end of the capacitor C11 is connected with the first end of the resistor R14, and the second end of the resistor R14 is grounded. The second end of the resistor R13 is connected with the negative signal input end of the differential receiving chip through the resistor R16, meanwhile, the second end of the resistor R13 is also connected with the first end of the capacitor C10, and the second end of the capacitor C10 is grounded.
The differential receiving module converts the received C1 differential receiving signal into a single-ended signal, and outputs the single-ended signal through the output port.
The above circuit structure and method of the present invention can also be implemented by an integrated circuit, wherein the clock generation integrated circuit includes:
a signal input port for receiving a C1 interface signal superimposed with a C6 signal;
the signal filtering module is used for filtering the C6 signal;
the matching module is used for matching the signals generated by the C1 signal filtering module;
the data extraction module is used for extracting the signals output by the matching module;
and the signal output port is used for outputting the signal extracted by the data extraction module.
The method of the present invention may be implemented in a computer program controlled system. Correspondingly, the embodiment of the present invention also provides a C1 interface signal extraction system, which includes: a memory; and one or more processors;
wherein the memory is communicatively coupled to the one or more processors and has stored therein instructions executable by the one or more processors to cause the one or more processors to perform the method of the present invention.
Also, a computer program product is provided in the present invention, the computer program product comprising computer executable instructions that can perform the method described in any of the above embodiments.
All of the steps of the methods of the present invention, such as signal reception, matching, extraction, etc., may also be processed by one or more processors in the system. The processor may be any programmable microprocessor, microcomputer or multiple processor chip or chips that can be configured by software instructions (applications) to perform a variety of functions, including the functions of the various embodiments described herein. The processor may include internal memory sufficient to store the application software instructions, which may be volatile or non-volatile memory (e.g., flash memory) or a mixture of both. For the purposes of this description, a general reference to memory refers to all memory accessible by the processor, including internal memory, removable memory plugged into the apparatus, and memory within the processor itself.
In the present invention, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in hardware, the functionality may be implemented within circuitry that may be suitable for use in processing circuitry in a system. Such processing circuitry may include circuitry for implementing any one or more of the data receiving, matching, and extracting steps described in the various embodiments. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. The steps of a method or algorithm disclosed herein may be embodied in a processor-executable software module executed, which may reside on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
The above-described apparatus embodiments are merely illustrative, wherein the units described as separate components may or may not be physically separate. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only for illustrating the technical solutions of the present invention, and are not limited thereto. The two steps before and after do not necessarily mean a sequence executed in sequence, as long as the technical problem of the invention can be solved, and the two steps before and after do not necessarily mean that other steps which are not listed in the invention are excluded; similarly, the various circuits, electronic devices, and modules of a system are not necessarily directly connected together in a direct electrical connection, but rather are merely logically represented in the specification. Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (25)
1. A transponder interface circuit, wherein the circuit comprises:
the C1 interface signal filtering circuit is used for filtering a C6 signal;
the matching circuit is used for matching the signals output by the C1 interface signal filtering circuit;
the data extraction circuit is used for extracting the C1 interface signal output by the matching circuit;
the C1 interface signal filter circuit comprises two C6 signal band elimination circuits and a C6 signal band-pass circuit;
two C6 signal band elimination circuits respectively receive the differential signals of the C1 interface signals: the circuit comprises a positive electrode signal C1_1 and a negative electrode signal C1_2, wherein one end of the C6 signal band-pass circuit is connected with a first C6 signal band-stop circuit, and the other end of the C6 signal band-pass circuit is connected with a second C6 signal band-stop circuit.
2. The transponder interface circuit of claim 1 wherein,
the C6 signal band elimination circuit is a parallel resonance circuit formed by connecting a resistor, an inductor and a capacitor in parallel.
3. The transponder interface circuit of claim 1 wherein,
the C6 signal band-pass circuit is a series resonance circuit formed by connecting an inductor and a capacitor in series.
4. The transponder interface circuit of claim 1 wherein,
the matching circuit is a resistor network.
5. The transponder interface circuit of claim 4 wherein,
the resistor network comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor and a second capacitor, wherein
The first end of the first resistor is connected with the first end of the first capacitor, the second end of the first resistor is connected with the first end of the second resistor, the second end of the second resistor is connected with the first end of the second capacitor, the second end of the second capacitor is connected with the second end of the fourth resistor, the first end of the fourth resistor is connected with the second end of the third resistor, the first end of the third resistor is connected with the second end of the first capacitor, and the second end of the third resistor is further connected with the second end of the first resistor.
6. The transponder interface circuit of claim 5 wherein,
the first resistor is composed of two parallel resistors, and the second resistor is composed of two parallel resistors.
7. The transponder interface circuit of any one of claims 1-6 wherein,
the responder interface circuit is also provided with a direct current point location circuit which is connected with the matching circuit.
8. The transponder interface circuit of claim 1 wherein,
the data extraction circuit comprises a differential receiving module which is used for converting the C1 differential signal into a single-ended signal and sending the single-ended signal to the active logic processing module CPLD.
9. The transponder interface circuit of claim 1 wherein,
and the connection part of the matching circuit and the data extraction circuit is provided with an open code check endpoint for sending the C1 interface signal to the C1 signal open code check circuit.
10. The transponder interface circuit of claim 9, wherein,
and the C1 signal code-breaking check circuit performs code-breaking check on the C1 signal and outputs the signal to the active logic processing module CPLD.
11. A transponder interface integrated circuit, wherein the integrated circuit comprises:
a signal input port for receiving a C1 interface signal superimposed with a C6 signal;
the C1 interface signal filtering module is used for filtering a C6 signal;
the matching module is used for matching the C1 interface signals generated by the C1 signal filtering module;
the data extraction module is used for extracting the signals output by the matching module;
the signal output port is used for outputting the signal extracted by the data extraction module;
the C1 interface signal filtering module comprises two C6 signal band elimination circuits and a C6 signal band-pass circuit;
two C6 signal band elimination circuits respectively receive the differential signals of the C1 interface signals: the circuit comprises a positive electrode signal C1_1 and a negative electrode signal C1_2, wherein one end of the C6 signal band-pass circuit is connected with a first C6 signal band-stop circuit, and the other end of the C6 signal band-pass circuit is connected with a second C6 signal band-stop circuit.
12. The transponder interface integrated circuit of claim 11, wherein,
the C6 signal band elimination circuit is a parallel resonance circuit formed by connecting a resistor, an inductor and a capacitor in parallel.
13. The transponder interface integrated circuit of claim 11, wherein,
the C6 signal band-pass circuit is a series resonance circuit formed by connecting an inductor and a capacitor in series.
14. The transponder interface integrated circuit of claim 11, wherein,
the matching module is a resistor network.
15. The transponder interface integrated circuit of claim 14, wherein,
the resistor network comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor and a second capacitor, wherein
The first end of the first resistor is connected with the first end of the first capacitor, the second end of the first resistor is connected with the first end of the second resistor, the second end of the second resistor is connected with the first end of the second capacitor, the second end of the second capacitor is connected with the second end of the fourth resistor, the first end of the fourth resistor is connected with the second end of the third resistor, the first end of the third resistor is connected with the second end of the first capacitor, and the second end of the third resistor is further connected with the second end of the first resistor.
16. The transponder interface integrated circuit of claim 15, wherein,
the first resistor is composed of two parallel resistors, and the second resistor is composed of two parallel resistors.
17. The transponder interface integrated circuit of any one of claims 11-16 wherein,
the transponder interface integrated circuit is also provided with a direct current point location circuit, and the direct current point location circuit is connected with the matching module.
18. The transponder interface integrated circuit of claim 11, wherein,
the data extraction module comprises a differential receiving module which is used for converting the C1 differential signal into a single-ended signal and sending the single-ended signal to the active logic processing module CPLD.
19. The transponder interface integrated circuit of claim 11, wherein,
and a code break check endpoint is arranged at the joint of the matching module and the data extraction module and is used for sending the C1 interface signal to a C1 signal code break check circuit.
20. The transponder interface integrated circuit of claim 19, wherein,
and the C1 signal code-breaking check circuit performs code-breaking check on the C1 signal and outputs the signal to the active logic processing module CPLD.
21. A method for extracting signals of a C1 interface of an active transponder comprises the following steps:
filtering a C6 signal in a C1 interface signal, wherein the filtering comprises filtering a C6 interface signal by a filter circuit formed by two parallel resonance circuits and a series resonance circuit, and the two parallel resonance circuits respectively receive a differential signal of a C1 interface signal; matching the C1 interface signals;
the matched C1 interface signal is extracted.
22. The C1 interface signal extraction method of claim 21, wherein:
the C1 interface signal is matched by a resistor network consisting of resistors and capacitors.
23. The C1 interface signal extraction method of claim 21, wherein:
the extracting of the matched C1 interface signal is specifically to convert a differential signal of the C1 interface signal into a single-ended signal, so as to extract the C1 interface signal.
24. An active transponder C1 interface signal extraction system, comprising: a memory; and one or more processors;
wherein the memory is communicatively coupled to the one or more processors and has stored therein instructions executable by the one or more processors to cause the one or more processors to implement the method of claim 21.
25. A computer device comprising computer-executable instructions that can perform the method of claim 21.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710983388.5A CN107888228B (en) | 2017-10-20 | 2017-10-20 | Interface circuit, integrated circuit, method, system and program product for a transponder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710983388.5A CN107888228B (en) | 2017-10-20 | 2017-10-20 | Interface circuit, integrated circuit, method, system and program product for a transponder |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107888228A CN107888228A (en) | 2018-04-06 |
| CN107888228B true CN107888228B (en) | 2020-02-14 |
Family
ID=61781826
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710983388.5A Active CN107888228B (en) | 2017-10-20 | 2017-10-20 | Interface circuit, integrated circuit, method, system and program product for a transponder |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107888228B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112653690B (en) * | 2020-12-18 | 2022-07-26 | 卡斯柯信号有限公司 | Analog demodulation circuit for acquiring message by C interface of ground electronic unit |
| CN115276839A (en) * | 2022-07-29 | 2022-11-01 | 沈阳铁路信号有限责任公司 | Method for testing C interface of single-channel active transponder |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4956643A (en) * | 1989-05-02 | 1990-09-11 | Hac | Transponder with selective antenna beam using shared antenna feed elements |
| CN103427920B (en) * | 2013-08-02 | 2015-06-03 | 北京交大思诺科技有限公司 | Test device and test method for C interface signals of lineside electronic unit (LEU) |
-
2017
- 2017-10-20 CN CN201710983388.5A patent/CN107888228B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN107888228A (en) | 2018-04-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107888228B (en) | Interface circuit, integrated circuit, method, system and program product for a transponder | |
| US10560154B2 (en) | Power line signal coupler | |
| CN102082612A (en) | Controller area network (CAN) bus-based anti-electromagnetic interference method and device | |
| CN206226382U (en) | Radio-frequency power amplifier and its output matching circuit | |
| CN109120307A (en) | A kind of power-line carrier communication system and its band logical are coupled device | |
| CN109995392A (en) | Magnetic coupling communication transceiver, magnetic coupling communication master chip and magnetic coupling communication system | |
| CN101552614B (en) | Single antenna tuning circuit used for near field communication equipment | |
| CN103401955A (en) | Device and method for configuring address of vehicle bus equipment | |
| EP3591918B1 (en) | Method and system for implementing data transmission using ground balise | |
| CN103001897B (en) | Capacitive communication circuit and method therefor | |
| CN208904759U (en) | Information acquisition system suitable for power system device | |
| CN108233991A (en) | A kind of DC carrier wave communication system based on RS485 | |
| CN204302728U (en) | Analog input card | |
| CN207022021U (en) | CAN communicating circuit for electric automobile | |
| CN106909865B (en) | Near-field communication front end hardware circuit, terminal, reader, system and method | |
| CN102364493B (en) | Novel high-frequency communication protocol monitoring circuit | |
| CN101964065B (en) | Radio frequency integrated circuit for near-field communication | |
| CN104135572A (en) | Wireless communication system of SIM (Subscriber Identity Module) card and communication method thereof | |
| CN204576778U (en) | Bluetooth carrier converts communications module | |
| CN105610468A (en) | Integrated capacitive coupler for narrowband carrier communication of medium voltage power line | |
| CN215734264U (en) | Photoelectric composite active transponder | |
| CN206312185U (en) | A kind of signal circuit for read write line | |
| CN108718110A (en) | Information acquisition system and charging network transmission method suitable for power system device | |
| CN103543681A (en) | DDS signal generator applied to WPT system | |
| CN105759675A (en) | Analog quantity input board card and analog quantity acquisition method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |