CN107852166A - Parallel resampler - Google Patents
Parallel resampler Download PDFInfo
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- CN107852166A CN107852166A CN201580082007.5A CN201580082007A CN107852166A CN 107852166 A CN107852166 A CN 107852166A CN 201580082007 A CN201580082007 A CN 201580082007A CN 107852166 A CN107852166 A CN 107852166A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/06—Non-recursive filters
- H03H17/0621—Non-recursive filters with input-sampling frequency and output-delivery frequency which differ, e.g. extrapolation; Anti-aliasing
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Abstract
A kind of equipment for signal resampling, in particular for wireless signal resampling, including：(1) signal processing unit, it is used for：(a) multiple time-interleaved input signals are received；(b) by carrying out parallel filtering to the intertexture input signal to generate multiple filtering signals, wherein, the filtering is carried out in a manner of time-interleaved；(c) the multiple filtering signal is merged into multiple signal streams.
Description
Background technology
The present invention is related to parallel resampling in some embodiments, more specifically but is not limited to, is related to communication protocol
Parallel resampling.
Some challenges be present in the communication between distant-end node, and due to increasing transmitting pin to provide higher bandwidth
Rate so that these challenges become more to be difficult to handle.One of major obstacle is that the data of transmitter are entered at receiver node
Frequency altogether is kept during row sampling, reason is that node is operated using different clock sources.Although two single clock frequencies
Between time shift can reach hundreds of part per millions (parts per million, PPM).
In order to ensure to transmit the integrality of data, to transmitting data and/or data progress resampling is received that will receive
The data that the data adaptation that node (receiver) place receives the decode is encoded and launched by transmitting node (transmitter) are that have very much must
Want.Resampling may the frequency displacement caused by the different clock frequencies of two nodes (receiver and transmitter) for compensating
And/or Signal Compression.
The resampling of transmission data has utilization in various technologies.However, with the growth of communication frequency, resampling needs
Will faster and deeper into mechanism, hardware and/or software carry out verification of data integrity.This just forces hard faster using operation
Part, it is meant that higher complexity, higher costs and/or bigger power consumption.
The content of the invention
It is an object of the invention to improve signal resampling.
The purpose is realized by the theme of independent claims.The independent claims provide more embodiments, especially
It combines embodiment and accompanying drawing.
One side according to some embodiments of the invention, there is provided a kind of system for signal resampling, especially use
In wireless signal resampling, including signal processing unit, it is used for：Multiple time-interleaved input signals are received, by being handed over the time
The mode knitted, to generate multiple filtering signals, and the multiple filtering signal is closed to the intertexture input signal parallel filtering
And into multiple signal streams.
The signal processing unit is used for will be the multiple by the way that the multiple filtering signal is summed into multiple packets
The sub-combinations of filtering signal are together.Each packet in the multiple packet includes multiple filtering signal members, each
Different interleaving input signal of the member in the multiple time-interleaved input signal.
The signal processing unit includes multiple resampling components, and each resampling component includes multiple wave filters, each
Wave filter has a time-interleaved filter factor in multiple time-interleaved filter factors.
The multiple time-interleaved filter factor is the total derivative of the multiple time-interleaved input signal.
Each filter parallel in the multiple wave filter receives one in the multiple time-interleaved input signal
Individual time-interleaved input signal, to export a filtering signal in the multiple filtering signal respectively.
The signal processing unit includes multiple addition components of mutual wired in parallel.It is every in the multiple addition component
One is added component and carries out line so that multiple members in a packet in the multiple packet to be added, wherein, it is described more
Different resampling components of each member in the multiple resampling component in individual member.
The multiple resampling component is real at least 40 nanometers of silicon integrated circuit (integrated circuit, IC)
It is existing.
The multiple resampling component is used for the sampling period for changing the output signal.
The multiple resampling component includes 4 or more resampling components, and the multiple wave filter includes 4 or more
Wave filter, and the multiple addition component include 4 or more addition components.
Each wave filter in the multiple wave filter is a digital filter.
The signal processing unit includes multiple first in first out (first in first out, FIFO) component, each
FIFO components are connected up to adjust the speed of a signal stream in the multiple signal stream.
Each time-interleaved input signal in the multiple time-interleaved input signal has at least 1.4 megahertzs
The bandwidth of (megahertz, MHz).
One side according to some embodiments of the invention, there is provided a kind of method for adjusting the sampling period, methods described are led to
Cross in the following manner execution：Receive multiple time-interleaved input signals, by using multiple time-interleaved filter factors to it is described when
Between each time-interleaved input signal parallel filtering in intertexture input signal generate multiple filtering signals；And will be multiple
The multiple filtering signal of packet is summed into multiple signal streams.
Each packet in the multiple packet includes multiple filtering signal members, and each filtering signal member is from described
Different interleaving input signal in multiple time-interleaved input signals.
Unless otherwise defined, otherwise all technical terms and/or scientific terminology used herein are respectively provided with institute of the present invention
The equivalent that the one of ordinary skill in the art being related to is commonly understood by.Although similar or identical to it is described herein that
A little methods and material can be used in the practice of embodiments of the invention or in test, but the following describe illustrative methods
And/or material.In case of conflict, it is defined by the patent specification including definition.In addition, material, method and example are only
Only it is that exemplary being not intended as is limited with being necessary.
Brief description of the drawings
Herein only as an example, being described in conjunction with the accompanying some embodiments of the present invention.Specifically now with reference to accompanying drawing, it is necessary to
It is emphasised that shown project is as an example, in order to illustratively discuss embodiments of the invention.So, illustrate with reference to the accompanying drawings,
The embodiment of the present invention how is put into practice to will be apparent to those skilled in the art.
In the accompanying drawings：
Fig. 1 is to use integrated circuit (integrated circuit, IC) etc. simultaneously according to some embodiments of the invention
The schematic diagram for two nodes being in communication with each other during row resampling component；
Fig. 2 is the connective signal according to the example components of some embodiments of the invention and its in example system
Figure；
Fig. 3 is the wave filter for having interleaving time coefficient according to the use of some embodiments of the invention in a parallel fashion to letter
Number carry out resampling example process flow chart；And
Fig. 4 is the schematic diagram according to the example system embodiment of the parallel resampling of some embodiments of the invention.
Embodiment
The present invention is related to parallel resampling in some embodiments, more specifically but is not limited to, is related to communication protocol
Parallel resampling.
Discussed as preceding, at transmitter and/or receiver data are carried out with resampling for when each uses different
It is necessary that data integrity is kept during communication session between the remote node of Zhong Yuan operations.
Parallel resampling system is realized by hardware and/or software, by multiple resampling components, such as parallel operation
Circuit (wherein, term " circuit " can refer to hardware and/or software module), to use.Each adopting again in resampling component
Sample component alternatively receives multiple time-interleaved inlet flow samples with the speed not less than 1.4MHz.Intertexture input sample passes through collection
Into the digital filter processing in resampling component.Digital filter processing input signal comes thermal compensation signal frequency displacement and/or letter
Number compression.The processing of intertexture input sample is carried out parallel in multiple resampling components, corresponding to each resampling component use
Sequential coefficient handles an intertexture input sample in intertexture input sample, to produce output samples among multiple.Create
Multiple packets, the member of multiple packets are the subsets of the multiple middle output samples associated with intertexture input sample.Multiple points
Each packet combining in group in a merging module, will it is all it is related among output samples be added to create output stream
Sample.
First in first out can be used in the input of resampling component filters and the output of merging module
(first in first out, FIFO) element arrays.FIFO adjusts the speed of input sample, and wherein input sample is processed
And/or for temporarily storage output stream sample, it is therefore an objective to based on the clock frequency for being created on local source with correctly order and speed
Rate (sequential) structure output stream, that is, compensate over-sampling or lack sampling, transmission rate gap and/or verify the correct initial of output stream
Change and/or close.
Alternatively, each output signal sample in output signal sample from multiple corresponding input samples structures and
Come, each input sample is handled using appropriate sequential coefficient.Multiple sequential coefficients are also what is interweaved, including frequency displacement
And/or Signal Compression value.The quantity of multiplication result divided by resampling component, flow sample to corresponding output to distribute appropriate weight
Each input sample in this.Multiple sequential coefficients can more be newly arrived (for example, in operation) in real time adaptation estimation signal frequency shift and/
Or Signal Compression ratio.
Control module controls FIFO outputs and selection to be applied to the sequential system of the wave filter in resampling component in real time
Number.
By using multiple resampling components, multiple time-interleaved input samples can parallel processing, it is lower so as to support
Sample rate, because each resampling component will not sample to continuous input sample.The quantity n of resampling component can be with
It is 2 any power, such as 2,4,8,16 etc..The quantity of resampling component apparently with the intertexture input sample of parallel processing
Number is identical.Each result of resampling component, i.e. the input sample of each sequential coefficient processing, divided by 1/2^n are used, with
It is allocated using appropriate weight to create final output signal sample during merging.
If for example, implementing 4 resampling components, each every 4 input samples of resampling component carry out single treatment, from
And reduce 1/4 of the sample frequency needed for sample frequency to traditional resampling system.The knot of the input sample handled in this example
Fruit general divided by 4.
Reduce sample frequency has significant impact to the hardware for performing resampling.Reducing sample frequency allows using not
Too complicated and/or slower hardware, this hardware is necessarily less expensive and/or power consumption is less, such as is produced using 40 nanometer technologies
Integrated circuit (integrated circuit, IC).For example, 16Gsps resamplings unit can be by 256 with about
The parallel resampling component of 67Msps (16Gsps/256) operations uses.
By at least one embodiment for describing the present invention in detail, it will be understood that application of the invention is not necessarily limited to down
Part and/or the construction of method and arrangement details being stated in text description and/or illustrating in accompanying drawing and/or example.The present invention
It can be used in other embodiments or can be practiced or carried out in a variety of ways.
The present invention can be a kind of system, a kind of method and/or a kind of computer program product.Computer program product can
Including a kind of computer-readable recording medium (or media), computer-readable program instructions are stored thereon with, for making processor
Perform each aspect of the present invention.
Computer-readable recording medium can be tangible device, and the tangible device can retain with store instruction so that instruction is held
Row equipment uses.Computer-readable recording medium can be, such as, but not limited to electronic storage device, magnetic storage apparatus, light
Learn the random suitable combination of storage device, electromagnetism storage device, semiconductor memory apparatus or foregoing storage device.
Computer-readable program instructions described herein can be downloaded to from computer-readable recording medium corresponding calculating/
Processing equipment, or by network, for example, internet, LAN, wide area network and/or wireless network download to outer computer or
External memory equipment.
Computer-readable program instructions can all perform as independent software package on the computer of user, partly in user
Computer on perform, partly on the computer of user and part performs on the remote computer, or all in remote computation
Performed on machine or server.In latter scenario, remote computer can pass through the calculating of any type of network connection to user
Machine, the network of these types include LAN (local area network, LAN) or wide area network (wide area
Network, WAN), or can (such as passing through internet using ISP) be connected to outer computer.
In some embodiments, including PLD, field programmable gate array (field-programmable gate
Array, FPGA) or the electronic circuit of programmable logic array (programmable logic array, PLA) etc. meter can be used
The status information of calculation machine readable program instructions to carry out personalization to electronic circuit, so as to perform computer-readable program instructions,
To perform each several part of the present invention.
Each aspect of the present invention is herein with reference to method, apparatus (system) according to embodiments of the present invention and computer journey
The flow chart illustration and/or block diagram of sequence product are described.It will be understood that each side in flow chart illustration and/or block diagram
Combinations of blocks in frame and flow chart illustration and/or block diagram can be realized by computer-readable program instructions.
Flow chart and block diagram in figure illustrate the system according to various embodiments of the present invention, method and computer program production
Framework, function and the operation of the possible embodiment of product.In this regard, each square frame in flow chart or block diagram can represent
One module, fragment or part instruction, instruction include being used for the one or more executable instructions for realizing specified logic function.
In some alternative embodiments, the function of being mentioned in square frame can not occur according to the order mentioned in figure.For example, show in succession
Two square frames gone out, in fact can substantially simultaneously be performed, or these square frames can perform in the opposite order sometimes, take
Certainly in involved function.It should also be noted that each square frame and block diagram of block diagram and/or flow chart illustration and/or
The combination of square frame in flow chart illustration can specify function or action or execution specialized hardware and computer instructions by performing
The hardware based dedicated system closed is realized.
Referring now to Figure 1, Fig. 1 is to use integrated circuit (integrated according to some embodiments of the invention
Circuit, IC) etc. parallel resampling component when the schematic diagram of two nodes that is in communication with each other.Two nodes 110 and 120 wrap
Include transmitter 130 and receiver 140.Two nodes 110 and 120 are in communication with each other by the physical mediums such as air 150.Due to
Difference on the frequency caused by the clock source difference of node 110 and 120, signal resampling is performed to compensate in two nodes 110 and 120
Digital data samples.As further described, can be by the sampling component at node 110 and/or node 120 in transmission path
With resampling is carried out on RX path.In example 100, node 120 uses the two resampling components integrated in node 120
101 perform resampling.Resampling component 101 can be implemented by the combination of hardware, software and/or hardware and software.Node
120 data received carry out resampling before the receiver 140 to node 120 is driven, using resampling component 101.Come
The second resampling component 101 is used before the receiver 140 of node 110 is sent to from the data of the transmitter 130 of node 120
Carry out resampling.Therefore, it compensate for the influence of the difference of injection time between two nodes 110 and 120 so that at two receivers 140
The data of reception all maintain integrality, as two nodes 110 and 120 use same clock frequency and/or clock source operation.
Referring now to Figure 2, Fig. 2 is according to the example components of the parallel resamplings of some embodiments of the invention and its shown
Connective schematic diagram in example sexual system.Example system 200 employs 4 resampling components, each resampling component
Including four filter elements, such as sub-circuit.System 200 can use any amount of resampling component, as long as sum is 2
Power.First resampling component includes wave filter 240,241,242 and 243, the second resampling component include wave filter 250,251,
252 and 253, triple sampling components include wave filter 260,261,262 and 263, and quadruple sampling component includes wave filter
270th, 271,272 and 273.Each resampling component in 4 resampling components handles the subset of incoming input sample, its
In, subset includes every 4 input samples, and each subset including 4 input samples is interleaved with by 4 resampling components
Parallel processing.First input sample subset is INPUT_SAMPLE_0 210, and it includes input sample 0,4,8,12 etc..Second is defeated
It is INPUT_SAMPLE_1 211 to enter sample set, and it includes input sample 1,5,9,13 etc..3rd input sample subset is
INPUT_SAMPLE_2 212, it includes input sample 2,6,10,14 etc..4th input sample subset is INPUT_SAMPLE_3
213, it includes input sample 3,7,11,15 etc..Input sample in subset 210, such as input sample 0 are sent to first and adopted again
In wave filter 240,241,242 and 243 in sample component.Same operation is all carried out to other subsets 211,212 and 213, point
It is not sent in the respective filter in second, third and quadruple sampling component.Then input sample passes through intertexture sequential system
Several times, which increase, comes compensated input signal frequency displacement and/or compression.Intertexture sequential coefficient so that wave filter 240 to 243,250 to 253,
Each wave filter in 260 to 263 and 270 to 273 can use different sequential according to the property of the input sample of its processing
Coefficient.INPUT_SAMPLE_0 210 parallel processing simultaneously, INPUT_SAMPLE_1 in wave filter 240,241,242 and 243
211 parallel processings in wave filter 250,251,252 and 253, INPUT_SAMPLE_2 212 is in the and of wave filter 260,261,262
Parallel processing in 263, and INPUT_SAMPLE_3213 parallel processings in 270,271,272 and 273.Wave filter 240 to
243rd, each wave filter in 250 to 253,260 to 263 and 270 to 273 uses suitable sequential coefficient, the sequential coefficient
Can (operationally) it operate to handle input sample in real time.Wave filter 240 to 243,250 to 253,260 to 263 and 270 to 273
Result divided by 4, with centre export sample in assign their suitable weights.Created after the completion of processing 4 groups 220,
221st, 222 and 223, each group includes multiple members, and these members are 4 respective wave filters in 4 resampling components
Centre output sample.Packet 220 includes the middle output sample that wave filter 240,250,260 and 270 is spread out of, and packet 221 includes
The middle output sample that wave filter 241,251,261 and 271 is spread out of, packet 222 include wave filter 242,252,262 and 272 and passed
Output sample among going out, and packet 223 include output sample among the outflow of wave filter 243,253,263 and 273.Packet
220th, 221,222 it is added with 4 intermediate output signals of each packet in 223 in merging module.Packet 220 passes through merging
Module 280 merges, and packet 221 is merged by merging module 281, and packet 222 is merged by merging module 282, and packet 223
Merged by merging module 283.The merging of the middle output sample of each packet in packet 220,221,222 and 223 produces
Corresponding output stream sample OUTPUT_SAMPLE_0 230, OUTPUT_SAMPLE_1 231, OUTPUT_SAMPLE_2 232
With OUTPUT_SAMPLE_3 233.Then, in an appropriate order from 4 output sample stream OUTPUT_SAMPLE_0 230,
OUTPUT_SAMPLE_1 231, OUTPUT_SAMPLE_2 232 and OUTPUT_SAMPLE_3 233 flow to build output.
Referring now to Figure 3, Fig. 3 be according to the use of some embodiments of the invention have the wave filter of intertexture sequential coefficient with
The flow chart of the example process of parallel mode resampling signal.Example process 300 performs in the systems such as system 200, retouches
The process for carrying out resampling inlet flow is in a parallel fashion stated.Process 300 can perform in the system in addition to system 200,
System 200 may include the resampling component of varying number, wherein, the number of resampling component should be 2 power.
As shown in 301, the input sample from inlet flow is sent in multiple wave filters with intertexture form, such as is integrated in
Wave filter 240 to 243,250 to 253,260 to 263 and 270 to 273 in multiple resampling components.
As illustrated at 302, multiple wave filters, such as FILTER_0_0 240, FILTER_0_1 241, FILTER_0_2 242
The respective input sample that interweaves is handled using suitable intertexture sequential coefficient with each wave filter in FILTER_0_3 243
This, such as INPUT_SAMPLE_0 210, INPUT_SAMPLE_1 211, INPUT_SAMPLE_2 212 and INPUT_
SAMPLE_3 213.Intertexture sequential coefficient represents two clocks frequency of the grade receiver of receiver 140 and the grade transmitter of transmitter 130
Difference of injection time between rate.Each wave filter in wave filter 240 to 243 can use different friendships according to the input sample of its processing
Knit sequential coefficient.Sequential system is selected from storage medium according to the time difference between the clock frequency for two nodes being in communication with each other
Number.
As shown in 303, packet multiple packets such as 220 to 223 are created, wherein, the member that being each grouped includes is each
Intermediate input sample caused by wave filter 241 to 243 from corresponding 4 input samples 210 to 213.Then, packet is divided into
Multiple merging modules, such as merging module 280,281,282 and 283.
As illustrated at 304, the intermediate output signal of each packet in packet 220 to 223 is mutually added in multiple merging modules
A merging module in, multiple merging modules include merging module 280,281,282 and 283.It can be used and be added component to hold
Row is added, be added component will among 4 output samples it is added together.
As shown in 305, from multiple output samples of the submitting of merging module 280 to 283, such as OUTPUT_SAMPLE_0
230th, OUTPUT_SAMPLE_1 231, OUTPUT_SAMPLE_2 232 and/or OUTPUT_SAMPLE_3 233, are temporally closed
Reason sequence receives input sample INPUT_SAMPLE_0, INPUT_SAMPLE_1, INPUT_SAMPLE_2 and INPUT_ to match
SAMPLE_3 order, to produce output stream.
Referring now to Figure 4, Fig. 4 is the example system embodiment according to the parallel resampling of some embodiments of the invention
Schematic diagram.Example system 400 can be used to carry out real concept sexual system 200 etc..System 400 uses 4 resampling components
410th, 411,412 and 413, but resampling can use any amount of resampling component to carry out, as long as resampling component
Quantity is 2 power.4 resampling components 410,411,412 and 413 include 4 16 sample wave filters, such as wave filter respectively
240 to 243,250 to 253,260 to 263 and 270 to 273.Wave filter 240 to 243,250 to 253,260 to 263 and 270 to
Exist before each wave filter in 273 be used for interim storage be passed to input sample subset INPUT_SAMPLE_0 210,
INPUT_SAMPLE_1 211, INPUT_SAMPLE_2 212 and INPUT_SAMPLE_3 213 and of FIFO 440,441,442
443, it is therefore an objective to adjust transmission rate and incoming input sample subset is inserted into their own wave filter 240 to 243,250
Realized to 253,260 to 263 and 270 to 273 synchronous.One group of input FIFO for being equal to one group of FIFO 440 to 443 is being adopted again
Replicated in each resampling component in sample component 410,411,412 and 413.As described in system 200, wave filter 240 to 243,
Each wave filter in 250 to 253,260 to 263 and 270 to 273 uses the specific appropriate respective input of sequential coefficient processing
Sample, specific appropriate sequential coefficient all may be used from wave filter 240 to 243,250 to 253,260 to 263 and 270 to 273 is stored in
Selected in multiple sequential coefficients in special RAM.Intermediate output signal OUT_00 to OUT_30, OUT_01 to OUT_31,
OUT_02 to OUT_32 and OUT_30 to OUT_33 each packet be respectively created in multiple wave filters 240 to 243,250 to 253,
260 to 263 and 270 to 273, such as packet 220,221,222 and 223.Output sample among in group 220,221,222 and 223
This is added together in multiple merging modules such as merging module 280,281,282 and 283, generation output sample OUT_0410,
OUT_1 411, OUT_2 412 and OUT_3 413, output end of these output samples in merging module 280,281,282 and 283
Place is sent in the second set including FIFO 450,451,452 and 453.FIFO 450,451,452 and 453 is defeated for storing
Go out to flow sample OUT_0410, OUT_1 411, OUT_2 412 and OUT_3 413, it is therefore an objective to correctly send out OUTPUT_SAMPLE_0
230th, the output stream sample such as OUTPUT_SAMPLE_1 231, OUTPUT_SAMPLE_2 232 and OUTPUT_SAMPLE_3 233,
Compensate the correct initialization and/or closing of over-sampling or lack sampling and/or checking output stream.These output stream samples are based on this
Ground clock frequency creates final output stream with correct order with speed (time).
System includes exemplary control modules 401, for supervise multiple resampling components 410 to 413, FIFO 440 to
443 and sequential coefficients R AM 240 to 243 operation.The control resampling process of control module 401, and responsible all sequences,
Synchronous and stream structure.Control module 401 is generated into the multiple of the component in each resampling component 410,411,412 and 413
Control signal.
Control signal includes：
Control signal RI_00 to RI_33 487, RI_00, RI_01, RI_02 and RI_03 therein control FIFO 440,
441st, the input FIFO such as 442 and 443.
Control signal CTRL_00 to CTRL_33 488, control each wave filter 240 to 243,250 to 253,260 to 263
With the sequential coefficients R AM in 270 to 273, it is therefore an objective to select suitable coefficient to be filtered processing operation.
Control signal WO_0 to WO_3 486, control output FIFO 450,451,452 and 453.
Control module 401 receives clock signal clk 482, reset signal RST 484 and represents the node 110 being in communication with each other
With the value γ 480 of the difference of the clock frequency of 120 two nodes of grade.Clock signal clk 482 is the master clock of whole system 400
Source, and as the clock base that all operations in system 400 occur.Reset signal RST 484 is used for reset system 400 simultaneously
It is initialised to original state.Clock frequency difference γ 480 is needed to determine system 400 and be communicated with system 400 remote
Actual difference of injection time between journey system, it is therefore an objective to set the sequential coefficient value of wave filter 240 to 243.
For illustrative purposes only, and these descriptions are not intended as exhaustive or limit for description to each embodiment of the present invention
In the disclosed embodiments.In the case where not departing from the scope and spirit of described embodiment, those skilled in the art can
To be clearly understood that many modifications and variations.The technology that can be found compared in the market, select term used herein can be best
The principle, practical application or technological progress of the present embodiment are explained, or others skilled in the art is understood reality disclosed herein
Apply example.
It is contemplated that in the life cycle of the patent to be moved to maturity since the application, it will develop many related resamplings
System and/or method and/or algorithm, the scope of term resampling are intended to include all such priori new technologies.It is used herein
Term " about " refer to ± 10%.
Term " comprising ", "comprising", " having " and its version represent " including but not limited to ".This term includes
Term " by ... form " and " mainly by ... form ".
Phrase " mainly by ... form " means constituent or method can include added ingredient and/or step, but on condition that
The added ingredient and/or step will not substantially change the basic and novel characteristics of required constituent or method.
Unless the context clearly indicates otherwise, "one" and " described " of singulative used herein contain including plural number
Justice.For example, term " compound " or " at least one compound " can include multiple compounds, its mixture is included.
Word " exemplary " expression " as an example, example or explanation " used herein.It is any " exemplary " real
Apply example and be not necessarily to be construed as prior to or be superior to other embodiment, and/or be not precluded from the combination of other embodiment feature.
Word " alternatively " expression used herein " is provided and not carried in other embodiments in certain embodiments
For ".The embodiment of any specific of the present invention can include multiple " optional " features, unless these features are conflicting.
In whole present application, various embodiments of the present invention can be presented with range format.It should be understood that range format
Description is not construed as limiting the fixed of the scope of the invention only for convenient and for purpose of brevity.Therefore, to scope
Description be considered as having disclosed particularly the individual number in all possible subrange and the scope.For example,
Description to the scope for example from 1 to 6 is considered as having disclosed particularly subrange, for example, from 1 to 3, from 1 to 4, from 1
To 5, from 2 to 4, from 2 to 6, from 3 to 6 etc., and the individual digital in the scope, such as 1,2,3,4,5 and 6.Not scope tube
Width how, this is all suitable for.
When it is noted that during a digital scope, representing to contain any cited number in the range of this pointed out
Word (fraction or integer).Phrase " within the scope of the number indicated by the number indicated by first and second " and " from first
Within the scope of the indicated number counted to indicated by second " and used interchangeably herein, expression include first and second institute
The number of instruction and all therebetween fraction and integer.
It will be appreciated that some features of the invention described in the context of separate embodiments can also group for brevity
Conjunction is provided in single embodiment.It is on the contrary, of the invention each described in the context of single embodiment for brevity
Individual feature can also provide individually or using any suitable sub-portfolio or as any suitable other embodiments of the present invention.
Some features described in the context of each embodiment are not considered as the essential characteristic of those embodiments, unless there are no these yuan
The element embodiment is invalid.
Herein, all publications, patent and the patent specification referred in this specification is all by quoting this specification knot
Close in this manual, equally, each individually publication, patent or patent specification are also specific and individually combine herein.
In addition, the reference or identification of any reference to the application can not regard be allow it is such with reference in the prior art prior to
The present invention.With regard to using for section header, section header should not be understood as to necessary restriction.
Claims (13)
- A kind of 1. system for signal resampling, particularly for wireless signal resampling, it is characterised in that including：Signal processing unit, it is used for：Receive multiple time-interleaved input signals；By carrying out parallel filtering to the intertexture input signal to generate multiple filtering signals, wherein, the filtering is with the time The mode of intertexture is carried out；AndThe multiple filtering signal is merged into multiple signal streams.
- 2. system according to claim 1, it is characterised in that the signal processing unit is used for by by the multiple filter Ripple signal is summed into multiple be grouped the sub-combinations of the multiple filtering signal together；It is each in the multiple packet Individual packet includes multiple filtering signal members, and different interleaving of each member in the multiple time-interleaved input signal is defeated Enter signal.
- 3. the system according to any claim in claim 1 to 2, it is characterised in that the signal processing unit bag Multiple resampling components are included, each resampling component includes multiple wave filters, and each wave filter has multiple time-interleaved filtering A time-interleaved filter factor in coefficient.
- 4. the system according to any claim in claim 2 to 3, it is characterised in that the multiple time-interleaved filter Each time-interleaved filter factor in wave system number is the total derivative of the multiple time-interleaved input signal.
- 5. the system according to any claim in claim 3 to 4, it is characterised in that in the multiple wave filter Each filter parallel receives a time-interleaved input signal in multiple time-interleaved input signals, to export institute respectively State a filtering signal of multiple filtering signals.
- 6. the system according to any claim in claim 2 to 5, it is characterised in that the signal processing unit bag Include multiple addition components of mutual wired in parallel, each the multiple being added in component is added component and connected up with by institute The multiple members stated in a packet in multiple packets are added, wherein, each member in more members is from described more Different resampling components in individual resampling component.
- 7. the system according to any claim in claim 3 to 6, it is characterised in that the multiple resampling component Implement at least 40 nanometers of silicon integrated circuits (integrated circuit, IC).
- 8. the system according to any claim in claim 3 to 7, it is characterised in that the multiple resampling component In each resampling component be used to change sampling period of the output signal.
- 9. the system according to any claim in claim 3 to 8, it is characterised in that the multiple resampling component Including at least four resampling component, the multiple wave filter includes at least four wave filter, and the multiple addition component is included extremely Few 4 additions component.
- 10. the system according to any claim in claim 3 to 9, it is characterised in that in the multiple wave filter Each wave filter is a digital filter.
- 11. system according to any one of the preceding claims, it is characterised in that the signal processing unit bag Multiple first in first out (first in first out, FIFO) component is included, each FIFO components are connected up described more to adjust The speed of a signal stream in individual signal stream.
- 12. system according to any one of the preceding claims, it is characterised in that the multiple time-interleaved defeated Entering each time-interleaved input signal in signal has the bandwidth of at least 1.4 megahertzs (megahertz, MHz).
- A kind of 13. method for adjusting the sampling period, it is characterised in that including：Receive multiple time-interleaved input signals；Each intertexture input signal in the intertexture input signal is carried out by using multiple time-interleaved filter factors Parallel filtering generates multiple filtering signals；AndThe multiple filtering signal of multiple packets is summed into multiple signal streams；Wherein, each packet in the multiple packet includes multiple filtering signal members, and each filtering signal member comes from institute State the different interleaving input signal in multiple time-interleaved input signals.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/EP2015/070346 WO2017041815A1 (en) | 2015-09-07 | 2015-09-07 | Parallel re-sampler |
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| Publication Number | Publication Date |
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| CN107852166A true CN107852166A (en) | 2018-03-27 |
| CN107852166B CN107852166B (en) | 2020-09-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201580082007.5A Active CN107852166B (en) | 2015-09-07 | 2015-09-07 | Parallel resampler |
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| Country | Link |
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| CN (1) | CN107852166B (en) |
| WO (1) | WO2017041815A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109067399A (en) * | 2018-07-26 | 2018-12-21 | 南京磐能电力科技股份有限公司 | A kind of ADC controller implementation method of multi-sampling rate |
| CN109146262A (en) * | 2018-07-31 | 2019-01-04 | 佛山科学技术学院 | A kind of intelligently parsing method manufacturing big data health and fitness information |
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| US20110128171A1 (en) * | 2009-02-19 | 2011-06-02 | Takashi Oshima | Analog/digital converter and semiconductor integrated circuit device |
| CN102210139A (en) * | 2008-11-12 | 2011-10-05 | Nxp股份有限公司 | Multi-channel receiver architecture and reception method |
| CN104038226A (en) * | 2014-06-25 | 2014-09-10 | 华为技术有限公司 | Multi-channel time-interleaved analog-digital converter |
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| US20080250093A1 (en) * | 2005-10-13 | 2008-10-09 | Nxp B.V. | Method and Apparatus for Filtering Multiple Channels of Signals |
| WO2009090514A1 (en) * | 2008-01-14 | 2009-07-23 | Nxp B.V. | Time interleaved analog-to-digital-converter |
| US8542786B2 (en) * | 2010-08-04 | 2013-09-24 | Evertz Microsystems Ltd. | Multi-channel sample rate converter |
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- 2015-09-07 WO PCT/EP2015/070346 patent/WO2017041815A1/en active Application Filing
- 2015-09-07 CN CN201580082007.5A patent/CN107852166B/en active Active
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102210139A (en) * | 2008-11-12 | 2011-10-05 | Nxp股份有限公司 | Multi-channel receiver architecture and reception method |
| US20110128171A1 (en) * | 2009-02-19 | 2011-06-02 | Takashi Oshima | Analog/digital converter and semiconductor integrated circuit device |
| CN104038226A (en) * | 2014-06-25 | 2014-09-10 | 华为技术有限公司 | Multi-channel time-interleaved analog-digital converter |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109067399A (en) * | 2018-07-26 | 2018-12-21 | 南京磐能电力科技股份有限公司 | A kind of ADC controller implementation method of multi-sampling rate |
| CN109067399B (en) * | 2018-07-26 | 2022-02-18 | 南京磐能电力科技股份有限公司 | Method for realizing ADC controller with multiple sampling rates |
| CN109146262A (en) * | 2018-07-31 | 2019-01-04 | 佛山科学技术学院 | A kind of intelligently parsing method manufacturing big data health and fitness information |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107852166B (en) | 2020-09-25 |
| WO2017041815A1 (en) | 2017-03-16 |
| WO2017041815A9 (en) | 2017-05-04 |
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