CN107833904B - Double-sided OLED display panel and manufacturing method thereof - Google Patents
Double-sided OLED display panel and manufacturing method thereof Download PDFInfo
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
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- H10K59/873—Encapsulations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
Abstract
The invention discloses a double-sided OLED display panel and a manufacturing method thereof. The double-sided OLED display panel includes: a substrate base material; the thin film transistor, the first OLED device and the conductive element are positioned on one side of the substrate, the drain electrode pattern of the thin film transistor is connected with the anode pattern of the first OLED device, one end of the conductive element is connected with the anode pattern of the first OLED device, and the other end of the conductive element is exposed by the other side of the substrate; and a second OLED device on the other side of the substrate, the anode pattern of the second OLED device being connected to the other end of the conductive element. Therefore, the double-sided OLED display panel can be beneficial to the light and thin design of the double-sided OLED display panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to a double-sided OLED (Organic Light-emitting diode) display panel and a manufacturing method thereof.
Background
Currently, in order to meet the requirement of two-sided opposite confirmation screen display, a double-sided display panel has become a mainstream display panel in trading places such as banks and supermarkets. The OLED is used as a new generation display, and is different from the traditional liquid crystal display in that a backlight source is not needed, an organic light emitting layer is manufactured on a substrate, the organic light emitting layer is wrapped between a cathode and an anode, and the organic light emitting layer can emit light when voltage is applied to the two electrodes, so that the OLED has the characteristics of lightness and thinness. Therefore, a double-sided OLED display panel obtained by applying the OLED to a double-sided display panel has become mainstream in the industry. In the structural design of the existing double-sided OLED display panel, two back-to-back OLED devices are respectively driven by two completely independent Thin Film Transistors (TFTs), and the two TFTs have a large thickness, which is obviously not favorable for light and Thin design.
Disclosure of Invention
In view of this, the present invention provides a double-sided OLED display panel and a manufacturing method thereof, which can facilitate the light and thin design of the double-sided OLED display panel.
The double-sided OLED display panel of one embodiment of the invention comprises:
a substrate base material;
the thin film transistor, the first OLED device and the conductive element are positioned on one side of the substrate, the drain electrode pattern of the thin film transistor is connected with the anode pattern of the first OLED device, one end of the conductive element is connected with the anode pattern of the first OLED device, and the other end of the conductive element is exposed by the other side of the substrate;
and the anode pattern of the second OLED device is connected with the other end of the conductive element.
The method for manufacturing the double-sided OLED display panel comprises the following steps:
forming a thin film transistor, a first OLED device and a conductive element on one side of a substrate, wherein a drain electrode pattern of the thin film transistor is connected with an anode pattern of the first OLED device, one end of the conductive element is connected with the anode pattern of the first OLED device, and the other end of the conductive element is exposed by the other side of the substrate;
and forming a second OLED device on the other side of the substrate base material, wherein the anode pattern of the second OLED device is connected with the other end of the conductive element.
Has the advantages that: according to the invention, the conductive element is designed between the two OLED devices of the double-sided OLED display panel, two ends of the conductive element are respectively connected with the anode patterns of the two OLED devices, and the display signal can be transmitted to the anode pattern of the other OLED device through the conductive element only by arranging the thin film transistor and connecting the drain pattern of the thin film transistor with the anode pattern of one OLED device.
Drawings
FIG. 1 is a schematic cross-sectional view illustrating a double-sided OLED display panel according to an embodiment of the present invention;
FIG. 2 is a schematic flow chart of a method for manufacturing a double-sided OLED display panel according to an embodiment of the present invention;
FIG. 3 is a schematic flow chart of a method for manufacturing a double-sided OLED display panel according to another embodiment of the present invention;
fig. 4 is a schematic view of manufacturing a double-sided OLED display panel based on the method shown in fig. 3.
Detailed Description
The main purposes of the invention are: the conductive element is designed between the two OLED devices of the double-sided OLED display panel, two ends of the conductive element are respectively connected with the anode patterns of the two OLED devices, and a display signal can be transmitted to the anode pattern of the other OLED device through the conductive element only by arranging one thin film transistor and connecting the drain pattern of the thin film transistor with the anode pattern of one OLED device.
The technical solutions of the exemplary embodiments provided in the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. The following embodiments and their technical features may be combined with each other without conflict. Furthermore, directional terms used in the following embodiments of the present invention, such as "upper" and "lower", are used for better describing the embodiments, and are not used to limit the scope of the present invention.
Fig. 1 is a schematic cross-sectional view of a double-sided OLED display panel according to an embodiment of the invention. Referring to fig. 1, a double-sided OLED display panel 10 includes a substrate 11, and a thin film transistor, a first OLED device 13, a conductive element, and a second OLED device 15 formed on the substrate 11. The substrate 11 may be a flexible substrate, such as PI (Polyimide), and the double-sided OLED display panel 10 may be regarded as a flexible display panel. The thin film transistor, the first OLED device 13 and the conductive element are located on one side of the substrate base 11, and the second OLED device 15 is located on the other side of the substrate base 11.
As shown in fig. 1 \22014c, the thin film transistor includes a gate pattern 121, a gate insulating layer 122, a semiconductor pattern 123, a source pattern 124, a drain pattern 125, a planarization layer 126, and a passivation layer 127 on a substrate base 11. The conductive element includes a first conductive pattern 141 in the substrate base material 11, and a second conductive pattern 142, a third conductive pattern 143, a fourth conductive pattern 144 and a fifth conductive pattern 145 sequentially disposed on the first conductive pattern 141, and the conductive materials for preparing the five conductive patterns may be the same or different. Wherein:
the first conductive pattern 141 and the substrate 11 are located on the same layer, and the thicknesses of the first conductive pattern 141 and the substrate 11 may be equal, which means that the first conductive pattern 141 is embedded in the substrate 11, and the substrate 11 exposes the upper surface of the first conductive pattern 141.
The second conductive pattern 142 and the gate pattern 121 are disposed at the same layer and spaced apart from each other, and may be formed of the same material in the same process, and the second conductive pattern 142 is directly formed on the first conductive pattern 141. The gate insulating layer 122 is on the substrate 11 and covers the gate pattern 121, but exposes the upper surface of the second conductive pattern 142. The semiconductor pattern 123 is formed on the gate insulating layer 122 and is positioned above the gate pattern 121.
The third conductive pattern 143, the source pattern 124, and the drain pattern 125 are disposed on the same layer, and two of the third conductive pattern 143, the source pattern 124, and the drain pattern 125 are disposed at intervals, specifically, the source pattern 124 and the drain pattern 125 are disposed at two ends of the semiconductor pattern 123, and the third conductive pattern 143 is directly formed on the second conductive pattern 142. The planarization layer 126 covers the semiconductor pattern 123, the source pattern 124, and the drain pattern 125, but exposes upper surfaces of the drain pattern 125 and the third conductive pattern 143.
The fourth conductive pattern 144 includes two portions, one portion is located on the drain pattern 125 and the other portion is located on the third conductive pattern 143, where the fourth conductive pattern 144 simultaneously makes surface contact with the drain pattern 125 and the upper surface of the third conductive pattern 143.
The fifth conductive pattern 145 covers the two portions of the fourth conductive pattern 144 and is in direct surface contact with the two portions of the fourth conductive pattern 144. The passivation layer 127 covers the fifth conductive pattern 145 and has a contact hole exposing an upper surface of the fifth conductive pattern 145.
With continued reference to fig. 1, the first OLED device 13 and the second OLED device 15 may have the same structure, for example, both may adopt a top emission type design, and specifically, the first OLED device 13 includes an anode pattern 131, a light emitting pattern 132, and a cathode pattern 133 sequentially disposed on a passivation layer 127, and the second OLED device 15 includes an anode pattern 151, a light emitting pattern 152, and a cathode pattern 153 sequentially disposed on the other side of the substrate 11. The anode pattern 131 of the first OLED device 13 covers the contact hole of the passivation layer 127 and is connected with the fifth conductive pattern 145, and the anode pattern 151 of the second OLED device 15 is connected with the first conductive pattern 141.
In the present embodiment, the drain pattern 125 of the thin film transistor is connected to the anode pattern 131 of the first OLED device 13, one end (the fifth conductive pattern 145) of the conductive member is connected to the anode pattern 131 of the first OLED device 13, the other end (the first conductive pattern 141) of the conductive member is exposed to the other side of the substrate base 11, and the anode pattern 151 of the second OLED device 15 is connected to the other end of the conductive member.
When a gate signal is applied to the gate pattern 121, the thin film transistor is turned on, and a display signal (an electrical signal) is transmitted to the anode pattern 131 of the first OLED device 13 through the drain pattern 125, the fourth conductive pattern 144, and the fifth conductive pattern 145, thereby causing the first OLED device 13 to emit light irradiated away from the substrate base material 11. The anode pattern 151 of the second OLED device 15 also receives a display signal through the conductive element, and also emits light irradiated away from the substrate base material 11. Thus, the double-sided OLED display panel 10 realizes double-sided display. Since the first OLED device 13 and the second OLED device 15 receive the same display signal, the double-sided OLED display panel 10 displays the same image on both sides at the same time.
Therefore, in this embodiment, only one thin film transistor needs to be disposed and the drain pattern 125 of the thin film transistor is connected to the anode pattern of one of the OLED devices (the anode pattern 131 of the first OLED device 13), so that the display signal can be transmitted to the anode pattern of the other OLED device (the anode pattern 151 of the second OLED device 15) through the conductive element, and compared to the design of the double-sided display panel including two thin film transistors in the prior art, the double-sided OLED display panel 10 of this embodiment has the advantage of being light and thin.
Fig. 2 shows a method for manufacturing a double-sided OLED display panel according to an embodiment of the invention. The manufacturing method can be used to form the double-sided OLED display panel 10 having the structure shown in fig. 1, and for convenience of description, the present invention will be described below by taking the manufacturing method as an example for forming the double-sided OLED display panel 10 shown in fig. 1.
As shown in fig. 2, the manufacturing method includes the following steps S21 and S22.
S21: a thin film transistor, a first OLED device and a conductive element are formed on one side of a substrate, a drain electrode pattern of the thin film transistor is connected with an anode pattern of the first OLED device, one end of the conductive element is connected with the anode pattern of the first OLED device, and the other end of the conductive element is exposed by the other side of the substrate.
S22: a second OLED device is formed on the other side of the substrate base material, and an anode pattern of the second OLED device is connected to the other end of the conductive member.
In order to ensure the flatness of the substrate base material 11, the substrate base material 11 may be formed on a substrate (e.g., a glass substrate) with good flatness. Based on this, the manufacturing method of the present embodiment may include steps S30 to S47 shown in fig. 3.
S30: a lower substrate is provided.
As shown in fig. 4, the lower substrate 40 may be a substrate with good flatness, such as a glass substrate, a transparent plastic substrate, or a flexible substrate. Of course, the lower substrate 40 of the embodiment may also be provided with a passivation protection layer, for example, the lower substrate 40 may include a substrate and a passivation protection layer formed on the substrate, in this case, the substrate may be a glass substrate, a transparent plastic substrate, a flexible substrate, or the like, and the passivation protection layer is made of a material including but not limited to silicon nitride, such as Si, for example, Si3N4(silicon nitride for short) to protect the structural stability of the surface of the lower substrate 40.
S31: a first conductive pattern is formed on the lower substrate.
The embodiment may form the first conductive pattern 141 having a predetermined pattern on the lower substrate 40 through a mask process. Specifically, a full-area metal layer is formed on the lower substrate 40 by a PVD (Physical Vapor Deposition) method, a full-area photoresist layer is then coated on the metal layer, and the full-area photoresist layer is sequentially exposed and developed by a mask, so that the photoresist of the fully exposed portion can be removed by a developing solution, the photoresist of the unexposed portion is not removed by the developing solution, and then the metal layer not covered by the photoresist layer is removed by etching, and the photoresist layer is removed, and finally the remaining metal layer can be formed into the first conductive pattern 141.
S32: a substrate base material covering the lower substrate is formed, and the substrate base material exposes the upper surface of the first conductive pattern.
In this embodiment, a PI layer may be coated on the upper surface of the lower substrate 40 by a coating method, the PI layer exposes the upper surface of the first conductive pattern 141, and the PI layer is cured to form the substrate 11. Of course, the substrate 11 may be a flexible substrate made of other flexible materials, and the double-sided OLED display panel 10 may be regarded as a flexible display panel.
S33: and forming grid patterns and second conductive patterns which are arranged at intervals on the substrate base material, wherein the second conductive patterns are formed on the first conductive patterns.
With reference to fig. 4, the gate pattern 121 and the second conductive pattern 142 are formed on the substrate 11 at intervals, and the conductive pattern 142 is formed on the first conductive pattern 141 and in surface contact with the first conductive pattern 141. The gate pattern 121 and the second conductive pattern 142 may be made of the same material, so that the gate pattern 121 and the second conductive pattern 142 may be formed on the substrate 11 through the same mask process, and the principle of the mask process may refer to the manufacturing process of the first conductive pattern 141, which is not described herein again.
S34: a gate insulating layer covering the gate pattern is formed on the substrate base, and the gate insulating layer exposes an upper surface of the second conductive pattern.
The present embodiment may employ a CVD (Chemical Vapor Deposition) method to form the gate insulating layer 122 on the gate pattern 121, wherein the gate insulating layer 122 covers the entire surface of the gate pattern 121, but exposes the upper surface of the second conductive pattern 142. Specifically, the thickness of the second conductive pattern 142 is greater than that of the gate pattern 121, and the upper surface of the gate insulating layer 122 is flush with the upper surface of the second conductive pattern 142.
The material of the gate insulating layer 122 includes, but is not limited to, silicon oxide (SiO)x). Of course, the gate insulating layer 122 may also include a silicon oxide layer and a silicon nitride layer, such as SiO, sequentially formed on the gate pattern 1212(silicon dioxide) and Si3N4(silicon nitride), so that the wear resistance and the insulating property of the gate insulating layer 122 can be further improved.
S35: a semiconductor pattern is formed on the gate insulating layer over the gate pattern.
In this embodiment, a semiconductor pattern 123 may be formed by forming a whole semiconductor layer by PVD and then performing a mask-based patterning process on the whole semiconductor layer, thereby only remaining the semiconductor layer above the gate pattern 121.
S36: and forming source electrode patterns, drain electrode patterns and third conductive patterns which are arranged at intervals in pairs on the grid electrode insulating layer, wherein the source electrode patterns and the drain electrode patterns are respectively arranged at two ends of the semiconductor patterns, and the third conductive patterns are formed on the second conductive patterns.
The present embodiment may form the source and drain patterns 124 and 125 using a patterning process of the same principle as that of forming the gate pattern 121. In addition, the third conductive pattern 143 may be made of the same material as the source and drain patterns 124 and 125, so that the third conductive pattern 143 may be simultaneously formed on the gate insulating layer 123 by the patterning process, and the third conductive pattern 143 may be in surface contact with the second conductive pattern 142.
S37: a planarization layer is formed on the gate insulating layer to cover the semiconductor pattern, the source pattern, and the drain pattern, the planarization layer exposing upper surfaces of the drain pattern and the third conductive pattern.
In this embodiment, a planarization layer 126 may be formed on the gate insulating layer 122 by coating or the like, wherein the planarization layer 126 covers the entire surface of the semiconductor pattern 123, the source pattern 124 and the drain pattern 125, but the planarization layer 126 is provided with two openings exposing the upper surface of the drain pattern 125 and the upper surface of the third conductive pattern 143, respectively.
S38: a fourth conductive pattern is formed on upper surfaces of the drain pattern and the third conductive pattern.
The present embodiment may deposit the fourth conductive pattern 144 in the two openings opened in the planarization layer 126 by using a PVD method, such that the fourth conductive pattern 144 directly contacts the upper surface of the drain pattern 125 and the upper surface of the third conductive pattern 143. The material of the fourth conductive pattern 144 includes, but is not limited to, at least one of Mo (molybdenum) and Al (aluminum).
S39: a fifth conductive pattern connected to the fourth conductive pattern is formed on the fourth conductive pattern.
The fifth conductive pattern 145 may be formed on the fourth conductive pattern 144 by a PVD method in combination with a patterning process based on a mask process. The fifth conductive pattern 145 is in direct surface contact with the fourth conductive pattern 144.
S40: and forming a passivation layer covering the fifth conductive pattern, wherein the passivation layer is provided with a contact hole exposing the upper surface of the fifth conductive pattern.
The passivation layer 127 and the planarization layer 126 may be formed in the same method. The passivation layer 127 is a structure covering the entire surface of the fifth conductive pattern 145, but has a contact hole formed on the upper surface of the fifth conductive pattern 145. The contact hole is positioned directly above the third conductive pattern 143. Of course, in the case of forming the passivation layer 127 by other methods, the contact hole may be formed in the entire passivation layer 127 by etching.
S41: and forming a first OLED device on the passivation layer, wherein the anode pattern of the first OLED device covers the contact hole and is connected with the fifth conductive pattern.
The first OLED device 13 may employ a top emission type design, and specifically, includes an anode pattern 131, a light emitting pattern 132, and a cathode pattern 133 sequentially on the passivation layer 127. The material of the anode pattern 131 may be at least one of Al (aluminum), Ag (silver) and ITO (Indium tin oxide), and the manufacturing method of the first OLED device 13 may refer to the prior art, which is not described herein.
S42: and forming an encapsulation layer, wherein the encapsulation layer and the substrate base material enclose an accommodating space, and the thin film transistor, the first OLED device and the conductive element are positioned in the accommodating space.
As shown in fig. 4, the encapsulation layer 41 includes two parts, a first part is disposed above the cathode pattern 133, and a second part is disposed between the first part and the substrate 11, where the encapsulation layer 41 and the substrate 11 enclose a receiving space, so as to enclose the thin film transistor, the first OLED device 13 and the conductive element in a water-proof and oxygen-proof environment. The encapsulation layer 41 may be formed by a thin film encapsulation method, and the material thereof includes, but is not limited to, inorganic substances that block water and oxygen.
S43: an upper substrate is disposed on the encapsulation layer.
The upper substrate 42 includes, but is not limited to, a glass substrate, a transparent plastic substrate, and a flexible substrate, and may be disposed directly on the package layer 41 or disposed above the package layer 41 at intervals.
S44: a protective layer is formed between the upper substrate and the substrate base material and positioned at the periphery of the packaging layer, and a closed space is defined by the protective layer, the upper substrate and the substrate base material.
The protection layer 43 may be formed by curing a UV glue, and forms a closed space together with the upper substrate 42 and the substrate 11, and the closed space is used to protect all components inside the closed space, such as the first OLED device 13, from being damaged.
S45: and separating the lower substrate from the substrate base material.
The present embodiment may separate the lower substrate 40 and the substrate base 11 by using a laser method.
S46: a second OLED device is formed on the other side of the substrate base material, and an anode pattern of the second OLED device is connected to the other end of the conductive member.
The second OLED device 15 may employ a top emission type design, and specifically, includes an anode pattern 151, a light emitting pattern 152, and a cathode pattern 153 sequentially disposed on the other side of the substrate base material 11, the anode pattern 151 being in contact with a lower surface of the first conductive pattern 141.
Besides the second OLED device 15, the present embodiment is also provided with an encapsulation layer 41, and the encapsulation layer 41 and the substrate 11 enclose an accommodating space, so as to enclose the second OLED device 15 in a water-proof and oxygen-proof environment.
S47: and cutting the substrate along the parting line between the protective layer and the packaging layer to remove the protective layer and the upper base plate.
In this embodiment, the boundary line outside the encapsulation layer 41 is used as the dividing line 411, the substrate 11 is cut by laser along the dividing line 411, and the protection layer 43 and the upper substrate 42 are automatically separated after cutting, so that the double-sided OLED display panel 10 shown in fig. 1 can be obtained.
It should be noted that the above-mentioned embodiments are only examples of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures or equivalent flow transformations made by using the contents of the specification and the drawings, such as the combination of technical features between the embodiments, or the direct or indirect application to other related technical fields, are included in the scope of the present invention.
Claims (6)
1. A method for manufacturing a double-sided OLED display panel is characterized by comprising the following steps:
forming a thin film transistor, a first OLED device and a conductive element on one side of a substrate, wherein a drain electrode pattern of the thin film transistor is connected with an anode pattern of the first OLED device, one end of the conductive element is connected with the anode pattern of the first OLED device, and the other end of the conductive element is exposed by the other side of the substrate;
forming a second OLED device on the other side of the substrate base material, wherein the anode pattern of the second OLED device is connected with the other end of the conductive element;
wherein, form thin-film transistor, first OLED device and conductive element on one side of substrate, include:
providing a lower substrate;
forming a first conductive pattern on the lower substrate;
forming a substrate base material covering the lower substrate, the substrate base material exposing an upper surface of the first conductive pattern;
forming a grid pattern and a second conductive pattern which are arranged at intervals on the substrate base material, wherein the second conductive pattern is formed on the first conductive pattern;
forming a gate insulating layer covering the gate pattern on the substrate base material, the gate insulating layer exposing an upper surface of the second conductive pattern;
forming a semiconductor pattern on the gate insulating layer over the gate pattern;
forming source electrode patterns, drain electrode patterns and third conductive patterns which are arranged at intervals in pairs on the grid electrode insulating layer, wherein the source electrode patterns and the drain electrode patterns are respectively arranged at two ends of the semiconductor patterns, and the third conductive patterns are formed on the second conductive patterns;
forming a planarization layer covering the semiconductor pattern, the source pattern and the drain pattern on the gate insulating layer, the planarization layer exposing upper surfaces of the drain pattern and the third conductive pattern;
forming a fourth conductive pattern on upper surfaces of the drain pattern and the third conductive pattern;
forming a fifth conductive pattern connected to the fourth conductive pattern on the fourth conductive pattern;
forming a passivation layer covering the fifth conductive pattern, wherein the passivation layer is provided with a contact hole exposing the upper surface of the fifth conductive pattern;
forming a first OLED device on the passivation layer, wherein an anode pattern of the first OLED device covers the contact hole and is connected with the fifth conductive pattern;
and forming an encapsulation layer, wherein the encapsulation layer and the substrate base material enclose an accommodating space, and the thin film transistor, the first OLED device and the conductive element are positioned in the accommodating space.
2. The manufacturing method according to claim 1, wherein the base substrate is formed of a flexible material.
3. The manufacturing method according to claim 1, wherein the lower substrate comprises a glass substrate.
4. The manufacturing method according to claim 1, wherein after forming the encapsulation layer, the manufacturing method further comprises:
arranging an upper substrate on the packaging layer;
and forming a protective layer between the upper substrate and the substrate base material and on the periphery of the packaging layer, wherein the protective layer, the upper substrate and the substrate base material enclose a closed space.
5. The method of manufacturing of claim 4, wherein prior to forming a second OLED device on the other side of the substrate base material, the method further comprises:
separating the lower substrate from the substrate base material.
6. The method of manufacturing of claim 5, wherein after forming a second OLED device on the other side of the substrate base material, the method further comprises:
and cutting the substrate along a dividing line between the protective layer and the packaging layer to remove the protective layer and the upper substrate.
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CN201711038812.5A CN107833904B (en) | 2017-10-30 | 2017-10-30 | Double-sided OLED display panel and manufacturing method thereof |
PCT/CN2017/112619 WO2019085080A1 (en) | 2017-10-30 | 2017-11-23 | Double-sided oled display panel and manufacturing method therefor |
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