CN107833899A - Solid camera head - Google Patents
Solid camera head Download PDFInfo
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- CN107833899A CN107833899A CN201711055697.2A CN201711055697A CN107833899A CN 107833899 A CN107833899 A CN 107833899A CN 201711055697 A CN201711055697 A CN 201711055697A CN 107833899 A CN107833899 A CN 107833899A
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- camera head
- solid camera
- electric charge
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- 239000007787 solid Substances 0.000 title claims abstract description 38
- 238000006243 chemical reaction Methods 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 15
- 230000003647 oxidation Effects 0.000 claims description 17
- 238000007254 oxidation reaction Methods 0.000 claims description 17
- 239000007943 implant Substances 0.000 claims description 13
- 239000000203 mixture Substances 0.000 description 15
- 239000012535 impurity Substances 0.000 description 8
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 5
- 238000002955 isolation Methods 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000005693 optoelectronics Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- SYHGEUNFJIGTRX-UHFFFAOYSA-N methylenedioxypyrovalerone Chemical compound C=1C=C2OCOC2=CC=1C(=O)C(CCC)N1CCCC1 SYHGEUNFJIGTRX-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/1461—Pixel-elements with integrated switching, control, storage or amplification elements characterised by the photosensitive area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14645—Colour imagers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
Abstract
The solid camera head of the application possesses the multiple pixels for being configured to two dimension shape, and each of the multiple pixel possesses：The Semiconductor substrate of first voltage；Metal electrode；Photoelectric conversion layer, it is formed on the metal electrode, and converts light to electric signal；Transparency electrode, it is formed on the photoelectric conversion layer；Electric charge puts aside region, is formed in above-mentioned Semiconductor substrate, is electrically connected with the metal electrode, and puts aside the electric charge from the photoelectric conversion layer；Amplifying transistor, export the signal voltage corresponding with the quantity of electric charge in electric charge savings region；And reset transistor, the current potential in electric charge savings region is resetted, when the reset transistor turns on, the grid of the reset transistor is applied in second voltage, when the reset transistor disconnects, the grid of the reset transistor is applied in tertiary voltage, and the first voltage is between the second voltage and the tertiary voltage.
Description
The application is the applying date on March 8th, 2013, Application No. 201380032967.1, entitled " solid is taken the photograph
The division of the application for a patent for invention of picture device ".
Technical field
The present invention relates to the solid camera head that pixel is arranged in an array shape.
Background technology
It has been suggested that a kind of cascade type sensor, by the material that can carry out opto-electronic conversion is layered in Semiconductor substrate
Top, the pixel after by microminiaturization can also realize larger saturation charge.
Fig. 5 is the pixel sectional view of the cascade type imaging sensor described in patent document 1.As shown in the drawing, in semiconductor
The top of substrate 200 is formed with photoelectric conversion layer 210, transparency electrode 211 and pixel electrode 212.Also, in Semiconductor substrate
Formed with the multiple impurity ranges for forming output circuit in 200.In above-mentioned impurity range formed with：For putting aside photoelectric conversion layer
The electric charge storage unit 201 of the n-type of caused electric charge in 210；And on the top of electric charge storage unit 201 in order to reduce because of semiconductor
The surface defect of substrate 200 and caused by the surface implant regions 202 of p-type that leak.Also, in order to which savings is put aside in electric charge
The electric charge in portion 201 is output to signal wire, therefore formed with the transmission transistor 204 that electric charge is transferred to floating diffusion portion 203.It is floating
Dynamic diffusion part 203 is connected to the grid of the amplifying transistor 205 for being converted to voltage corresponding with the quantity of electric charge, in floating diffusion
Portion 203 is formed with for selecting selection transistor 206 of the output to the pixel of signal wire.Also, formed with for expanding floating
Dissipate the reset transistor 207 that the current potential in portion 203 resets.Also, in order to which caused optical charge in photoelectric conversion layer 210 is transmitted
To electric charge storage unit 201, and contact 208 is provided with, and in order to reduce contact resistance, and formed with the high n-type of impurity concentration
Contact injection zone 209.
(prior art literature)
(patent document)
The Japanese Unexamined Patent Publication 2009-164604 publications of patent document 1
The content of the invention
Problems to be solved by the invention
Near the contact 208 on the surface of Semiconductor substrate 200, pass through the surface implant regions 202 of p-type and connecing for n-type
Touch injection zone 209 and form PN junction.The electric-field intensity of the interdependent node of leakage current of the PN junction, in order to reduce the electric leakage of node
Stream, therefore, when the impurity concentration in surface implant regions 202 reaches to a certain degree, then can not make the impurity concentration become higher.
However, the script of surface implant regions 202 is to reduce because of the surface defect of Semiconductor substrate 200, especially exist
The leakage current occurred near gate terminal that is easily induced by defect during processing and be set, if it is dense to reduce above-mentioned impurity
Degree, then can not fully suppress because defect and caused by leakage current.
The present invention in view of above-mentioned problem, and it is an object of the present invention to provide a kind of highly sensitive cascade type that can suppress leakage current
Solid camera head.
The means used to solve the problem
In order to solve above-mentioned problem, solid camera head of the invention possesses the multiple pixels for being configured to two dimension shape, institute
Each for stating multiple pixels possesses：The Semiconductor substrate of first voltage；Metal electrode；Photoelectric conversion layer, it is formed on described
On metal electrode, and convert light to electric signal；Transparency electrode, it is formed on the photoelectric conversion layer；Electric charge puts aside region,
Formed in above-mentioned Semiconductor substrate, electrically connected with the metal electrode, and put aside the electric charge from the photoelectric conversion layer；Put
Big transistor, export the signal voltage corresponding with the quantity of electric charge in electric charge savings region；And reset transistor, to described
The current potential in electric charge savings region is resetted, and when the reset transistor turns on, the grid of the reset transistor is applied in
Second voltage, when the reset transistor disconnects, the grid of the reset transistor is applied in tertiary voltage, first electricity
Pressure is between the second voltage and the tertiary voltage.
By above-mentioned composition, high voltage can be applied to the gate electrode of reset transistor, and make to undertake surface
The charge concentration of injection zone is near gate terminal, so that the current potential of surface implant regions is stable, so as to suppress leakage current.
Invention effect
By solid camera head involved in the present invention, the leakage current of electric charge storage unit, Er Qieneng can not only be reduced
1/f noise is enough reduced, so as to realize high sensitivity (high S/N) solid camera head.
Brief description of the drawings
Fig. 1 is the circuit diagram for an example for showing the solid camera head involved by embodiment.
Fig. 2A is the sectional view of an example of the composition for showing the pixel involved by embodiment.
Fig. 2 B are the sectional views of an example of the composition for showing the power circuit involved by embodiment.
Fig. 3 is the pixel planes figure of the solid camera head involved by embodiment 1.
Fig. 4 is the pixel planes figure of the solid camera head involved by embodiment 2.
Fig. 5 is the pixel sectional view of the cascade type sensor described in patent document 1.
Embodiment
Embodiment is described in detail below based on accompanying drawing.Also, the present invention is not by following embodiment institute
Limit.Also, in the range of the effect for realizing the present invention is not departed from, can rightly it be changed.Moreover, also can be with other
Embodiment be combined.
(embodiment 1)
First, entered using Fig. 1 example formed to the image element circuit of the solid camera head involved by embodiment 1
Row explanation.
Fig. 1 is the circuit diagram for an example for showing the solid camera head involved by embodiment.Consolidating shown in the figure
Body camera device is an example of cascade type imaging sensor, and pixel 10 therein is aligned to two dimension shape.In pixel 10
Possess：Metal electrode 11；It is formed on metal electrode, and converts light to the photoelectric conversion layer 13 of electric signal；It is formed on
Transparency electrode 12 on photoelectric conversion layer 13；Put aside electric charge savings region (the floating diffusion of the electric charge from photoelectric conversion layer 13
Area) 14；Export the amplifying transistor 15 of signal voltage corresponding with the quantity of electric charge in electric charge savings region 14；Region is put aside to electric charge
The reset transistor 16 that is resetted of current potential；And selection transistor 17.
Photoelectric conversion layer 13 to incident light by carrying out opto-electronic conversion, so as to generate signal charge.By photoelectric conversion layer 13
The signal charge of generation, electric charge savings region 14 is transferred to via metal electrode 11.In the present embodiment, in order to transmit
Electric charge, and 10V or so positive bias is applied to transparency electrode 12.
The electric charge for being transferred to electric charge savings region 14 is amplified by amplifying transistor 15.Turn into conducting in selection transistor 17
During state, the signal amplified by amplifying transistor 15 is output to output signal line 18.
In order to remove caused hot (kTC) noise at work of reset transistor 16, from output signal line 18 via anti-
Feedback wiring 19, the noise contribution of phase reversal is returned into electric charge savings region 14, so as to be offseted with hot (kTC) noise.
The signal being controlled to each transistor in pixel is inputted from vertical circuit 20, is exported via horizontal circuit 21
To signal end 24.In order to realize miniaturization, by the power circuit 22 being arranged in same chip, and produce and be applied to
The 10V of prescribed electrode 12 or so applied voltage.
Then, the section constitution using Fig. 2A to the solid camera head possessed pixel 10 involved by embodiment 1
An example illustrate.
Fig. 2A is the sectional view of an example of the composition for showing the pixel involved by embodiment.As shown in the drawing, originally
The pixel 10 of solid camera head involved by embodiment possesses：It is formed on the trap 1 of the n-type of Semiconductor substrate；It is formed
On a semiconductor substrate just and by carrying out opto-electronic conversion to the light of incidence to generate the photoelectric conversion layer 13 of signal charge；With
And clip the metal electrode 11 and transparency electrode 12 of photoelectric conversion layer 13.The use of transparency electrode 12 can make light incide photoelectricity turn
Change the transparency electrodes such as the ITO or ZnO of layer 13.
In the present embodiment, although employing the trap 1 of the n-type formed in Semiconductor substrate, but can also use
The trap for the p-type that Semiconductor substrate is formed.In this case, the conductivity type of later shown impurity then turns into n-type and handed over p-type
Replace.
Also, in electric charge caused by photoelectric conversion layer 13, by applying 10V or so positive voltage to transparency electrode 12, from
And via the transporting holes of metal electrode 11, and the electric charge savings region 14 put aside to p-type.Electric charge savings region 14 is also used as multiple
The active region of bit transistor 16, when turning on reset transistor 16, the current potential in electric charge savings region 14 is reset.
Moreover, electric charge savings region 14 passes through n-type or STI (Shallow Trench Isolation：Shallow trench every
From) area of isolation 31 that forms, so as to being electrically isolated with the amplifying transistor 15 in pixel or selection transistor 17.
Also, the surface implant regions 32 of n-type are set on the top in electric charge savings region 14, in such manner, it is possible to suppress to let out
Drain to because of numerous defects on the surface of trap 1 and caused by leakage current electric charge savings region 14.
Also, in the contact 33 for the electric charge from photoelectric conversion layer 13 to be transferred to electric charge savings region 14 with partly leading
The interface of body substrate, it is provided for reducing the contact injection zone 34 of contact resistance.Also, surface implant regions 32 extend to multiple
Near the gate terminal of bit transistor 16.
The thickness of the grid oxidation film 25 of the Film Thickness Ratio amplifying transistor 15 of the grid oxidation film 36 of the reset transistor 16
It is thick.By this composition, high grid voltage can be applied to reset transistor 16.Therefore, when reset transistor 16 disconnects,
It can assemble and undertake the majority carrier identical electronics of surface implant regions 32 below grid, in such manner, it is possible to note surface
It is stable to enter the current potential in region 32, and leakage current can be reduced.In the present embodiment, for example, conducting by reset transistor 16
When voltage be set to 0V or so, voltage when will be switched off is set to 3.8V or so.
Also, by forming the grid oxidation film 25 of amplifying transistor 15 relatively thin, so as to suppress 1/f noise.
Also, make the thickness of the grid oxidation film 27 of selection transistor 17 and the grid oxidation film 25 of amplifying transistor 15
Thickness is identical.By this composition, because the grid applied voltage when selection transistor 17 is turned on can be reduced, so as to favourable
In the reduction of power consumption.Also, above-mentioned thickness is identical to be referred to, thickness is roughly the same, that is to say, that including the error in manufacture.
In the present embodiment, the thickness of the grid oxidation film 25 of amplifying transistor 15 is for example substantially in 3nm~6nm model
In enclosing.Also, the thickness of the grid oxidation film 36 of reset transistor 16 is for example substantially in 4nm~13nm.Also, selection transistor
The thickness of 17 grid oxidation film 27 is for example substantially in 3nm~6nm scope.
Fig. 2 B are the sectional views of an example of the composition for showing the power circuit involved by embodiment.Form voltage
It is applied to the grid of the Film Thickness Ratio reset transistor 16 of the grid oxidation film 35 of the transistor of the power circuit 22 of transparency electrode 12
The thickness of oxide-film 36 is thick.It is made up of this, the transistor of power circuit 22 is formed due to high voltage can be applied to, because
The signal charge generated in photoelectric conversion layer 13, can be sent to electric charge savings region 14 by this.In order to by 10V's or so
Voltage is applied to transparency electrode 12, and therefore, the thickness of the grid oxidation film 35 is preferably substantially in the range of 15~25nm.
In the present embodiment, such as trap voltage is substantially being set to 2.8V, the grid voltage of reset transistor 16 is being set
For 3.8V or so when, leakage current can obtain the improvement of a few percent ten.
Also, the current potential of the gate electrode 45 for the amplifying transistor 15 being connected with electric charge savings region 14 is by reset crystal
Pipe 16 and when turning into reset potential, can substantially ensure it is pressure-resistant between trap 1 and the gate electrode 45 of amplifying transistor 15
In the range of, to make the filming of grid oxidation film 25 of amplifying transistor 15.Accordingly, 1/ as the noise contribution beyond leakage current
The N1/f of f noises, can significantly it be reduced from following theoretical formula.Here, Gox is the thickness of grid oxidation film, W
It is channel width and L is grid length.
(numerical expression 1)
Then, realize that the figure that the first plane of multiple pixels 10 of Fig. 2A cross section structure is formed enters to expression using Fig. 3
Row explanation (wiring on upper strata is not shown).
Fig. 3 is the pixel planes figure of the solid camera head involved by embodiment 1.As shown in figure 3, the electric charge in pixel
The contact 33 in region 14 is put aside in order to which signal charge is not mixed, thus it is not shared with adjacent pixel 10.Beyond contact 33
Contact can be shared due to the problem of signal charge mixing will not occur with adjacent pixel 10, in the vertical of smooth surface
On direction, adjacent pixel 10 is shared with contact.Hereby it is possible to the contact occupied area ratio of each pixel is reduced, so as to
The microminiaturization of Pixel Dimensions can be realized.
Also, the amplifying transistor 15 of the pixel 10 adjacent with vertical direction on smooth surface of amplifying transistor 15 is common
Enjoy active region 54.By this composition, due to sharing contact in neighbouring pixel 10, therefore amplifying transistor 15 is able to ensure that
Grid length, so as to reduce the 1/f noise of one of noise contribution.
Also, the selection transistor 17 of the pixel 10 adjacent with vertical direction on smooth surface of selection transistor 17 is common
Enjoy active region 57.By this composition, because upper and lower pixel shares contact, therefore, it is possible to ensure the grid of selection transistor 17
While length, it can be ensured that the grid length of the amplifying transistor 15 of active region is have shared, so as to reduce noise contribution
One of 1/f noise.
Also, the reset transistor 16 of the pixel 10 adjacent with vertical direction on smooth surface of reset transistor 16 is common
Enjoy active region 56.By this composition, due to sharing contact in upper and lower pixel, therefore the grid length of reset transistor 16 is able to ensure that
Degree, and it is able to ensure that the on state characteristic using electric charge savings region 14 as the reset transistor 16 of active region.
Also, the grid length of reset transistor 16 is longer than the grid length of amplifying transistor 15., can by this composition
While the driving force of amplifying transistor 15 is ensured, it can reduce electric charge savings region 14 is brilliant as the reset of active region
The heterogeneity of the on state characteristic of body pipe 16, i.e., it can reduce the inequality of the threshold voltage for depending on grid length, drain current etc.
One, so as to make the current potential in electric charge savings region 14 stable.Therefore, the leakage characteristics between pixel turn into identical, so as to
Shoot distinct image.In addition, making the grid length of amplifying transistor shorten, it is inversely proportional with √ L length, mutual conductance gm increases, because
This driving force increases, so as to rapidly transfer signals to output signal line 18.
Also, amplifying transistor 15 is configured in identical row with selection transistor 17.As long as ensuring to utilize selection crystalline substance
Grid length is set to shorten in the state of the conducting of the grid voltage of body pipe 17 and turn-off characteristic, it becomes possible to make amplifying transistor 15
Grid length increases, and can reduce 1/f noise according to formula 1.
In the present embodiment, in the case where the unit size of pixel 10 is 0.9 μm, the grid length of amplifying transistor 15
Degree is for example preferably substantially in 0.2~0.3 μm of scope.The grid length of reset transistor 16 is for example substantially at 0.2~0.5 μm
Scope.The grid length of selection transistor 17 is for example substantially in 0.1~0.5 μm of scope.Even in the unit size of pixel
, naturally also just can be according to unit size from 0.9 μm of change ratio, to export and different unit sizes in the case of difference
Corresponding grid length.
(embodiment 2)
In the present embodiment, the second plane composition of the multiple pixels 10 for the cross section structure for realizing Fig. 2A is said
It is bright.
Fig. 4 is the pixel planes figure of the solid camera head involved by embodiment 2.It is identical with Fig. 3 in the figure, reset
Transistor 16 is formed to isolate with amplifying transistor 15 and selection transistor 17 by area of isolation 31.
As shown in figure 4, the selection transistor 17 in pixel shares active region 55 with the amplifying transistor 15 in same pixel
A part, the active region 56 of the reset transistor 16 in pixel and the electricity of active region 55 of the amplifying transistor 15 in same pixel
Isolation.Pass through this composition, it can be ensured that the wider amplifying transistor 15 for needing high-speed driving and selection transistor 17
Channel width.Also, the area of the active region by reducing reset transistor 16, so as to make surface implant regions 32 and electricity
The PN junction area in lotus savings region 14 reduces, and can so suppress PN junction leakage.
Also, reset transistor 16 is configured in, the selection transistor 17 in same pixel and the level on smooth surface
Between selection transistor 17 on direction in adjacent pixel.Or reset transistor 16 can also be configured in, same pixel
(do not scheme between amplifying transistor 15 on interior amplifying transistor 15 and the horizontal direction on smooth surface in adjacent pixel
Show).By this composition, can make the narrow and small reset transistor 16 of channel width, with the wide amplifying transistor 15 of channel width with
And the channel direction of selection transistor 17 configures in same pixel side by side, therefore, noise characteristic can either be ensured, and can is enough
Easily make pixel size microminiaturization.
Also, the channel width of amplifying transistor 15 is wider than the channel width of reset transistor 16.According to formula 1, if expanding
The channel width of amplifying transistor 15, then it can reduce the 1/f noise of amplifying transistor 15.In addition, reset crystal by reducing
The channel width of pipe 16, so as to reduce the PN junction face that the active region of reset transistor 16 is also used as to electric charge savings region 14
Product, therefore 1/f noise and leakage current can be reduced, so as to obtain reducing the highly sensitive of noise contribution for signal
Image.Also, as it ensure that the operating current of amplifying transistor 15, therefore transistor channel width can be expanded, and realized
Fast driving, so as to can also reduce the 1/f noise as one of noise contribution.
In the present embodiment, in the case where the unit size of pixel is 0.9 μm, the channel width of amplifying transistor 15
Such as substantially in 0.1~0.5 μm of scope.The channel width of reset transistor 16 is for example substantially in 0.1~0.2 μm of scope.
The channel width of selection transistor 17 is for example substantially in 0.1~0.5 μm of scope.Even in the different feelings of the unit size of pixel
, naturally also just can be corresponding from different unit sizes to export according to unit size from 0.9 μm of change ratio under condition
Channel width.
Also, the grid length of the gate electrode 47 of selection transistor 17 is than the grid of the gate electrode 45 of amplifying transistor 15
Length is short.Hereby it is possible to ensure the grid length of amplifying transistor 15, and the 1/f noise of one of noise contribution can be reduced.
Composition more than, can manufacture the solid camera head for reducing leakage current and 1/f noise.Also, energy
1 μm or so of small Pixel Dimensions are enough realized, and can make it possible that electric charge is read at high speed.
It is illustrated above based on embodiment 1 and 2 pairs of solid camera heads involved in the present invention, the present invention is simultaneously
It is non-to be limited by embodiment 1 and 2.In the range of the interesting purport of the present invention is not departed from, those skilled in the art can be thought
To various modifications be performed in the form of embodiment 1 and 2, and group is carried out to the inscape in different embodiments
Merge the form constructed to be all contained in the scope of the present invention.
Also, the solid camera head involved by above-mentioned embodiment is typically capable of coming as the LSI of integrated circuit
Realize.These can also will include one chip of some or all conducts therein by respectively as a chip
To be made.
Also, integrated circuit is not limited to LSI, can also come as special circuit or general processor real
It is existing.After LSI manufactures, programmable FPGA (Field Programmable Gate Array can also be utilized：Scene can compile
Journey gate array) or can re-binning processor using can rebuild the connection of the circuit unit inside LSI and setting.
Also, in above-mentioned sectional view etc., although illustrating the corner and side of each inscape with straight line, no
Cross, because of the relation in manufacture, even if corner and sideband have circular arc degree etc. to be also included in the present invention.
Also, numeral used above is for the example that the present invention is specifically described, and the present invention is simultaneously
It is non-to be limited by shown numeral of illustrating.Also, the impurity such as surface implant regions 32, contact injection zone 34, active region 54~57
N-type and p-type in area etc. etc. are to an example being specifically described of the present invention, even if making them conversely can also obtain
To same effect.Also, the material of each inscape illustrated above is one that the present invention is specifically described
Example, material of the present invention not in by these examples are limited.Also, the annexation between inscape is also for this hair
A bright example being specifically described, realize that the connected mode of the function of the present invention is not limited by this.
Also, though the example of MOS transistor is employed in the above description, can also be other crystal
Pipe.
Industrial applicibility
The solid camera head of the present invention can be applied to the small picture with cascade type structure and with low-noise characteristic
The solid camera head of plain size.
Symbol description
1 trap
10 pixels
11 metal electrodes
12 transparency electrodes
13 photoelectric conversion layers
14 electric charges put aside region
15 amplifying transistors
16 reset transistors
17 selection transistors
18 output signal lines
19 feedback wirings
20 vertical circuits
21 horizontal circuits
22 power circuits
24 signal ends
25th, 27,35,36 grid oxidation film
31 area of isolation
32 surface implant regions
33 contacts
34 contact injection zones
The gate electrode of 45 amplifying transistors
The gate electrode of 46 reset transistors
The gate electrode of 47 selection transistors
54th, 55,56,57 active region
Claims (13)
1. a kind of solid camera head, possess the multiple pixels for being configured to two dimension shape,
Each of the multiple pixel possesses：
The Semiconductor substrate of first voltage；
Metal electrode；
Photoelectric conversion layer, it is formed on the metal electrode, and converts light to electric signal；
Transparency electrode, it is formed on the photoelectric conversion layer；
Electric charge puts aside region, is formed in above-mentioned Semiconductor substrate, is electrically connected with the metal electrode, and puts aside and come from the light
The electric charge of electric conversion layer；
Amplifying transistor, export the signal voltage corresponding with the quantity of electric charge in electric charge savings region；And
Reset transistor, the current potential that region is put aside to the electric charge reset,
When the reset transistor turns on, the grid of the reset transistor is applied in second voltage,
When the reset transistor disconnects, the grid of the reset transistor is applied in tertiary voltage,
The first voltage is between the second voltage and the tertiary voltage.
2. solid camera head as claimed in claim 1,
The solid camera head is also equipped with power circuit, and the power circuit applies a voltage to the transparency electrode,
Form the grid oxidation film of reset transistor described in the Film Thickness Ratio of the grid oxidation film of the transistor of the power circuit
Thickness is thick.
3. solid camera head as claimed in claim 1,
The channel width of the amplifying transistor is bigger than the channel width of the reset transistor.
4. solid camera head as claimed in claim 1,
Each of the multiple pixel is also equipped with selection transistor, and the selection transistor determines the amplifying transistor to described
The timing that signal voltage is exported,
The multiple pixel includes the first pixel,
The selection transistor in first pixel shares active region with the amplifying transistor in first pixel
A part,
The active region of the reset transistor in first pixel and the amplifying transistor in first pixel
Active region electric isolution.
5. solid camera head as claimed in claim 1,
Each of the multiple pixel is also equipped with selection transistor, and the selection transistor determines the amplifying transistor to described
The timing that signal voltage is exported,
The multiple pixel includes the first pixel and adjacent in the horizontal direction with first pixel second on smooth surface
Pixel,
The reset transistor in first pixel is configured in, the amplifying transistor and institute in first pixel
State between the amplifying transistor in the second pixel.
6. solid camera head as claimed in claim 1,
The grid length of the reset transistor is longer than the grid length of the amplifying transistor.
7. the solid camera head as described in claim 4 or 5,
The grid length of the selection transistor is shorter than the grid length of the amplifying transistor.
8. solid camera head as claimed in claim 1,
The multiple pixel includes the first pixel and adjacent in vertical direction with first pixel second on smooth surface
Pixel,
The amplifying transistor in first pixel shares active region with the amplifying transistor in second pixel.
9. solid camera head as claimed in claim 1,
Each of the multiple pixel is also equipped with selection transistor, and the selection transistor determines the amplifying transistor to described
The timing that signal voltage is exported,
The multiple pixel includes the first pixel and adjacent in vertical direction with first pixel second on smooth surface
Pixel,
The selection transistor in first pixel shares active region with the selection transistor in second pixel.
10. solid camera head as claimed in claim 1,
The multiple pixel includes the first pixel and adjacent in vertical direction with first pixel second on smooth surface
Pixel,
The reset transistor in first pixel shares active region with the reset transistor in second pixel.
11. solid camera head as claimed in claim 1,
The thickness of the grid oxidation film of the reset transistor 4nm to 13nm scope,
Scope of the thickness of the grid oxidation film of the amplifying transistor in 3nm to 6nm.
12. solid camera head as claimed in claim 1,
The solid camera head is also equipped with positioned at the surface implant regions on the top in electric charge savings region,
The electric charge savings region is the 1st conductivity type, and the surface implant regions are the 2nd conductivity types.
13. solid camera head as claimed in claim 1,
Each of the multiple pixel is also equipped with selection transistor, and the selection transistor determines the amplifying transistor to described
The timing that signal voltage is exported,
The multiple pixel includes the first pixel and adjacent in the horizontal direction with first pixel second on smooth surface
Pixel,
The reset transistor in first pixel is configured in, the selection transistor and institute in first pixel
State between the selection transistor in the second pixel.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012144763 | 2012-06-27 | ||
| JP2012-144763 | 2012-06-27 | ||
| CN201380032967.1A CN104412387B (en) | 2012-06-27 | 2013-03-08 | Solid camera head |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380032967.1A Division CN104412387B (en) | 2012-06-27 | 2013-03-08 | Solid camera head |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107833899A true CN107833899A (en) | 2018-03-23 |
| CN107833899B CN107833899B (en) | 2021-11-19 |
Family
ID=49782539
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711055697.2A Active CN107833899B (en) | 2012-06-27 | 2013-03-08 | Solid-state imaging device |
| CN201380032967.1A Active CN104412387B (en) | 2012-06-27 | 2013-03-08 | Solid camera head |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380032967.1A Active CN104412387B (en) | 2012-06-27 | 2013-03-08 | Solid camera head |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US9813651B2 (en) |
| JP (1) | JP6108280B2 (en) |
| CN (2) | CN107833899B (en) |
| WO (1) | WO2014002330A1 (en) |
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| JP2019029643A (en) * | 2017-07-31 | 2019-02-21 | パナソニックＩｐマネジメント株式会社 | Imaging apparatus |
| JP2019087939A (en) * | 2017-11-09 | 2019-06-06 | キヤノン株式会社 | Photoelectric conversion device, electronic equipment, conveyance apparatus and drive method of photoelectric conversion device |
| JP2019212900A (en) | 2018-05-31 | 2019-12-12 | パナソニックＩｐマネジメント株式会社 | Imaging apparatus |
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Also Published As
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| US9813651B2 (en) | 2017-11-07 |
| JPWO2014002330A1 (en) | 2016-05-30 |
| CN104412387B (en) | 2017-11-21 |
| US20180048839A1 (en) | 2018-02-15 |
| US20150109503A1 (en) | 2015-04-23 |
| CN107833899B (en) | 2021-11-19 |
| WO2014002330A1 (en) | 2014-01-03 |
| CN104412387A (en) | 2015-03-11 |
| JP6108280B2 (en) | 2017-04-05 |
| US9942506B2 (en) | 2018-04-10 |
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