Embodiment
Below in conjunction with accompanying drawing, the invention will be further described.The tongue tube life detecting method is by including controller list
Member, the tongue tube life detecting device of L break-make counting unit, human and machine interface unit, magnetic control driver element, oscillator unit are real
It is existing.Human and machine interface unit is electrically connected to controller unit, for sending sense command, shows the life-span of L tongue tube;Control
Device unit is electrically connected to magnetic control driver element, sends magnetic control drive signal to magnetic control driver element, L tongue tube of control leads to
It is disconnected;Oscillator unit exports sample clock pulse to L break-make counting unit;L break-make counting unit is respectively to L tongue tube
Break-make carry out counting to get L break-make count value;Break-make counting unit is electrically connected to controller unit, controller unit point
Not Du Ru L break-make counting unit break-make count value.When L values are larger, the break-make count value of L break-make counting unit is adopted
Exported with Three-State mode;The Three-State output port of all break-make counting units is all connected in parallel to the meter of controller unit
Number data-in port;Controller unit sends the Three-State output that gate control signal enables each break-make counting unit one by one
Port, corresponding break-make count value is read in from enumeration data input port.Described device can also include being electrically connected to control
The gating control cells of device unit;Controller unit sends break-make counting unit address coding signal to gating control cells, by
Gating control cells enter row decoding to break-make counting unit address coding signal, obtain gate control signal, enable and break-make meter
The Three-State output port of the corresponding break-make counting unit of counting unit address coding signal.
Tongue tube life detecting device embodiment block diagram when Fig. 1 is L=4, including controller unit 10,1# break-makes count list
Member 11,2# break-makes counting unit 12,3# break-makes counting unit 13,4# break-makes counting unit 14, human and machine interface unit 15, gating control
Unit 16 processed, magnetic control driver element 17, oscillator unit 18.
Human and machine interface unit 15 is communicated by the interface I/O1 of controller unit 10 with controller unit 10, is ordered for detecting
The sending of order, parameter modification and the display etc. in each tongue tube life-span;Controller unit 10 is driven by output port OUT2 to magnetic control
Moving cell 17 sends magnetic control drive signal, control 1# to 4# tongue tubes break-make;Oscillator unit 18 exports sample clock pulse
CLK is to 1# break-makes counting unit 11,2# break-makes counting unit 12,3# break-makes counting unit 13 and 4# break-makes counting unit 14;1#
Break-make counting unit 11,2# break-makes counting unit 12,3# break-makes counting unit 13,4# break-makes counting unit 14 are dry to 4 respectively
The break-make of reed pipe carries out pulses generation, pulse bandwidth filtering and break-make counting how many times;Controller unit 10 by output port OUT1 to
Gating control cells 16 send break-make counting unit address coding signal to be gated, and gating control cells 16 count single to break-make
First address coding signal enters row decoding, obtains gate control signal CS1, CS2, CS3, CS4, controls 1# break-make counting units respectively
11st, 2# break-makes counting unit 12,3# break-makes counting unit 13, break-make count value CV1, CV2 of 4# break-make counting units, CV3,
CV4 delivers to controller unit 10 by input port IN1, and IN1 is the enumeration data input port of controller unit.
It is illustrated in figure 2 1# break-make counting unit embodiment block diagrams.In Fig. 2,1# pulse-generating circuits 100 export to be done by 1#
Inceptive impulse P11 caused by reed pipe break-make;Shift register 101, ROM memory 102, anti-interference threshold setting device 103, RS
Trigger 104 forms anti-impulse disturbances circuit, and pulse bandwidth filtering, output count pulse P12 are carried out to inceptive impulse P11;Tri-state is defeated
Go out counting circuit 105 to count count pulse P12, controlled by gate control signal CS1, export the break-make of 1# tongue tubes
Count value CV1.
In Fig. 2 anti-impulse disturbances circuit, shift register 101 includes serial input terminal, N parallel-by-bits output end, sampling
Clock pulse input terminal, inceptive impulse P11 input from the serial input terminal of shift register 101, and sample clock pulse CLK is from shifting
The sample clock pulse input input of bit register 101, the N parallel-by-bits output end output N bit sequence numbers of shift register 101
According to X1;Anti-interference threshold setting device 103 exports anti-interference threshold value M;The input of ROM memory 102 is N bit sequence data X1 and resisted
Interference threshold M, export as the first set signal SE1 and the second set signal RE1;The input of rest-set flip-flop 104 is the first set
Signal SE1 and the second set signal RE1, is exported as count pulse P12.Anti- impulse disturbances circuit embodiments select N=5.
Fig. 3 is 1# pulse-generating circuit embodiments.After 1# tongue tubes KA1 connects with load resistance RA1, power supply electricity is connected in parallel to
Source+VCC1 and publicly GND, after current-limiting resistance R11 connects with voltage-stabiliser tube VD1, then are connected in parallel to load resistance RA1 both ends;From steady
Output inceptive impulse P11 as caused by 1# tongue tube break-makes on pressure pipe VD1.Tongue tube is mainly used in the occasion such as counting, spacing,
It is mainly direct current resistive load that it, which is loaded,;Load resistance RA1 size is adjusted, tongue tube KA1 to be detected resistance can be adjusted
The size of property DC load current.KA1 in Fig. 3 is normal open switch;KA1 changes normally closed switch into, and Fig. 3 circuits still can export
The inceptive impulse P1 as caused by tongue tube break-make.Pulse-generating circuit can also can be by the break-make control of tongue tube using other
System produces the circuit of inceptive impulse.
Fig. 4 is the embodiment of N=5 time shift bit registers.In Fig. 4,5 d type flip flop FF1, FF2, FF3, FF4, FF5 compositions
5 bit string line shift registers, FF1 input D are the serial input terminal of shift register, are connected to inceptive impulse P11;FF1、
After FF2, FF3, FF4, FF5 input end of clock CP parallel connections, the shift pulse input of shift register, i.e. shift LD are formed
The sample clock pulse input of device, and it is connected to sample clock pulse CLK;Q points of FF1, FF2, FF3, FF4, FF5 output end
Not Wei x11, x12, x13, x14, x15, in Fig. 4, N bit sequence data X1 is made up of x11, x12, x13, x14, x15.N bit sequences
Data X1 is that rising edge of the shift register in sample clock pulse CLK edges samples to inceptive impulse P11 nearest n times
Value.
When N is other numerical value, the quantity of d type flip flop in Fig. 4 can be increased and decreased to realize the function of shift register.D in Fig. 4
Trigger can be replaced with other triggers, for example, realizing the function of the shift register of N positions using N number of JK flip-flop.
Shift register can also be realized using single or multiple special multibit shift registers, for example, using 1
74HC164 either 1 74HC595, it is possible to achieve be not more than the function of the shift register of 8, using multi-disc 74HC164 or
Person is multi-disc 74HC595, it is possible to achieve the function of the shift register more than 8.
Fig. 5 anti-interference threshold setting device and ROM memory embodiments when being N=5.Anti-interference threshold setting device is by resistance
R91, R90 and threshold value selecting switch K91, K90 composition;+ VCC is power supply, and GND is publicly.In Fig. 5, anti-interference threshold value
The anti-interference threshold value M of setting apparatus output is made up of y11, y10;Because anti-interference threshold value M is nonnegative integer less than N/2, N=5
When, M values among 0,1,2, i.e. y11, y10 value can only be 0,0, or 0,1, or 1,0, be selected by threshold value
Switch K91, K90 carry out selection setting.Anti-interference threshold setting device can be dialled by multidigit binary system toggle switch, or BCD
Code switch, or multiple regular taps add pull-up resistor, or the multiple pull-up resistors and short circuit of the output of control 0,1
Point, and other similar circuit compositions.
In Fig. 5, ROM device FR1 composition ROM memories.The function of ROM memory is, by anti-interference threshold value M and N positions sequence
Column data X1 inputs as address signal, and the first set signal SE1 and the second set signal RE1 are as data output;ROM is stored
Device is according to the number of " 1 " in the anti-interference threshold value M currently inputted, and N bit sequence data X1, it is determined that the first set letter of output
Whether number SE1 and the second set signal RE1 is effective respectively.
During N=5, it is desirable to which FR1 has 7 bit address to input, i.e. FR1 address input end A6-A0 in Fig. 5;It is required that FR1 has 2
FR1 data output end D1, D0 in data output end, i.e. Fig. 5.If FR1 address input end A4, A3, A2, A1, A0 difference is defeated
Enter N bit sequence data X1 x15, x14, x13, x12, x11, address input end A6, A5 input respectively anti-interference threshold value M y11,
Y10, FR1 data output end D1, D0 are respectively the first set signal SE1 and the second set signal RE1, then each address in FR1
The content of unit is shown in Table 1.In table 1, N=5, the first set signal SE1 and the second set signal RE1 of D1, D0 output are height
Level is effective.
ROM memory memory cell content during table 1N=5
By taking memory cell in ROM memory 0110000 as an example, M parts are the high 2 of address, and numerical value is 1;Address is low 5
The number of N bit sequences data division " 1 " is 1, is unsatisfactory for the condition more than or equal to N-M, therefore D1=0;Meet less than or equal to M's
Condition, therefore D0=1.Again by taking memory cell in ROM memory 0001001 as an example, M numerical value is 0 in memory unit address;Deposit
N bit sequences data division in storage unit address is low 5 of address, wherein the number of " 1 " is 2;Due in N bit sequence data
The number of " 1 " is unsatisfactory for the condition more than or equal to N-M, therefore D1=0;The number of " 1 " is unsatisfactory for small in N bit sequence data
In the condition equal to M, therefore D0=0.
When anti-interference threshold value M is 0, y11, y10 0,0 of address A6, A5 input, now, when in N bit sequence data X1
When the number of " 1 " is equal to 5, output SE1 is high level, and otherwise SE1 is low level, and in table 1, only address A6-A0 is 0011111
When just meet this condition;When the number of " 1 " in N bit sequence data X1 is equal to 0, output RE1 is high level, and otherwise RE1 is low
Level, in table 1, only address A6-A0 just meets this condition when being 0000000.
When anti-interference threshold value M is 1, y11, y10 0,1 of address A6, A5 input, now, when in N bit sequence data X1
When the number of " 1 " is more than or equal to 4, output SE1 is high level, and otherwise SE1 is low level, and in table 1, address A6-A0 is
0101111st, 0110111,0111011,0111101,0111110,0111111 when meet this condition;When in N bit sequence data X1
When the number of " 1 " is less than or equal to 1, output RE1 is high level, and otherwise RE1 is low level, and in table 1, address A6-A0 is
0100000th, 0100001,0100010,0100100,0101000,0110000 when just meet this condition.
When anti-interference threshold value M is 2, y11, y10 1,0 of address A6, A5 input, now, when in N bit sequence data X1
When the number of " 1 " is more than or equal to 3, output SE1 is high level, and otherwise SE1 is low level, shared in the A6-A0 of address in table 1
1000111st, 1001011 etc. 16 address inputs meet this condition;When the number of " 1 " in N bit sequence data X1 is less than or equal to 2
When, output RE1 is high level, and otherwise RE1 is low level, and in table 1,1000000,1000001 etc. 16 are shared in the A6-A0 of address
Input meets this condition.
D1, D0 content of each memory cell storage in table 1 is anti-phase, i.e., when 0 change 1,1 becomes 0, the first set signal of output
SE1 and the second set signal RE1 is that low level is effective.As N=5, M can only among 0,1,2 value, i.e. y11, y10
Value can not be 1,1.The M values among 0,1,2 in table 1, have used 96 memory cell in ROM memory altogether.For
Avoid setting M mistimings that M is arranged into 3, i.e., it is threshold value selecting switch K91, K90 in interference threshold selecting unit is all off
When, there is unpredictable situation in system, and it is determined that during memory cell content in ROM memory, M can be arranged into 3 by mistake
Situation as M be 0, one kind in being either 1 or being 2 is determined.For example, M is arranged to 3 by mistake when, as M
=2 situation is handled;By taking memory cell in ROM memory 1110010 as an example, the anti-interference threshold value in memory unit address
M parts are the high 2 of address, therefore M numerical value is set to 3 by mistake, takes M=2;N bit sequence data divisions in memory unit address are
Low 5 of address, wherein the number of " 1 " is 2;The number of " 1 " is unsatisfactory for the bar more than or equal to N-M in N bit sequence data
Part, therefore D1=0;Number due to meeting " 1 " in N bit sequence data is less than or equal to M condition, therefore D0=1.As consideration M
Mistake facilities, high 2 of ROM memory include 00,01,10,11 kind of situation when, used 128 in ROM memory altogether
Individual memory cell, that is, include 7 corresponding all units of binary address input.
Anti-interference threshold value M each binary digit and the binary system of each binary digit of N bit sequence data and ROM memory
Corresponding relation of the location between everybody can use arbitrary one-to-one relationship., can be by M's by taking N=5 embodiment as an example
Y11, y10 are corresponding respectively with address input end A1, A0, X1 x15, x14, x13, x12, x11 and address input end A6, A5, A4,
A3, A2 are corresponded respectively;It is either that M y11, y10 is corresponding respectively with address input end A1, A0, X1 x11, x12,
X13, x14, x15 and address input end A6, A5, A4, A3, A2 are corresponded respectively;Either by y11, x14, x15, x11,
X12, y10, x13 and address input end A6, A5, A4, A3, A2, A1, A0 are corresponded, etc. respectively.
Fig. 6 is rest-set flip-flop embodiment, is made up of nor gate FO1, FO2, the first set signal SE1 and the second set signal
The equal high level of RE1 is effective.When SE1 is effective, RE1 is invalid, the count pulse P12 exported from in-phase output end FO2 is set to 1;
When SE1 is invalid, RE1 is effective, count pulse P12 is set to 0;As SE1 and RE1 invalid, count pulse P12 state is not
Become.Rest-set flip-flop can also use the rest-set flip-flop of other forms.
It is same phase relation in Fig. 6, between count pulse P12 and inceptive impulse P11.If count pulse P12 is from anti-phase defeated
Go out end, i.e. nor gate FO1 outputs, then function is, when SE1 is effective, RE1 is invalid, count pulse P12 is set into 0;SE1 is invalid,
When RE1 is effective, count pulse P12 is set to 1;As SE1 and RE1 invalid, count pulse P12 state is constant;Now count
It is inverted relationship that rapid pulse, which is rushed between P12 and inceptive impulse P11,.
As it can be seen from table 1 because anti-interference threshold value M is nonnegative integer less than N/2, the first set signal SE1 and the
Two set signal RE1 can not possibly effectively simultaneously, and therefore, the output of rest-set flip-flop is not in the uncertain situation of logic state.
The anti-jamming effectiveness schematic diagram of Fig. 7 anti-impulse disturbances circuits when being N=5.If anti-interference threshold value M selections 1, when N positions
When the number of " 1 " is more than or equal to 4 in sequence data X1, SE1 is effective, and count pulse P12 is set into 1;When in N bit sequence data X1
When the number of " 1 " is less than or equal to 1, RE1 is effective, and count pulse P12 is set into 0;When the number of " 1 " in N bit sequence data X1 is big
In 1 and less than 4 when, SE1 and RE1 are invalid, count pulse P12 maintain state it is constant.12 sampling clock arteries and veins are given in Fig. 7
Sampled results of the CLK to inceptive impulse P11 is rushed, and obtained count pulse P12.If in the figure 7 before CLK sampled point 1
It is 0 to sample 5 obtained sequence data X1, and count pulse P12 is 0.In Fig. 7, inceptive impulse P11 CLK sampled point 4 it
After start from 0 become 1, from 0 become 1 during there are 2 edge tremblings, 1st therein positive burst pulse is sampled, sampled point
5 value is 1;2nd positive narrow pulse width is less than the sampling period and between the 5th and the 6th sampled point, does not influence sequence data
X1 sampled result, i.e. sampling process have filtered out the positive narrow pulse interference automatically, and the value of sampled point 6 is 0.In Fig. 7, in clock arteries and veins
Rush CLK sampled point 1 to sampled point 12 sample in obtained N bit sequence data X1, N bit sequence data X1 the number X2 of " 1 " and
Count pulse P12 is shown in Table 2.
The number X2 and count pulse P12 of " 1 " in the sampled point 1-12 of table 2 N bit sequence data X1, X1
The situation of sampled point in table 2 is observed, in sampled point 1-6, X2 is effective less than or equal to 1, RE1, and SE1 is invalid, and P12 is set to
For 0;In sampled point 7-9, X2 is more than 1 and less than 4, and SE1, RE1 are invalid, and P12 is maintained 0;In sampled point 9-12, X2 is more than etc.
Effective in 4, SE1, RE1 is invalid, and P12 is set to 1.Obviously, in continuous 5 sequence datas X1 values, until Fig. 7 sampled point
9, just meet that the number of " 1 " in N bit sequence data X1 is more than or equal to 4 condition, the first set signal SE1 is effective, count pulse
P12 becomes 1 by 0.
The anti-positive pulse interference effect that what Fig. 7 was provided is anti-impulse disturbances circuit when inceptive impulse P11 is 0, Yi Jichu
Initial pulse P11 is changed into 1 condition and process from 0.Anti- negative pulse interference of the anti-impulse disturbances circuit when inceptive impulse P11 is 1
Effect, and inceptive impulse P11 are changed into 0 condition and process from 1, with inceptive impulse P11 be 0 when anti-positive pulse disturb imitate
Fruit, and inceptive impulse P11 be changed into from 01 condition it is identical with process.It is located at clock pulses CLK CLK pairs before of sampled point 31
Inceptive impulse P11 5 sampled values are 1, and count pulse P12 is 1, and sampled point 31 to sampled point 42 samples obtained N positions sequence
The number X2 and count pulse P12 of " 1 " are shown in Table 3 in column data X1, N bit sequence data X1.
The number X2 and count pulse P12 of " 1 " in the sampled point 31-42 of table 3 N bit sequence data X1, X1
The situation of sampled point in table 3 is observed, in sampled point 31-32, X2 is effective more than or equal to 4, SE1, and RE1 is invalid, P12 quilts
It is set to 1;In sampled point 33-38, X1 is more than 1 and less than 4, and SE1, RE1 are invalid, and P12 is maintained 1;In sampled point 39-42, X2
Effective less than or equal to 1, RE1, SE1 is invalid, and P12 is set to 0.
It is described further exemplified by being same phase relation between count pulse P12 and inceptive impulse P11.Work as inceptive impulse
When P11, count pulse P12 are 0, in the sampling of continuous n times, as long as single or multiple positive pulses disturb the sampling knot to be formed
Fruit does not cause the number of " 1 " in N bit sequence data X1 to be more than or equal to N-M, then count pulse P12 will not be changed into 1;Inceptive impulse
When P11, count pulse P12 are 1, in the sampling of continuous n times, as long as single or multiple negative pulses disturb the sampling knot to be formed
Fruit does not cause the number of " 1 " in N bit sequence data X1 to be less than or equal to M, then count pulse P12 will not be changed into 0.When P11, P12 all
For low level when, as long as the positive pulse occurred in P11 makes to have in continuous N number of P11 sampled values more than or equal to N-M when being 1, energy
It is enough that the positive pulse corresponding with positive pulse in the P11 is exported from P12;When P11, P12 are high level, as long as going out in P11
Existing negative pulse makes to have in continuous N number of P11 sampled values less than or equal to M when being 1, can be exported from P12 and negative pulse in the P11
Corresponding negative pulse.When inceptive impulse P11 has been changed into 1 via 0, or after being changed into 0 from 1, count pulse P12 needs to exist
The number of " 1 " is more than or equal to N-M in N bit sequence data X1, or after meeting less than or equal to M conditions, just by count pulse
P12 becomes 1 from 0, or count pulse P12 is become into 0 from 1, there is the delay in several sampling pulse cycles.When anti-interference threshold value M takes
Value it is bigger when, anti-impulse disturbances circuit by count pulse P12 from 0 become 1 and from 1 become 0 condition it is stricter, anti-positive pulse and
The effect of anti-negative pulse interference is more preferable, but count pulse P12 is bigger relative to inceptive impulse P11 time delay;Conversely, M takes
Value becomes hour, and the effect that anti-positive pulse and anti-negative pulse are disturbed diminishes, but count pulse P12 prolonging relative to inceptive impulse P11
The slow time diminishes.When N value becomes big, count pulse P12 is become 1 by anti-impulse disturbances circuit from 0, and becomes 0 condition from 1
Become strict, anti-jamming effectiveness improves, but count pulse P12 becomes big relative to inceptive impulse P11 time delay;When N value
Becoming hour, count pulse P12 is become 1 by anti-impulse disturbances circuit from 0, and is broadened from the condition of 1 change 0, and anti-jamming effectiveness diminishes,
But count pulse P12 diminishes relative to inceptive impulse P11 time delay.
Fig. 8 is ternary output counting circuit embodiment.Fig. 8 (a) is ternary output counting circuit embodiment 1, by counter
FC1 and NOT gate FN1 compositions, FC1 is 8 binary counter 74HC590 with ternary output.FC1 counting allows to hold CCKEN
Input 0, clear 0 control terminal CCLR, which inputs 1, FC1 and is operated in, adds count status.Count pulse P12 is connected directly to FC1 counting arteries and veins
The rising edge that input CCK, FC1 are rushed in count pulse P12 adds 1 counting, obtains break-make count value.Count pulse P12 is through NOT gate
The FC1 data that FN1 are connected to latch end RCK, and the content of internal counter is latching to output lock in count pulse P12 trailing edge
Storage.The output that gate control signal CS1 is connected to FC1 enables control terminal G, and when CS1 is low level, FC1 is by output latch
In break-make count value CV1 from Q7-Q0 export;When CS1 is high level, FC1 Q7-Q0 is high-impedance state.Ternary output counts
The break-make count value that circuit embodiments 1 export is 8 binary count values.
Fig. 8 (b) is ternary output counting circuit embodiment 2, is made up of counter FC2 and three state buffer FB1, FC2 4
Binary counter 74HC161, FB1 are three state buffer 74HC244 for position.FC2 tally control end CTP and CTR, and clear 0
Control terminal CR, put several control terminal LD and be connected to 1, FC2 and be operated in plus count status.Count pulse P12 is connected directly to FC2's
The rising edge of count pulse input CP, FC2 in count pulse P12 adds 1 counting, obtains break-make count value.Three state buffer FB1
4 data input pin A3-A0 be respectively connecting to counter FC2 4 count values output end Q3-Q0, gate control signal CS1
The output for being connected to FB1 enables control terminal 1G, when CS1 is low level, FB1 by the break-make count value CV1 that counter FC2 is exported from
Y3-Y0 is exported;When CS1 is high level, FB1 Y3-Y0 is high-impedance state.Ternary output counting circuit embodiment 2 exports logical
Disconnected count value is 4 binary count values.
During L=4 in tongue tube life detecting device embodiment, 2# break-makes counting unit, 3# break-makes counting unit and 4# lead to
Disconnected counting unit use with 1# break-make counting unit identicals circuit composition and structure, i.e., all include in all break-make counting units
There are pulse-generating circuit, anti-impulse disturbances circuit and ternary output counting circuit;All pulse-generating circuits, anti-impulse disturbances electricity
Road, the composition of ternary output counting circuit and structure all same.
Oscillator unit is used to export sample clock pulse CLK, can select any one of various multivibrators
To form oscillator unit.Inceptive impulse comes from the break-make control output of tongue tube, if controller unit control tongue tube leads to
Disconnected frequency is less than 10Hz, and its pulse high level formed, low level width are close to or greater than 50ms, during tongue tube break-make
Shaking interference is no more than 5ms, it is thereby possible to select sample clock pulse CLK cycle is 5ms or so, N takes in the range of 3 to 8
Value.
Human and machine interface unit preferably uses touch-screen, is communicated using RS485 either RS232 with controller unit.
Human and machine interface unit can also select to be collectively constituted by key circuit and liquid crystal display.
Magnetic control driver element is made up of electromagnet and its drive circuit.1 tongue tube can be used by 1 electromagnet and its
Drive circuit carries out break-make control, and 1 electromagnet and its drive circuit can also be used to carry out break-make to multiple tongue tubes simultaneously
Control, overall realize are controlled the break-make of L tongue tube.Magnetic field caused by electromagnet should be ensured that the tongue tube energy of corresponding control
Enough action messages, whole magnetic control driver element should be ensured that L tongue tube being capable of action message.
The break-make count value of all break-make counting units is exported using Three-State mode;All break-make counting units
Three-State output port is all connected in parallel to the enumeration data input port of controller unit, and controller unit sends gating control
Signal enables the Three-State output port of each break-make counting unit respectively, and the tri-state that is enabled is read in from enumeration data input port
The break-make count value of Buffer output port output.Break-make count value in ternary output counting circuit embodiment 1 is 8 binary systems
Data, the Three-State output port of break-make counting unit, the enumeration data input port of controller unit are 8 parallel-by-bit ends
Mouthful;Break-make count value in ternary output counting circuit embodiment 2 is 4 bit binary datas, and the tri-state of break-make counting unit is delayed
Rush output port, the enumeration data input port of controller unit is 4 parallel-by-bit ports.When L values are small and break-make count value
When digit is few, the break-make count value of break-make counting unit can not use Three-State mode to export, but by each break-make meter
The break-make count value output port of counting unit is connected directly to the different parallel ports of controller unit respectively;For example, L=4 and
When break-make count value is 4 bit binary value, the break-make count value output port of 4 break-make counting units is directly connected to control
The different parallel ports of device unit processed, it is only necessary to consume controller unit totally 16 I/O mouth lines, i.e. 28 input ports.
Controller unit sends gate control signal by gating control cells.Gating control cells are decoder circuit,
The break-make counting unit address coding signal sent to controller unit enters row decoding, obtains gate control signal.Fig. 1 implementation
It is corresponding with 1# break-makes counting unit 11,2# break-makes counting unit 12,3# break-makes counting unit 13,4# break-make counting units in example
Break-make counting unit address coding signal be respectively Binary Zero 0,01,10,11, decoding output be CS1, CS2, CS3, CS4;
Controller unit makes CS1, CS2, CS3, CS4 effective one by one, enables the Three-State output port of each break-make counting unit, then
Corresponding break-make count value is read in from enumeration data input port IN1.The decoder circuit of gating control cells can in embodiment
To select 74HC139, or 74HC138, or using gate circuit composition.When L values are big, decoder circuit can use
Multi-disc 74HC139, or the multi-stage cascade circuit of the composition such as 74HC138, or formed using multiple gate circuits.When L values
Hour, gating control cells can also be omitted, are directly sent from controller unit by output port to each break-make counting unit
Gate control signal, for example, in Fig. 1 embodiment, gate control signal CS1, CS2, CS3, CS4 can be directly by controller lists
Member 10 is sent, without using gating control cells.
Controller unit is used to be controlled whole tongue tube life detecting device, realizes tongue tube life tests side
Method.Controller unit is formed preferably using single-chip microcomputer as core, and the core of controller unit can also select ARM, or
It is DSP, or programmable controller.Tongue tube life detecting method comprises the following steps:
Step 1, initialize, including the detection mark of L tongue tube is set in inspection state, lifetime counter clear 0, the
Once read L break-make count value;
Step 2, control L tongue tube break-make once, while the break-make number of L tongue tube is counted to get respectively
L break-make count value;Lifetime counter is carried out plus 1 counts;
Step 3, read when L secondary break-make count value;
Step 4, detection is masked as one by one judging whether the tongue tube of inspection state fails;This is judged as
The detection mark of failure tongue tube, which is set to, stops inspection state, while the count value of current age counter is judged as this time
The life value of failure tongue tube;
Step 5, still have in the detection mark of L tongue tube in inspection state person, return to step 2, otherwise stop detection.
Control L tongue tube break-make once, referring to that controller unit is sent by magnetic control driver element makes tongue tube switching
Magnetic control signal once.Lifetime counter is a software counter in controller unit, and controller unit, which is sent, makes dry spring
The magnetic control signal of pipe switching once, lifetime counter count value add 1.The break-make number of L tongue tube is counted respectively simultaneously
Number obtains L break-make count value, is carried out respectively by L break-make counting unit outside controller unit.
Whether the tongue tube being masked as to detection in inspection state, which fails, judges, method is that tongue tube to be judged is worked as
Secondary break-make count value is not that then the tongue tube fails, and does not otherwise fail when increasing 1 relation with previous break-make count value;Method or
Be, wait judge tongue tube it is continuous K times when secondary break-make count value and previous break-make count value are not to increase 1 relation, then the dry spring
Tube failure, otherwise do not fail;The K is the integer more than or equal to 2.Break-make count value is led to using circulation plus counting mode
Disconnected count value reaches after the maximum of ternary output counting circuit again plus 1 can overflow and be changed into 0;Implemented with ternary output counting circuit
Exemplified by 4 binary system break-make count values that example 2 exports, its maximum is 1111, meets the break-make count value next time for increasing 1 relation
For 0.That reads works as in time L break-make count value, and whether the tongue tube for being masked as stopping inspection state for detection fails, controller list
Member is no longer judged and handled.
Whether the tongue tube being masked as to detection in inspection state, which fails, judges, can also be with the following method:Wait to sentence
Accumulative W time of trunk snap reed pipe when secondary break-make count value and previous break-make count value are not to increase 1 relation, then tongue tube failure,
Otherwise do not fail;The W is the integer more than or equal to 2.
Whether the tongue tube being masked as to detection in inspection state, which fails, judges, can also be with the following method:Wait to sentence
Trunk snap reed pipe is less than E by the error between the number of control break-make and its break-make count value, then the tongue tube does not fail, otherwise loses
Effect;E is the integer more than or equal to 1 and less than or equal to G/2 (G divided by 2).The count value of current age counter is to wait to judge dry spring
Pipe is by the number of control break-make.Specific determination methods are, if the maximum count value of break-make count value is G, by current age meter
The count value of number device obtains remainder Q to G modulus;The tongue tube break-make count value to be judged read is V, then as | V-Q |<E, or
Person is | V- (Q-G) |<E, either | V- (Q+G) |<When E thrins are met, then the tongue tube does not fail, otherwise loses
Effect.For break-make count value using circulation plus counting mode, the counting that break-make count value reaches ternary output counting circuit is maximum
Add 1 can overflow after value G again and be changed into 0;By taking 4 binary system break-make count values that ternary output counting circuit embodiment 2 exports as an example,
Its maximum is 1111, and break-make count value is 0 next time;It is to offset V by V compared with Q-G in above-mentioned judgment expression
Value adds counting smaller after overflowing and Q value large effects;It is that to offset V values larger and Q values take to G by V compared with Q+G
Minor impact after mould.After error E is determined, the maximum count value G of break-make count value have to be larger than 2 times of E;For example, determine E
For 3, then the maximum count value G of break-make count value have to be larger than 6, now, decimal system BCD counters, or the two of more than 3
System Counter is satisfied by requiring.
Controller unit, human and machine interface unit can realize that NO, NC dutycycle of tongue tube (set adhesive as needed
Time and release time ratio) with showing, the selection of failure judgment mode and failure judge parameter setting and shown, tongue tube for adjustment
Make and break period set with display etc..
To reduce volume, reliability is improved, preferably by L break-make counting unit, oscillator unit, gating control cells
Whole, or partial function uses PAL, GAL, CPLD, FPGA, or other PLDs, logic unit
To realize.
It is the routine techniques that those skilled in the art are grasped in addition to the technical characteristic described in specification.For example, selection
The controller of controller unit, design the peripheral control circuits of correlation and program and realize its function;Selection or design choosing
Logical control unit circuit, meets the requirement of decoding gating;Selection or the multivibrator of design oscillator unit, output meet
It is required that sample clock pulse CLK;Selection or the electromagnet and its drive circuit of design magnetic control driver element, are realized to L
Tongue tube carries out the requirement of break-make control;The composition and circuit structure of human and machine interface unit are selected, is connected with controller unit,
Realize corresponding function;Etc., it is the routine techniques that those skilled in the art are grasped.