CN107819489A - A kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module - Google Patents
A kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module Download PDFInfo
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- CN107819489A CN107819489A CN201711177787.9A CN201711177787A CN107819489A CN 107819489 A CN107819489 A CN 107819489A CN 201711177787 A CN201711177787 A CN 201711177787A CN 107819489 A CN107819489 A CN 107819489A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/7163—Spread spectrum techniques using impulse radio
- H04B1/71635—Transmitter aspects
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/7163—Spread spectrum techniques using impulse radio
- H04B1/7183—Synchronisation
Abstract
The invention discloses a kind of transceiving integrated integration module of ultra wide band high bandwidth RF bidirectional, belong to wireless information transfer technical field, including main control unit, power supply unit, microwave synthesizer unit, rf transmitter unit, rf receiver unit, digital signal processing unit and radio-frequency receiving-transmitting control unit；Main control unit mainly completes the functions such as bus driver, data interaction, signal transacting；Power supply unit provides high stable, low noise power supply；Microwave synthesizer unit, rf transmitter unit, rf receiver unit, digital signal processing unit realize maximum unidirectional 8 × 8 or two-way 4 × 4 radio-frequency receiving-transmitting using microwave frequency synthesis technology, broadband converter technique, signal condition technology, wide-band modulation demodulation techniques, Digital Signal Processing；Radio-frequency receiving-transmitting control unit realizes radio-frequency receiving-transmitting control.The transceiving integrated integration module of RF bidirectional of the present invention is easy of integration, expansible, meets the demand of extensive MIMO radio frequencies multichannel transmitting-receiving.
Description
Technical field
The invention belongs to wireless information transfer technical field, and in particular to a kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way one
Body integration module.
Background technology
With the variation of wireless access, for extensive mimo wireless communication measuring technology frequency coverage increasingly
Greatly, bandwidth and transmission rate request more and more higher, also exponentially rises the difficulty of RF transmit-receive circuit design, has become big
The difficult point of scale MIMO designs.
Radio-frequency receiving-transmitting two-way integral integrated technology is based on the circuit such as be mixed, filter, amplify and decay, with complete
Keep broadband input/output signal to be characterized as ultimate aim without distortion, transmission signal amplitude, skew and phase are adjusted
Technology, be related to high speed transmission of signals matching technique, wideband filtered technology, broadband amplification with decay technique, balancing technique, emphasis
Breakthrough includes the research of High Linear Larger Dynamic range transmitter, the research of low noise Larger Dynamic range receiver, radio-frequency module miniaturization
The key technologies such as research, the research of high stability low phase noise clock frequency synthesis module.With input/output signal frequency
Improve constantly, signal bandwidth increases, it is necessary to pass through the research to RF transmit-receive circuit designing technique, it is ensured that input/output signal
Quality.Therefore, need to realize broadband using new method and means in the design of the RF transmit-receive circuit in wide-band, big broadband
The conditioning of signal and multi-channel synchronous, to meet the requirement of the extensive mimo wireless communication test of high quality.
Current multi-channel rf transmitting-receiving bidirectional Module implementations are broadly divided into discrete scheme and Integrated Solution.It is wherein integrated
Scheme is mainly such as AD9361 and AD9371 chips provided using main flow company, and chip internal is integrated with high-speed data and connect
Mouth, transmitting-receiving local oscillator combiner circuit, carrier modulation demodulator circuit, amplification attenuator circuit etc..There is great advantage in terms of volume, refer to
Mark can also meet many application scenarios.But its effective signal bandwidth is partially narrow, is limited to oversampling clock rate and data processing
Speed, these integrated chips effective bandwidth under the double receipts states of double hairs only has original half, and SINC roll-off characteristics are very
Substantially, the Frequency Response of signal is greatly affected, and signal quality can be had a strong impact in broadband application.In addition in minimum body
Product is integrated with multiple functions, and the leakage of its radio frequency, spuious etc. can influence on signal index.The register control of up to more than thousand
System trouble, not providing the package interface of standard can call.It is unfavorable for debugging test and actual control and uses.Discrete scheme
Mainly with single radiofrequency emitting module and single Receiver Module and independent switch module etc. build completely
The two-way requirement of sufficient radio-frequency receiving-transmitting.Volume is larger, control inconvenience, and consistency synchronization is bad.
Integrated Solution has that effective signal bandwidth is partially narrow, SINC roll effects are obvious in prior art, influences broadband
Signal index characteristic, covering frequence scope is less than normal, and population parameter serial ports control mode calls inconvenience；Discrete solution integration degree is inadequate,
Volume is bigger than normal, control inconvenience, and consistency synchronization is bad.
The content of the invention
For above-mentioned technical problem present in prior art, the present invention proposes a kind of ultra wide band high bandwidth radio-frequency receiving-transmitting
Two-way integral integration module, it is reasonable in design, the deficiencies in the prior art are overcome, there is good effect.
To achieve these goals, the present invention adopts the following technical scheme that：
A kind of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module, including main control unit, power supply unit, microwave
Frequency synthesis unit, rf receiver unit, rf transmitter unit, digital signal processing unit and 8 road radio-frequency receiving-transmitting controls are single
Member；
Main control unit, it is configurable for bus driver, data interaction, signal transacting；
Power supply unit, it is configurable for providing power supply for main control unit and microwave synthesizer unit；
Microwave synthesizer unit, including clock reference unit, microwave receiving frequency synthesis unit and Microwave emission frequency
Synthesis unit；
Clock reference unit, it is configurable for realizing in clock that External Reference switches；
Microwave receiving frequency synthesis unit, including high-speed ADC sampling clock synthesis unit, reception frequency conversion local oscillator synthesis unit
Local oscillator synthesis unit is demodulated with receiving；
High-speed ADC sampling clock synthesis unit, including the 8th integrated PLL chips, the 8th integrated VCO chip and the 4th low pass
Wave filter；The reference clock of clock reference unit is output to the 8th integrated PLL chips, and the 8th integrated PLL chip drives the 8th collect
Into VCO chips output radiofrequency signal high-speed ADC sampled clock signal is produced by the 4th low pass filter；
Frequency conversion local oscillator synthesis unit is received, including receives up-conversion local oscillator combiner circuit and receives down coversion local oscillator synthesis electricity
Road；
Receive up-conversion local oscillator combiner circuit, including the first integrated PLL chips, the first integrated VCO chip and the 6th band
Bandpass filter；The reference clock of clock reference unit is output to the first integrated PLL chips, the first integrated PLL chip drives first
Integrated VCO chip output radiofrequency signal produces up-conversion local oscillation signal by the 6th low pass filter；
Receive down coversion local oscillator combiner circuit, including the second integrated PLL chips, the second integrated VCO chip and the 7th band
Bandpass filter；The reference clock of clock reference unit is output to the second integrated PLL chips, the second integrated PLL chip drives second
Integrated VCO chip output radiofrequency signal produces down coversion local oscillation signal by the 7th bandpass filter；
Receive solution and be mixed into local oscillator unit, including the 3rd integrated PLL chips, the 3rd integrated VCO chip and the 8th band logical
Wave filter；The reference clock of clock reference unit is output to the 3rd integrated PLL chips, and the 3rd integrated PLL chip drives the 3rd collect
Produced into VCO chips output radiofrequency signal and receive demodulation local oscillation signal；
Microwave emission frequency synthesis unit, including high-speed DAC sampling clock synthesis unit, transmitting frequency conversion local oscillator synthesis unit
Local oscillator synthesis unit is modulated with transmitting；
High-speed DAC sampling clock synthesis unit, including the 4th integrated PLL chips, the 4th integrated VCO chip and the first low pass
Wave filter；The reference clock of clock reference unit is output to the 4th integrated PLL chips, and the 4th integrated PLL chip drives the 4th collect
Into VCO chips output radiofrequency signal high-speed DAC sampled clock signal is produced by the first bandpass filter；
Transmitting modulation local oscillator synthesis unit, including the 5th integrated PLL chips, the 5th integrated VCO chip and the filter of the 9th band logical
Ripple device；The reference clock of clock reference unit is output to the 5th integrated PLL chips, and the 5th integrated PLL chip drives the 5th are integrated
VCO chips output radiofrequency signal produces transmitting modulation local oscillation signal by the 9th bandpass filter；
Launch frequency conversion local oscillator synthesis unit, including transmitting down coversion local oscillation circuit and transmitting up-conversion local oscillation circuit；
Launch down coversion local oscillation circuit, including the 6th integrated PLL chips, the 6th integrated VCO chip and the filter of the 13rd band logical
Ripple device；The reference clock of clock reference unit is output to the 6th integrated PLL chips, and the 6th integrated PLL chip drives the 6th are integrated
VCO chips output radiofrequency signal produces transmitting down coversion local oscillation signal by the 13rd bandpass filter；
Launch up-conversion local oscillation circuit, including the 7th integrated PLL chips, the 7th integrated VCO chip and the filter of the 14th band logical
Ripple device；The reference clock of clock reference unit is output to the 7th integrated PLL chips, and the 7th integrated PLL chip drives the 7th are integrated
VCO chips output radiofrequency signal produces transmitting up-conversion local oscillation signal by the 14th bandpass filter；
Rf transmitter unit, including transmitting frequency conversion conditioning unit and transmitting modulating unit；
Launch modulating unit, including two-way DAC chip, the second low pass filter, the 3rd low pass filter, the first amplitude are adjusted
Manage circuit, the second amplitude modulate circuit and the second quadrature modulator；
The data signal of reception is converted to analog baseband signal by transmitting modulating unit by high speed two-way DAC chip, is adopted
Sample clock is produced by the high-speed DAC sampling clock synthesis unit in microwave synthesizer unit, is turned by high speed two-way DAC chip
The analog baseband signal changed passes through the second low pass filter, the 3rd low pass filter, the first amplitude modulate circuit and the second amplitude
Modulate circuit is output to the second quadrature modulator, and with transmitting modulation local oscillator synthesis unit caused by orthogonal modulation local oscillator synthesize production
Raw 400MHz~6GHz carrier (boc) modulated signals；
Launch frequency conversion conditioning unit, including the 4th RF switch, the tenth bandpass filter, the 11st bandpass filter, the
Ten two band-pass filters, the first frequency mixer, the second frequency mixer, the 3rd amplitude modulate circuit, the 5th RF switch and the 6th radio frequency
Switch；
Intermediate-freuqncy signal is output to the 4th RF switch, needs selection output channel according to reference frequency output；The first via
Low frequency down coversion passage, when output signal frequency is 30MHz~400MHz, signal passes through the tenth bandpass filter and microwave frequency
Down coversion local oscillator frequency variation signal caused by subelement transmitting frequency conversion local oscillator synthesis unit in synthesis unit, passes through the first frequency mixer
30MHz~400MHz carrier (boc) modulated signals are produced, the 5th RF switch is being output to after the 3rd amplitude modulate circuit；
Second road put-through channel, when output signal frequency is 400MHz~6GHz, signal passes through the 11st bandpass filter
The 5th RF switch is output to the 3rd amplitude modulate circuit；
3rd road high frequency up-conversion passage, when output signal frequency is 6GHz~20GHz, signal is filtered by the 12nd band logical
Subelement after ripple device with microwave synthesizer unit launches up-conversion local oscillator frequency variation signal caused by frequency conversion local oscillator synthesis unit
Output 6GHz~20GHz signal outputs are mixed to the 5th RF switch by the second frequency mixer；
Finally, signal realizes that final ultra-broadband signal exports by the 6th RF switch, makes using I/O ports as output
Used time, the port are output to the first RF switch and by I/O ports final output from the 6th RF switch；
Rf receiver unit, including receive frequency conversion conditioning unit and receive demodulating unit；
Receive frequency conversion conditioning unit, including the first RF switch, the second RF switch, the first bandpass filter, the second band
Bandpass filter, the first controllable-gain circuit, the second controllable-gain circuit, up-conversion mixer, down-conversion mixer, the 3rd band logical
Wave filter, the 4th bandpass filter and the 5th bandpass filter；
Frequency conversion conditioning unit is received to lead to the radiofrequency signal received by the switching input and output of the first RF switch first
Road is input channel, is selected further according to input radio frequency signal frequency situation by the second RF switch, first via low frequency up-conversion
Passage, incoming frequency gate when being 30MHz~400MHz, are handled by the first bandpass filter and the first controllable-gain circuit
Afterwards, the up-conversion local oscillation signal for being 2030MHz~2400MHz with receiving frequency caused by frequency conversion local oscillator synthesis unit, in process
2GHz carrier (boc) modulated signals are produced after conversion mixer mixing, reception demodulating unit is output to by the 4th bandpass filter；The
Two road put-through channels, reception demodulating unit is output to through the 3rd bandpass filter that overfrequency is 400MHz~6GHz；3rd tunnel
High frequency down coversion passage, incoming frequency gate when being 6GHz~20GHz, by the second bandpass filter and the second controllable gain electricity
After the processing of road, the down coversion local oscillation signal for being 10GHz~20GHz with receiving frequency caused by frequency conversion local oscillator synthesis unit, pass through
The carrier (boc) modulated signals that frequency range is 400MHz~6GHz are produced after down-conversion mixer mixing, by the 5th bandpass filter
It is output to reception demodulating unit；
Receive demodulating unit, including the 3rd RF switch, the first quadrature demodulator and two-way ADC chips；
Receive what the intermediate-freuqncy signal that demodulating unit exports the 3rd RF switch exported with receiving demodulation local oscillator synthesis unit
Local oscillation signal is demodulated by the first quadrature demodulator produces analog differential baseband signal, and is carried out by two-way ADC chips
High speed analog-to-digital conversion produces digital baseband signal；
Digital signal processing unit, is divided into digital signal acquiring processing unit and processing unit occurs for data signal；
Digital signal acquiring processing unit, it is configurable for difference quadrature baseband signal caused by rf receiver unit
Extracted, parse including Digital Signal Processing；
Processing unit occurs for data signal, is configurable for being carried out according to the modulation of main control unit, frequency, bandwidth parameter
Configuration produces the numeric field difference quadrature baseband signal for meeting transmitting modulation module requirement；
Radio-frequency receiving-transmitting control unit, including FPGA and multichannel Automatic level control drive circuit；It is configurable for believing multichannel
Number transmitting-receiving is configured, and is realized including unidirectional, two-way, the different amplitude of multichannel, frequency, signal bandwidth, signaling mode
Parameter is configured；
When carrying out signal reception, radio-frequency receiving-transmitting control unit control selected input number of signals and path and amplitude ginseng
Number, and signal frequency conversion path selection is carried out according to input signal frequency range, and be transferred to and receive frequency conversion conditioning unit, receive and become
Input signal conditioning to quadrature demodulator radio frequency signal frequency scope, and is transferred to radio demodulating unit by frequency conditioning unit, institute
State radio demodulating unit and carrier (boc) modulated signals are demodulated into digital orthogonal baseband signal, then by High Performance ADC by analog baseband signal
It is sampled as digital baseband signal and is output to digital signal processing unit；
When carrying out signal transmitting, radio-frequency receiving-transmitting control unit control selected input number of signals and path and amplitude ginseng
Number, by base band signal transmission caused by digital signal processing unit to transmitting modulating unit, transmitting modulating unit is to baseband signal
Carry out local oscillator modulation to produce radio-frequency carrier modulated signal and be output to transmitting frequency conversion conditioning unit, transmitting frequency conversion conditioning unit is to letter
Frequency conversion covering 30MHz~20GHz frequency range number is carried out, and signal condition is carried out, realizes signal output.
Preferably, main control unit and microwave synthesizer unit, rf transmitter unit, rf receiver unit, data signal
Data and address interconnection, high-speed DAC, ADC and FPGA are carried out using pci bus between processing unit, radio-frequency receiving-transmitting control unit
Realized and interconnected using high-speed-differential LVDS interface.
Preferably, clock reference unit produces the homologous clock signal in 12 tunnels using ADCLK954 clock buffers driver.
Preferably, high-speed ADC sampling clock synthesis unit uses the working method of Variable sampling clock, ensures that work clock is
Real data handles 2 index multiple proportion of clock, when producing 1GHz samplings using ADF4355 PLL frequency synthesizers
Clock, analog signal sampling is carried out using ADS5400 high speed analog-to-digital conversions chip.
Preferably, frequency conversion local oscillator synthesis unit and transmitting frequency conversion local oscillator synthesis unit are received using ADF4355 phaselocked loops frequency
Rate synthesis chip synthesizes 2030MHz~2400MHz low frequency local oscillation signals, using PLL chips HMC702LP6CE and integrated VCO core
Piece HMC733LC4B and two divided-frequency chip UXM15P forms phase-locked loop circuit and produces 10GHz~20GHz high-frequency local oscillation signals.
Preferably, receive demodulation local oscillator synthesis unit and transmitting modulation local oscillator synthesis unit uses ADF4355 phaselocked loops
Frequency synthesis chip.
Preferably, high-speed DAC sampling clock synthesis unit uses ADF4355 PLL frequency synthesizers and difference
1.2GHz reconfigurable filters produce high speed sampling clock, and digital-to-analogue conversion is carried out using AD9736 high-speed digital-analogs conversion chip.
Preferably, receive frequency conversion conditioning unit and use ADL5380 differential orthogonal demodulation devices, transmitting frequency conversion conditioning unit uses
ADL5375 differential orthogonal modulation devices, the low frequency mixting circuit for receiving frequency conversion conditioning unit and transmitting frequency conversion conditioning unit use
HMC213AMS8E frequency mixers, high frequency mixting circuit use HMC773LC3B frequency mixers.
Preferably, digital signal processing unit uses High Performance FPGA XC7K325T-2FFG900I and storage chip
PC28F00AP30TF carries out high-speed digital video camera.
Preferably, radio-frequency receiving-transmitting control unit uses fpga chip XC6SLX100-2FGG484I and storage chip
XCF32PVOG48I。
Advantageous effects caused by the present invention：
(1) modularized design, single module support maximum 8 × 8 unidirectionally transmitting-receiving and maximum 4 × 4 bidirectional transmit-receives, and can be with
Multiple modules build more massive radio-frequency receiving-transmitting two-way modules and meet application demand jointly；
(2) there is synchronic base and with frequency characteristic, beneficial to realizing Synchronization Control between multichannel；
(3) sampling clock is high, and signal RF bandwidth reaches 200MHz, and can carry out signal bandwidth extension, can meet
Higher signal bandwidth demand, frequency response is preferable in signal band；
(4) frequency coverage is wide, and signal transmitting and receiving function is realized in 30MHz~20GHz frequency ranges；
(5) dynamic range of signals is big, input range scope+15dBm~-40dBm, and output amplitude scope -20dBm~-
110dBm meets different testing requirements.
Brief description of the drawings
Fig. 1 is the theory diagram of ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module.
Fig. 2 is the schematic diagram of RF bidirectional transmission circuit (4 × 4).
Fig. 3 is the theory diagram of microwave synthesizer unit.
Fig. 4 is rf transmitter unit, rf receiver unit, the theory diagram of digital signal processing unit.
Fig. 5 is the theory diagram of radio-frequency receiving-transmitting control unit.
Wherein, 1- main control units；2- power supply units；3- microwave synthesizer units；It is single that 302- receives the synthesis of frequency conversion local oscillator
Member；The PLL frequency synthesizers of 3021- first；3022- the first integrated VCO chips；The bandpass filters of 3023- the 6th；3025-
Second PLL frequency synthesizer；3026- the second integrated VCO chips；The bandpass filters of 3027- the 7th；303- receives demodulation
Synthesize local oscillator unit；The PLL frequency synthesizers of 3031- the 3rd；The integrated VCO chips of 3032- the 3rd；The band logicals of 3033- the 8th are filtered
Ripple device；304- high-speed ADC sampling clock synthesis units；The PLL frequency synthesizers of 3041- the 8th；The integrated VCOs of 3042- the 8th
Chip；The low pass filters of 3043- tetra-；312- launches frequency conversion local oscillator synthesis unit；The phase-locked loop frequencies of 3121- the 7th synthesize core
Piece；The integrated VCO chips of 3122- the 7th；The bandpass filters of 3123- the 14th；The PLL frequency synthesizers of 3125- the 6th；
The integrated VCO chips of 3126- the 6th；The bandpass filters of 3127- the 13rd；313- transmitting modulation local oscillator synthesis units；3131- the 5th
PLL frequency synthesizer；The integrated VCO chips of 3132- the 5th；The bandpass filters of 3133- the 9th；When 314- high-speed DACs sample
Clock synthesis unit；The PLL frequency synthesizers of 3141- the 4th；The integrated VCO chips of 3142- the 4th；The LPFs of 3143- first
Device；4- rf receiver units；40- receives frequency conversion conditioning unit；The RF switches of 4011- first；The RF switches of 4012- second；
The bandpass filters of 4013- first；The bandpass filters of 4014- second；The controllable-gain circuits of 4015- first；The second controllable increasings of 4016-
Beneficial circuit；4017- up-conversion mixers；4018- down-conversion mixers；The bandpass filters of 4019- the 3rd；The band logicals of 4020- the 4th
Wave filter；The bandpass filters of 4021- the 5th；41- receives demodulating unit；The RF switches of 4111- the 3rd；The first orthogonal solutions of 4112-
Adjust device；4113- two-way ADC chips；5- rf transmitter units；The RF switches of 5011- the 6th；The RF switches of 5012- the 5th；
The amplitude modulate circuits of 5013- the 3rd；The frequency mixers of 5014- first；The frequency mixers of 5015- second；The bandpass filters of 5016- the tenth；
The bandpass filters of 5017- the 11st；The two band-pass filters of 5018- the tenth；The RF switches of 5019- the 4th；51- transmitting modulation is single
Member；The quadrature modulators of 5111- second；5112- the first amplitude modulate circuits；5113- the second amplitude modulate circuits；5114- second
Low pass filter；The low pass filters of 5115- the 3rd；5117- two-way DAC chips；6- digital signal processing units；7- radio-frequency receiving-transmittings
Control unit；
Embodiment
Below in conjunction with the accompanying drawings and embodiment is described in further detail to the present invention：
Embodiment 1：
As shown in figure 1, ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module, including main control unit 1, power supply list
Member 2, microwave synthesizer unit 3 (8 tunnel), rf receiver unit 4 (8 tunnel), rf transmitter unit 5 (8 tunnel), Digital Signal Processing
Unit 6 (8 tunnel) and radio-frequency receiving-transmitting control unit 7.
Main control unit 1, using COMe9600-175F-S4-X main control modules, including PCIe, SATA, USB, POWER,
The control interfaces such as Audio, Video, complete to show driving, power management, audio driven, video drive, PCIe bus drivers etc.
Control, data interaction, signal transacting are realized by PCIe buses, SATA.
When the radio-frequency receiving-transmitting two-way integral integration module works, main control unit 1 carries out model selection first, such as unidirectional/
The parameters such as the two-way, input radio frequency port/selection of output prevention at radio-frequency port, TDD/FDD model selections.
When radio-frequency receiving-transmitting two-way integral integration module is operated in reception state, radio-frequency receiving-transmitting control unit 7 is joined to items
Number is configured, and gating control is carried out to frequency range.As shown in Figure 5.
Reception frequency conversion conditioning unit 40 in rf receiver unit 4, the radiofrequency signal received is penetrated by first first
Frequency switch 4011 (HMC547LP3E) switching I/O channels are input channel, are led to further according to input radio frequency signal frequency situation
Cross the selection of the second RF switch 4012 (HMC641LP4E)；
First via low frequency up-conversion passage, incoming frequency gates when being 30MHz~400MHz, by the first bandpass filter
4013 and first controllable-gain circuit 4015 handle after, with receive frequency conversion local oscillator synthesis unit 302 caused by frequency be 2030MHz
~2400MHz up-conversion local oscillation signal, 2GHz carrier waves are produced after up-conversion mixer 4017 (HMC213AMS8E) mixing
Modulated signal, the 3rd RF switch 4111 (HMC641LP4E) is output to by the 3rd bandpass filter 4019；Wherein, receive and become
The up-conversion local oscillator combiner circuit of frequency local oscillator synthesis unit 302, including the first PLL frequency synthesizer 3021
(HMC702LP6CE (DC~14GHz)), the first integrated VCO chip 3022 (HMC733LC3B) and the 6th bandpass filter
3023, radio frequency/local oscillator frequency range is 1.5GHz~4.5GHz, and intermediate frequency output is DC~1.5GHz, and intermediate frequency port is as defeated when using
Enter, prevention at radio-frequency port is as output.
Second road put-through channel, it is output to the 3rd through the 4th bandpass filter 4020 that overfrequency is 400MHz~6GHz and penetrates
4111 (HMC641LP4E) of frequency switch.
3rd road high frequency down coversion passage, incoming frequency gates when being 6GHz~20GHz, by the second bandpass filter
4014 and second controllable-gain circuit 4016 handle after, with receive frequency conversion local oscillator synthesis unit 302 caused by frequency be 10GHz~
20GHz down coversion local oscillation signal, generation frequency range is after down-conversion mixer 4018 (HMC773LC3B) mixing
400MHz~6GHz carrier (boc) modulated signals, the 3rd RF switch 4111 is output to by the 5th bandpass filter 4021
(HMC641LP4E)；Wherein, the down coversion local oscillator combiner circuit of frequency conversion local oscillator synthesis unit 302, including the second phaselocked loop are received
Frequency synthesis chip 3025 (ADF4355), the second integrated VCO chip 3026 (HMC833LP6GE) and centre frequency are 2GHz
The 7th bandpass filter 3027, radio frequency/local oscillator frequency range is 6GHz~26GHz, and intermediate frequency output is DC~8GHz.
Reception demodulating unit 41 in rf receiver unit 4, by the output of the 3rd RF switch 4111 (HMC641LP4E)
Intermediate-freuqncy signal passes through the first quadrature demodulator 4112 with receiving the local oscillation signal of the output of demodulation local oscillator synthesis unit 303
(ADL5380) it is demodulated and produces analog differential baseband signal, and is carried out at a high speed by two-way ADC chips 4113 (ADS5402)
Analog-to-digital conversion produces digital baseband signal；Wherein, reception solution, which is mixed into local oscillator unit 303, includes phaselocked loop synthesis chip 3031
(ADF4355), the 3rd integrated VCO chip 3032 (HMC833LP6GE), the 7th bandpass filter 3033.
The digital quadrature baseband signal of collection such as is extracted, filtered, being parsed at the data signal by digital signal processing unit 6
Result is interacted into output result with main control unit 1 after processing, as shown in Figure 3, Figure 4.
When radio-frequency receiving-transmitting two-way integral integration module is operated in emission state, radio-frequency receiving-transmitting control unit 7 is joined to items
Number is configured, and carries out gating control to frequency range, as shown in Figure 5.
Digital signal processing unit 6 requires to produce digital differential digital orthogonal baseband signal according to the parameter configuration of main control unit 1.
Transmitting modulating unit 51 in rf transmitter unit 5 is by high speed two-way DAC chip 5117 (AD9783) by numeral
Signal is converted to analog baseband signal, and sampling clock is by the high-speed DAC sampling clock synthesis unit in microwave synthesizer unit 3
314 produce, and it includes the 4th PLL frequency synthesizer 3141 (ADF4355), the 4th integrated VCO chip 3142
And the first low pass filter 3143 (HMC833LP6GE).
The analog baseband signal changed by high speed two-way DAC chip 5117 (AD9783) passes through the first low pass filter
5114th, the second low pass filter 5115, the first amplitude modulate circuit 5112 and the second amplitude modulate circuit 5113 are output to second
Quadrature modulator 5111, and modulate orthogonal modulation caused by local oscillator synthesis unit 313 with the transmitting in microwave synthesizer unit 3
Synthetically produced 400MHz~6GHz the carrier (boc) modulated signals of local oscillator；Wherein, transmitting modulation synthesis local oscillator unit 313 includes the 5th lock phase
Ring frequency synthesis chip 3131, the 5th integrated VCO chip 3132 and the 9th bandpass filter 3133.
Intermediate-freuqncy signal is output to the 4th RF switch 5019 (HMC641LP4E), needs to select according to reference frequency output
Output channel.First via low frequency down coversion passage, when output signal frequency is 30MHz~400MHz, signal passes through the tenth band logical
Wave filter 5016 and down coversion sheet caused by the subelement transmitting frequency conversion local oscillator synthesis unit 312 in microwave synthesizer unit 3
Shake frequency variation signal, produces 30MHz~400MHz carrier (boc) modulated signals by the first frequency mixer 5014 (HMC213AMS8E), is passing through
The 5th RF switch 5012 (HMC641LP4E) is output to after crossing the 3rd amplitude modulate circuit 5013；Wherein, frequency conversion local oscillator is launched
The down coversion local oscillation circuit of synthesis unit 312 integrates including the 6th PLL frequency synthesizer 3125 (ADF4355), the 6th
VCO chips 3126 (HMC833LP6GE) and the 13rd bandpass filter 3127.
Second road put-through channel, when output signal frequency is 400MHz~6GHz, signal passes through the 11st bandpass filter
5017 and the 3rd amplitude modulate circuit 5013 be output to the 5th RF switch 5012 (HMC641LP4E).
3rd road high frequency up-conversion passage, when output signal frequency is 6GHz~20GHz, signal is filtered by the 12nd band logical
Subelement after ripple device 5018 with microwave synthesizer unit 3 launches up-conversion local oscillator caused by frequency conversion local oscillator synthesis unit 312
Frequency variation signal is mixed output 6GHz~20GHz signal outputs by the second frequency mixer 5015 (HMC773LC3B) and opened to the 5th radio frequency
Close 5012 (HMC641LP4E)；Wherein, the up-conversion local oscillation circuit for launching frequency conversion local oscillator synthesis unit 312 includes the 7th phaselocked loop
Frequency synthesis chip 3121 (HMC702LP6CE (DC~14GHz), the 7th integrated VCO chip 3122 (HMC733LC3B) and the tenth
Four bandpass filters 3123.
Finally, signal realizes that final ultra-broadband signal exports by the 6th RF switch 5011 (HMC547LP3E), in handle
I/O ports are as output in use, the port is output to the first RF switch from the 6th RF switch 5011 (HMC547LP3E)
4011 (HMC547LP3E) and by I/O ports final output, as shown in Figure 3, Figure 4.
Certainly, described above is not limitation of the present invention, and the present invention is also not limited to the example above, this technology neck
The variations, modifications, additions or substitutions that the technical staff in domain is made in the essential scope of the present invention, it should also belong to the present invention's
Protection domain.
Claims (10)
- A kind of 1. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module, it is characterised in that：Including main control unit, power supply Unit, microwave synthesizer unit, rf receiver unit, rf transmitter unit, digital signal processing unit and 8 road radio frequencies are received Send out control unit；Main control unit, it is configurable for realizing data interaction and processing；Power supply unit, it is configurable for providing power supply for main control unit and microwave synthesizer unit；Microwave synthesizer unit, including clock reference unit, microwave receiving frequency synthesis unit and Microwave emission frequency synthesis Unit；Clock reference unit, it is configurable for realizing in clock that External Reference switches, reference clock synthesis；Microwave receiving frequency synthesis unit, including high-speed ADC sampling clock synthesis unit, receive and frequency conversion local oscillator synthesis unit and connect Receive demodulation local oscillator synthesis unit；High-speed ADC sampling clock synthesis unit, including the 8th integrated PLL chips, the 8th integrated VCO chip and the 4th LPF Device；The reference clock of clock reference unit is output to the 8th integrated PLL chips, the 8th integrated integrated VCO of PLL chip drives the 8th Chip output radiofrequency signal produces high-speed ADC sampled clock signal by the 4th low pass filter；Frequency conversion local oscillator synthesis unit is received, including receives up-conversion local oscillator combiner circuit and receives down coversion local oscillator combiner circuit；Receive up-conversion local oscillator combiner circuit, including the first integrated PLL chips, the first integrated VCO chip and the filter of the 6th band logical Ripple device；The reference clock of clock reference unit is output to the first integrated PLL chips, and the first integrated PLL chip drives first are integrated VCO chips output radiofrequency signal produces up-conversion local oscillation signal by the 6th low pass filter；Receive down coversion local oscillator combiner circuit, including the second integrated PLL chips, the second integrated VCO chip and the filter of the 7th band logical Ripple device；The reference clock of clock reference unit is output to the second integrated PLL chips, and the second integrated PLL chip drives second are integrated VCO chips output radiofrequency signal produces down coversion local oscillation signal by the 7th bandpass filter；Receive solution and be mixed into local oscillator unit, including the 3rd integrated PLL chips, the 3rd integrated VCO chip and the 8th bandpass filtering Device；The reference clock of clock reference unit is output to the 3rd integrated PLL chips, the 3rd integrated integrated VCO of PLL chip drives the 3rd Chip output radiofrequency signal produces by the 8th bandpass filter receives demodulation local oscillation signal；Microwave emission frequency synthesis unit, including high-speed DAC sampling clock synthesis unit, transmitting frequency conversion local oscillator synthesis unit and hair Penetrate modulation local oscillator synthesis unit；High-speed DAC sampling clock synthesis unit, including the 4th integrated PLL chips, the 4th integrated VCO chip and the first LPF Device；The reference clock of clock reference unit is output to the 4th integrated PLL chips, the 4th integrated integrated VCO of PLL chip drives the 4th Chip output radiofrequency signal produces high-speed DAC sampled clock signal by the first bandpass filter；Transmitting modulation local oscillator synthesis unit, including the 5th integrated PLL chips, the 5th integrated VCO chip and the 9th bandpass filter； The reference clock of clock reference unit is output to the 5th integrated PLL chips, the 5th integrated integrated VCO core of PLL chip drives the 5th Piece output radiofrequency signal produces transmitting modulation local oscillation signal by the 9th bandpass filter；Launch frequency conversion local oscillator synthesis unit, including transmitting down coversion local oscillation circuit and transmitting up-conversion local oscillation circuit；Launch down coversion local oscillation circuit, including the 6th integrated PLL chips, the 6th integrated VCO chip and the 13rd bandpass filter； The reference clock of clock reference unit is output to the 6th integrated PLL chips, the 6th integrated integrated VCO core of PLL chip drives the 6th Piece output radiofrequency signal produces transmitting down coversion local oscillation signal by the 13rd bandpass filter；Launch up-conversion local oscillation circuit, including the 7th integrated PLL chips, the 7th integrated VCO chip and the 14th bandpass filter； The reference clock of clock reference unit is output to the 7th integrated PLL chips, the 7th integrated integrated VCO core of PLL chip drives the 7th Piece output radiofrequency signal produces transmitting up-conversion local oscillation signal by the 14th bandpass filter；Rf transmitter unit, including transmitting frequency conversion conditioning unit and transmitting modulating unit；Launch modulating unit, including two-way DAC chip, the second low pass filter, the 3rd low pass filter, the first amplitude conditioning electricity Road, the second amplitude modulate circuit and the second quadrature modulator；The data signal of reception is converted to analog baseband signal by transmitting modulating unit by high speed two-way DAC chip, during sampling Clock is produced by the high-speed DAC sampling clock synthesis unit in microwave synthesizer unit, is changed by high speed two-way DAC chip Analog baseband signal is nursed one's health by the second low pass filter, the 3rd low pass filter, the first amplitude modulate circuit and the second amplitude Circuit output to the second quadrature modulator, and with transmitting modulation local oscillator synthesis unit caused by orthogonal modulation local oscillator it is synthetically produced 400MHz~6GHz carrier (boc) modulated signals；Launch frequency conversion conditioning unit, including the 4th RF switch, the tenth bandpass filter, the 11st bandpass filter, the 12nd Bandpass filter, the first frequency mixer, the second frequency mixer, the 3rd amplitude modulate circuit, the 5th RF switch and the 6th RF switch；Intermediate-freuqncy signal is output to the 4th RF switch, needs selection output channel according to reference frequency output；First via low frequency Down coversion passage, when output signal frequency is 30MHz~400MHz, signal passes through the tenth bandpass filter and microwave synthesizer Down coversion local oscillator frequency variation signal caused by subelement transmitting frequency conversion local oscillator synthesis unit in unit, is produced by the first frequency mixer 30MHz~400MHz carrier (boc) modulated signals, the 5th RF switch is being output to after the 3rd amplitude modulate circuit；Second road put-through channel, when output signal frequency is 400MHz~6GHz, signal is by the 11st bandpass filter and the Three amplitude modulate circuits are output to the 5th RF switch；3rd road high frequency up-conversion passage, when output signal frequency is 6GHz~20GHz, signal passes through the tenth two band-pass filter Up-conversion local oscillator frequency variation signal caused by launching frequency conversion local oscillator synthesis unit with the subelement of microwave synthesizer unit afterwards passes through The mixing of second frequency mixer exports 6GHz~20GHz signal outputs to the 5th RF switch；Finally, signal realizes that final ultra-broadband signal exports by the 6th RF switch, is used using I/O ports as output When, the port is output to the first RF switch and by I/O ports final output from the 6th RF switch；Rf receiver unit, including receive frequency conversion conditioning unit and receive demodulating unit；Receive frequency conversion conditioning unit, including the filter of the first RF switch, the second RF switch, the first bandpass filter, the second band logical Ripple device, the first controllable-gain circuit, the second controllable-gain circuit, up-conversion mixer, down-conversion mixer, the 3rd bandpass filtering Device, the 4th bandpass filter and the 5th bandpass filter；Receive frequency conversion conditioning unit is by the first RF switch switching I/O channel first by the radiofrequency signal received Input channel, selected further according to input radio frequency signal frequency situation by the second RF switch, first via low frequency up-conversion passage, Incoming frequency gates when being 30MHz~400MHz, after the first bandpass filter and the processing of the first controllable-gain circuit, with connecing The up-conversion local oscillation signal that frequency caused by frequency conversion local oscillator synthesis unit is 2030MHz~2400MHz is received, is mixed by up-conversion 2GHz carrier (boc) modulated signals are produced after device mixing, reception demodulating unit is output to by the 4th bandpass filter；Second tunnel is led directly to Passage, reception demodulating unit is output to through the 3rd bandpass filter that overfrequency is 400MHz~6GHz；Become under 3rd road high frequency Frequency passage, incoming frequency gate when being 6GHz~20GHz, are handled by the second bandpass filter and the second controllable-gain circuit Afterwards, the down coversion local oscillation signal for being 10GHz~20GHz with receiving frequency caused by frequency conversion local oscillator synthesis unit, by down coversion The carrier (boc) modulated signals that frequency range is 400MHz~6GHz are produced after frequency mixer mixing, are output to by the 5th bandpass filter Receive demodulating unit；Receive demodulating unit, including the 3rd RF switch, the first quadrature demodulator and two-way ADC chips；Receive the local oscillator that the intermediate-freuqncy signal that demodulating unit exports the 3rd RF switch exports with receiving demodulation local oscillator synthesis unit Signal is demodulated by the first quadrature demodulator produces analog differential baseband signal, and is carried out at a high speed by two-way ADC chips Analog-to-digital conversion produces digital baseband signal；Digital signal processing unit, is divided into digital signal acquiring processing unit and processing unit occurs for data signal；Digital signal acquiring processing unit, it is configurable for carrying out difference quadrature baseband signal caused by rf receiver unit Extract, the Digital Signal Processing including parsing；Processing unit occurs for data signal, is configurable for being configured according to the modulation of main control unit, frequency, bandwidth parameter Produce the numeric field difference quadrature baseband signal for meeting transmitting modulation module requirement；Radio-frequency receiving-transmitting control unit, including FPGA and multichannel Automatic level control drive circuit；It is configurable for receiving multiple signals Hair is configured, and realizes the parameter including unidirectional, two-way, the different amplitude of multichannel, frequency, signal bandwidth, signaling mode Configured；When carrying out signal reception, radio-frequency receiving-transmitting control unit control selected input number of signals and path and range parameter, And signal frequency conversion path selection is carried out according to input signal frequency range, and be transferred to and receive frequency conversion conditioning unit, receive frequency conversion Input signal conditioning to quadrature demodulator radio frequency signal frequency scope, and is transferred to radio demodulating unit by conditioning unit, described Carrier (boc) modulated signals are demodulated into digital orthogonal baseband signal by radio demodulating unit, then are adopted analog baseband signal by High Performance ADC Sample is that digital baseband signal is output to digital signal processing unit；When carrying out signal transmitting, radio-frequency receiving-transmitting control unit control selected input number of signals and path and range parameter, Base band signal transmission caused by digital signal processing unit is carried out to transmitting modulating unit, transmitting modulating unit to baseband signal Local oscillator modulation produces radio-frequency carrier modulated signal and is output to transmitting frequency conversion conditioning unit, and transmitting frequency conversion conditioning unit enters to signal Row frequency conversion covers 30MHz~20GHz frequency range, and carries out signal condition, realizes signal output.
- 2. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：It is main Control unit and microwave synthesizer unit, rf transmitter unit, rf receiver unit, digital signal processing unit, radio-frequency receiving-transmitting Data and address interconnection are carried out using pci bus between control unit, high-speed DAC, ADC and FPGA are connect using high-speed-differential LVDS Cause for gossip now interconnects.
- 3. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：When Clock reference unit produces the homologous clock signal in 12 tunnels using ADCLK954 clock buffers driver.
- 4. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：It is high Fast ADC sampling clocks synthesis unit uses the working method of Variable sampling clock, and it is that real data handles clock to ensure work clock 2 index multiple proportion, using ADF4355 PLL frequency synthesizers produce 1GHz sampling clocks, using ADS5400 height Fast modulus conversion chip carries out analog signal sampling.
- 5. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：Connect Receive frequency conversion local oscillator synthesis unit and transmitting frequency conversion local oscillator synthesis unit is synthesized using ADF4355 PLL frequency synthesizers 2030MHz~2400MHz low frequency local oscillation signals, use PLL chips HMC702LP6CE and integrated VCO chip HMC733LC4B with And two divided-frequency chip UXM15P forms phase-locked loop circuit and produces 10GHz~20GHz high-frequency local oscillation signals.
- 6. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：Connect Receive demodulation local oscillator synthesis unit and transmitting modulation local oscillator synthesis unit uses ADF4355 PLL frequency synthesizers.
- 7. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：It is high Fast DAC sampling clocks synthesis unit is produced using ADF4355 PLL frequency synthesizers and difference 1.2GHz reconfigurable filters High speed sampling clock, digital-to-analogue conversion is carried out using AD9736 high-speed digital-analogs conversion chip.
- 8. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：Connect Receive frequency conversion conditioning unit and use ADL5380 differential orthogonal demodulation devices, transmitting frequency conversion conditioning unit is adjusted using ADL5375 difference quadratures Device processed, the low frequency mixting circuit for receiving frequency conversion conditioning unit and transmitting frequency conversion conditioning unit use HMC213AMS8E frequency mixers, High frequency mixting circuit uses HMC773LC3B frequency mixers.
- 9. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that：Number Word signal processing unit is carried out using High Performance FPGA XC7K325T-2FFG900I and storage chip PC28F00AP30TF High-speed digital video camera.
- 10. ultra wide band high bandwidth radio-frequency receiving-transmitting two-way integral integration module according to claim 1, it is characterised in that： Radio-frequency receiving-transmitting control unit uses fpga chip XC6SLX100-2FGG484I and storage chip XCF32PVOG48I.
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