CN107818279B - Decoding method and device for RFID reader-writer - Google Patents
Decoding method and device for RFID reader-writer Download PDFInfo
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- CN107818279B CN107818279B CN201711071226.0A CN201711071226A CN107818279B CN 107818279 B CN107818279 B CN 107818279B CN 201711071226 A CN201711071226 A CN 201711071226A CN 107818279 B CN107818279 B CN 107818279B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
- G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
- G06K7/10009—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves
- G06K7/10297—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves arrangements for handling protocols designed for non-contact record carriers such as RFIDs NFCs, e.g. ISO/IEC 14443 and 18092
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K17/00—Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups G06K1/00 - G06K15/00, e.g. automatic card files incorporating conveying and reading operations
- G06K17/0003—Automatic card files incorporating selecting, conveying and possibly reading and/or writing operations
Abstract
The embodiment of the invention provides a decoding method and a decoding device for an RFID reader-writer. The method comprises the following steps: when a signal edge is identified from the acquired electronic tag signals, determining a slope extreme value and an edge type of a baseband signal corresponding to the signal edge and an initial pulse width of an adjacent signal edge; performing edge correction on the signal edge according to the slope extreme value and the edge type, and determining the corrected signal edge; according to the corrected signal edge, performing pulse width correction on the initial pulse width to determine a corrected pulse width; and determining the coded data corresponding to the electronic tag signal according to the corrected signal edge and the corrected pulse width. The embodiment of the invention provides the method for carrying out edge correction and pulse width correction on the identified signal edge and the initial pulse width, solves the problems of baseband signal duty ratio deviation, signal edge misjudgment and the like caused by the interference of the electronic tag signal, and improves the decoding success rate of weak signals or interfered signals.
Description
Technical Field
The embodiment of the invention relates to the technical field of radio frequency, in particular to a decoding method and a decoding device for an RFID reader-writer.
Background
An Ultra High Frequency Radio Frequency identification (UHF RFID) technology is a new technology that has just been developed in recent years and is rapidly developed, and has the characteristics of long identification distance, High identification speed, strong anti-interference capability, capability of penetrating through non-metallic materials and the like.
The UHF RFID working principle is that the reader modulates an instruction for reading the electronic tag into a carrier wave with ultrahigh frequency (the frequency range allocated in China continent is 840 + 845MHz/920 + 925MHz), the carrier wave is emitted to the air through an antenna, the electronic tag receiving the radio wave reflects a data string containing the tag number and other information through the ultrahigh frequency carrier wave according to the requirement of an RFID standard, wherein the tag number is encoded according to an FM0/MI LL ER rule, a reflection signal is transmitted to the reader through the antenna, the reader demodulates data in an FM0/MI LL ER format from the ultrahigh frequency carrier wave in the tag signal and then decodes FM0/MI 2 ER encoding data to determine the tag number, wherein the FM0 encoding principle adopts level change to represent logic, the data bit turning at the beginning represents logic '1', the data bit turning in the middle represents that the FM0/MI 2 ER encoding data is demodulated, and the FM0 encoding principle represents that data center data jumping is increased when the data center begins to jump, and the data center sends data center data with no jump representing '3870'.
Energy is provided mainly by receiving signals transmitted by a reader-writer in the communication process of the electronic tag, so that the power of the signals transmitted by the electronic tag is lower, the anti-interference capability is poorer, and the reader-writer decoding has higher requirements.
Therefore, it is an important issue to be solved urgently how to provide a decoding method with correction and error correction capability, which can improve the success rate of decoding weak signals or interfered signals.
Disclosure of Invention
Aiming at the defects in the prior art, the embodiment of the invention provides a decoding method and a decoding device for an RFID reader-writer.
In a first aspect, an embodiment of the present invention provides a decoding method for an RFID reader, including:
when a signal edge is identified from the acquired electronic tag signals, determining a slope extreme value, an edge type and an initial pulse width of an adjacent signal edge of a baseband signal corresponding to the signal edge;
performing edge correction on the signal edge according to the slope extreme value and the edge type, and determining a corrected signal edge;
according to the corrected signal edge, performing pulse width correction on the initial pulse width to determine a corrected pulse width;
and determining the coded data corresponding to the electronic tag signal according to the corrected signal edge and the corrected pulse width.
In a second aspect, an embodiment of the present invention provides a decoding apparatus for an RFID reader, including:
the acquisition module is used for determining a slope extreme value and an edge type of a baseband signal corresponding to a signal edge and an initial pulse width of an adjacent signal edge when one signal edge is identified in the acquired electronic tag signal;
the edge correction module is used for performing edge correction on the signal edge according to the slope extreme value and the edge type and determining a corrected signal edge;
the pulse width correction module is used for performing pulse width correction on the initial pulse width according to the corrected signal edge and determining a corrected pulse width;
and the decoding module is used for determining the coded data corresponding to the signal edge in the electronic tag signal according to the corrected signal edge and the corrected pulse width.
In a third aspect, an embodiment of the present invention provides an electronic device, including:
the processor and the memory are communicated with each other through a bus; the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform a method comprising: when a signal edge is identified from the acquired electronic tag signals, determining a slope extreme value, an edge type and an initial pulse width of an adjacent signal edge of a baseband signal corresponding to the signal edge; performing edge correction on the signal edge according to the slope extreme value and the edge type, and determining a corrected signal edge; according to the corrected signal edge, performing pulse width correction on the initial pulse width to determine a corrected pulse width; and determining the coded data corresponding to the electronic tag signal according to the corrected signal edge and the corrected pulse width.
In a fourth aspect, an embodiment of the present invention provides a storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the following method: when a signal edge is identified from the acquired electronic tag signals, determining a slope extreme value, an edge type and an initial pulse width of an adjacent signal edge of a baseband signal corresponding to the signal edge; performing edge correction on the signal edge according to the slope extreme value and the edge type, and determining a corrected signal edge; according to the corrected signal edge, performing pulse width correction on the initial pulse width to determine a corrected pulse width; and determining the coded data corresponding to the electronic tag signal according to the corrected signal edge and the corrected pulse width.
The decoding method for the RFID reader-writer provided by the embodiment of the invention carries out edge correction and pulse width correction on the identified signal edge and the initial pulse width, solves the problems of baseband signal duty ratio deviation, signal edge misjudgment and the like caused by the interference of the electronic tag signal, and improves the decoding success rate of weak signals or interfered signals.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
Fig. 1 is a schematic flowchart of a decoding method for an RFID reader according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of an edge correction method in a decoding method for an RFID reader according to an embodiment of the present invention;
fig. 3 is a schematic flow chart illustrating a pulse width correction method in a decoding method for an RFID reader according to an embodiment of the present invention;
fig. 4 is a schematic flow chart of an edge missing judgment and supplement correction method in the decoding method for the RFID reader according to the embodiment of the present invention;
fig. 5 is a schematic structural diagram of a decoding device for an RFID reader according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic flowchart of a decoding method for an RFID reader according to an embodiment of the present invention, and as shown in fig. 1, the decoding method includes:
step S11, when a signal edge is identified in the collected electronic tag signals, determining a slope extreme value, an edge type and an initial pulse width of an adjacent signal edge of a baseband signal corresponding to the signal edge;
specifically, an AD module of the RFID reader collects an electronic tag signal, sends electronic tag signal data to an FPGA module of the RFID reader, and the FPGA module determines a baseband signal of the electronic tag signal, identifies the baseband signal, determines a signal edge, and determines a slope extreme value of the baseband signal corresponding to the signal edge, wherein the signal edge comprises two edge types, a rising edge and a falling edge. According to FPGA sequential logic, when a signal edge is identified, the edge type and the slope extreme value of the signal edge are stored, and the initial pulse width of the adjacent signal edge is determined according to the identified last signal edge and the current signal edge. The initial pulse width is the number of sampling points between two adjacent signal edges, counting is started from the identification of the last signal edge to the end of counting when the current signal edge is identified according to a clock signal distributed in the FPGA, and the obtained data is the initial pulse width of the adjacent signal edges determined by the last signal edge and the current signal edge. Thus, each time a signal edge is identified, the edge type, slope extreme value and initial pulse width corresponding to the signal edge can be obtained.
Step S12, performing edge correction on the signal edge according to the slope extreme value and the edge type, and determining the corrected signal edge;
specifically, edge correction is performed on the signal edge according to the slope extreme value and the edge type corresponding to the signal edge, and the corrected signal edge is determined. For example, the current edge is modified according to the edge type of the last signal edge, the edge type of the current signal edge and the slope extreme values of the two.
Step S13, according to the corrected signal edge, performing pulse width correction on the initial pulse width to determine a corrected pulse width;
specifically, when the electronic tag signal is interfered, the initial pulse width between two adjacent edges may also change, and the duty ratio of the baseband signal shifts, so that after the signal edge is corrected, the initial pulse width needs to be corrected, and the initial pulse width is corrected according to the corrected signal edge to determine the corrected pulse width.
And step S14, determining the coded data corresponding to the electronic tag signal according to the corrected signal edge and the corrected pulse width.
Specifically, according to the modified signal edge and the modified pulse width, and in combination with the FM0/MI LL ER rule, bit data corresponding to the modified signal edge and the modified pulse width corresponding to the modified signal edge are determined, so that encoded data corresponding to the electronic tag signal can be determined.
For example, after the reader collects the electronic tag signal, the reader firstly determines the baseband signal of the electronic tag signal through the FPGA module, identifies the signal edge in the electronic tag signal, and the slope extreme value of the baseband signal corresponding to each signal edge and the initial pulse width of two adjacent signal edges, then performs edge correction on the identified signal edge, corrects the edge, performs pulse width correction on the initial pulse width, and determines the corrected signal edge and the bit data corresponding to the corrected pulse width according to the corrected signal edge and the corrected pulse width and in combination with the FM0/MI LL ER rule, so that the encoded data corresponding to the electronic tag signal can be determined.
The decoding method for the RFID reader-writer provided by the embodiment of the invention carries out edge correction and pulse width correction on the identified signal edge and the initial pulse width, solves the problems of baseband signal duty ratio deviation, signal edge misjudgment and the like caused by the interference of the electronic tag signal, and improves the decoding success rate of weak signals or interfered signals.
On the basis of the foregoing embodiment, further, the edge correcting the signal edge according to the slope extremum and the edge type, and determining a corrected signal edge includes:
determining a standard pulse width according to the frequency of the baseband signal;
judging whether the current signal edge is abnormal or not according to the edge type of the previous signal edge in the two adjacent signal edges and the edge type of the current signal edge;
and carrying out misjudgment correction on the signal edge according to the judgment result, the standard pulse width, the initial pulse width and the slope pole value, and determining the corrected signal edge.
Specifically, the baseband signal frequency is a reverse link rate specified by the national standard, including 64K/137.14K/174.55K/320K/128K/274.29K/349.09K/640K, and in practical applications, the reader has set an electronic tag return signal rate before receiving the electronic tag signal, which is the baseband signal frequency. And calculating the periodic pulse width of the baseband signal according to the frequency of the baseband signal and a sampling clock, and recording the periodic pulse width as a standard pulse width, wherein the sampling clock is a clock signal distributed inside the FPGA. Then, judging whether the current signal edge is abnormal or not according to the edge type of the previous signal edge in the two adjacent signal edges and the edge type of the current signal edge, for example, if the previous signal edge and the current signal edge are both a rising edge or a falling edge, determining that the current signal edge is abnormal; and if the last signal edge and the current signal edge are respectively a rising edge and a falling edge, or the last signal edge and the current signal edge are respectively a falling edge and a rising edge, determining that the current signal edge is normal. And then carrying out misjudgment correction on the signal edge according to the judgment result, the standard pulse width, the initial pulse width and the slope extreme value, and determining the corrected signal edge. In practical application, according to FPGA sequential logic, when a signal edge is identified from an electronic tag signal, edge abnormity judgment is carried out according to the signal edge identified last time and the currently identified signal edge, misjudgment and correction are carried out on the signal edge, and a coding value between the identified signal edge and the previous signal edge is determined according to the corrected signal edge and the pulse width.
Fig. 2 is a schematic flow chart of an edge correction method in a decoding method for an RFID reader according to an embodiment of the present invention, where as shown in fig. 2, the edge correction method includes:
step S21, counting the initial pulse width of two adjacent signal edges;
step S22, judging whether the two adjacent signal edges are abnormal or not;
step S23, carrying out edge misjudgment correction on the abnormal signal edge;
and step S24, determining the corrected signal edge and the initial pulse width thereof.
The decoding method for the RFID reader-writer provided by the embodiment of the invention carries out edge correction, pulse width correction, edge missing judgment and supplementary correction on the identified signal edge and the initial pulse width, solves the problems of baseband signal duty ratio deviation, signal edge misjudgment, missing judgment and the like caused by the interference of an electronic tag signal, and further improves the decoding success rate of a weak signal or an interfered signal.
On the basis of the foregoing embodiments, further, the performing, according to the determination result, the standard pulse width, the initial pulse width, and the slope pole value, a misjudgment correction on the signal edge, and determining a corrected signal edge includes:
if the current signal edge is abnormal, judging whether edge errors exist in the last signal edge and the current signal edge according to the initial pulse width and the standard pulse width;
if the edge error exists, judging whether the previous signal edge and the current signal edge are effective according to the slope extreme value corresponding to the previous signal edge and the slope extreme value corresponding to the current signal edge;
if the last signal edge is valid, determining a corrected signal edge according to the last signal edge and updating the initial pulse width;
and if the current signal edge is valid, determining the corrected signal edge according to the current signal edge and updating the initial pulse width.
Specifically, the initial pulse width of two adjacent signal edges is denoted as W _ NOW, the initial pulse width corresponding to the last signal edge is denoted as W0, the initial pulse width corresponding to the current signal edge is denoted as W1, and the corresponding initial pulse width when the signal edge is determined to have an error is denoted as W _ ERR.
If the current signal Edge is judged to be normal, the last signal Edge of the two adjacent signal edges is judged to be correct, the corresponding W _ ERR is 0, the corrected signal Edge and the initial pulse width { Edge, W0} are determined, the Edge is the Edge type of the last signal Edge, and W0 is the initial pulse width corresponding to the last signal Edge. And then updating W0 and W1 according to FPGA sequential logic, wherein W0 is W1, and W1 is W _ NOW + W _ ERR. For example, if the previous signal edge is a rising edge, W0 is 20, the current signal edge is a falling edge, and W1 is 15, it indicates that the previous signal edge is correct, the initial pulse width { rising edge, 20} of the modified signal edge is determined, W _ ERR is 0, and then W0 and W1 are updated according to the FPGA timing logic, and W0 is W1, that is, the current signal edge is the previous signal edge of the next timing, W1 is W _ NOW + W _ ERR, and W _ NOW is the initial pulse width corresponding to the current edge of the next timing. And then, continuously judging whether two adjacent signal edges of the next time sequence are normal or not, and determining the corresponding corrected signal edge and the initial pulse width, so that a group of corrected signal edges and pulse widths can be determined every time one signal edge is identified according to the FPGA time sequence logic.
If the current signal edge is judged to be abnormal, judging whether an edge error exists according to the relation between the initial pulse width W _ NOW and the standard pulse width W _ STD:
if W _ NOW is more than or equal to 1.5W _ STD, judging that edge errors do not exist in two adjacent signal edges;
if W _ NOW is less than 1.5W _ STD, judging that edge errors exist in two adjacent signal edges;
and if the judgment result shows that no Edge error exists, determining that the W _ ERR is 0, and determining the corrected signal Edge and the initial pulse width { Edge, W0}, wherein Edge is the Edge type of the previous signal Edge, and W0 is the initial pulse width corresponding to the previous signal Edge. And then updating W0 and W1 according to FPGA sequential logic, wherein W0 is W1, and W1 is W _ NOW + W _ ERR.
If the judgment result shows that the edge error exists, the invalid signal edge exists in the previous signal edge and the current signal edge, and whether the signal edge is valid is judged according to the slope extreme value of the previous signal edge and the slope extreme value of the current signal edge:
specifically, if the slope extreme value of the last signal edge is greater than the slope extreme value of the current signal edge, it indicates that the current signal edge is invalid;
and if the slope extreme value of the last signal edge is smaller than the slope extreme value of the current signal edge, the last signal edge is invalid.
If the last signal edge is valid, updating W _ ERR (W _ NOW) according to FPGA time sequence logic;
if the current signal edge is valid, W _ ERR is 0, and W1 is updated according to the FPGA timing logic as W1+ W _ NOW + W _ ERR.
In this way, all valid ones of the identified signal edges and their corresponding modified initial pulse widths can be obtained.
According to the decoding method for the RFID reader-writer, provided by the embodiment of the invention, edge correction, pulse width correction, edge missing judgment and supplementary correction are carried out on the signal edge and the initial pulse width according to two adjacent signal edges, so that the problems of baseband signal duty ratio deviation, signal edge misjudgment, missing judgment and the like caused by interference of an electronic tag signal are solved, and the decoding success rate of a weak signal or an interfered signal is further improved.
On the basis of the foregoing embodiments, further, the performing a pulse width correction on the initial pulse width according to the corrected signal edge to determine a corrected pulse width includes:
determining a standard pulse width according to the frequency of the baseband signal;
performing N-level cache on the corrected signal edge and the initial pulse width, and determining the pulse width of the N-level cache, wherein N is more than or equal to 1 and less than or equal to 10;
determining the number of standard pulse widths contained in the N-level cache pulse width according to the standard pulse width;
judging whether the initial pulse width is abnormal or not according to the standard pulse width;
and according to the judgment result and the number of the standard pulse widths, performing pulse width correction on the initial pulse width to determine a corrected pulse width.
Specifically, after Edge correction, all effective signal edges corresponding to the electronic tag signal and initial pulse widths corresponding to the effective signal edges can be determined, the periodic pulse Width of the baseband signal is calculated according to the baseband signal frequency and a sampling clock, and is recorded as a standard pulse Width, wherein the sampling clock is a clock signal distributed inside the FPGA, and N-level buffering is performed on the corrected signal edges and the initial pulse widths { Edge _ N, Width _ N }, wherein 1 is not less than N and not more than 10, buffering results are { Edge _ N, Width _ N }, and { Edge _ N-1, Width _ N-1}, … …, { Edge _1, Width _1}, wherein Edge _ N is a last signal Edge of Edge _ N-1, and Edge _1 is a current signal Edge corresponding to the current time sequence. Accumulating the N-level cache results, and determining N-level cache pulse Width Width _ Plus (Width _ N + Edge _ N-1+ … + Width _ 1), wherein the Edge _ N is the Edge type of the signal Edge, the Edge _ N (1) is represented as a rising Edge, and the Edge _ N (0) is represented as a falling Edge;
and then calculating the number of standard pulse widths contained in the pulse Width of the N-level buffer according to a formula Num _ STD ═ Width _ Plus ÷ W _ STD, wherein the remainder is Width _ Remain, W _ STD is the standard pulse Width, and judging whether the pulse Width is abnormal or not according to the remainder Width _ Remain:
if the pulse Width is not less than (W _ STD N1) and not more than Width _ Remain and not more than (W _ STD N2), determining that the pulse Width is abnormal;
when Width _ remaining < (W _ STD _ N1) and Width _ remaining > (W _ STD _ N2) are satisfied, it is determined that the pulse Width is normal, and N1 and N2 may be set according to actual conditions, for example, N1 is 0.75 and N2 is 1.25.
And then according to the judgment result and the number Num _ STD of the standard pulse widths, performing pulse width correction on the initial pulse width to determine the corrected pulse width.
According to the decoding method for the RFID reader-writer, provided by the embodiment of the invention, the initial pulse width is corrected again according to the cached corrected signal edge, so that the problems of duty ratio deviation of a baseband signal, erroneous judgment and missing judgment of the signal edge and the like caused by interference of an electronic tag signal are solved, and the decoding success rate of a weak signal or an interfered signal is further improved.
On the basis of the foregoing embodiments, further, the performing, according to the determination result and the number of the standard pulse widths, pulse width correction on the initial pulse width to determine a corrected pulse width includes:
if the judgment result is that the initial pulse width is normal, determining a pulse width mean value according to the number of the standard pulse widths;
determining the number of pulse width mean values contained in the Nth level cache according to the pulse width mean values;
determining a modified pulse width corresponding to the Nth-level cache according to the number of the pulse width mean values;
and determining an Nth-level correction result corresponding to the Nth-level cache according to the corrected pulse width and the number of the mean pulse width values.
Specifically, if the determination result is that the initial pulse Width is abnormal, the current pulse Width _1 is updated in the next time sequence according to the FPGA time sequence logic: width _1 is Width _1+ W0, Edge _1 remains unchanged;
if the judgment result is that the initial pulse Width is normal, calculating a pulse Width mean value Width _ Avg in the N-level buffer according to a formula Width _ Avg-Width _ Plus ÷ Num _ STD, then calculating a pulse Width mean value Num _ Avg _ N contained in the pulse Width of the N-level buffer according to a formula Num _ Avg _ N-Width _ Avg, executing pulse Width correction, and executing the following operation according to FPGA time sequence logic: and the Width _ N is Num _ Avg _ N and Width _ Avg, and the Width _ N is corrected to determine a corrected pulse Width value. And then, according to the corrected pulse width and the number of the mean pulse width values, determining an N-level correction result { Edge _ Pre _ N, Num _ Avg _ N and Edge _ N } corresponding to the N-level cache, wherein the Edge _ Pre _ N is a last signal Edge adjacent to the N-level cache, the Num _ Avg _ N is the number of the mean pulse width values of the N-level cache, and the Edge _ N is an effective signal Edge of the N-level cache. For example, when N is 4, the 4 th level correction result is { Edge _ Pre _4, Num _ Avg _4, Edge _4 }.
Fig. 3 is a schematic flow chart of a pulse width correction method in a decoding method for an RFID reader according to an embodiment of the present invention, as shown in fig. 3, the method includes:
step S31, performing N-level cache on the effective signal edge, and accumulating the initial pulse width;
step S32, calculating the number of standard pulse widths contained in the N-level cache;
step S33, judging whether the pulse width is abnormal according to the pulse width remainder in the calculation;
step S34, if the pulse width is abnormal, updating the pulse width of the first-level cache in the next time sequence of the FPGA, and executing step S31;
step S35, if the pulse width is normal, the pulse width of the initial pulse width is corrected;
and step S36, determining the Nth-stage correction result, including the last signal edge type, the number of mean pulse widths and the current signal edge type of the Nth stage.
According to the decoding method for the RFID reader-writer, provided by the embodiment of the invention, the initial pulse width is corrected according to the cached corrected signal edge, so that the problems of duty ratio deviation of a baseband signal, signal edge misjudgment, missed judgment and the like caused by interference of an electronic tag signal are solved, and the decoding success rate of a weak signal or an interfered signal is further improved.
On the basis of the foregoing embodiments, further, the determining, according to the modified signal edge and the modified pulse width, the encoded data corresponding to the electronic tag signal includes:
and performing edge missing judgment and supplementary correction on the corrected signal edge and the corrected pulse width, and determining the coded data corresponding to the electronic tag signal according to the signal edge and the pulse width after the supplementary correction.
Specifically, after the identified signal edge and the initial pulse width are corrected, the FM0/MI LL ER rule is combined to judge whether the corrected signal edge has a leakage edge, if the leakage edge exists, the edge signal is subjected to supplementary correction, the corrected pulse width is updated, and the encoded data corresponding to the electronic tag signal is determined according to the signal edge and the pulse width after the supplementary correction.
The decoding method for the RFID reader-writer provided by the embodiment of the invention carries out edge correction, pulse width correction, edge missing judgment and supplementary correction on the identified signal edge and the initial pulse width, solves the problems of baseband signal duty ratio deviation, signal edge misjudgment, missing judgment and the like caused by the interference of an electronic tag signal, and further improves the decoding success rate of a weak signal or an interfered signal.
On the basis of the foregoing embodiments, further, the performing edge missing determination and supplementary correction on the corrected signal edge and the corrected pulse width, and determining the encoded data corresponding to the electronic tag signal according to the supplementary corrected signal edge and pulse width includes:
judging whether a leakage edge exists in the N-level cache or not according to the N-level correction result and an FM0/MI LL ER rule;
if the N-level cache does not have a leakage edge, determining the coded data corresponding to the electronic tag signal according to the N-level cache;
and if the N-level cache has a leakage edge, performing edge supplementary correction according to an FM0/MI LL ER rule, and determining the coded data corresponding to the electronic tag signal according to the signal edge and the pulse width after supplementary correction.
Specifically, according to the Nth-level correction result { Edge _ Pre _ N, Num _ Avg _ N, Edge _ N }, whether a missing Edge exists is judged by utilizing an FM0/MI LL ER rule, and Edge supplement and correction are executed;
if the judgment result shows that no missing Edge exists, the coded data is directly determined to be '0' or '1', taking a 4-level cache as an example, if Num _ Avg _4 is equal to 1, the coded data is only one coded data between the last signal Edge and the current signal Edge in the 4-level cache, no missing Edge exists, and the coded data corresponding to the 4-level cache is determined according to Edge _ Pre _4 and FM0/MI LL ER rules, wherein if Edge _ Pre _4 is equal to 0, the coded data corresponding to the 4-level cache is 0, and if Edge _ Pre _ N is equal to 4, the coded data corresponding to the 4-level cache is 1.
If Num _ Avg _4 is 2, it indicates that there are 2 encoded data in the 4 th-level buffer, Edge _ Pre _4 and Edge _4 are 1 and 0, respectively, there is no missing Edge, and the 4 th-level buffer corresponds to the encoded data of 11;
if Num _ Avg _4 is equal to 2, Edge _ Pre _4 and Edge _4 are 0 and 1, respectively, no leakage Edge exists, and the level 4 buffer corresponds to encoded data of 00.
If the judgment result shows that the signal edge is not identified between the last signal edge and the current signal edge when the 4 th-level cache is interfered, performing edge supplement and correction by using an FM0/MI LL ER rule, and determining that the coded data is '0' or '1', specifically:
if Num _ Avg _4 is equal to 2, when Edge _ Pre _4 and Edge _4 are both 1, it indicates that 0 is missing in the middle of the 4 th-level buffer, and the corresponding encoded data in the 4 th-level buffer is 10;
if Num _ Avg _4 is equal to 2, when Edge _ Pre _4 and Edge _4 are both 0, it indicates that one 1 is missing in the middle of the 4 th-level cache, and the corresponding encoded data in the 4 th-level cache is 01;
if Num _ Avg _4 is 3, indicating that the level 4 cache is interfered, and a signal edge existing between a last signal edge and a current signal edge is not identified, and a leakage edge exists, performing edge supplement and correction by using an FM0/MI LL ER rule and a bit parity alignment, wherein the bit parity alignment starts counting by taking the identification of a previous channel code as a starting point when the FPGA decodes the electronic tag signal, when the number of recorded encoded data bits is an even number, the even alignment is indicated, and when the number of recorded encoded data bits is a count, the odd alignment is indicated.
The specific decoding process is as follows:
if Edge _ Pre _4 and Edge _4 are respectively 1 and 0, indicating that two signal edges are missed in the middle of the 4 th-level cache, and determining the encoded data corresponding to the 4 th-level cache to be 101 according to the FM0/MI LL ER rule;
if Edge _ Pre _4 and Edge _4 are respectively 0 and 1, indicating that two signal edges are missed in the middle of the 4 th-level cache, and determining that the encoded data corresponding to the 4 th-level cache is 010 according to the FM0/MI LL ER rule;
if Edge _ Pre _4 and Edge _4 are both 1 or 0, indicating that a signal Edge is missed in the middle of the 4 th-level cache, and the data bits are aligned even, and determining that the encoded data corresponding to the 4 th-level cache is 100 or 011 according to the FM0/MI LL ER rule;
if Edge _ Pre _4 and Edge _4 are both 1 or 0, indicating that a signal Edge is missed in the middle of the 4 th-level cache, the data bits are aligned in an odd way, and determining that the encoded data corresponding to the 4 th-level cache is 110 or 001 according to the FM0/MI LL ER rule;
if the Num _ Avg _4 of the level 4 buffer is not less than 4 and the Edge _ Pre _4 is 1 or 0, it indicates that too many signal edges are missed in the middle of the level 4 buffer, and the bit data is directly output 1010.
Therefore, by using the result of the N-th level buffer and performing supplementary correction on the signal edge in combination with the FM0/MI LL ER rule, the encoded data between the last signal edge and the current signal edge in the N-th level buffer can be determined, and the corresponding encoded data of the whole electronic tag signal can be determined.
Fig. 4 is a schematic flow chart of an edge missing judgment and supplementary correction method in a decoding method for an RFID reader according to an embodiment of the present invention, as shown in fig. 4, the method includes:
step S41, judging whether the N-level cache has a leakage edge according to the number of the adjacent signal edges and the mean pulse width in the N-level correction result;
step S42, if the leakage edge exists in the Nth level cache, the leakage edge is supplemented and corrected by using the encoding rule; if no leakage edge exists, jumping to step S43;
and step S43, determining the coded data corresponding to the Nth-level buffer according to the signal edge.
The decoding method for the RFID reader-writer provided by the embodiment of the invention carries out multiple correction, edge missing judgment and supplementary correction on the identified signal edge and pulse width, solves the problems of baseband signal duty ratio deviation, signal edge misjudgment, missing judgment and the like caused by the interference of the electronic tag signal, and further improves the decoding success rate of weak signals or interfered signals.
Fig. 5 is a schematic structural diagram of a decoding device for an RFID reader according to an embodiment of the present invention, and as shown in fig. 5, the decoding device includes: an obtaining module 51, an edge correcting module 52, a pulse width correcting module 53 and a decoding module 54, wherein:
the obtaining module 51 is configured to determine, when each signal edge is identified from the acquired electronic tag signal, a slope extreme value and an edge type of a baseband signal corresponding to the signal edge, and an initial pulse width of an adjacent signal edge; the edge correction module 52 is configured to perform edge correction on the signal edge according to the slope extreme value and the edge type, and determine a corrected signal edge; the pulse width correction module 53 is configured to perform pulse width correction on the initial pulse width according to the corrected signal edge to determine a corrected pulse width; the decoding module 54 is configured to determine, according to the modified signal edge and the modified pulse width, encoded data corresponding to the signal edge in the electronic tag signal.
Specifically, the obtaining module 51 determines a baseband signal of the electronic tag signal from the acquired electronic tag signal, identifies the baseband signal, determines a signal edge, and determines a slope extremum of the baseband signal corresponding to the signal edge, wherein the signal edge includes two edge types, a rising edge and a falling edge, according to FPGA timing logic, the obtaining module 51 stores the edge type and the slope extremum of the signal edge when a signal edge is identified, and determines an initial pulse width of an adjacent signal edge according to the identified previous signal edge and the current signal edge, wherein the initial pulse width is a number of sampling points between two adjacent signal edges, and the obtaining module 51 obtains the edge type, the slope extremum and the initial pulse width of the adjacent signal edge according to a clock signal distributed inside the FPGA, after the counting is started from the identification of the previous signal edge to the identification of the previous signal edge, and after the counting is finished when the current signal edge is identified, the obtaining module 52 determines the initial pulse width of the adjacent signal edge for the previous signal edge and the current signal edge, and the obtaining module 51 may determine the initial pulse width, and determine the corresponding edge type, slope extremum and determine the corresponding pulse width of the decoded signal edge, and modify the corresponding pulse width of the FM signal edge according to the rf correction rule, after the rf correction module 3553.
The decoding device for the RFID reader-writer provided by the embodiment of the invention carries out edge correction and pulse width correction on the identified signal edge and the initial pulse width, solves the problems of baseband signal duty ratio deviation, signal edge misjudgment and the like caused by the interference of the electronic tag signal, and improves the decoding success rate of weak signals or interfered signals.
Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, and as shown in fig. 6, the electronic device includes: a processor (processor)601, a memory (memory)602, and a bus 603;
wherein, the processor 601 and the memory 602 complete the communication with each other through the bus 603;
An embodiment of the present invention discloses a computer program product, which includes a computer program stored on a non-transitory computer readable storage medium, the computer program including program instructions, when the program instructions are executed by a computer, the computer can execute the methods provided by the above method embodiments, for example, the method includes: when a signal edge is identified from the acquired electronic tag signals, determining a slope extreme value, an edge type and an initial pulse width of an adjacent signal edge of a baseband signal corresponding to the signal edge; performing edge correction on the signal edge according to the slope extreme value and the edge type, and determining a corrected signal edge; according to the corrected signal edge, performing pulse width correction on the initial pulse width to determine a corrected pulse width; and determining the coded data corresponding to the electronic tag signal according to the corrected signal edge and the corrected pulse width.
Embodiments of the present invention provide a non-transitory computer-readable storage medium, which stores computer instructions, where the computer instructions cause the computer to perform the methods provided by the above method embodiments, for example, the methods include: when a signal edge is identified from the acquired electronic tag signals, determining a slope extreme value, an edge type and an initial pulse width of an adjacent signal edge of a baseband signal corresponding to the signal edge; performing edge correction on the signal edge according to the slope extreme value and the edge type, and determining a corrected signal edge; according to the corrected signal edge, performing pulse width correction on the initial pulse width to determine a corrected pulse width; and determining the coded data corresponding to the electronic tag signal according to the corrected signal edge and the corrected pulse width.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
The above-described embodiments of the apparatuses and the like are merely illustrative, wherein the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the embodiments of the present invention, and are not limited thereto; although embodiments of the present invention have been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A decoding method for an RFID reader, comprising:
when a signal edge is identified from the acquired electronic tag signals, determining a slope extreme value, an edge type and an initial pulse width of an adjacent signal edge of a baseband signal corresponding to the signal edge;
carrying out misjudgment correction on the signal edge according to the frequency of a baseband signal, the edge type of the last signal edge of two adjacent signal edges, the edge type of the current signal edge, the initial pulse width and the slope pole value, and determining the corrected signal edge;
performing pulse width correction on the initial pulse width according to the frequency of the baseband signal, the pulse width mean value, the corrected signal edge, the initial pulse width and the number of standard pulse widths to determine a corrected pulse width;
and performing edge missing judgment and supplementary correction according to the corrected signal edge and the corrected pulse width, and determining the coded data corresponding to the electronic tag signal.
2. The decoding method according to claim 1, wherein the determining the modified signal edge by performing the misjudgment correction on the signal edge according to the frequency of the baseband signal, the edge type of the last one of two adjacent signal edges, the edge type of the current signal edge, the initial pulse width, and the slope limit comprises:
determining a standard pulse width according to the frequency of the baseband signal;
judging whether the current signal edge is abnormal or not according to the edge type of the previous signal edge in the two adjacent signal edges and the edge type of the current signal edge;
and carrying out misjudgment correction on the signal edge according to the judgment result, the standard pulse width, the initial pulse width and the slope pole value, and determining the corrected signal edge.
3. The decoding method according to claim 2, wherein the determining the corrected signal edge by performing a misjudgment correction on the signal edge according to the judgment result, the standard pulse width, the initial pulse width, and the slope limit comprises:
if the current signal edge is abnormal, judging whether edge errors exist in the last signal edge and the current signal edge according to the initial pulse width and the standard pulse width;
if the edge error exists, judging whether the previous signal edge and the current signal edge are effective according to the slope extreme value corresponding to the previous signal edge and the slope extreme value corresponding to the current signal edge;
if the last signal edge is valid, determining a corrected signal edge according to the last signal edge and updating the initial pulse width;
and if the current signal edge is valid, determining the corrected signal edge according to the current signal edge and updating the initial pulse width.
4. The decoding method according to claim 1, wherein the performing the pulse width correction on the initial pulse width according to the frequency of the baseband signal, the mean value of the pulse widths, the corrected signal edge, the initial pulse width, and a standard number of pulse widths to determine a corrected pulse width comprises:
determining a standard pulse width according to the frequency of the baseband signal;
performing N-level cache on the corrected signal edge and the initial pulse width, and determining the pulse width of the N-level cache, wherein N is more than or equal to 1 and less than or equal to 10;
determining the number of standard pulse widths contained in the N-level cache pulse width according to the standard pulse width;
judging whether the initial pulse width is abnormal or not according to the standard pulse width;
and according to the judgment result and the number of the standard pulse widths, performing pulse width correction on the initial pulse width to determine a corrected pulse width.
5. The decoding method according to claim 4, wherein the performing the pulse width correction on the initial pulse width according to the judgment result and the number of the standard pulse widths to determine a corrected pulse width comprises:
if the judgment result is that the initial pulse width is normal, determining a pulse width mean value according to the number of the standard pulse widths;
determining the number of pulse width mean values contained in the Nth level cache according to the pulse width mean values;
determining a modified pulse width corresponding to the Nth-level cache according to the number of the pulse width mean values;
and determining an Nth-level correction result corresponding to the Nth-level cache according to the corrected pulse width and the number of the mean pulse width values.
6. The decoding method according to claim 5, wherein the determining the encoded data corresponding to the electronic tag signal by performing edge missing judgment and supplementary correction according to the corrected signal edge and the corrected pulse width comprises:
and performing edge missing judgment and supplementary correction on the corrected signal edge and the corrected pulse width, and determining the coded data corresponding to the electronic tag signal according to the signal edge and the pulse width after the supplementary correction.
7. The decoding method according to claim 6, wherein the performing of edge missing correction and supplementary correction on the corrected signal edge and the corrected pulse width, and determining the encoded data corresponding to the electronic tag signal according to the supplementary corrected signal edge and the pulse width comprises:
judging whether a leakage edge exists in the N-level cache or not according to the N-level correction result and an FM0/MI LL ER rule;
if the N-level cache does not have a leakage edge, determining the coded data corresponding to the electronic tag signal according to the N-level cache;
and if the N-level cache has a leakage edge, performing edge supplementary correction according to an FM0/MI LL ER rule, and determining the coded data corresponding to the electronic tag signal according to the signal edge and the pulse width after supplementary correction.
8. A decoding apparatus for an RFID reader, comprising:
the acquisition module is used for determining a slope extreme value and an edge type of a baseband signal corresponding to a signal edge and an initial pulse width of an adjacent signal edge when one signal edge is identified in the acquired electronic tag signal;
the edge correction module is used for carrying out misjudgment correction on the signal edge according to the frequency of the baseband signal, the edge type of the last signal edge of two adjacent signal edges, the edge type of the current signal edge, the initial pulse width and the slope pole value, and determining the corrected signal edge;
the pulse width correction module is used for performing pulse width correction on the initial pulse width according to the frequency of the baseband signal, the pulse width mean value, the corrected signal edge, the initial pulse width and the number of standard pulse widths to determine a corrected pulse width;
and the decoding module is used for performing edge missing judgment and supplementary correction according to the corrected signal edge and the corrected pulse width, and determining the coded data corresponding to the signal edge in the electronic tag signal.
9. An electronic device, comprising:
the processor and the memory are communicated with each other through a bus; the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of any of claims 1 to 7.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the method according to any one of claims 1 to 7.
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