CN102932105B - Based on the coding/decoding method that the FM0 of viterbi algorithm encodes - Google Patents
Based on the coding/decoding method that the FM0 of viterbi algorithm encodes Download PDFInfo
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Abstract
Based on the coding/decoding method that the FM0 of viterbi algorithm encodes, comprise and branch metric is formed to the input signal of decoding circuit; Calculate cumulative metric; Recording status redirect relation; Backtracking decoding four steps, for using the wireless communication system of FM0 coding to provide a kind of hardware to realize and performance preferably decoding algorithm, in the presence of noise, provide higher system communication success rate.
Description
Technical field
The present invention relates to the signal decoding in radio digital communication, particularly a kind of FM0 based on viterbi algorithm coding/decoding method of encoding.
Background technology
Viterbi algorithm is a kind of method realizing signal decoding in noisy communication channel based on maximum likelihood estimate.Since proposing from 1967, obtain significant progress, be now widely used in the Modern Communication System such as personal mobile communication, network code modulation decoder, satellite communication and family wireless network.
Although for different coding category, the implementation method of viterbi algorithm is each variant, core concept when viterbi algorithm realizes in different coding kind is consistent.The decoder of viterbi algorithm is used to obtain the cumulative metric in each state ventrocephalad (on the time from front to back) path according to the coding rule of priori, the redirect relation of judgement state, again according to the size of cumulative metric, and the redundant information determined in coding, carry out oppositely (on the time from back to front) backtracking, thus translate coded message.In brief, the core of viterbi algorithm is: utilize the coding rule determined, carries out forward direction and to add up alternative and oppositely backtracking.This front and back, to the decoding process of working in coordination, under specific signal to noise ratio condition, can provide good error ratio characteristic.
FM0 coding is in digital communicating field, a kind of comparatively common Signal coding mode.Because its coding rule is simple, symmetrical, the hardware spending of coding-decoding circuit is less, thus be widely used in the wireless communication system of all kinds of low-power consumption number, such as radio-frequency (RF) identification (RadioFrequencyIdentification, be called for short RFID) and near-field communication (NearFieldCommunication is called for short NFC) etc.In recent years, be applied to the fields such as storage, transport, retail, gate inhibition and doit electronic payment along with these wireless communication systems gradually, FM0 coding is throughout each corner of the modern life.
With reference to the coding rule that figure 1 is FM0 coding.Wherein, S
1(101), S
2(102), S
3(103), S
4(104) be FM0 coding in 4 kinds of symbols (or being called 4 kinds of states).The cycle time of each symbol is T, and amplitude is ± 1.Be the incoming coded signal of T for one-period, the state corresponding to logical zero is S2(102) and S3(103), the state corresponding to logical one is S1(101) and S4(104).Redirect rule (105) between these 4 kinds of states is as follows:
1) current state is S1(101) time, if next code signal is logical zero, then next state transition is to S3(103); If next code signal is logical one, then next state transition is to S4(104).
2) current state is S2(102) time, if next code signal is logical zero, then next state keeps S2(102) constant; If next code signal is logical one, then next state transition is to S1(101).
3) current state is S3(103) time, if next code signal is logical zero, then next state keeps S3(103) constant; If next code signal is logical one, then next state transition is to S4(104).
4) current state is S4(104) time, if next code signal is logical zero, then next state transition is to S2(102); If next code signal is logical one, then next state transition is to S1(101).
At present, the decoding circuit of FM0 coding uses code element related algorithm to realize usually.This algorithm with the similarity between each symbol, judges the encoded radio that input signal is corresponding by comparator input signal.Adopt the decoding circuit hardware spending of code element related algorithm less, be suitable for the portable radio communication device of low cost.But because related algorithm is in the process of decoding, coding rule symmetrical between two when being difficult to intactly to utilize FM0 to be coded in redirect between 4 kinds of states, there is the space of improving in decoding efficiency.
Summary of the invention
Technical problem to be solved by this invention is that this coding/decoding method is that a kind of hardware can realize and performance preferably decoding algorithm in order to use the wireless communication system of FM0 coding to provide a kind of FM0 based on viterbi algorithm coding/decoding method of encoding.Under decoding circuit input signal is subject to the condition of noise jamming, the error rate of decoding can be reduced, obtain the success rate that communicates preferably.
The core methed realizing this purpose is: encode special state redirect rule known according to FM0, and application viterbi algorithm forward direction adds up the core concept of alternative and oppositely backtracking, translates the code signal of input.The concrete technical solution of the present invention is as follows:
Based on the coding/decoding method that the FM0 of viterbi algorithm encodes, its feature is, this coding/decoding method comprises the following steps:
1. branch metric is formed to the input signal of decoding circuit: decoding circuit carries out sampling to source code the symbol S1(1 of the four kinds of states of encoding with FM0 successively by bit order obtaining corresponding input signal, 1), S2(1,-1), S3(-1,1), S4(-1 ,-1) be successively multiplied after be added and form input signal according to the degree of branching scale of signal bit order;
2. calculate cumulative metric: according to FM0 encode specific state transition rule, the branch metric of the possible front state of a certain state (S1, S2, S3, S4) corresponding to decoding circuit continuous print input signal current bit is compared, select the branch metric with the front state of larger branch metric to carry out being added with the branch metric under this state current bit the cumulative metric obtaining described this state of current bit, form cumulative metric table;
3. recording status redirect relation: according to cumulative metric, meets the result of two kinds of cumulative metrics of FM0 encoding state redirect rule under more last bit, select a wherein larger cumulative metric, as state before the redirect of current bit current state; When two kinds of cumulative metric results are equal, make state before the redirect of current bit current state for optional one, form state transition relation record table;
4. decoding is recalled: according to the traceback depth D of setting, complete decoding circuit continuous print input signal X bit formation branch metric, calculate cumulative metric, after recording status redirect relation, from the maximum likelihood decoding state of X bit, according to the state transition relation of continuous D bit, select the encoded radio corresponding to state before the redirect of recording in X-D+1 bit, as the decode value of X-D bit.
Described input signal is the digital signal of FM0 coding, or on FM0 code signal basis, increase the digital signal of redundancy precedence bits, or on FM0 code signal basis, increase the digital signal of redundancy ending bit, or on FM0 code signal basis, increase the digital signal of redundancy precedence bits and redundancy ending bit simultaneously, or by a part for FM0 code signal signal as a whole, and the digital signal that remainder does not use FM0 to encode.
Described input signal sampling, for the input signal of a bit, its sampling number is 2 times or 2
nsecondary, wherein N be greater than 1 positive integer.
The cumulative metric of the two states of FM0 encoding state redirect rule is met under described last bit, when calculated input bit is the first bit of continuous input code stream, when there is not leading redundant bit, the cumulative metric of first bit 4 last bits of state is " 0 " entirely, or 4 other equal numerical value.
The maximum likelihood decoding state of described X bit is the state corresponding to that in X bit 4 cumulative metrics, numerical value is maximum, or the state in several states that in X bit 4 cumulative metrics, numerical value is maximum corresponding to any one.
Described traceback depth D be more than or equal to 1 positive integer.
When described traceback depth D and X bit sum are greater than whole source code length, are decoded by the mode reducing traceback depth, or decoded by the mode of hard decision, or decoded by the mode increasing full 0 redundant input signal.
Accompanying drawing explanation
Fig. 1 is that the waveform of FM0 coding maps and state transition schematic diagram;
When Fig. 2 is without leading and ending redundant information, the source code of 6 bit continuous signals and the FM0 coding waveforms of correspondence thereof, decoding circuit input and FM0 encode the branch metric schematic diagram under 4 states;
When Fig. 3 is without leading and ending redundant information, the source code of 6 bit continuous signals and the FM0 coding waveforms of correspondence thereof, decoding circuit input, FM0 encode branch metric, cumulative metric schematic diagram under 4 states;
When Fig. 4 is without leading and ending redundant information, the source code of 6 bit continuous signals and the FM0 coding waveforms of correspondence thereof, decoding circuit input, FM0 encode cumulative metric, state transition relation schematic diagram under 4 states;
When Fig. 5 is without leading and ending redundant information, the source code of 6 bit continuous signals and the FM0 coding waveforms of correspondence thereof, decoding circuit input, FM0 encode cumulative metric, state transition relation, decoded result schematic diagram under 4 states;
Fig. 6 is that the signal existed under noise conditions is input as example, the specific embodiment of the invention introduce schematic diagram.
Embodiment
Below in conjunction with embodiment and accompanying drawing, the invention will be further described, but should not limit the scope of the invention with this.
Based on the coding/decoding method that the FM0 of viterbi algorithm encodes, feature is that this coding/decoding method comprises following four steps:
1) branch metric is formed:
Described branch metric refers to decoding circuit continuous print input signal with the similarity degree between symbol.Described similarity degree carries out taking advantage of the numerical values recited adding gained to be characterized with symbol itself with the input signal of decoding circuit.Described input signal comes from the sampling to the coding waveforms corresponding to source code.Described add operation of taking advantage of is, by the input signal of the decoding circuit in same bit, logical value corresponding with symbol is by turn multiplied, then sues for peace to product.Because FMO coding always has 4 kinds of states, any bit source coded signal all can produce 4 branch metrics, corresponds to respectively in these 4 kinds of states.
Optionally, the number of times that the coding waveforms corresponding to a bit source code is sampled can be 2 times, also can be 2
nsecondary, the wherein positive integer of N>1.
Optionally, the result of each sampling is when carrying out taking advantage of add operation, and its weight can be identical, also can be different.
As shown in Figure 2, for the source code (201) of continuous 6 bits, it can have the FM0 coding waveforms (202) provided in figure.This coding waveforms (202), after the quantification that sampling number is 2, can obtain the input signal (203) of continuous 12 decoding circuits.Decoding circuit by this continuous print 12 input signals are carried out taking advantage of add operation with 4 kinds of symbols, branch metric (204,205,206,207) respective under obtaining these 4 states of S1, S2, S3, S4.For the branch metric calculation of the 1st bit in S1 state, its input signal is-1,1(2031), and symbol corresponding to S1 state is 1,1.Take advantage of the result of add operation for (-1 × 1)+(1 × 1)=0, therefore, the branch metric of S1 state the 1st bit is 0(2041).In like manner, the input signal of the 2nd bit is-1 ,-1(2032), itself and S1 symbol carry out taking advantage of the result of add operation for (-1 × 1)+(-1 × 1)=-2, and therefore, the branch metric of S1 state the 2nd bit is-2(2042).The rest may be inferred, under can obtaining 4 kinds of states, amounts to 24,4 tunnel branch metric (204,205,206,207).
2) cumulative metric is calculated;
Described cumulative metric refer to according to FM0 encode specific state transition rule, the branch metric corresponding to decoding circuit continuous print input signal is added selectively the accumulated value of gained.Because FMO coding always has 4 kinds of states, cumulative metric also has 4 tunnels.
Described addition is selectively that before possible to a certain particular state, the cumulative metric of state compares, and selects wherein larger one to be added with the branch metric under this state current bit.The specific coding rule of FM0 coding determines: the front state of any one state, may be only two kinds in whole 4 kinds of states.The cumulative metric being applicable to FM0 coding calculates, and only needs to compare the cumulative metric of these two states under last bit.
Optionally, the cumulative metric of two corresponding to a certain state of current bit possible front states is equal, then any one can be selected as summand, be added, and do not affect the cumulative metric value under current bit with the branch metric of current bit.
Optionally, the 1st bit of the continuous input signal of decoding circuit, whether the cumulative metric of its front state according to inserting in coding the redundancy preface information determined can determine.
As shown in Figure 3, for continuous 6 bit input signal not determining redundancy preface information, S1, S2, S3, S4 branch metric of these 4 states when the 1st bit (2041,2051,2061,2071) are the cumulative metric of these 4 states when the 1st bit (3011,3021,3031,3041).From the 2nd than rising abruptly, the cumulative metric of each state starts to have specific front bit cumulative metric value.Be calculated as example with the 2nd bit at the cumulative metric (3012) of S1 state below, the computational methods of cumulative metric are described.According to FM0 coding rule, the front state that S1 state is possible only has S2 and S4 two kinds.Decoding circuit compares the cumulative metric-2(3021 of S2 and S4 two states when the 1st bit) and 0(3041).Due to 0(3041) >-2(3021), so the 2nd bit equals the cumulative metric 0(3041 of the 1st bit in S4 state at the cumulative metric (3012) of S1 state) with the 2nd bit at the branch metric-2(2042 of S1 state) result-2 that is added.The rest may be inferred, can obtain all cumulative metric values (301,302,303,304) under 4 kinds of states.
3) recording status redirect relation;
Described state transition relation refers to 4 encoding states of some bits, respectively naturally by which state transition during previous bit.Comparative result when state transition relation is calculated by cumulative metric determines.Decoding circuit is when calculating the cumulative metric of a certain encoding state of current bit, all need the cumulative metric comparing two possible states of its previous bit, according to maximum likelihood rule, in the state that decoding circuit selects last bit these two possible, larger one of cumulative metric is as state before the redirect of this state current bit, and is recorded.
Optionally, the cumulative metric of two corresponding to a certain state of described current bit possible front states is equal, then any one in these two states can be selected as state before the redirect of this state of current bit, and recorded.
Optionally, the 1st bit of the continuous input signal of decoding circuit, whether the redirect relation of its front state according to inserting in coding the redundancy preface information determined can determine.
As shown in Figure 4, for continuous 6 bit input signal not determining redundancy preface information, except the 1st bit, each bit is thereafter all corresponding the record value of 4 state transition relations (401,402,403,404).From the 2nd than rising abruptly, each state starts the front state recording redirect.The state transition relation (4021) of the 2nd bit S1 state is example below, the recording method of description status redirect relation.According to FM0 coding rule, the front state that S1 state is possible only has S2 and S4 two kinds.Decoding circuit compares the cumulative metric-2(3021 of S2 and S4 two states when the 1st bit) and 0(3041).Due to 0(3041) >-2(3021), so record S4 is state (4012) before the redirect of the 2nd bit S1 state.The rest may be inferred, can obtain all state transition relations (401,402,403,404) under 4 kinds of states.
4) backtracking decoding
Described backtracking decoding refers to, decoding circuit according to traceback depth D, complete X bit cumulative metric calculate and state transition relation record after, from X bit maximum likelihood decoding state, according to the record of state transition relation, translate the source code value of (X-D) bit.
Described traceback depth D refers to the bit number of decoding circuit forward trace decoding.
Optionally, after the continuous input signal of decoding circuit, the redundancy ending information determined can be inserted, also can not insert redundancy ending information.
For the source code that the determination redundancy ending information inserted can be used to carry out recalling decoding, the maximum likelihood decoding state of described current bit, refers to the state corresponding to redundancy ending information.For the determination redundancy ending information inserted cannot be used to carry out backtracking decoding, or do not insert the source code determining redundancy ending information, the maximum likelihood decoding state of described current bit, refers to the state that in the cumulative metric of current bit, numerical value is maximum.Optionally, backtracking decoding is carried out for the determination redundancy ending information inserted cannot be used, or do not insert the source code determining redundancy ending information, there is in the cumulative metric of current bit multiple equal maximum, can select wherein any one as the maximum likelihood decoding state of current bit.
Optionally, for the end bit Y not determining redundancy ending information, can directly with its maximum likelihood decoding state for decoded result, also can by the degree of depth of cumulative metric and state transition relation be increased D bit, when calculating the cumulative metric of last D bit, use 0 as the branch metric of all states, then when (Y+D) bit, translates the decode value of Y bit.
Optionally, for do not determine redundancy ending information end bit before Z bit (wherein Z is integer and is less than D), can by shortening traceback depth, the maximum likelihood decoding state of end bit Y is used to recall the decoded result (Y-Z) bit, also can by the degree of depth of cumulative metric and state transition relation be increased D bit, when calculating the cumulative metric of last D bit, use 0 is as the branch metric of all states, again when (Z+D) bit, translate the decode value of Z bit.
As shown in Figure 5, for the continuous input signal of 6 bit not determining redundancy ending information, below for traceback depth D=2, the method for backtracking decoding is described.Because traceback depth is D=2, then when the 3rd bit, the source code of the 1st bit can be translated.Due to the 3rd bit and non-deterministic redundancy ending bit, its maximum likelihood decoding state is the maximum state S2(3023 of the 3rd bit cumulative metric value), according to state transition relation record table (401,402,403,404), front state corresponding to the 3rd bit S2 state is S4(4022), forward trace 1 bit, the front state that the S4 state of the 2nd bit is corresponding is S3(4042), then forward trace 1 bit, the coded message that S3 is corresponding is 0.Can obtain thus, the decoded result of the 1st bit is 0(5011).The rest may be inferred, can the 4th, the 5th, the 6th bit time obtain the decoded result (5012,5013,5014) of the 2nd, the 3rd, the 4th bit.Owing to not having redundancy ending information, when the 6th bit, except translating the 4th bit, the mode also will adjudicated with 1 bit backtracking and direct maximum likelihood state obtain the decoded result (5015,5016) of the 5th bit and the 6th bit.As shown in Figure 5, the maximum of 4 cumulative metrics of the 6th bit appears at (3036) in S3 state, and state is S1 before the redirect that the 6th bit S3 state records, because the coded message that S1 is corresponding is 1, coded message corresponding to S3 state is 0, the decoded result of the 5th bit is 1(5015), the decoded result of the 6th bit is 0(5016).
With reference to figure 6, under there is noise jamming condition with one below, have 1 bit determination redundancy preface information, 1 bit determination redundancy ending information, traceback depth is 3, total length is the continuous input signal code stream of 6 bits is example, introduces the specific embodiment of the present invention.
As shown in Figure 6, in this example, 6 bit source codes of FM0 coding are 010110(601).When encoding to this string source code, add the leading state S4(602 of redundancy of 1 bit) and the redundancy ending state S3(603 of 1 bit), thus define complete coding waveforms (604).Owing to receiving the interference of noise, in the decoding circuit input code flow (605) that sampling obtains, there is mistake.Wherein, 1 sample bits becomes blurred signal (-1,0) (606), and 1 sample bits becomes rub-out signal (-1 ,-1) (607).A string by the correlation of the decoding circuit input signal after noise jamming and this one of four states of S1, S2, S3, S4 according to this, the branch metric (608) of each bit of decoding circuit input signal can be obtained.In this set of branch metrics, because redundancy precedence bits (602) and redundancy ending bit (603) are all determine state, their branch metric is denoted as a numerical value 10(609,610 much larger than all the other branch metrics).By the adding up of forward direction, compare, select operation, can obtain according to the coding rule of FM0 coding the cumulative metric (611) corresponding to above-mentioned branch metric (608), and state transition relation record table (612).
Because the traceback depth used in example shown in Fig. 6 is 3, decoding circuit obtains the decode value of the 1st bit when it receives the 4th bit.Relatively the cumulative metric value of the 4th bit is known, and its maximum likelihood decoding state is S4, and before the redirect of its record, state is S3(615); And state is S1(614 before the redirect of the S3 state recording of the 3rd bit); Before the redirect of the S1 state recording of the 2nd bit, state is S2(613) because encoded radio corresponding to S2 is 0, so the decoded result of known 1st bit is 0(619).In like manner, the decoded result of the 2nd bit translates when the maximum likelihood decoding state S1 of acquisition the 5th bit: before the redirect of the S1 state recording of the 5th bit, state is S4(616), before the redirect of the S4 state recording of the 4th bit, state is S3(615), before the redirect of the S3 state recording of the 3rd bit, state is S1(614), because the encoded radio that S1 is corresponding is 1, so the decoded result of known 2nd bit is 1(620).In like manner, the decoded result of the 3rd bit translates when the maximum likelihood decoding state S3 of acquisition the 6th bit: before the redirect of the S3 state recording of the 6th bit, state is S1(617), before the redirect of the S1 state recording of the 5th bit, state is S4(616), before the redirect of the S4 state recording of the 4th bit, state is S3(615), because the encoded radio that S3 is corresponding is 0, so the decoded result of known 3rd bit is 0(621).In like manner, the decoded result of the 4th bit translates when obtaining the maximum likelihood decoding state S3 of redundancy ending bit: before the redirect of the S3 state recording of redundancy ending bit, state is S3(618), before the redirect of the S3 state recording of the 6th bit, state is S1(617), before the redirect of the S1 state recording of the 5th bit, state is S4(616), because the encoded radio that S4 is corresponding is 1, so the decoded result of known 4th bit is 1(622).The decoded result of the 5th bit is when obtaining the maximum likelihood decoding state S3 of redundancy ending bit, translated by the traceback depth reducing 1 bit: before the redirect of the S3 state recording of redundancy ending bit, state is S3(618), before the redirect of the S3 state recording of the 6th bit, state is S1(617), because the encoded radio that S1 is corresponding is 1, so the decoded result of known 5th bit is 1(623).The decoded result of the 6th bit is when obtaining the maximum likelihood decoding state S3 of redundancy ending bit, translated by the traceback depth reducing 2 bits: before the redirect of the S3 state recording of redundancy ending bit, state is S3(618), because the encoded radio that S1 is corresponding is 0, so the decoded result of known 6th bit is 0(624).Can obtain thus, the decoded result of 6 complete bits is 010110(619 ~ 624), consistent with source code (601).
Although the present invention illustrates as above by preferred embodiment, this preferred embodiment is also not used to limit the present invention.Those skilled in the art, without departing from the spirit and scope of the present invention, should have the ability make various correction to this preferred embodiment and supplement, therefore, protection scope of the present invention is as the criterion with the scope of claims.
Claims (7)
1. based on the coding/decoding method that the FM0 of viterbi algorithm encodes, it is characterized in that, this coding/decoding method comprises the following steps:
1. branch metric is formed to the input signal of decoding circuit: decoding circuit carries out sampling to source code and obtains corresponding input signal, the symbol S1 (1 of the first state of encoding by bit order and FM0, 1), be added after being successively multiplied, the symbol S2 (1 of the second state of then encoding with FM0,-1) be added after being successively multiplied, the symbol S3 (-1 of the third state of then encoding with FM0, 1) be added after being successively multiplied, the symbol S4 (-1 of the 4th kind of state that last and FM0 encodes,-1) be added after being successively multiplied, obtain the branch metric of four kinds of different conditions, combine successively, form the degree of branching scale of input signal according to signal bit order,
2. calculate cumulative metric: according to FM0 encode specific state transition rule, by a certain state corresponding to decoding circuit continuous print input signal current bit possible before the cumulative metric of state compare, select the cumulative metric with the front state of larger cumulative metric to carry out being added with the branch metric under this state current bit the cumulative metric obtaining described this state of current bit, form cumulative metric table;
3. recording status redirect relation: according to cumulative metric, meets the result of two kinds of cumulative metrics of FM0 encoding state redirect rule under more last bit, select a wherein larger cumulative metric, as state before the redirect of current bit current state; When two kinds of cumulative metric results are equal, make state before the redirect of current bit current state for optional one, form state transition relation record table;
4. decoding is recalled: according to the traceback depth D of setting, complete decoding circuit continuous print input signal X bit formation branch metric, calculate cumulative metric, after recording status redirect relation, from the maximum likelihood decoding state of X bit, according to the state transition relation of continuous D bit, select the encoded radio corresponding to state before the redirect of recording in X-D+1 bit, as the decode value of X-D bit.
2. the FM0 based on the viterbi algorithm according to claim 1 coding/decoding method of encoding, it is characterized in that, described input signal is the digital signal of FM0 coding, or on FM0 code signal basis, increase the digital signal of redundancy precedence bits, or on FM0 code signal basis, increase the digital signal of redundancy ending bit, or on FM0 code signal basis, increase the digital signal of redundancy precedence bits and redundancy ending bit simultaneously, or by a part for FM0 code signal signal as a whole, and the digital signal that remainder does not use FM0 to encode.
3. the FM0 based on the viterbi algorithm according to claim 1 coding/decoding method of encoding, is characterized in that, described input signal sampling, for the input signal of a bit, its sampling number is 2 times or 2
nsecondary, wherein N be greater than 1 positive integer.
4. the FM0 based on the viterbi algorithm according to claim 1 coding/decoding method of encoding, it is characterized in that, the cumulative metric of the two states of FM0 encoding state redirect rule is met under described last bit, when calculated input bit is the first bit of continuous input code stream, when there is not leading redundant bit, the cumulative metric of first bit 4 last bits of state is " 0 " entirely, or 4 other equal numerical value.
5. the FM0 based on the viterbi algorithm according to claim 1 coding/decoding method of encoding, it is characterized in that, the maximum likelihood decoding state of described X bit, the state corresponding to that in X bit 4 cumulative metrics, numerical value is maximum, or the state in several states that in X bit 4 cumulative metrics, numerical value is maximum corresponding to any one.
6. the FM0 based on the viterbi algorithm according to claim 1 coding/decoding method of encoding, is characterized in that, described traceback depth D be more than or equal to 1 positive integer.
7. the coding/decoding method that the FM0 based on viterbi algorithm according to any one of claim 1 to 6 encodes, it is characterized in that, when described traceback depth D and X bit sum are greater than whole source code length, decoded by the mode reducing traceback depth, or decoded by the mode of hard decision, or decoded by the mode increasing full 0 redundant input signal.
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